commit d36c52ea6bc22883ef381f6da1ac05ef7524f63a
author Ian Rogers <irogers@google.com> Mon Apr 09 16:29:25 2012 -0700
committer Ian Rogers <irogers@google.com> Mon Apr 09 19:45:49 2012 -0700
tree cc184142b857a666d4aca5d049852f123fa80dae
parent 82914b6164fd0109531391975389e4f0ff6832c8

Check for null array assignments inline. Tidy asm macros.

Tidy/fix array object stores to not pass incremented register to card
mark. Fix x86 register allocator clobbers. Clean runtime support
assembler macros to be more macrotized. Extra X86 shift assert.
Add X86 thread suspension down call.

Change-Id: Ida765dcba32404519fe7eb478f5628d46caf41f7

src/compiler/codegen/x86/X86/Factory.cc

diff --git a/src/compiler/codegen/x86/X86/Factory.cc b/src/compiler/codegen/x86/X86/Factory.cc
index 9421744..2bd5b42 100644
--- a/src/compiler/codegen/x86/X86/Factory.cc
+++ b/src/compiler/codegen/x86/X86/Factory.cc
@@ -173,6 +173,7 @@
 LIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1, int rSrc2)
 {
     X86OpCode opcode = kX86Nop;
+    bool src2_must_be_cx = false;
     switch (op) {
         // X86 unary opcodes
       case kOpMvn:
@@ -184,9 +185,9 @@
         // X86 binary opcodes
       case kOpSub: opcode = kX86Sub32RR; break;
       case kOpSbc: opcode = kX86Sbb32RR; break;
-      case kOpLsl: opcode = kX86Sal32RC; break;
-      case kOpLsr: opcode = kX86Shr32RC; break;
-      case kOpAsr: opcode = kX86Sar32RC; break;
+      case kOpLsl: opcode = kX86Sal32RC; src2_must_be_cx = true; break;
+      case kOpLsr: opcode = kX86Shr32RC; src2_must_be_cx = true; break;
+      case kOpAsr: opcode = kX86Sar32RC; src2_must_be_cx = true; break;
       case kOpMov: opcode = kX86Mov32RR; break;
       case kOpCmp: opcode = kX86Cmp32RR; break;
       case kOpAdd: opcode = kX86Add32RR; break;
@@ -202,6 +203,7 @@
         LOG(FATAL) << "Bad case in opRegReg " << op;
         break;
     }
+    CHECK(!src2_must_be_cx || rSrc2 == rCX);
     return newLIR2(cUnit, opcode, rDestSrc1, rSrc2);
 }
 

src/compiler/codegen/x86/X86RallocUtil.cc

diff --git a/src/compiler/codegen/x86/X86RallocUtil.cc b/src/compiler/codegen/x86/X86RallocUtil.cc
index 2971632..a85cb8a 100644
--- a/src/compiler/codegen/x86/X86RallocUtil.cc
+++ b/src/compiler/codegen/x86/X86RallocUtil.cc
@@ -134,6 +134,7 @@
     oatLockTemp(cUnit, rARG0);
     oatLockTemp(cUnit, rARG1);
     oatLockTemp(cUnit, rARG2);
+    oatLockTemp(cUnit, rARG3);
 }
 
 /* To be used when explicitly managing register use */
@@ -142,6 +143,7 @@
     oatFreeTemp(cUnit, rARG0);
     oatFreeTemp(cUnit, rARG1);
     oatFreeTemp(cUnit, rARG2);
+    oatFreeTemp(cUnit, rARG3);
 }
 
 /* Convert an instruction to a NOP */