Use arenas for the verifier
Improvements are from using arenas for verifier. The things that
were moved into arenas are register lines, reg types, and reg type
descriptors.
Also some minor cleanup. Fixed double space formatting error in
string piece.
========================================
Before:
=======================================
compile GmsCore 50x on host -j1:
real 3m5.510s
user 2m48.139s
sys 0m11.753s
50 random APKs:
real 1m18.157s
user 1m8.167s
sys 0m8.071s
RAM (GmsCore):
(threads: 1) arena alloc=0B java alloc=27MB native alloc=64MB free=792KB
(threads: 4) arena alloc=0B java alloc=27MB native alloc=64MB free=397KB
Perf:
=============================
After:
=============================
compile GmsCore 50x on host -j1:
real 2m31.455s
user 2m14.784s
sys 0m10.888s
50 random APKs:
Speed up from arena allocating:
real 1m12.094s
user 1m2.325s
sys 0m7.872s
Speed up from areans + CreateFindClassDefIndex + unordered_map for DexFileVerifier.
real 1m8.654s
user 0m58.955s
sys 0m7.777s
RAM (GmsCore):
(threads: 1) arena alloc=1049KB java alloc=27MB native alloc=65MB free=538KB
(threads: 4) arena alloc=4MB java alloc=27MB native alloc=69MB free=650KB
Perf on host key results:
_int_malloc: 3.60% -> 1.39%
malloc: 1.48% -> 0.65%
_int_free: 1.59% -> 0.61%
RegTypeCache::FromClass: 1.47% -> 0.86%
malloc_consolidate: 0.89% -> 0.63%
Real speed up is ~22% on GmsCore, ~14% on the set of 60 APKs.
Bug: 10921004
Change-Id: If13d4ab4284a176f93a26a412549b6b1149dfb16
diff --git a/runtime/verifier/method_verifier.h b/runtime/verifier/method_verifier.h
index ba694b7..7b51d6e 100644
--- a/runtime/verifier/method_verifier.h
+++ b/runtime/verifier/method_verifier.h
@@ -21,7 +21,10 @@
#include <sstream>
#include <vector>
+#include "base/arena_allocator.h"
#include "base/macros.h"
+#include "base/scoped_arena_containers.h"
+#include "base/stl_util.h"
#include "dex_file.h"
#include "handle.h"
#include "instruction_flags.h"
@@ -107,7 +110,7 @@
// execution of that instruction.
class PcToRegisterLineTable {
public:
- PcToRegisterLineTable() : size_(0) {}
+ explicit PcToRegisterLineTable(ScopedArenaAllocator& arena);
~PcToRegisterLineTable();
// Initialize the RegisterTable. Every instruction address can have a different set of information
@@ -116,14 +119,12 @@
void Init(RegisterTrackingMode mode, InstructionFlags* flags, uint32_t insns_size,
uint16_t registers_size, MethodVerifier* verifier);
- RegisterLine* GetLine(size_t idx) {
- DCHECK_LT(idx, size_);
- return register_lines_[idx];
+ RegisterLine* GetLine(size_t idx) const {
+ return register_lines_[idx].get();
}
private:
- std::unique_ptr<RegisterLine*[]> register_lines_;
- size_t size_;
+ ScopedArenaVector<ArenaUniquePtr<RegisterLine>> register_lines_;
DISALLOW_COPY_AND_ASSIGN(PcToRegisterLineTable);
};
@@ -240,7 +241,8 @@
// Accessors used by the compiler via CompilerCallback
const DexFile::CodeItem* CodeItem() const;
RegisterLine* GetRegLine(uint32_t dex_pc);
- const InstructionFlags& GetInstructionFlags(size_t index) const;
+ ALWAYS_INLINE const InstructionFlags& GetInstructionFlags(size_t index) const;
+ ALWAYS_INLINE InstructionFlags& GetInstructionFlags(size_t index);
mirror::ClassLoader* GetClassLoader() SHARED_REQUIRES(Locks::mutator_lock_);
mirror::DexCache* GetDexCache() SHARED_REQUIRES(Locks::mutator_lock_);
MethodReference GetMethodReference() const;
@@ -275,7 +277,14 @@
return IsConstructor() && !IsStatic();
}
+ ScopedArenaAllocator& GetArena() {
+ return arena_;
+ }
+
private:
+ void UninstantiableError(const char* descriptor);
+ static bool IsInstantiableOrPrimitive(mirror::Class* klass) SHARED_REQUIRES(Locks::mutator_lock_);
+
// Is the method being verified a constructor? See the comment on the field.
bool IsConstructor() const {
return is_constructor_;
@@ -687,19 +696,23 @@
// The thread we're verifying on.
Thread* const self_;
+ // Arena allocator.
+ ArenaStack arena_stack_;
+ ScopedArenaAllocator arena_;
+
RegTypeCache reg_types_;
PcToRegisterLineTable reg_table_;
// Storage for the register status we're currently working on.
- std::unique_ptr<RegisterLine> work_line_;
+ ArenaUniquePtr<RegisterLine> work_line_;
// The address of the instruction we're currently working on, note that this is in 2 byte
// quantities
uint32_t work_insn_idx_;
// Storage for the register status we're saving for later.
- std::unique_ptr<RegisterLine> saved_line_;
+ ArenaUniquePtr<RegisterLine> saved_line_;
const uint32_t dex_method_idx_; // The method we're working on.
// Its object representation if known.
@@ -715,7 +728,8 @@
const DexFile::CodeItem* const code_item_; // The code item containing the code for the method.
const RegType* declaring_class_; // Lazily computed reg type of the method's declaring class.
// Instruction widths and flags, one entry per code unit.
- std::unique_ptr<InstructionFlags[]> insn_flags_;
+ // Owned, but not unique_ptr since insn_flags_ are allocated in arenas.
+ ArenaUniquePtr<InstructionFlags[]> insn_flags_;
// The dex PC of a FindLocksAtDexPc request, -1 otherwise.
uint32_t interesting_dex_pc_;
// The container into which FindLocksAtDexPc should write the registers containing held locks,