Compiler: Take advantage of constant propagation
The common frontend tracks constants via a constant propagation pass.
When converting from MIR to GBC (for Portable) or LIR (for Quick),
recognize constant arguments and select more efficient codegen forms.
Note: we still have to flush constants to their associated vregs to
support deoptimization. There's quite a bit of possible code size
gain if we were to eliminate unnecessary stores or enhance the vmap
table to explicitly represent the ranges over which Dalvik vregs
are constant.
Also some minor code refactoring related to array operations. There
are sufficient architectural differences to make it worthwhile to
have target-dependent aget/aput generators. On Arm, this is mostly
beneficial to floating point array loads and stores.
This CL yields a ~0.8% decrease in code size over the framework,
and a nice pop to a few of the standard point benchmarks
(linpack: ~10%, cm: ~11%, scimark: ~13% - no significant change to
the others)
Change-Id: I2337e1aa0622b34a34c3775f8b7dbf5e6969da3e
diff --git a/src/compiler/codegen/arm/utility_arm.cc b/src/compiler/codegen/arm/utility_arm.cc
index 7f37bea..5c25eee 100644
--- a/src/compiler/codegen/arm/utility_arm.cc
+++ b/src/compiler/codegen/arm/utility_arm.cc
@@ -126,6 +126,21 @@
return value | ((0x8 + z_leading) << 7); /* [01000..11111]:bcdefgh */
}
+bool ArmCodegen::InexpensiveConstant(int reg, int value)
+{
+ bool res = false;
+ if (ARM_FPREG(reg)) {
+ res = (EncodeImmSingle(value) >= 0);
+ } else {
+ if (ARM_LOWREG(reg) && (value >= 0) && (IsUint(8, value))) {
+ res = true;
+ } else {
+ res = (ModifiedImmediate(value) >= 0) || (ModifiedImmediate(~value) >= 0);
+ }
+ }
+ return res;
+}
+
/*
* Load a immediate using a shortcut if possible; otherwise
* grab from the per-translation literal pool.
@@ -1011,11 +1026,6 @@
return StoreBaseDispBody(cu, rBase, displacement, r_src_lo, r_src_hi, kLong);
}
-void ArmCodegen::LoadPair(CompilationUnit* cu, int base, int low_reg, int high_reg)
-{
- LoadBaseDispWide(cu, base, 0, low_reg, high_reg, INVALID_SREG);
-}
-
LIR* ArmCodegen::OpFpRegCopy(CompilationUnit* cu, int r_dest, int r_src)
{
int opcode;