Remove unnecessary cache alignment fixes

This change reverts two alignment changes relating to 32-bit ARM
runtimes on 32-bit ARMv7 kernels. These were speculative fixes before
the problem was properly understood.

This means code alignment in the JIT code cache is determined by
GetInstructionSetAlignment() for all architectures.

The first commit removed is 521ff988097af7c79a0b94368d33d21f7c7dfb7d.

The second is df1ab205c78fbfae152947e9618d8871a42a744b.

Test: manual (see b/132205399)
Bug: 136150630
Bug: 132205399
Change-Id: I9e5ed4b2271df80b7c7ea81cdb088b45c456b86a
diff --git a/runtime/jit/jit_code_cache.cc b/runtime/jit/jit_code_cache.cc
index dd1dbea..709882c 100644
--- a/runtime/jit/jit_code_cache.cc
+++ b/runtime/jit/jit_code_cache.cc
@@ -373,7 +373,7 @@
 }
 
 static uintptr_t FromCodeToAllocation(const void* code) {
-  size_t alignment = GetJitCodeAlignment();
+  size_t alignment = GetInstructionSetAlignment(kRuntimeISA);
   return reinterpret_cast<uintptr_t>(code) - RoundUp(sizeof(OatQuickMethodHeader), alignment);
 }
 
diff --git a/runtime/jit/jit_memory_region.cc b/runtime/jit/jit_memory_region.cc
index 2db5245..a39e121 100644
--- a/runtime/jit/jit_memory_region.cc
+++ b/runtime/jit/jit_memory_region.cc
@@ -303,7 +303,7 @@
                                              bool has_should_deoptimize_flag) {
   ScopedCodeCacheWrite scc(*this);
 
-  size_t alignment = GetJitCodeAlignment();
+  size_t alignment = GetInstructionSetAlignment(kRuntimeISA);
   // Ensure the header ends up at expected instruction alignment.
   size_t header_size = RoundUp(sizeof(OatQuickMethodHeader), alignment);
   size_t total_size = header_size + code_size;
diff --git a/runtime/jit/jit_memory_region.h b/runtime/jit/jit_memory_region.h
index b5f808d..f325480 100644
--- a/runtime/jit/jit_memory_region.h
+++ b/runtime/jit/jit_memory_region.h
@@ -40,17 +40,6 @@
 // architectures.
 static constexpr int kJitCodeAccountingBytes = 16;
 
-size_t inline GetJitCodeAlignment() {
-  if (kRuntimeISA == InstructionSet::kArm || kRuntimeISA == InstructionSet::kThumb2) {
-    // Some devices with 32-bit ARM kernels need additional JIT code alignment when using dual
-    // view JIT (b/132205399). The alignment returned here coincides with the typical ARM d-cache
-    // line (though the value should be probed ideally). Both the method header and code in the
-    // cache are aligned to this size.
-    return 64;
-  }
-  return GetInstructionSetAlignment(kRuntimeISA);
-}
-
 // Helper to get the size required for emitting `number_of_roots` in the
 // data portion of a JIT memory region.
 uint32_t inline ComputeRootTableSize(uint32_t number_of_roots) {