commit ec95f72490de0a7f86c35de3d00b50bb80d036a1
author Vladimir Kostyukov <vladimir.kostyukov@intel.com> Wed Jul 23 12:10:07 2014 +0700
committer Vladimir Kostyukov <vladimir.kostyukov@intel.com> Wed Jul 30 07:41:43 2014 +0000
tree d6576fb0ada8810d721f3e989e03e861e4dac03f
parent f90283f61d6ca37abf3a9fb8447d05e79caf0160

ART: Correct disassembling of 64bit immediates on x86_64

The patch fixes an issue with disassembling 'movsxd' and 'movabsq'
instructions altered with 64bit immediates: not only a REX.W prefix
may be prepended to these instructions.

Change-Id: Ida7c7b368327a6b5cae1ff12ec00ceb0769c0a3d
Signed-off-by: Vladimir Kostyukov <vladimir.kostyukov@intel.com>

disassembler/disassembler_x86.cc

diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc
index 101a55d..0ca8962 100644
--- a/disassembler/disassembler_x86.cc
+++ b/disassembler/disassembler_x86.cc
@@ -268,7 +268,7 @@
     target_specific = true;
     break;
   case 0x63:
-    if (rex == 0x48) {
+    if ((rex & REX_W) != 0) {
       opcode << "movsxd";
       has_modrm = true;
       load = true;
@@ -959,7 +959,7 @@
     byte_operand = true;
     break;
   case 0xB8: case 0xB9: case 0xBA: case 0xBB: case 0xBC: case 0xBD: case 0xBE: case 0xBF:
-    if (rex == 0x48) {
+    if ((rex & REX_W) != 0) {
       opcode << "movabsq";
       immediate_bytes = 8;
       reg_in_opcode = true;