tree 5b29b62d8d700b96a8f99c421c007bbdcfed79f6
parent 3ba5511665ffd31cc766fe7774a94eb18696a845
author Bill Buzbee <buzbee@google.com> 1400162274 +0000
committer buzbee <buzbee@google.com> 1400183582 -0700

Quick Compiler: fix Arm cts failures

Fixes move_wide_16#testN1, move_wide_16#testN2

Two bugs for the price of one (thanks CTS!)

First, the new stack overflow checking code was broken for very
large frames.  For Arm on method entry, we only have 1 available
temp register, r12, until argument registers are flushed.
Previously, for explicit checks on large frames,
r12 was immediately loaded with the stack_end value.  However,
later on when the frame is extended, if the frame size exceeds
the range of a reg-reg-imm subtract, the codegen utilities will
allocate a new temporary register to complete the operation. r12
was getting clobbered.  Similarly, for medium-large frames r12
could get clobbered during frame creation.

What we should always do when directly using fixed registers like
this is to lock them to prevent them from being allocated as a
temp.  The other half of the first bug is easily solved by delaying
the load of stack_end until after the new sp is computed.  We'll
increase the stall cost, but this is an uncommon case.

The second bug was likely a typo in LoadValueDisp().  I'm a bit
surprised we hadn't hit this one earlier - but perhaps it was
recently introduced.  The wrong base register was being used in
the non-float, wide, excessive offset case (which I suppose is also
somewhat uncommon).

Cherry-pick of internal commit If5b30f729e31d86db604045dd7581fd4626e0b55

Change-Id: If5b30f729e31d86db604045dd7581fd4626e0b55