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Ian Rogers3a5c1ce2012-02-29 10:06:46 -08001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "disassembler_arm.h"
18
Anton Kirilov29b0cde2016-09-06 13:01:03 +010019#include <memory>
20#include <string>
Ian Rogers3a5c1ce2012-02-29 10:06:46 -080021
Andreas Gampebda1d602016-08-29 17:43:45 -070022#include "android-base/logging.h"
Andreas Gampebda1d602016-08-29 17:43:45 -070023
Vladimir Marko55d7c182015-01-05 15:17:01 +000024#include "arch/arm/registers_arm.h"
Andreas Gampe2a5c4682015-08-14 08:22:54 -070025#include "base/bit_utils.h"
Andreas Gampebda1d602016-08-29 17:43:45 -070026
Anton Kirilov29b0cde2016-09-06 13:01:03 +010027#pragma GCC diagnostic push
28#pragma GCC diagnostic ignored "-Wshadow"
29#include "aarch32/instructions-aarch32.h"
30#include "aarch32/disasm-aarch32.h"
31#pragma GCC diagnostic pop
Elliott Hughes0f3c5532012-03-30 14:51:51 -070032
Ian Rogers3a5c1ce2012-02-29 10:06:46 -080033namespace art {
34namespace arm {
35
Anton Kirilov29b0cde2016-09-06 13:01:03 +010036using vixl::aarch32::MemOperand;
37using vixl::aarch32::PrintDisassembler;
38using vixl::aarch32::pc;
Ian Rogersb23a7722012-10-09 16:54:26 -070039
Anton Kirilov29b0cde2016-09-06 13:01:03 +010040static const vixl::aarch32::Register tr(TR);
41
42class DisassemblerArm::CustomDisassembler FINAL : public PrintDisassembler {
43 class CustomDisassemblerStream FINAL : public DisassemblerStream {
44 public:
45 CustomDisassemblerStream(std::ostream& os,
46 const CustomDisassembler* disasm,
47 const DisassemblerOptions* options)
48 : DisassemblerStream(os), disasm_(disasm), options_(options) {}
49
50 DisassemblerStream& operator<<(const PrintLabel& label) OVERRIDE {
51 const LocationType type = label.GetLocationType();
52
53 switch (type) {
54 case kLoadByteLocation:
55 case kLoadHalfWordLocation:
56 case kLoadWordLocation:
57 case kLoadDoubleWordLocation:
58 case kLoadSignedByteLocation:
59 case kLoadSignedHalfWordLocation:
60 case kLoadSinglePrecisionLocation:
61 case kLoadDoublePrecisionLocation:
62 case kVld1Location:
63 case kVld2Location:
64 case kVld3Location:
65 case kVld4Location: {
Scott Wakelingb77051e2016-11-21 19:46:00 +000066 const uintptr_t pc_delta = label.GetLabel()->GetPcOffset();
Anton Kirilov29b0cde2016-09-06 13:01:03 +010067 const int32_t offset = label.GetLabel()->GetLocation();
68
69 os() << "[pc, #" << offset - pc_delta << "]";
70 PrintLiteral(type, offset);
71 return *this;
72 }
73 default:
74 return DisassemblerStream::operator<<(label);
75 }
Ian Rogers3a5c1ce2012-02-29 10:06:46 -080076 }
Ian Rogers3a5c1ce2012-02-29 10:06:46 -080077
Scott Wakelingb77051e2016-11-21 19:46:00 +000078 DisassemblerStream& operator<<(vixl::aarch32::Register reg) OVERRIDE {
Anton Kirilov29b0cde2016-09-06 13:01:03 +010079 if (reg.Is(tr)) {
80 os() << "tr";
81 return *this;
Elliott Hughes77405792012-03-15 15:22:12 -070082 } else {
Anton Kirilov29b0cde2016-09-06 13:01:03 +010083 return DisassemblerStream::operator<<(reg);
Elliott Hughes77405792012-03-15 15:22:12 -070084 }
Elliott Hughes77405792012-03-15 15:22:12 -070085 }
Ian Rogers3a5c1ce2012-02-29 10:06:46 -080086
Anton Kirilov29b0cde2016-09-06 13:01:03 +010087 DisassemblerStream& operator<<(const MemOperand& operand) OVERRIDE {
88 // VIXL must use a PrintLabel object whenever the base register is PC;
89 // the following check verifies this invariant, and guards against bugs.
90 DCHECK(!operand.GetBaseRegister().Is(pc));
91 DisassemblerStream::operator<<(operand);
Vladimir Markodd577a32013-11-07 19:25:24 +000092
Anton Kirilov29b0cde2016-09-06 13:01:03 +010093 if (operand.GetBaseRegister().Is(tr) && operand.IsImmediate()) {
94 os() << " ; ";
95 options_->thread_offset_name_function_(os(), operand.GetOffsetImmediate());
96 }
Vladimir Markodd577a32013-11-07 19:25:24 +000097
Anton Kirilov29b0cde2016-09-06 13:01:03 +010098 return *this;
Elliott Hughes77405792012-03-15 15:22:12 -070099 }
Ian Rogers3a5c1ce2012-02-29 10:06:46 -0800100
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100101 DisassemblerStream& operator<<(const vixl::aarch32::AlignedMemOperand& operand) OVERRIDE {
102 // VIXL must use a PrintLabel object whenever the base register is PC;
103 // the following check verifies this invariant, and guards against bugs.
104 DCHECK(!operand.GetBaseRegister().Is(pc));
105 return DisassemblerStream::operator<<(operand);
Ian Rogersa9650dd2013-10-04 08:23:32 -0700106 }
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100107
108 private:
109 void PrintLiteral(LocationType type, int32_t offset);
110
111 const CustomDisassembler* disasm_;
112 const DisassemblerOptions* options_;
113 };
114
115 public:
116 CustomDisassembler(std::ostream& os, const DisassemblerOptions* options)
Alexandre Rames8872cad2016-09-26 14:14:01 +0100117 : PrintDisassembler(&disassembler_stream_), disassembler_stream_(os, this, options) {}
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100118
Scott Wakelingb77051e2016-11-21 19:46:00 +0000119 void PrintCodeAddress(uint32_t prog_ctr) OVERRIDE {
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100120 os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << prog_ctr << ": ";
Ian Rogersa9650dd2013-10-04 08:23:32 -0700121 }
Ian Rogersa9650dd2013-10-04 08:23:32 -0700122
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100123 private:
Alexandre Rames8872cad2016-09-26 14:14:01 +0100124 CustomDisassemblerStream disassembler_stream_;
Vladimir Marko55d7c182015-01-05 15:17:01 +0000125};
Vladimir Marko55d7c182015-01-05 15:17:01 +0000126
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100127void DisassemblerArm::CustomDisassembler::CustomDisassemblerStream::PrintLiteral(LocationType type,
128 int32_t offset) {
129 // Literal offsets are not required to be aligned, so we may need unaligned access.
Vladimir Marko55d7c182015-01-05 15:17:01 +0000130 typedef const int16_t unaligned_int16_t __attribute__ ((aligned (1)));
131 typedef const uint16_t unaligned_uint16_t __attribute__ ((aligned (1)));
132 typedef const int32_t unaligned_int32_t __attribute__ ((aligned (1)));
Vladimir Marko55d7c182015-01-05 15:17:01 +0000133 typedef const int64_t unaligned_int64_t __attribute__ ((aligned (1)));
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100134 typedef const float unaligned_float __attribute__ ((aligned (1)));
135 typedef const double unaligned_double __attribute__ ((aligned (1)));
Vladimir Marko55d7c182015-01-05 15:17:01 +0000136
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100137 // Zeros are used for the LocationType values this function does not care about.
138 const size_t literal_size[kVst4Location + 1] = {
139 0, 0, 0, 0, sizeof(uint8_t), sizeof(unaligned_uint16_t), sizeof(unaligned_int32_t),
140 sizeof(unaligned_int64_t), sizeof(int8_t), sizeof(unaligned_int16_t),
141 sizeof(unaligned_float), sizeof(unaligned_double)};
142 const uintptr_t begin = reinterpret_cast<uintptr_t>(options_->base_address_);
143 const uintptr_t end = reinterpret_cast<uintptr_t>(options_->end_address_);
Scott Wakelingb77051e2016-11-21 19:46:00 +0000144 uintptr_t literal_addr = RoundDown(disasm_->GetCodeAddress(), vixl::aarch32::kRegSizeInBytes) + offset;
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100145
146 if (!options_->absolute_addresses_) {
147 literal_addr += begin;
Aart Bikd3059e72016-05-11 10:30:47 -0700148 }
149
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100150 os() << " ; ";
151
152 // Bail out if not within expected buffer range to avoid trying to fetch invalid literals
153 // (we can encounter them when interpreting raw data as instructions).
154 if (literal_addr < begin || literal_addr > end - literal_size[type]) {
155 os() << "(?)";
156 } else {
157 switch (type) {
158 case kLoadByteLocation:
159 os() << *reinterpret_cast<const uint8_t*>(literal_addr);
160 break;
161 case kLoadHalfWordLocation:
162 os() << *reinterpret_cast<unaligned_uint16_t*>(literal_addr);
163 break;
164 case kLoadWordLocation: {
165 const int32_t value = *reinterpret_cast<unaligned_int32_t*>(literal_addr);
166 os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << value;
167 break;
168 }
169 case kLoadDoubleWordLocation: {
170 const int64_t value = *reinterpret_cast<unaligned_int64_t*>(literal_addr);
171 os() << "0x" << std::hex << std::setw(16) << std::setfill('0') << value;
172 break;
173 }
174 case kLoadSignedByteLocation:
175 os() << *reinterpret_cast<const int8_t*>(literal_addr);
176 break;
177 case kLoadSignedHalfWordLocation:
178 os() << *reinterpret_cast<unaligned_int16_t*>(literal_addr);
179 break;
180 case kLoadSinglePrecisionLocation:
181 os() << *reinterpret_cast<unaligned_float*>(literal_addr);
182 break;
183 case kLoadDoublePrecisionLocation:
184 os() << *reinterpret_cast<unaligned_double*>(literal_addr);
185 break;
186 default:
187 UNIMPLEMENTED(FATAL) << "Unexpected literal type: " << type;
188 }
Vladimir Marko55d7c182015-01-05 15:17:01 +0000189 }
Vladimir Markoc777e0d2014-04-03 17:59:02 +0100190}
191
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100192DisassemblerArm::DisassemblerArm(DisassemblerOptions* options)
193 : Disassembler(options), disasm_(std::make_unique<CustomDisassembler>(output_, options)) {}
Elliott Hughes77405792012-03-15 15:22:12 -0700194
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100195size_t DisassemblerArm::Dump(std::ostream& os, const uint8_t* begin) {
196 uintptr_t next;
197 // Remove the Thumb specifier bit; no effect if begin does not point to T32 code.
198 const uintptr_t instr_ptr = reinterpret_cast<uintptr_t>(begin) & ~1;
Aart Bikd3059e72016-05-11 10:30:47 -0700199
Scott Wakelingb77051e2016-11-21 19:46:00 +0000200 const bool is_t32 = (reinterpret_cast<uintptr_t>(begin) & 1) != 0;
201 disasm_->SetCodeAddress(GetPc(instr_ptr));
Dave Allison70202782013-10-22 17:52:19 -0700202
Scott Wakelingb77051e2016-11-21 19:46:00 +0000203 if (is_t32) {
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100204 const uint16_t* const ip = reinterpret_cast<const uint16_t*>(instr_ptr);
Scott Wakelingb77051e2016-11-21 19:46:00 +0000205 const uint16_t* const end_address = reinterpret_cast<const uint16_t*>(
206 GetDisassemblerOptions()->end_address_);
207 next = reinterpret_cast<uintptr_t>(disasm_->DecodeT32At(ip, end_address));
Ian Rogers3a5c1ce2012-02-29 10:06:46 -0800208 } else {
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100209 const uint32_t* const ip = reinterpret_cast<const uint32_t*>(instr_ptr);
210 next = reinterpret_cast<uintptr_t>(disasm_->DecodeA32At(ip));
Ian Rogers3a5c1ce2012-02-29 10:06:46 -0800211 }
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100212
213 os << output_.str();
214 output_.str(std::string());
215 return next - instr_ptr;
216}
217
218void DisassemblerArm::Dump(std::ostream& os, const uint8_t* begin, const uint8_t* end) {
219 DCHECK_LE(begin, end);
220
221 // Remove the Thumb specifier bit; no effect if begin does not point to T32 code.
222 const uintptr_t base = reinterpret_cast<uintptr_t>(begin) & ~1;
223
Scott Wakelingb77051e2016-11-21 19:46:00 +0000224 const bool is_t32 = (reinterpret_cast<uintptr_t>(begin) & 1) != 0;
225 disasm_->SetCodeAddress(GetPc(base));
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100226
Scott Wakelingb77051e2016-11-21 19:46:00 +0000227 if (is_t32) {
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100228 // The Thumb specifier bits cancel each other.
229 disasm_->DisassembleT32Buffer(reinterpret_cast<const uint16_t*>(base), end - begin);
230 } else {
231 disasm_->DisassembleA32Buffer(reinterpret_cast<const uint32_t*>(base), end - begin);
232 }
233
234 os << output_.str();
235 output_.str(std::string());
Ian Rogers3a5c1ce2012-02-29 10:06:46 -0800236}
237
238} // namespace arm
239} // namespace art