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gerrit-public.fairphone.software / platform / art / 664999a12d6fc8a8ef5c0519b12ec1e8a51bb085 / . / compiler / utils / assembler_thumb_test_expected.cc.inc
blob: 842716fac33abb917284237728821352e932a949 [file] [log] [blame]
Artem Serov12e097c2016-08-08 15:13:26 +0100[diff] [blame]1const char* const VixlJniHelpersResults[] = {
Artem Serov8f840f82016-12-15 17:56:27 +0000[diff] [blame]2 " 0: e92d 4de0 stmdb sp!, {r5, r6, r7, r8, sl, fp, lr}\n",
3 " 4: ed2d 8a10 vpush {s16-s31}\n",
4 " 8: b089 sub sp, #36 ; 0x24\n",
5 " a: 9000 str r0, [sp, #0]\n",
6 " c: 9121 str r1, [sp, #132] ; 0x84\n",
7 " e: ed8d 0a22 vstr s0, [sp, #136] ; 0x88\n",
8 " 12: 9223 str r2, [sp, #140] ; 0x8c\n",
9 " 14: 9324 str r3, [sp, #144] ; 0x90\n",
10 " 16: b088 sub sp, #32\n",
11 " 18: f5ad 5d80 sub.w sp, sp, #4096 ; 0x1000\n",
12 " 1c: 9808 ldr r0, [sp, #32]\n",
13 " 1e: 981f ldr r0, [sp, #124] ; 0x7c\n",
14 " 20: 9821 ldr r0, [sp, #132] ; 0x84\n",
15 " 22: 98ff ldr r0, [sp, #1020] ; 0x3fc\n",
16 " 24: f8dd 0400 ldr.w r0, [sp, #1024] ; 0x400\n",
17 " 28: f8dd cffc ldr.w ip, [sp, #4092] ; 0xffc\n",
18 " 2c: f50d 5c80 add.w ip, sp, #4096 ; 0x1000\n",
19 " 30: f8dc c000 ldr.w ip, [ip]\n",
20 " 34: f8d9 c200 ldr.w ip, [r9, #512] ; 0x200\n",
21 " 38: f8dc 0080 ldr.w r0, [ip, #128] ; 0x80\n",
22 " 3c: 9008 str r0, [sp, #32]\n",
23 " 3e: 901f str r0, [sp, #124] ; 0x7c\n",
24 " 40: 9021 str r0, [sp, #132] ; 0x84\n",
25 " 42: 90ff str r0, [sp, #1020] ; 0x3fc\n",
26 " 44: f8cd 0400 str.w r0, [sp, #1024] ; 0x400\n",
27 " 48: f8cd cffc str.w ip, [sp, #4092] ; 0xffc\n",
28 " 4c: f84d 5d04 str.w r5, [sp, #-4]!\n",
29 " 50: f50d 5580 add.w r5, sp, #4096 ; 0x1000\n",
30 " 54: f8c5 c004 str.w ip, [r5, #4]\n",
31 " 58: f85d 5b04 ldr.w r5, [sp], #4\n",
32 " 5c: f04f 0cff mov.w ip, #255 ; 0xff\n",
33 " 60: f8cd c030 str.w ip, [sp, #48] ; 0x30\n",
34 " 64: f06f 4c7f mvn.w ip, #4278190080 ; 0xff000000\n",
35 " 68: f8cd c030 str.w ip, [sp, #48] ; 0x30\n",
36 " 6c: f8cd c030 str.w ip, [sp, #48] ; 0x30\n",
37 " 70: f8cd c030 str.w ip, [sp, #48] ; 0x30\n",
38 " 74: 900c str r0, [sp, #48] ; 0x30\n",
39 " 76: f8dd c030 ldr.w ip, [sp, #48] ; 0x30\n",
40 " 7a: f8cd c034 str.w ip, [sp, #52] ; 0x34\n",
41 " 7e: f50d 5c80 add.w ip, sp, #4096 ; 0x1000\n",
42 " 82: f8c9 c200 str.w ip, [r9, #512] ; 0x200\n",
43 " 86: f8c9 d200 str.w sp, [r9, #512] ; 0x200\n",
44 " 8a: f8d0 c030 ldr.w ip, [r0, #48] ; 0x30\n",
45 " 8e: 47e0 blx ip\n",
46 " 90: f8dd c02c ldr.w ip, [sp, #44] ; 0x2c\n",
47 " 94: f8cd c030 str.w ip, [sp, #48] ; 0x30\n",
48 " 98: f8d9 c200 ldr.w ip, [r9, #512] ; 0x200\n",
49 " 9c: f8cd c02c str.w ip, [sp, #44] ; 0x2c\n",
50 " a0: f8dd c02c ldr.w ip, [sp, #44] ; 0x2c\n",
51 " a4: f8cd c030 str.w ip, [sp, #48] ; 0x30\n",
52 " a8: 4648 mov r0, r9\n",
53 " aa: f8cd 9030 str.w r9, [sp, #48] ; 0x30\n",
54 " ae: 4684 mov ip, r0\n",
55 " b0: f1bc 0f00 cmp.w ip, #0\n",
56 " b4: bf18 it ne\n",
57 " b6: f10d 0c30 addne.w ip, sp, #48 ; 0x30\n",
58 " ba: f10d 0c30 add.w ip, sp, #48 ; 0x30\n",
59 " be: f1bc 0f00 cmp.w ip, #0\n",
60 " c2: bf0c ite eq\n",
61 " c4: 2000 moveq r0, #0\n",
62 " c6: a80c addne r0, sp, #48 ; 0x30\n",
63 " c8: f8dd c040 ldr.w ip, [sp, #64] ; 0x40\n",
64 " cc: f1bc 0f00 cmp.w ip, #0\n",
65 " d0: bf18 it ne\n",
66 " d2: f10d 0c40 addne.w ip, sp, #64 ; 0x40\n",
67 " d6: f8cd c030 str.w ip, [sp, #48] ; 0x30\n",
68 " da: f1bc 0f00 cmp.w ip, #0\n",
69 " de: bf0c ite eq\n",
70 " e0: 2000 moveq r0, #0\n",
71 " e2: 4668 movne r0, sp\n",
72 " e4: f1bc 0f00 cmp.w ip, #0\n",
73 " e8: bf0c ite eq\n",
74 " ea: 2000 moveq r0, #0\n",
75 " ec: f20d 4001 addwne r0, sp, #1025 ; 0x401\n",
76 " f0: f1bc 0f00 cmp.w ip, #0\n",
77 " f4: bf18 it ne\n",
78 " f6: f20d 4c01 addwne ip, sp, #1025 ; 0x401\n",
Nicolas Geoffray664999a2019-12-03 08:47:26 +0000[diff] [blame^]79 " fa: f8d9 c09c ldr.w ip, [r9, #156] ; 0x9c\n",
Artem Serov8f840f82016-12-15 17:56:27 +0000[diff] [blame]80 " fe: f1bc 0f00 cmp.w ip, #0\n",
Artem Serovf2665fa2016-12-21 18:42:21 +0000[diff] [blame]81 " 102: d171 bne.n 1e8 <VixlJniHelpers+0x1e8>\n",
Artem Serov8f840f82016-12-15 17:56:27 +0000[diff] [blame]82 " 104: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
83 " 108: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
84 " 10c: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
85 " 110: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
86 " 114: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
87 " 118: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
88 " 11c: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
89 " 120: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
90 " 124: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
91 " 128: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
92 " 12c: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
93 " 130: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
94 " 134: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
95 " 138: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
96 " 13c: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
97 " 140: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
98 " 144: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
99 " 148: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
100 " 14c: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
101 " 150: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
102 " 154: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
103 " 158: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
104 " 15c: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
105 " 160: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
106 " 164: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
107 " 168: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
108 " 16c: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
109 " 170: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
110 " 174: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
111 " 178: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
112 " 17c: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
113 " 180: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
114 " 184: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
115 " 188: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
116 " 18c: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
117 " 190: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
118 " 194: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
119 " 198: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
120 " 19c: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
121 " 1a0: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
122 " 1a4: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
123 " 1a8: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
124 " 1ac: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
125 " 1b0: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
126 " 1b4: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
127 " 1b8: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
128 " 1bc: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
129 " 1c0: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
130 " 1c4: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
131 " 1c8: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
132 " 1cc: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
133 " 1d0: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
134 " 1d4: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
135 " 1d8: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
136 " 1dc: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
Artem Serovf2665fa2016-12-21 18:42:21 +0000[diff] [blame]137 " 1e0: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
138 " 1e4: f000 b802 b.w 1ec <VixlJniHelpers+0x1ec>\n",
Roland Levillain6d729a72017-06-30 18:34:01 +0100[diff] [blame]139 " 1e8: f000 b81b b.w 222 <VixlJniHelpers+0x222>\n",
Artem Serov8f840f82016-12-15 17:56:27 +0000[diff] [blame]140 " 1ec: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
141 " 1f0: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
142 " 1f4: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
143 " 1f8: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
144 " 1fc: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
145 " 200: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
146 " 204: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
147 " 208: f8cd c7ff str.w ip, [sp, #2047] ; 0x7ff\n",
148 " 20c: f50d 5d80 add.w sp, sp, #4096 ; 0x1000\n",
149 " 210: b008 add sp, #32\n",
150 " 212: b009 add sp, #36 ; 0x24\n",
151 " 214: ecbd 8a10 vpop {s16-s31}\n",
Roland Levillain6d729a72017-06-30 18:34:01 +0100[diff] [blame]152 " 218: e8bd 4de0 ldmia.w sp!, {r5, r6, r7, r8, sl, fp, lr}\n",
153 " 21c: f8d9 8034 ldr.w r8, [r9, #52] ; 0x34\n",
154 " 220: 4770 bx lr\n",
155 " 222: 4660 mov r0, ip\n",
Nicolas Geoffray664999a2019-12-03 08:47:26 +0000[diff] [blame^]156 " 224: f8d9 c2e4 ldr.w ip, [r9, #740] ; 0x2e4\n",
Roland Levillain6d729a72017-06-30 18:34:01 +0100[diff] [blame]157 " 228: 47e0 blx ip\n",
Artem Serov12e097c2016-08-08 15:13:26 +0100[diff] [blame]158 nullptr
159};
160
161const char* const VixlLoadFromOffsetResults[] = {
162 " 0: 68e2 ldr r2, [r4, #12]\n",
163 " 2: f8d4 2fff ldr.w r2, [r4, #4095] ; 0xfff\n",
164 " 6: f504 5280 add.w r2, r4, #4096 ; 0x1000\n",
165 " a: 6812 ldr r2, [r2, #0]\n",
166 " c: f504 1280 add.w r2, r4, #1048576 ; 0x100000\n",
167 " 10: f8d2 20a4 ldr.w r2, [r2, #164] ; 0xa4\n",
168 " 14: f44f 5280 mov.w r2, #4096 ; 0x1000\n",
169 " 18: f2c0 0210 movt r2, #16\n",
170 " 1c: 4422 add r2, r4\n",
171 " 1e: 6812 ldr r2, [r2, #0]\n",
172 " 20: f44f 5c80 mov.w ip, #4096 ; 0x1000\n",
173 " 24: f2c0 0c10 movt ip, #16\n",
174 " 28: 4464 add r4, ip\n",
175 " 2a: 6824 ldr r4, [r4, #0]\n",
176 " 2c: 89a2 ldrh r2, [r4, #12]\n",
177 " 2e: f8b4 2fff ldrh.w r2, [r4, #4095] ; 0xfff\n",
178 " 32: f504 5280 add.w r2, r4, #4096 ; 0x1000\n",
179 " 36: 8812 ldrh r2, [r2, #0]\n",
180 " 38: f504 1280 add.w r2, r4, #1048576 ; 0x100000\n",
181 " 3c: f8b2 20a4 ldrh.w r2, [r2, #164] ; 0xa4\n",
182 " 40: f44f 5280 mov.w r2, #4096 ; 0x1000\n",
183 " 44: f2c0 0210 movt r2, #16\n",
184 " 48: 4422 add r2, r4\n",
185 " 4a: 8812 ldrh r2, [r2, #0]\n",
186 " 4c: f44f 5c80 mov.w ip, #4096 ; 0x1000\n",
187 " 50: f2c0 0c10 movt ip, #16\n",
188 " 54: 4464 add r4, ip\n",
189 " 56: 8824 ldrh r4, [r4, #0]\n",
190 " 58: e9d4 2303 ldrd r2, r3, [r4, #12]\n",
191 " 5c: e9d4 23ff ldrd r2, r3, [r4, #1020] ; 0x3fc\n",
192 " 60: f504 6280 add.w r2, r4, #1024 ; 0x400\n",
193 " 64: e9d2 2300 ldrd r2, r3, [r2]\n",
194 " 68: f504 2280 add.w r2, r4, #262144 ; 0x40000\n",
195 " 6c: e9d2 2329 ldrd r2, r3, [r2, #164] ; 0xa4\n",
196 " 70: f44f 6280 mov.w r2, #1024 ; 0x400\n",
197 " 74: f2c0 0204 movt r2, #4\n",
198 " 78: 4422 add r2, r4\n",
199 " 7a: e9d2 2300 ldrd r2, r3, [r2]\n",
200 " 7e: f44f 6c80 mov.w ip, #1024 ; 0x400\n",
201 " 82: f2c0 0c04 movt ip, #4\n",
202 " 86: 4464 add r4, ip\n",
203 " 88: e9d4 4500 ldrd r4, r5, [r4]\n",
204 " 8c: f8dc 000c ldr.w r0, [ip, #12]\n",
205 " 90: f5a4 1280 sub.w r2, r4, #1048576 ; 0x100000\n",
206 " 94: f8d2 20a4 ldr.w r2, [r2, #164] ; 0xa4\n",
207 " 98: f994 200c ldrsb.w r2, [r4, #12]\n",
208 " 9c: 7b22 ldrb r2, [r4, #12]\n",
209 " 9e: f9b4 200c ldrsh.w r2, [r4, #12]\n",
210 nullptr
211};
212const char* const VixlStoreToOffsetResults[] = {
213 " 0: 60e2 str r2, [r4, #12]\n",
214 " 2: f8c4 2fff str.w r2, [r4, #4095] ; 0xfff\n",
215 " 6: f504 5c80 add.w ip, r4, #4096 ; 0x1000\n",
216 " a: f8cc 2000 str.w r2, [ip]\n",
217 " e: f504 1c80 add.w ip, r4, #1048576 ; 0x100000\n",
218 " 12: f8cc 20a4 str.w r2, [ip, #164] ; 0xa4\n",
219 " 16: f44f 5c80 mov.w ip, #4096 ; 0x1000\n",
220 " 1a: f2c0 0c10 movt ip, #16\n",
221 " 1e: 44a4 add ip, r4\n",
222 " 20: f8cc 2000 str.w r2, [ip]\n",
223 " 24: f44f 5c80 mov.w ip, #4096 ; 0x1000\n",
224 " 28: f2c0 0c10 movt ip, #16\n",
225 " 2c: 44a4 add ip, r4\n",
226 " 2e: f8cc 4000 str.w r4, [ip]\n",
227 " 32: 81a2 strh r2, [r4, #12]\n",
228 " 34: f8a4 2fff strh.w r2, [r4, #4095] ; 0xfff\n",
229 " 38: f504 5c80 add.w ip, r4, #4096 ; 0x1000\n",
230 " 3c: f8ac 2000 strh.w r2, [ip]\n",
231 " 40: f504 1c80 add.w ip, r4, #1048576 ; 0x100000\n",
232 " 44: f8ac 20a4 strh.w r2, [ip, #164] ; 0xa4\n",
233 " 48: f44f 5c80 mov.w ip, #4096 ; 0x1000\n",
234 " 4c: f2c0 0c10 movt ip, #16\n",
235 " 50: 44a4 add ip, r4\n",
236 " 52: f8ac 2000 strh.w r2, [ip]\n",
237 " 56: f44f 5c80 mov.w ip, #4096 ; 0x1000\n",
238 " 5a: f2c0 0c10 movt ip, #16\n",
239 " 5e: 44a4 add ip, r4\n",
240 " 60: f8ac 4000 strh.w r4, [ip]\n",
241 " 64: e9c4 2303 strd r2, r3, [r4, #12]\n",
242 " 68: e9c4 23ff strd r2, r3, [r4, #1020] ; 0x3fc\n",
243 " 6c: f504 6c80 add.w ip, r4, #1024 ; 0x400\n",
244 " 70: e9cc 2300 strd r2, r3, [ip]\n",
245 " 74: f504 2c80 add.w ip, r4, #262144 ; 0x40000\n",
246 " 78: e9cc 2329 strd r2, r3, [ip, #164] ; 0xa4\n",
247 " 7c: f44f 6c80 mov.w ip, #1024 ; 0x400\n",
248 " 80: f2c0 0c04 movt ip, #4\n",
249 " 84: 44a4 add ip, r4\n",
250 " 86: e9cc 2300 strd r2, r3, [ip]\n",
251 " 8a: f44f 6c80 mov.w ip, #1024 ; 0x400\n",
252 " 8e: f2c0 0c04 movt ip, #4\n",
253 " 92: 44a4 add ip, r4\n",
254 " 94: e9cc 4500 strd r4, r5, [ip]\n",
255 " 98: f8cc 000c str.w r0, [ip, #12]\n",
256 " 9c: f5a4 1c80 sub.w ip, r4, #1048576 ; 0x100000\n",
257 " a0: f8cc 20a4 str.w r2, [ip, #164] ; 0xa4\n",
258 " a4: 7322 strb r2, [r4, #12]\n",
259 nullptr
260};
261
Vladimir Markocf93a5c2015-06-16 11:33:24 +0000[diff] [blame]262std::map<std::string, const char* const*> test_results;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]263void setup_results() {
Artem Serov12e097c2016-08-08 15:13:26 +0100[diff] [blame]264 test_results["VixlJniHelpers"] = VixlJniHelpersResults;
265 test_results["VixlStoreToOffset"] = VixlStoreToOffsetResults;
266 test_results["VixlLoadFromOffset"] = VixlLoadFromOffsetResults;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]267}