Carl Shapiro | a5d5cfd | 2011-06-21 12:46:59 -0700 | [diff] [blame] | 1 | // Copyright 2011 Google Inc. All Rights Reserved. |
| 2 | |
| 3 | #include <string.h> |
| 4 | #include "src/assembler.h" |
| 5 | #include "src/casts.h" |
| 6 | #include "src/globals.h" |
| 7 | #include "src/assembler.h" |
| 8 | #include "src/memory_region.h" |
| 9 | |
Carl Shapiro | 6b6b5f0 | 2011-06-21 15:05:09 -0700 | [diff] [blame^] | 10 | namespace art { |
Carl Shapiro | a5d5cfd | 2011-06-21 12:46:59 -0700 | [diff] [blame] | 11 | |
| 12 | class DirectCallRelocation : public AssemblerFixup { |
| 13 | public: |
| 14 | void Process(const MemoryRegion& region, int position) { |
| 15 | // Direct calls are relative to the following instruction on x86. |
| 16 | int32_t pointer = region.Load<int32_t>(position); |
| 17 | int32_t start = reinterpret_cast<int32_t>(region.start()); |
| 18 | int32_t delta = start + position + sizeof(int32_t); |
| 19 | region.Store<int32_t>(position, pointer - delta); |
| 20 | } |
| 21 | }; |
| 22 | |
| 23 | |
| 24 | void Assembler::InitializeMemoryWithBreakpoints(byte* data, size_t length) { |
| 25 | memset(reinterpret_cast<void*>(data), Instr::kBreakPointInstruction, length); |
| 26 | } |
| 27 | |
| 28 | |
| 29 | void Assembler::call(Register reg) { |
| 30 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 31 | EmitUint8(0xFF); |
| 32 | EmitRegisterOperand(2, reg); |
| 33 | } |
| 34 | |
| 35 | |
| 36 | void Assembler::call(const Address& address) { |
| 37 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 38 | EmitUint8(0xFF); |
| 39 | EmitOperand(2, address); |
| 40 | } |
| 41 | |
| 42 | |
| 43 | void Assembler::call(Label* label) { |
| 44 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 45 | EmitUint8(0xE8); |
| 46 | static const int kSize = 5; |
| 47 | EmitLabel(label, kSize); |
| 48 | } |
| 49 | |
| 50 | |
| 51 | void Assembler::pushl(Register reg) { |
| 52 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 53 | EmitUint8(0x50 + reg); |
| 54 | } |
| 55 | |
| 56 | |
| 57 | void Assembler::pushl(const Address& address) { |
| 58 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 59 | EmitUint8(0xFF); |
| 60 | EmitOperand(6, address); |
| 61 | } |
| 62 | |
| 63 | |
| 64 | void Assembler::pushl(const Immediate& imm) { |
| 65 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 66 | EmitUint8(0x68); |
| 67 | EmitImmediate(imm); |
| 68 | } |
| 69 | |
| 70 | |
| 71 | void Assembler::popl(Register reg) { |
| 72 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 73 | EmitUint8(0x58 + reg); |
| 74 | } |
| 75 | |
| 76 | |
| 77 | void Assembler::popl(const Address& address) { |
| 78 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 79 | EmitUint8(0x8F); |
| 80 | EmitOperand(0, address); |
| 81 | } |
| 82 | |
| 83 | |
| 84 | void Assembler::movl(Register dst, const Immediate& imm) { |
| 85 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 86 | EmitUint8(0xB8 + dst); |
| 87 | EmitImmediate(imm); |
| 88 | } |
| 89 | |
| 90 | |
| 91 | void Assembler::movl(Register dst, Register src) { |
| 92 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 93 | EmitUint8(0x89); |
| 94 | EmitRegisterOperand(src, dst); |
| 95 | } |
| 96 | |
| 97 | |
| 98 | void Assembler::movl(Register dst, const Address& src) { |
| 99 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 100 | EmitUint8(0x8B); |
| 101 | EmitOperand(dst, src); |
| 102 | } |
| 103 | |
| 104 | |
| 105 | void Assembler::movl(const Address& dst, Register src) { |
| 106 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 107 | EmitUint8(0x89); |
| 108 | EmitOperand(src, dst); |
| 109 | } |
| 110 | |
| 111 | |
| 112 | void Assembler::movl(const Address& dst, const Immediate& imm) { |
| 113 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 114 | EmitUint8(0xC7); |
| 115 | EmitOperand(0, dst); |
| 116 | EmitImmediate(imm); |
| 117 | } |
| 118 | |
| 119 | |
| 120 | void Assembler::movzxb(Register dst, ByteRegister src) { |
| 121 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 122 | EmitUint8(0x0F); |
| 123 | EmitUint8(0xB6); |
| 124 | EmitRegisterOperand(dst, src); |
| 125 | } |
| 126 | |
| 127 | |
| 128 | void Assembler::movzxb(Register dst, const Address& src) { |
| 129 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 130 | EmitUint8(0x0F); |
| 131 | EmitUint8(0xB6); |
| 132 | EmitOperand(dst, src); |
| 133 | } |
| 134 | |
| 135 | |
| 136 | void Assembler::movsxb(Register dst, ByteRegister src) { |
| 137 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 138 | EmitUint8(0x0F); |
| 139 | EmitUint8(0xBE); |
| 140 | EmitRegisterOperand(dst, src); |
| 141 | } |
| 142 | |
| 143 | |
| 144 | void Assembler::movsxb(Register dst, const Address& src) { |
| 145 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 146 | EmitUint8(0x0F); |
| 147 | EmitUint8(0xBE); |
| 148 | EmitOperand(dst, src); |
| 149 | } |
| 150 | |
| 151 | |
| 152 | void Assembler::movb(Register dst, const Address& src) { |
| 153 | LOG(FATAL) << "Use movzxb or movsxb instead."; |
| 154 | } |
| 155 | |
| 156 | |
| 157 | void Assembler::movb(const Address& dst, ByteRegister src) { |
| 158 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 159 | EmitUint8(0x88); |
| 160 | EmitOperand(src, dst); |
| 161 | } |
| 162 | |
| 163 | |
| 164 | void Assembler::movb(const Address& dst, const Immediate& imm) { |
| 165 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 166 | EmitUint8(0xC6); |
| 167 | EmitOperand(EAX, dst); |
| 168 | CHECK(imm.is_int8()); |
| 169 | EmitUint8(imm.value() & 0xFF); |
| 170 | } |
| 171 | |
| 172 | |
| 173 | void Assembler::movzxw(Register dst, Register src) { |
| 174 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 175 | EmitUint8(0x0F); |
| 176 | EmitUint8(0xB7); |
| 177 | EmitRegisterOperand(dst, src); |
| 178 | } |
| 179 | |
| 180 | |
| 181 | void Assembler::movzxw(Register dst, const Address& src) { |
| 182 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 183 | EmitUint8(0x0F); |
| 184 | EmitUint8(0xB7); |
| 185 | EmitOperand(dst, src); |
| 186 | } |
| 187 | |
| 188 | |
| 189 | void Assembler::movsxw(Register dst, Register src) { |
| 190 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 191 | EmitUint8(0x0F); |
| 192 | EmitUint8(0xBF); |
| 193 | EmitRegisterOperand(dst, src); |
| 194 | } |
| 195 | |
| 196 | |
| 197 | void Assembler::movsxw(Register dst, const Address& src) { |
| 198 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 199 | EmitUint8(0x0F); |
| 200 | EmitUint8(0xBF); |
| 201 | EmitOperand(dst, src); |
| 202 | } |
| 203 | |
| 204 | |
| 205 | void Assembler::movw(Register dst, const Address& src) { |
| 206 | LOG(FATAL) << "Use movzxw or movsxw instead."; |
| 207 | } |
| 208 | |
| 209 | |
| 210 | void Assembler::movw(const Address& dst, Register src) { |
| 211 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 212 | EmitOperandSizeOverride(); |
| 213 | EmitUint8(0x89); |
| 214 | EmitOperand(src, dst); |
| 215 | } |
| 216 | |
| 217 | |
| 218 | void Assembler::leal(Register dst, const Address& src) { |
| 219 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 220 | EmitUint8(0x8D); |
| 221 | EmitOperand(dst, src); |
| 222 | } |
| 223 | |
| 224 | |
| 225 | void Assembler::cmovs(Register dst, Register src) { |
| 226 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 227 | EmitUint8(0x0F); |
| 228 | EmitUint8(0x48); |
| 229 | EmitRegisterOperand(dst, src); |
| 230 | } |
| 231 | |
| 232 | |
| 233 | void Assembler::cmovns(Register dst, Register src) { |
| 234 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 235 | EmitUint8(0x0F); |
| 236 | EmitUint8(0x49); |
| 237 | EmitRegisterOperand(dst, src); |
| 238 | } |
| 239 | |
| 240 | |
| 241 | void Assembler::movss(XmmRegister dst, const Address& src) { |
| 242 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 243 | EmitUint8(0xF3); |
| 244 | EmitUint8(0x0F); |
| 245 | EmitUint8(0x10); |
| 246 | EmitOperand(dst, src); |
| 247 | } |
| 248 | |
| 249 | |
| 250 | void Assembler::movss(const Address& dst, XmmRegister src) { |
| 251 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 252 | EmitUint8(0xF3); |
| 253 | EmitUint8(0x0F); |
| 254 | EmitUint8(0x11); |
| 255 | EmitOperand(src, dst); |
| 256 | } |
| 257 | |
| 258 | |
| 259 | void Assembler::movss(XmmRegister dst, XmmRegister src) { |
| 260 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 261 | EmitUint8(0xF3); |
| 262 | EmitUint8(0x0F); |
| 263 | EmitUint8(0x11); |
| 264 | EmitXmmRegisterOperand(src, dst); |
| 265 | } |
| 266 | |
| 267 | |
| 268 | void Assembler::movd(XmmRegister dst, Register src) { |
| 269 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 270 | EmitUint8(0x66); |
| 271 | EmitUint8(0x0F); |
| 272 | EmitUint8(0x6E); |
| 273 | EmitOperand(dst, Operand(src)); |
| 274 | } |
| 275 | |
| 276 | |
| 277 | void Assembler::movd(Register dst, XmmRegister src) { |
| 278 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 279 | EmitUint8(0x66); |
| 280 | EmitUint8(0x0F); |
| 281 | EmitUint8(0x7E); |
| 282 | EmitOperand(src, Operand(dst)); |
| 283 | } |
| 284 | |
| 285 | |
| 286 | void Assembler::addss(XmmRegister dst, XmmRegister src) { |
| 287 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 288 | EmitUint8(0xF3); |
| 289 | EmitUint8(0x0F); |
| 290 | EmitUint8(0x58); |
| 291 | EmitXmmRegisterOperand(dst, src); |
| 292 | } |
| 293 | |
| 294 | |
| 295 | void Assembler::addss(XmmRegister dst, const Address& src) { |
| 296 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 297 | EmitUint8(0xF3); |
| 298 | EmitUint8(0x0F); |
| 299 | EmitUint8(0x58); |
| 300 | EmitOperand(dst, src); |
| 301 | } |
| 302 | |
| 303 | |
| 304 | void Assembler::subss(XmmRegister dst, XmmRegister src) { |
| 305 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 306 | EmitUint8(0xF3); |
| 307 | EmitUint8(0x0F); |
| 308 | EmitUint8(0x5C); |
| 309 | EmitXmmRegisterOperand(dst, src); |
| 310 | } |
| 311 | |
| 312 | |
| 313 | void Assembler::subss(XmmRegister dst, const Address& src) { |
| 314 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 315 | EmitUint8(0xF3); |
| 316 | EmitUint8(0x0F); |
| 317 | EmitUint8(0x5C); |
| 318 | EmitOperand(dst, src); |
| 319 | } |
| 320 | |
| 321 | |
| 322 | void Assembler::mulss(XmmRegister dst, XmmRegister src) { |
| 323 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 324 | EmitUint8(0xF3); |
| 325 | EmitUint8(0x0F); |
| 326 | EmitUint8(0x59); |
| 327 | EmitXmmRegisterOperand(dst, src); |
| 328 | } |
| 329 | |
| 330 | |
| 331 | void Assembler::mulss(XmmRegister dst, const Address& src) { |
| 332 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 333 | EmitUint8(0xF3); |
| 334 | EmitUint8(0x0F); |
| 335 | EmitUint8(0x59); |
| 336 | EmitOperand(dst, src); |
| 337 | } |
| 338 | |
| 339 | |
| 340 | void Assembler::divss(XmmRegister dst, XmmRegister src) { |
| 341 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 342 | EmitUint8(0xF3); |
| 343 | EmitUint8(0x0F); |
| 344 | EmitUint8(0x5E); |
| 345 | EmitXmmRegisterOperand(dst, src); |
| 346 | } |
| 347 | |
| 348 | |
| 349 | void Assembler::divss(XmmRegister dst, const Address& src) { |
| 350 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 351 | EmitUint8(0xF3); |
| 352 | EmitUint8(0x0F); |
| 353 | EmitUint8(0x5E); |
| 354 | EmitOperand(dst, src); |
| 355 | } |
| 356 | |
| 357 | |
| 358 | void Assembler::flds(const Address& src) { |
| 359 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 360 | EmitUint8(0xD9); |
| 361 | EmitOperand(0, src); |
| 362 | } |
| 363 | |
| 364 | |
| 365 | void Assembler::fstps(const Address& dst) { |
| 366 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 367 | EmitUint8(0xD9); |
| 368 | EmitOperand(3, dst); |
| 369 | } |
| 370 | |
| 371 | |
| 372 | void Assembler::movsd(XmmRegister dst, const Address& src) { |
| 373 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 374 | EmitUint8(0xF2); |
| 375 | EmitUint8(0x0F); |
| 376 | EmitUint8(0x10); |
| 377 | EmitOperand(dst, src); |
| 378 | } |
| 379 | |
| 380 | |
| 381 | void Assembler::movsd(const Address& dst, XmmRegister src) { |
| 382 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 383 | EmitUint8(0xF2); |
| 384 | EmitUint8(0x0F); |
| 385 | EmitUint8(0x11); |
| 386 | EmitOperand(src, dst); |
| 387 | } |
| 388 | |
| 389 | |
| 390 | void Assembler::movsd(XmmRegister dst, XmmRegister src) { |
| 391 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 392 | EmitUint8(0xF2); |
| 393 | EmitUint8(0x0F); |
| 394 | EmitUint8(0x11); |
| 395 | EmitXmmRegisterOperand(src, dst); |
| 396 | } |
| 397 | |
| 398 | |
| 399 | void Assembler::addsd(XmmRegister dst, XmmRegister src) { |
| 400 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 401 | EmitUint8(0xF2); |
| 402 | EmitUint8(0x0F); |
| 403 | EmitUint8(0x58); |
| 404 | EmitXmmRegisterOperand(dst, src); |
| 405 | } |
| 406 | |
| 407 | |
| 408 | void Assembler::addsd(XmmRegister dst, const Address& src) { |
| 409 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 410 | EmitUint8(0xF2); |
| 411 | EmitUint8(0x0F); |
| 412 | EmitUint8(0x58); |
| 413 | EmitOperand(dst, src); |
| 414 | } |
| 415 | |
| 416 | |
| 417 | void Assembler::subsd(XmmRegister dst, XmmRegister src) { |
| 418 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 419 | EmitUint8(0xF2); |
| 420 | EmitUint8(0x0F); |
| 421 | EmitUint8(0x5C); |
| 422 | EmitXmmRegisterOperand(dst, src); |
| 423 | } |
| 424 | |
| 425 | |
| 426 | void Assembler::subsd(XmmRegister dst, const Address& src) { |
| 427 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 428 | EmitUint8(0xF2); |
| 429 | EmitUint8(0x0F); |
| 430 | EmitUint8(0x5C); |
| 431 | EmitOperand(dst, src); |
| 432 | } |
| 433 | |
| 434 | |
| 435 | void Assembler::mulsd(XmmRegister dst, XmmRegister src) { |
| 436 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 437 | EmitUint8(0xF2); |
| 438 | EmitUint8(0x0F); |
| 439 | EmitUint8(0x59); |
| 440 | EmitXmmRegisterOperand(dst, src); |
| 441 | } |
| 442 | |
| 443 | |
| 444 | void Assembler::mulsd(XmmRegister dst, const Address& src) { |
| 445 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 446 | EmitUint8(0xF2); |
| 447 | EmitUint8(0x0F); |
| 448 | EmitUint8(0x59); |
| 449 | EmitOperand(dst, src); |
| 450 | } |
| 451 | |
| 452 | |
| 453 | void Assembler::divsd(XmmRegister dst, XmmRegister src) { |
| 454 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 455 | EmitUint8(0xF2); |
| 456 | EmitUint8(0x0F); |
| 457 | EmitUint8(0x5E); |
| 458 | EmitXmmRegisterOperand(dst, src); |
| 459 | } |
| 460 | |
| 461 | |
| 462 | void Assembler::divsd(XmmRegister dst, const Address& src) { |
| 463 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 464 | EmitUint8(0xF2); |
| 465 | EmitUint8(0x0F); |
| 466 | EmitUint8(0x5E); |
| 467 | EmitOperand(dst, src); |
| 468 | } |
| 469 | |
| 470 | |
| 471 | void Assembler::cvtsi2ss(XmmRegister dst, Register src) { |
| 472 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 473 | EmitUint8(0xF3); |
| 474 | EmitUint8(0x0F); |
| 475 | EmitUint8(0x2A); |
| 476 | EmitOperand(dst, Operand(src)); |
| 477 | } |
| 478 | |
| 479 | |
| 480 | void Assembler::cvtsi2sd(XmmRegister dst, Register src) { |
| 481 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 482 | EmitUint8(0xF2); |
| 483 | EmitUint8(0x0F); |
| 484 | EmitUint8(0x2A); |
| 485 | EmitOperand(dst, Operand(src)); |
| 486 | } |
| 487 | |
| 488 | |
| 489 | void Assembler::cvtss2si(Register dst, XmmRegister src) { |
| 490 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 491 | EmitUint8(0xF3); |
| 492 | EmitUint8(0x0F); |
| 493 | EmitUint8(0x2D); |
| 494 | EmitXmmRegisterOperand(dst, src); |
| 495 | } |
| 496 | |
| 497 | |
| 498 | void Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) { |
| 499 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 500 | EmitUint8(0xF3); |
| 501 | EmitUint8(0x0F); |
| 502 | EmitUint8(0x5A); |
| 503 | EmitXmmRegisterOperand(dst, src); |
| 504 | } |
| 505 | |
| 506 | |
| 507 | void Assembler::cvtsd2si(Register dst, XmmRegister src) { |
| 508 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 509 | EmitUint8(0xF2); |
| 510 | EmitUint8(0x0F); |
| 511 | EmitUint8(0x2D); |
| 512 | EmitXmmRegisterOperand(dst, src); |
| 513 | } |
| 514 | |
| 515 | |
| 516 | void Assembler::cvttss2si(Register dst, XmmRegister src) { |
| 517 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 518 | EmitUint8(0xF3); |
| 519 | EmitUint8(0x0F); |
| 520 | EmitUint8(0x2C); |
| 521 | EmitXmmRegisterOperand(dst, src); |
| 522 | } |
| 523 | |
| 524 | |
| 525 | void Assembler::cvttsd2si(Register dst, XmmRegister src) { |
| 526 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 527 | EmitUint8(0xF2); |
| 528 | EmitUint8(0x0F); |
| 529 | EmitUint8(0x2C); |
| 530 | EmitXmmRegisterOperand(dst, src); |
| 531 | } |
| 532 | |
| 533 | |
| 534 | void Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) { |
| 535 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 536 | EmitUint8(0xF2); |
| 537 | EmitUint8(0x0F); |
| 538 | EmitUint8(0x5A); |
| 539 | EmitXmmRegisterOperand(dst, src); |
| 540 | } |
| 541 | |
| 542 | |
| 543 | void Assembler::cvtdq2pd(XmmRegister dst, XmmRegister src) { |
| 544 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 545 | EmitUint8(0xF3); |
| 546 | EmitUint8(0x0F); |
| 547 | EmitUint8(0xE6); |
| 548 | EmitXmmRegisterOperand(dst, src); |
| 549 | } |
| 550 | |
| 551 | |
| 552 | void Assembler::comiss(XmmRegister a, XmmRegister b) { |
| 553 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 554 | EmitUint8(0x0F); |
| 555 | EmitUint8(0x2F); |
| 556 | EmitXmmRegisterOperand(a, b); |
| 557 | } |
| 558 | |
| 559 | |
| 560 | void Assembler::comisd(XmmRegister a, XmmRegister b) { |
| 561 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 562 | EmitUint8(0x66); |
| 563 | EmitUint8(0x0F); |
| 564 | EmitUint8(0x2F); |
| 565 | EmitXmmRegisterOperand(a, b); |
| 566 | } |
| 567 | |
| 568 | |
| 569 | void Assembler::sqrtsd(XmmRegister dst, XmmRegister src) { |
| 570 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 571 | EmitUint8(0xF2); |
| 572 | EmitUint8(0x0F); |
| 573 | EmitUint8(0x51); |
| 574 | EmitXmmRegisterOperand(dst, src); |
| 575 | } |
| 576 | |
| 577 | |
| 578 | void Assembler::sqrtss(XmmRegister dst, XmmRegister src) { |
| 579 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 580 | EmitUint8(0xF3); |
| 581 | EmitUint8(0x0F); |
| 582 | EmitUint8(0x51); |
| 583 | EmitXmmRegisterOperand(dst, src); |
| 584 | } |
| 585 | |
| 586 | |
| 587 | void Assembler::xorpd(XmmRegister dst, const Address& src) { |
| 588 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 589 | EmitUint8(0x66); |
| 590 | EmitUint8(0x0F); |
| 591 | EmitUint8(0x57); |
| 592 | EmitOperand(dst, src); |
| 593 | } |
| 594 | |
| 595 | |
| 596 | void Assembler::xorpd(XmmRegister dst, XmmRegister src) { |
| 597 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 598 | EmitUint8(0x66); |
| 599 | EmitUint8(0x0F); |
| 600 | EmitUint8(0x57); |
| 601 | EmitXmmRegisterOperand(dst, src); |
| 602 | } |
| 603 | |
| 604 | |
| 605 | void Assembler::xorps(XmmRegister dst, const Address& src) { |
| 606 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 607 | EmitUint8(0x0F); |
| 608 | EmitUint8(0x57); |
| 609 | EmitOperand(dst, src); |
| 610 | } |
| 611 | |
| 612 | |
| 613 | void Assembler::xorps(XmmRegister dst, XmmRegister src) { |
| 614 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 615 | EmitUint8(0x0F); |
| 616 | EmitUint8(0x57); |
| 617 | EmitXmmRegisterOperand(dst, src); |
| 618 | } |
| 619 | |
| 620 | |
| 621 | void Assembler::andpd(XmmRegister dst, const Address& src) { |
| 622 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 623 | EmitUint8(0x66); |
| 624 | EmitUint8(0x0F); |
| 625 | EmitUint8(0x54); |
| 626 | EmitOperand(dst, src); |
| 627 | } |
| 628 | |
| 629 | |
| 630 | void Assembler::fldl(const Address& src) { |
| 631 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 632 | EmitUint8(0xDD); |
| 633 | EmitOperand(0, src); |
| 634 | } |
| 635 | |
| 636 | |
| 637 | void Assembler::fstpl(const Address& dst) { |
| 638 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 639 | EmitUint8(0xDD); |
| 640 | EmitOperand(3, dst); |
| 641 | } |
| 642 | |
| 643 | |
| 644 | void Assembler::fnstcw(const Address& dst) { |
| 645 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 646 | EmitUint8(0xD9); |
| 647 | EmitOperand(7, dst); |
| 648 | } |
| 649 | |
| 650 | |
| 651 | void Assembler::fldcw(const Address& src) { |
| 652 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 653 | EmitUint8(0xD9); |
| 654 | EmitOperand(5, src); |
| 655 | } |
| 656 | |
| 657 | |
| 658 | void Assembler::fistpl(const Address& dst) { |
| 659 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 660 | EmitUint8(0xDF); |
| 661 | EmitOperand(7, dst); |
| 662 | } |
| 663 | |
| 664 | |
| 665 | void Assembler::fistps(const Address& dst) { |
| 666 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 667 | EmitUint8(0xDB); |
| 668 | EmitOperand(3, dst); |
| 669 | } |
| 670 | |
| 671 | |
| 672 | void Assembler::fildl(const Address& src) { |
| 673 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 674 | EmitUint8(0xDF); |
| 675 | EmitOperand(5, src); |
| 676 | } |
| 677 | |
| 678 | |
| 679 | void Assembler::fincstp() { |
| 680 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 681 | EmitUint8(0xD9); |
| 682 | EmitUint8(0xF7); |
| 683 | } |
| 684 | |
| 685 | |
| 686 | void Assembler::ffree(const Immediate& index) { |
| 687 | CHECK_LT(index.value(), 7); |
| 688 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 689 | EmitUint8(0xDD); |
| 690 | EmitUint8(0xC0 + index.value()); |
| 691 | } |
| 692 | |
| 693 | |
| 694 | void Assembler::fsin() { |
| 695 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 696 | EmitUint8(0xD9); |
| 697 | EmitUint8(0xFE); |
| 698 | } |
| 699 | |
| 700 | |
| 701 | void Assembler::fcos() { |
| 702 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 703 | EmitUint8(0xD9); |
| 704 | EmitUint8(0xFF); |
| 705 | } |
| 706 | |
| 707 | |
| 708 | void Assembler::fptan() { |
| 709 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 710 | EmitUint8(0xD9); |
| 711 | EmitUint8(0xF2); |
| 712 | } |
| 713 | |
| 714 | |
| 715 | void Assembler::xchgl(Register dst, Register src) { |
| 716 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 717 | EmitUint8(0x87); |
| 718 | EmitRegisterOperand(dst, src); |
| 719 | } |
| 720 | |
| 721 | |
| 722 | void Assembler::cmpl(Register reg, const Immediate& imm) { |
| 723 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 724 | EmitComplex(7, Operand(reg), imm); |
| 725 | } |
| 726 | |
| 727 | |
| 728 | void Assembler::cmpl(Register reg0, Register reg1) { |
| 729 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 730 | EmitUint8(0x3B); |
| 731 | EmitOperand(reg0, Operand(reg1)); |
| 732 | } |
| 733 | |
| 734 | |
| 735 | void Assembler::cmpl(Register reg, const Address& address) { |
| 736 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 737 | EmitUint8(0x3B); |
| 738 | EmitOperand(reg, address); |
| 739 | } |
| 740 | |
| 741 | |
| 742 | void Assembler::addl(Register dst, Register src) { |
| 743 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 744 | EmitUint8(0x03); |
| 745 | EmitRegisterOperand(dst, src); |
| 746 | } |
| 747 | |
| 748 | |
| 749 | void Assembler::addl(Register reg, const Address& address) { |
| 750 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 751 | EmitUint8(0x03); |
| 752 | EmitOperand(reg, address); |
| 753 | } |
| 754 | |
| 755 | |
| 756 | void Assembler::cmpl(const Address& address, Register reg) { |
| 757 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 758 | EmitUint8(0x39); |
| 759 | EmitOperand(reg, address); |
| 760 | } |
| 761 | |
| 762 | |
| 763 | void Assembler::cmpl(const Address& address, const Immediate& imm) { |
| 764 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 765 | EmitComplex(7, address, imm); |
| 766 | } |
| 767 | |
| 768 | |
| 769 | void Assembler::testl(Register reg1, Register reg2) { |
| 770 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 771 | EmitUint8(0x85); |
| 772 | EmitRegisterOperand(reg1, reg2); |
| 773 | } |
| 774 | |
| 775 | |
| 776 | void Assembler::testl(Register reg, const Immediate& immediate) { |
| 777 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 778 | // For registers that have a byte variant (EAX, EBX, ECX, and EDX) |
| 779 | // we only test the byte register to keep the encoding short. |
| 780 | if (immediate.is_uint8() && reg < 4) { |
| 781 | // Use zero-extended 8-bit immediate. |
| 782 | if (reg == EAX) { |
| 783 | EmitUint8(0xA8); |
| 784 | } else { |
| 785 | EmitUint8(0xF6); |
| 786 | EmitUint8(0xC0 + reg); |
| 787 | } |
| 788 | EmitUint8(immediate.value() & 0xFF); |
| 789 | } else if (reg == EAX) { |
| 790 | // Use short form if the destination is EAX. |
| 791 | EmitUint8(0xA9); |
| 792 | EmitImmediate(immediate); |
| 793 | } else { |
| 794 | EmitUint8(0xF7); |
| 795 | EmitOperand(0, Operand(reg)); |
| 796 | EmitImmediate(immediate); |
| 797 | } |
| 798 | } |
| 799 | |
| 800 | |
| 801 | void Assembler::andl(Register dst, Register src) { |
| 802 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 803 | EmitUint8(0x23); |
| 804 | EmitOperand(dst, Operand(src)); |
| 805 | } |
| 806 | |
| 807 | |
| 808 | void Assembler::andl(Register dst, const Immediate& imm) { |
| 809 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 810 | EmitComplex(4, Operand(dst), imm); |
| 811 | } |
| 812 | |
| 813 | |
| 814 | void Assembler::orl(Register dst, Register src) { |
| 815 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 816 | EmitUint8(0x0B); |
| 817 | EmitOperand(dst, Operand(src)); |
| 818 | } |
| 819 | |
| 820 | |
| 821 | void Assembler::orl(Register dst, const Immediate& imm) { |
| 822 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 823 | EmitComplex(1, Operand(dst), imm); |
| 824 | } |
| 825 | |
| 826 | |
| 827 | void Assembler::xorl(Register dst, Register src) { |
| 828 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 829 | EmitUint8(0x33); |
| 830 | EmitOperand(dst, Operand(src)); |
| 831 | } |
| 832 | |
| 833 | |
| 834 | void Assembler::addl(Register reg, const Immediate& imm) { |
| 835 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 836 | EmitComplex(0, Operand(reg), imm); |
| 837 | } |
| 838 | |
| 839 | |
| 840 | void Assembler::addl(const Address& address, Register reg) { |
| 841 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 842 | EmitUint8(0x01); |
| 843 | EmitOperand(reg, address); |
| 844 | } |
| 845 | |
| 846 | |
| 847 | void Assembler::addl(const Address& address, const Immediate& imm) { |
| 848 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 849 | EmitComplex(0, address, imm); |
| 850 | } |
| 851 | |
| 852 | |
| 853 | void Assembler::adcl(Register reg, const Immediate& imm) { |
| 854 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 855 | EmitComplex(2, Operand(reg), imm); |
| 856 | } |
| 857 | |
| 858 | |
| 859 | void Assembler::adcl(Register dst, Register src) { |
| 860 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 861 | EmitUint8(0x13); |
| 862 | EmitOperand(dst, Operand(src)); |
| 863 | } |
| 864 | |
| 865 | |
| 866 | void Assembler::adcl(Register dst, const Address& address) { |
| 867 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 868 | EmitUint8(0x13); |
| 869 | EmitOperand(dst, address); |
| 870 | } |
| 871 | |
| 872 | |
| 873 | void Assembler::subl(Register dst, Register src) { |
| 874 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 875 | EmitUint8(0x2B); |
| 876 | EmitOperand(dst, Operand(src)); |
| 877 | } |
| 878 | |
| 879 | |
| 880 | void Assembler::subl(Register reg, const Immediate& imm) { |
| 881 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 882 | EmitComplex(5, Operand(reg), imm); |
| 883 | } |
| 884 | |
| 885 | |
| 886 | void Assembler::subl(Register reg, const Address& address) { |
| 887 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 888 | EmitUint8(0x2B); |
| 889 | EmitOperand(reg, address); |
| 890 | } |
| 891 | |
| 892 | |
| 893 | void Assembler::cdq() { |
| 894 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 895 | EmitUint8(0x99); |
| 896 | } |
| 897 | |
| 898 | |
| 899 | void Assembler::idivl(Register reg) { |
| 900 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 901 | EmitUint8(0xF7); |
| 902 | EmitUint8(0xF8 | reg); |
| 903 | } |
| 904 | |
| 905 | |
| 906 | void Assembler::imull(Register dst, Register src) { |
| 907 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 908 | EmitUint8(0x0F); |
| 909 | EmitUint8(0xAF); |
| 910 | EmitOperand(dst, Operand(src)); |
| 911 | } |
| 912 | |
| 913 | |
| 914 | void Assembler::imull(Register reg, const Immediate& imm) { |
| 915 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 916 | EmitUint8(0x69); |
| 917 | EmitOperand(reg, Operand(reg)); |
| 918 | EmitImmediate(imm); |
| 919 | } |
| 920 | |
| 921 | |
| 922 | void Assembler::imull(Register reg, const Address& address) { |
| 923 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 924 | EmitUint8(0x0F); |
| 925 | EmitUint8(0xAF); |
| 926 | EmitOperand(reg, address); |
| 927 | } |
| 928 | |
| 929 | |
| 930 | void Assembler::imull(Register reg) { |
| 931 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 932 | EmitUint8(0xF7); |
| 933 | EmitOperand(5, Operand(reg)); |
| 934 | } |
| 935 | |
| 936 | |
| 937 | void Assembler::imull(const Address& address) { |
| 938 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 939 | EmitUint8(0xF7); |
| 940 | EmitOperand(5, address); |
| 941 | } |
| 942 | |
| 943 | |
| 944 | void Assembler::mull(Register reg) { |
| 945 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 946 | EmitUint8(0xF7); |
| 947 | EmitOperand(4, Operand(reg)); |
| 948 | } |
| 949 | |
| 950 | |
| 951 | void Assembler::mull(const Address& address) { |
| 952 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 953 | EmitUint8(0xF7); |
| 954 | EmitOperand(4, address); |
| 955 | } |
| 956 | |
| 957 | |
| 958 | void Assembler::sbbl(Register dst, Register src) { |
| 959 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 960 | EmitUint8(0x1B); |
| 961 | EmitOperand(dst, Operand(src)); |
| 962 | } |
| 963 | |
| 964 | |
| 965 | void Assembler::sbbl(Register reg, const Immediate& imm) { |
| 966 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 967 | EmitComplex(3, Operand(reg), imm); |
| 968 | } |
| 969 | |
| 970 | |
| 971 | void Assembler::sbbl(Register dst, const Address& address) { |
| 972 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 973 | EmitUint8(0x1B); |
| 974 | EmitOperand(dst, address); |
| 975 | } |
| 976 | |
| 977 | |
| 978 | void Assembler::incl(Register reg) { |
| 979 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 980 | EmitUint8(0x40 + reg); |
| 981 | } |
| 982 | |
| 983 | |
| 984 | void Assembler::incl(const Address& address) { |
| 985 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 986 | EmitUint8(0xFF); |
| 987 | EmitOperand(0, address); |
| 988 | } |
| 989 | |
| 990 | |
| 991 | void Assembler::decl(Register reg) { |
| 992 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 993 | EmitUint8(0x48 + reg); |
| 994 | } |
| 995 | |
| 996 | |
| 997 | void Assembler::decl(const Address& address) { |
| 998 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 999 | EmitUint8(0xFF); |
| 1000 | EmitOperand(1, address); |
| 1001 | } |
| 1002 | |
| 1003 | |
| 1004 | void Assembler::shll(Register reg, const Immediate& imm) { |
| 1005 | EmitGenericShift(4, reg, imm); |
| 1006 | } |
| 1007 | |
| 1008 | |
| 1009 | void Assembler::shll(Register operand, Register shifter) { |
| 1010 | EmitGenericShift(4, operand, shifter); |
| 1011 | } |
| 1012 | |
| 1013 | |
| 1014 | void Assembler::shrl(Register reg, const Immediate& imm) { |
| 1015 | EmitGenericShift(5, reg, imm); |
| 1016 | } |
| 1017 | |
| 1018 | |
| 1019 | void Assembler::shrl(Register operand, Register shifter) { |
| 1020 | EmitGenericShift(5, operand, shifter); |
| 1021 | } |
| 1022 | |
| 1023 | |
| 1024 | void Assembler::sarl(Register reg, const Immediate& imm) { |
| 1025 | EmitGenericShift(7, reg, imm); |
| 1026 | } |
| 1027 | |
| 1028 | |
| 1029 | void Assembler::sarl(Register operand, Register shifter) { |
| 1030 | EmitGenericShift(7, operand, shifter); |
| 1031 | } |
| 1032 | |
| 1033 | |
| 1034 | void Assembler::shld(Register dst, Register src) { |
| 1035 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1036 | EmitUint8(0x0F); |
| 1037 | EmitUint8(0xA5); |
| 1038 | EmitRegisterOperand(src, dst); |
| 1039 | } |
| 1040 | |
| 1041 | |
| 1042 | void Assembler::negl(Register reg) { |
| 1043 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1044 | EmitUint8(0xF7); |
| 1045 | EmitOperand(3, Operand(reg)); |
| 1046 | } |
| 1047 | |
| 1048 | |
| 1049 | void Assembler::notl(Register reg) { |
| 1050 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1051 | EmitUint8(0xF7); |
| 1052 | EmitUint8(0xD0 | reg); |
| 1053 | } |
| 1054 | |
| 1055 | |
| 1056 | void Assembler::enter(const Immediate& imm) { |
| 1057 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1058 | EmitUint8(0xC8); |
| 1059 | CHECK(imm.is_uint16()); |
| 1060 | EmitUint8(imm.value() & 0xFF); |
| 1061 | EmitUint8((imm.value() >> 8) & 0xFF); |
| 1062 | EmitUint8(0x00); |
| 1063 | } |
| 1064 | |
| 1065 | |
| 1066 | void Assembler::leave() { |
| 1067 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1068 | EmitUint8(0xC9); |
| 1069 | } |
| 1070 | |
| 1071 | |
| 1072 | void Assembler::ret() { |
| 1073 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1074 | EmitUint8(0xC3); |
| 1075 | } |
| 1076 | |
| 1077 | |
| 1078 | void Assembler::ret(const Immediate& imm) { |
| 1079 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1080 | EmitUint8(0xC2); |
| 1081 | CHECK(imm.is_uint16()); |
| 1082 | EmitUint8(imm.value() & 0xFF); |
| 1083 | EmitUint8((imm.value() >> 8) & 0xFF); |
| 1084 | } |
| 1085 | |
| 1086 | |
| 1087 | |
| 1088 | void Assembler::nop() { |
| 1089 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1090 | EmitUint8(0x90); |
| 1091 | } |
| 1092 | |
| 1093 | |
| 1094 | void Assembler::int3() { |
| 1095 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1096 | EmitUint8(0xCC); |
| 1097 | } |
| 1098 | |
| 1099 | |
| 1100 | void Assembler::hlt() { |
| 1101 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1102 | EmitUint8(0xF4); |
| 1103 | } |
| 1104 | |
| 1105 | |
| 1106 | void Assembler::j(Condition condition, Label* label) { |
| 1107 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1108 | if (label->IsBound()) { |
| 1109 | static const int kShortSize = 2; |
| 1110 | static const int kLongSize = 6; |
| 1111 | int offset = label->Position() - buffer_.Size(); |
| 1112 | CHECK_LE(offset, 0); |
| 1113 | if (IsInt(8, offset - kShortSize)) { |
| 1114 | EmitUint8(0x70 + condition); |
| 1115 | EmitUint8((offset - kShortSize) & 0xFF); |
| 1116 | } else { |
| 1117 | EmitUint8(0x0F); |
| 1118 | EmitUint8(0x80 + condition); |
| 1119 | EmitInt32(offset - kLongSize); |
| 1120 | } |
| 1121 | } else { |
| 1122 | EmitUint8(0x0F); |
| 1123 | EmitUint8(0x80 + condition); |
| 1124 | EmitLabelLink(label); |
| 1125 | } |
| 1126 | } |
| 1127 | |
| 1128 | |
| 1129 | void Assembler::jmp(Register reg) { |
| 1130 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1131 | EmitUint8(0xFF); |
| 1132 | EmitRegisterOperand(4, reg); |
| 1133 | } |
| 1134 | |
| 1135 | |
| 1136 | void Assembler::jmp(Label* label) { |
| 1137 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1138 | if (label->IsBound()) { |
| 1139 | static const int kShortSize = 2; |
| 1140 | static const int kLongSize = 5; |
| 1141 | int offset = label->Position() - buffer_.Size(); |
| 1142 | CHECK_LE(offset, 0); |
| 1143 | if (IsInt(8, offset - kShortSize)) { |
| 1144 | EmitUint8(0xEB); |
| 1145 | EmitUint8((offset - kShortSize) & 0xFF); |
| 1146 | } else { |
| 1147 | EmitUint8(0xE9); |
| 1148 | EmitInt32(offset - kLongSize); |
| 1149 | } |
| 1150 | } else { |
| 1151 | EmitUint8(0xE9); |
| 1152 | EmitLabelLink(label); |
| 1153 | } |
| 1154 | } |
| 1155 | |
| 1156 | |
| 1157 | void Assembler::lock() { |
| 1158 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1159 | EmitUint8(0xF0); |
| 1160 | } |
| 1161 | |
| 1162 | |
| 1163 | void Assembler::cmpxchgl(const Address& address, Register reg) { |
| 1164 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1165 | EmitUint8(0x0F); |
| 1166 | EmitUint8(0xB1); |
| 1167 | EmitOperand(reg, address); |
| 1168 | } |
| 1169 | |
| 1170 | |
| 1171 | void Assembler::AddImmediate(Register reg, const Immediate& imm) { |
| 1172 | int value = imm.value(); |
| 1173 | if (value > 0) { |
| 1174 | if (value == 1) { |
| 1175 | incl(reg); |
| 1176 | } else if (value != 0) { |
| 1177 | addl(reg, imm); |
| 1178 | } |
| 1179 | } else if (value < 0) { |
| 1180 | value = -value; |
| 1181 | if (value == 1) { |
| 1182 | decl(reg); |
| 1183 | } else if (value != 0) { |
| 1184 | subl(reg, Immediate(value)); |
| 1185 | } |
| 1186 | } |
| 1187 | } |
| 1188 | |
| 1189 | |
| 1190 | void Assembler::LoadDoubleConstant(XmmRegister dst, double value) { |
| 1191 | // TODO: Need to have a code constants table. |
| 1192 | int64_t constant = bit_cast<int64_t, double>(value); |
| 1193 | pushl(Immediate(High32Bits(constant))); |
| 1194 | pushl(Immediate(Low32Bits(constant))); |
| 1195 | movsd(dst, Address(ESP, 0)); |
| 1196 | addl(ESP, Immediate(2 * kWordSize)); |
| 1197 | } |
| 1198 | |
| 1199 | |
| 1200 | void Assembler::FloatNegate(XmmRegister f) { |
| 1201 | static const struct { |
| 1202 | uint32_t a; |
| 1203 | uint32_t b; |
| 1204 | uint32_t c; |
| 1205 | uint32_t d; |
| 1206 | } float_negate_constant __attribute__((aligned(16))) = |
| 1207 | { 0x80000000, 0x00000000, 0x80000000, 0x00000000 }; |
| 1208 | xorps(f, Address::Absolute(reinterpret_cast<uword>(&float_negate_constant))); |
| 1209 | } |
| 1210 | |
| 1211 | |
| 1212 | void Assembler::DoubleNegate(XmmRegister d) { |
| 1213 | static const struct { |
| 1214 | uint64_t a; |
| 1215 | uint64_t b; |
| 1216 | } double_negate_constant __attribute__((aligned(16))) = |
| 1217 | {0x8000000000000000LL, 0x8000000000000000LL}; |
| 1218 | xorpd(d, Address::Absolute(reinterpret_cast<uword>(&double_negate_constant))); |
| 1219 | } |
| 1220 | |
| 1221 | |
| 1222 | void Assembler::DoubleAbs(XmmRegister reg) { |
| 1223 | static const struct { |
| 1224 | uint64_t a; |
| 1225 | uint64_t b; |
| 1226 | } double_abs_constant __attribute__((aligned(16))) = |
| 1227 | {0x7FFFFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFFFLL}; |
| 1228 | andpd(reg, Address::Absolute(reinterpret_cast<uword>(&double_abs_constant))); |
| 1229 | } |
| 1230 | |
| 1231 | |
| 1232 | void Assembler::Align(int alignment, int offset) { |
| 1233 | CHECK(IsPowerOfTwo(alignment)); |
| 1234 | // Emit nop instruction until the real position is aligned. |
| 1235 | while (((offset + buffer_.GetPosition()) & (alignment-1)) != 0) { |
| 1236 | nop(); |
| 1237 | } |
| 1238 | } |
| 1239 | |
| 1240 | |
| 1241 | void Assembler::Bind(Label* label) { |
| 1242 | int bound = buffer_.Size(); |
| 1243 | CHECK(!label->IsBound()); // Labels can only be bound once. |
| 1244 | while (label->IsLinked()) { |
| 1245 | int position = label->LinkPosition(); |
| 1246 | int next = buffer_.Load<int32_t>(position); |
| 1247 | buffer_.Store<int32_t>(position, bound - (position + 4)); |
| 1248 | label->position_ = next; |
| 1249 | } |
| 1250 | label->BindTo(bound); |
| 1251 | } |
| 1252 | |
| 1253 | |
| 1254 | void Assembler::Stop(const char* message) { |
| 1255 | // Emit the message address as immediate operand in the test rax instruction, |
| 1256 | // followed by the int3 instruction. |
| 1257 | // Execution can be resumed with the 'cont' command in gdb. |
| 1258 | testl(EAX, Immediate(reinterpret_cast<int32_t>(message))); |
| 1259 | int3(); |
| 1260 | } |
| 1261 | |
| 1262 | |
| 1263 | void Assembler::EmitOperand(int rm, const Operand& operand) { |
| 1264 | CHECK_GE(rm, 0); |
| 1265 | CHECK_LT(rm, 8); |
| 1266 | const int length = operand.length_; |
| 1267 | CHECK_GT(length, 0); |
| 1268 | // Emit the ModRM byte updated with the given RM value. |
| 1269 | CHECK_EQ(operand.encoding_[0] & 0x38, 0); |
| 1270 | EmitUint8(operand.encoding_[0] + (rm << 3)); |
| 1271 | // Emit the rest of the encoded operand. |
| 1272 | for (int i = 1; i < length; i++) { |
| 1273 | EmitUint8(operand.encoding_[i]); |
| 1274 | } |
| 1275 | } |
| 1276 | |
| 1277 | |
| 1278 | void Assembler::EmitImmediate(const Immediate& imm) { |
| 1279 | EmitInt32(imm.value()); |
| 1280 | } |
| 1281 | |
| 1282 | |
| 1283 | void Assembler::EmitComplex(int rm, |
| 1284 | const Operand& operand, |
| 1285 | const Immediate& immediate) { |
| 1286 | CHECK_GE(rm, 0); |
| 1287 | CHECK_LT(rm, 8); |
| 1288 | if (immediate.is_int8()) { |
| 1289 | // Use sign-extended 8-bit immediate. |
| 1290 | EmitUint8(0x83); |
| 1291 | EmitOperand(rm, operand); |
| 1292 | EmitUint8(immediate.value() & 0xFF); |
| 1293 | } else if (operand.IsRegister(EAX)) { |
| 1294 | // Use short form if the destination is eax. |
| 1295 | EmitUint8(0x05 + (rm << 3)); |
| 1296 | EmitImmediate(immediate); |
| 1297 | } else { |
| 1298 | EmitUint8(0x81); |
| 1299 | EmitOperand(rm, operand); |
| 1300 | EmitImmediate(immediate); |
| 1301 | } |
| 1302 | } |
| 1303 | |
| 1304 | |
| 1305 | void Assembler::EmitLabel(Label* label, int instruction_size) { |
| 1306 | if (label->IsBound()) { |
| 1307 | int offset = label->Position() - buffer_.Size(); |
| 1308 | CHECK_LE(offset, 0); |
| 1309 | EmitInt32(offset - instruction_size); |
| 1310 | } else { |
| 1311 | EmitLabelLink(label); |
| 1312 | } |
| 1313 | } |
| 1314 | |
| 1315 | |
| 1316 | void Assembler::EmitLabelLink(Label* label) { |
| 1317 | CHECK(!label->IsBound()); |
| 1318 | int position = buffer_.Size(); |
| 1319 | EmitInt32(label->position_); |
| 1320 | label->LinkTo(position); |
| 1321 | } |
| 1322 | |
| 1323 | |
| 1324 | void Assembler::EmitGenericShift(int rm, |
| 1325 | Register reg, |
| 1326 | const Immediate& imm) { |
| 1327 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1328 | CHECK(imm.is_int8()); |
| 1329 | if (imm.value() == 1) { |
| 1330 | EmitUint8(0xD1); |
| 1331 | EmitOperand(rm, Operand(reg)); |
| 1332 | } else { |
| 1333 | EmitUint8(0xC1); |
| 1334 | EmitOperand(rm, Operand(reg)); |
| 1335 | EmitUint8(imm.value() & 0xFF); |
| 1336 | } |
| 1337 | } |
| 1338 | |
| 1339 | |
| 1340 | void Assembler::EmitGenericShift(int rm, |
| 1341 | Register operand, |
| 1342 | Register shifter) { |
| 1343 | AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1344 | CHECK_EQ(shifter, ECX); |
| 1345 | EmitUint8(0xD3); |
| 1346 | EmitOperand(rm, Operand(operand)); |
| 1347 | } |
| 1348 | |
Carl Shapiro | 6b6b5f0 | 2011-06-21 15:05:09 -0700 | [diff] [blame^] | 1349 | } // namespace art |