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Ian Rogers3a5c1ce2012-02-29 10:06:46 -08001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "disassembler_arm.h"
18
Anton Kirilov29b0cde2016-09-06 13:01:03 +010019#include <memory>
20#include <string>
Ian Rogers3a5c1ce2012-02-29 10:06:46 -080021
Andreas Gampebda1d602016-08-29 17:43:45 -070022#include "android-base/logging.h"
Andreas Gampebda1d602016-08-29 17:43:45 -070023
Vladimir Marko55d7c182015-01-05 15:17:01 +000024#include "arch/arm/registers_arm.h"
Andreas Gampe2a5c4682015-08-14 08:22:54 -070025#include "base/bit_utils.h"
Andreas Gampebda1d602016-08-29 17:43:45 -070026
Anton Kirilov29b0cde2016-09-06 13:01:03 +010027#pragma GCC diagnostic push
28#pragma GCC diagnostic ignored "-Wshadow"
29#include "aarch32/instructions-aarch32.h"
30#include "aarch32/disasm-aarch32.h"
31#pragma GCC diagnostic pop
Elliott Hughes0f3c5532012-03-30 14:51:51 -070032
Ian Rogers3a5c1ce2012-02-29 10:06:46 -080033namespace art {
34namespace arm {
35
Anton Kirilov29b0cde2016-09-06 13:01:03 +010036using vixl::aarch32::MemOperand;
37using vixl::aarch32::PrintDisassembler;
38using vixl::aarch32::pc;
Ian Rogersb23a7722012-10-09 16:54:26 -070039
Anton Kirilov29b0cde2016-09-06 13:01:03 +010040static const vixl::aarch32::Register tr(TR);
41
42class DisassemblerArm::CustomDisassembler FINAL : public PrintDisassembler {
43 class CustomDisassemblerStream FINAL : public DisassemblerStream {
44 public:
45 CustomDisassemblerStream(std::ostream& os,
46 const CustomDisassembler* disasm,
47 const DisassemblerOptions* options)
48 : DisassemblerStream(os), disasm_(disasm), options_(options) {}
49
50 DisassemblerStream& operator<<(const PrintLabel& label) OVERRIDE {
51 const LocationType type = label.GetLocationType();
52
53 switch (type) {
54 case kLoadByteLocation:
55 case kLoadHalfWordLocation:
56 case kLoadWordLocation:
57 case kLoadDoubleWordLocation:
58 case kLoadSignedByteLocation:
59 case kLoadSignedHalfWordLocation:
60 case kLoadSinglePrecisionLocation:
61 case kLoadDoublePrecisionLocation:
62 case kVld1Location:
63 case kVld2Location:
64 case kVld3Location:
65 case kVld4Location: {
66 const uintptr_t pc_delta = disasm_->IsT32()
67 ? vixl::aarch32::kT32PcDelta
68 : vixl::aarch32::kA32PcDelta;
69 const int32_t offset = label.GetLabel()->GetLocation();
70
71 os() << "[pc, #" << offset - pc_delta << "]";
72 PrintLiteral(type, offset);
73 return *this;
74 }
75 default:
76 return DisassemblerStream::operator<<(label);
77 }
Ian Rogers3a5c1ce2012-02-29 10:06:46 -080078 }
Ian Rogers3a5c1ce2012-02-29 10:06:46 -080079
Anton Kirilov29b0cde2016-09-06 13:01:03 +010080 DisassemblerStream& operator<<(const vixl::aarch32::Register reg) OVERRIDE {
81 if (reg.Is(tr)) {
82 os() << "tr";
83 return *this;
Elliott Hughes77405792012-03-15 15:22:12 -070084 } else {
Anton Kirilov29b0cde2016-09-06 13:01:03 +010085 return DisassemblerStream::operator<<(reg);
Elliott Hughes77405792012-03-15 15:22:12 -070086 }
Elliott Hughes77405792012-03-15 15:22:12 -070087 }
Ian Rogers3a5c1ce2012-02-29 10:06:46 -080088
Anton Kirilov29b0cde2016-09-06 13:01:03 +010089 DisassemblerStream& operator<<(const MemOperand& operand) OVERRIDE {
90 // VIXL must use a PrintLabel object whenever the base register is PC;
91 // the following check verifies this invariant, and guards against bugs.
92 DCHECK(!operand.GetBaseRegister().Is(pc));
93 DisassemblerStream::operator<<(operand);
Vladimir Markodd577a32013-11-07 19:25:24 +000094
Anton Kirilov29b0cde2016-09-06 13:01:03 +010095 if (operand.GetBaseRegister().Is(tr) && operand.IsImmediate()) {
96 os() << " ; ";
97 options_->thread_offset_name_function_(os(), operand.GetOffsetImmediate());
98 }
Vladimir Markodd577a32013-11-07 19:25:24 +000099
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100100 return *this;
Elliott Hughes77405792012-03-15 15:22:12 -0700101 }
Ian Rogers3a5c1ce2012-02-29 10:06:46 -0800102
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100103 DisassemblerStream& operator<<(const vixl::aarch32::AlignedMemOperand& operand) OVERRIDE {
104 // VIXL must use a PrintLabel object whenever the base register is PC;
105 // the following check verifies this invariant, and guards against bugs.
106 DCHECK(!operand.GetBaseRegister().Is(pc));
107 return DisassemblerStream::operator<<(operand);
Ian Rogersa9650dd2013-10-04 08:23:32 -0700108 }
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100109
110 private:
111 void PrintLiteral(LocationType type, int32_t offset);
112
113 const CustomDisassembler* disasm_;
114 const DisassemblerOptions* options_;
115 };
116
117 public:
118 CustomDisassembler(std::ostream& os, const DisassemblerOptions* options)
Alexandre Rames8872cad2016-09-26 14:14:01 +0100119 : PrintDisassembler(&disassembler_stream_), disassembler_stream_(os, this, options) {}
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100120
121 void PrintPc(uint32_t prog_ctr) OVERRIDE {
122 os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << prog_ctr << ": ";
Ian Rogersa9650dd2013-10-04 08:23:32 -0700123 }
Ian Rogersa9650dd2013-10-04 08:23:32 -0700124
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100125 bool IsT32() const {
126 return is_t32_;
127 }
Vladimir Markoc777e0d2014-04-03 17:59:02 +0100128
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100129 void SetT32(bool is_t32) {
130 is_t32_ = is_t32;
131 }
Vladimir Marko55d7c182015-01-05 15:17:01 +0000132
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100133 private:
134 bool is_t32_;
Alexandre Rames8872cad2016-09-26 14:14:01 +0100135 CustomDisassemblerStream disassembler_stream_;
Vladimir Marko55d7c182015-01-05 15:17:01 +0000136};
Vladimir Marko55d7c182015-01-05 15:17:01 +0000137
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100138void DisassemblerArm::CustomDisassembler::CustomDisassemblerStream::PrintLiteral(LocationType type,
139 int32_t offset) {
140 // Literal offsets are not required to be aligned, so we may need unaligned access.
Vladimir Marko55d7c182015-01-05 15:17:01 +0000141 typedef const int16_t unaligned_int16_t __attribute__ ((aligned (1)));
142 typedef const uint16_t unaligned_uint16_t __attribute__ ((aligned (1)));
143 typedef const int32_t unaligned_int32_t __attribute__ ((aligned (1)));
Vladimir Marko55d7c182015-01-05 15:17:01 +0000144 typedef const int64_t unaligned_int64_t __attribute__ ((aligned (1)));
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100145 typedef const float unaligned_float __attribute__ ((aligned (1)));
146 typedef const double unaligned_double __attribute__ ((aligned (1)));
Vladimir Marko55d7c182015-01-05 15:17:01 +0000147
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100148 // Zeros are used for the LocationType values this function does not care about.
149 const size_t literal_size[kVst4Location + 1] = {
150 0, 0, 0, 0, sizeof(uint8_t), sizeof(unaligned_uint16_t), sizeof(unaligned_int32_t),
151 sizeof(unaligned_int64_t), sizeof(int8_t), sizeof(unaligned_int16_t),
152 sizeof(unaligned_float), sizeof(unaligned_double)};
153 const uintptr_t begin = reinterpret_cast<uintptr_t>(options_->base_address_);
154 const uintptr_t end = reinterpret_cast<uintptr_t>(options_->end_address_);
155 uintptr_t literal_addr = RoundDown(disasm_->GetPc(), vixl::aarch32::kRegSizeInBytes) + offset;
156
157 if (!options_->absolute_addresses_) {
158 literal_addr += begin;
Aart Bikd3059e72016-05-11 10:30:47 -0700159 }
160
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100161 os() << " ; ";
162
163 // Bail out if not within expected buffer range to avoid trying to fetch invalid literals
164 // (we can encounter them when interpreting raw data as instructions).
165 if (literal_addr < begin || literal_addr > end - literal_size[type]) {
166 os() << "(?)";
167 } else {
168 switch (type) {
169 case kLoadByteLocation:
170 os() << *reinterpret_cast<const uint8_t*>(literal_addr);
171 break;
172 case kLoadHalfWordLocation:
173 os() << *reinterpret_cast<unaligned_uint16_t*>(literal_addr);
174 break;
175 case kLoadWordLocation: {
176 const int32_t value = *reinterpret_cast<unaligned_int32_t*>(literal_addr);
177 os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << value;
178 break;
179 }
180 case kLoadDoubleWordLocation: {
181 const int64_t value = *reinterpret_cast<unaligned_int64_t*>(literal_addr);
182 os() << "0x" << std::hex << std::setw(16) << std::setfill('0') << value;
183 break;
184 }
185 case kLoadSignedByteLocation:
186 os() << *reinterpret_cast<const int8_t*>(literal_addr);
187 break;
188 case kLoadSignedHalfWordLocation:
189 os() << *reinterpret_cast<unaligned_int16_t*>(literal_addr);
190 break;
191 case kLoadSinglePrecisionLocation:
192 os() << *reinterpret_cast<unaligned_float*>(literal_addr);
193 break;
194 case kLoadDoublePrecisionLocation:
195 os() << *reinterpret_cast<unaligned_double*>(literal_addr);
196 break;
197 default:
198 UNIMPLEMENTED(FATAL) << "Unexpected literal type: " << type;
199 }
Vladimir Marko55d7c182015-01-05 15:17:01 +0000200 }
Vladimir Markoc777e0d2014-04-03 17:59:02 +0100201}
202
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100203DisassemblerArm::DisassemblerArm(DisassemblerOptions* options)
204 : Disassembler(options), disasm_(std::make_unique<CustomDisassembler>(output_, options)) {}
Elliott Hughes77405792012-03-15 15:22:12 -0700205
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100206size_t DisassemblerArm::Dump(std::ostream& os, const uint8_t* begin) {
207 uintptr_t next;
208 // Remove the Thumb specifier bit; no effect if begin does not point to T32 code.
209 const uintptr_t instr_ptr = reinterpret_cast<uintptr_t>(begin) & ~1;
Aart Bikd3059e72016-05-11 10:30:47 -0700210
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100211 disasm_->SetT32((reinterpret_cast<uintptr_t>(begin) & 1) != 0);
212 disasm_->JumpToPc(GetPc(instr_ptr));
Dave Allison70202782013-10-22 17:52:19 -0700213
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100214 if (disasm_->IsT32()) {
215 const uint16_t* const ip = reinterpret_cast<const uint16_t*>(instr_ptr);
216 next = reinterpret_cast<uintptr_t>(disasm_->DecodeT32At(ip));
Ian Rogers3a5c1ce2012-02-29 10:06:46 -0800217 } else {
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100218 const uint32_t* const ip = reinterpret_cast<const uint32_t*>(instr_ptr);
219 next = reinterpret_cast<uintptr_t>(disasm_->DecodeA32At(ip));
Ian Rogers3a5c1ce2012-02-29 10:06:46 -0800220 }
Anton Kirilov29b0cde2016-09-06 13:01:03 +0100221
222 os << output_.str();
223 output_.str(std::string());
224 return next - instr_ptr;
225}
226
227void DisassemblerArm::Dump(std::ostream& os, const uint8_t* begin, const uint8_t* end) {
228 DCHECK_LE(begin, end);
229
230 // Remove the Thumb specifier bit; no effect if begin does not point to T32 code.
231 const uintptr_t base = reinterpret_cast<uintptr_t>(begin) & ~1;
232
233 disasm_->SetT32((reinterpret_cast<uintptr_t>(begin) & 1) != 0);
234 disasm_->JumpToPc(GetPc(base));
235
236 if (disasm_->IsT32()) {
237 // The Thumb specifier bits cancel each other.
238 disasm_->DisassembleT32Buffer(reinterpret_cast<const uint16_t*>(base), end - begin);
239 } else {
240 disasm_->DisassembleA32Buffer(reinterpret_cast<const uint32_t*>(base), end - begin);
241 }
242
243 os << output_.str();
244 output_.str(std::string());
Ian Rogers3a5c1ce2012-02-29 10:06:46 -0800245}
246
247} // namespace arm
248} // namespace art