Elliott Hughes | 2faa5f1 | 2012-01-30 14:42:07 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 16 | |
Brian Carlstrom | fc0e321 | 2013-07-17 14:40:12 -0700 | [diff] [blame] | 17 | #ifndef ART_RUNTIME_INSTRUCTION_SET_H_ |
| 18 | #define ART_RUNTIME_INSTRUCTION_SET_H_ |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 19 | |
Ian Rogers | c8b306f | 2012-02-17 21:34:44 -0800 | [diff] [blame] | 20 | #include <iosfwd> |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 21 | #include <string> |
| 22 | |
Alexei Zavjalov | 41c507a | 2014-05-15 16:02:46 +0700 | [diff] [blame] | 23 | #include "base/logging.h" // Logging is required for FATAL in the helper functions. |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 24 | #include "base/macros.h" |
Andreas Gampe | 7cd26f3 | 2014-06-18 17:01:15 -0700 | [diff] [blame] | 25 | #include "globals.h" // For KB. |
Ian Rogers | c8b306f | 2012-02-17 21:34:44 -0800 | [diff] [blame] | 26 | |
buzbee | c143c55 | 2011-08-20 17:38:58 -0700 | [diff] [blame] | 27 | namespace art { |
| 28 | |
| 29 | enum InstructionSet { |
| 30 | kNone, |
| 31 | kArm, |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 32 | kArm64, |
buzbee | c143c55 | 2011-08-20 17:38:58 -0700 | [diff] [blame] | 33 | kThumb2, |
Shih-wei Liao | 6edfde4 | 2012-03-01 15:49:12 -0800 | [diff] [blame] | 34 | kX86, |
Ian Rogers | ef7d42f | 2014-01-06 12:55:46 -0800 | [diff] [blame] | 35 | kX86_64, |
Douglas Leung | 2db3e26 | 2014-06-25 16:02:55 -0700 | [diff] [blame] | 36 | kMips, |
| 37 | kMips64 |
buzbee | c143c55 | 2011-08-20 17:38:58 -0700 | [diff] [blame] | 38 | }; |
Ian Rogers | 8afeb85 | 2014-04-02 14:55:49 -0700 | [diff] [blame] | 39 | std::ostream& operator<<(std::ostream& os, const InstructionSet& rhs); |
buzbee | c143c55 | 2011-08-20 17:38:58 -0700 | [diff] [blame] | 40 | |
Andreas Gampe | 7cd26f3 | 2014-06-18 17:01:15 -0700 | [diff] [blame] | 41 | #if defined(__arm__) |
| 42 | static constexpr InstructionSet kRuntimeISA = kArm; |
| 43 | #elif defined(__aarch64__) |
| 44 | static constexpr InstructionSet kRuntimeISA = kArm64; |
| 45 | #elif defined(__mips__) |
| 46 | static constexpr InstructionSet kRuntimeISA = kMips; |
| 47 | #elif defined(__i386__) |
| 48 | static constexpr InstructionSet kRuntimeISA = kX86; |
| 49 | #elif defined(__x86_64__) |
| 50 | static constexpr InstructionSet kRuntimeISA = kX86_64; |
| 51 | #else |
| 52 | static constexpr InstructionSet kRuntimeISA = kNone; |
| 53 | #endif |
| 54 | |
Alexei Zavjalov | 41c507a | 2014-05-15 16:02:46 +0700 | [diff] [blame] | 55 | // Architecture-specific pointer sizes |
| 56 | static constexpr size_t kArmPointerSize = 4; |
| 57 | static constexpr size_t kArm64PointerSize = 8; |
| 58 | static constexpr size_t kMipsPointerSize = 4; |
| 59 | static constexpr size_t kX86PointerSize = 4; |
| 60 | static constexpr size_t kX86_64PointerSize = 8; |
| 61 | |
| 62 | // ARM instruction alignment. ARM processors require code to be 4-byte aligned, |
| 63 | // but ARM ELF requires 8.. |
| 64 | static constexpr size_t kArmAlignment = 8; |
| 65 | |
| 66 | // ARM64 instruction alignment. This is the recommended alignment for maximum performance. |
| 67 | static constexpr size_t kArm64Alignment = 16; |
| 68 | |
| 69 | // MIPS instruction alignment. MIPS processors require code to be 4-byte aligned. |
| 70 | // TODO: Can this be 4? |
| 71 | static constexpr size_t kMipsAlignment = 8; |
| 72 | |
| 73 | // X86 instruction alignment. This is the recommended alignment for maximum performance. |
| 74 | static constexpr size_t kX86Alignment = 16; |
| 75 | |
| 76 | |
Brian Carlstrom | 2afe494 | 2014-05-19 10:25:33 -0700 | [diff] [blame] | 77 | const char* GetInstructionSetString(InstructionSet isa); |
Narayan Kamath | 11d9f06 | 2014-04-23 20:24:57 +0100 | [diff] [blame] | 78 | InstructionSet GetInstructionSetFromString(const char* instruction_set); |
| 79 | |
Alexei Zavjalov | 41c507a | 2014-05-15 16:02:46 +0700 | [diff] [blame] | 80 | static inline size_t GetInstructionSetPointerSize(InstructionSet isa) { |
| 81 | switch (isa) { |
| 82 | case kArm: |
| 83 | // Fall-through. |
| 84 | case kThumb2: |
| 85 | return kArmPointerSize; |
| 86 | case kArm64: |
| 87 | return kArm64PointerSize; |
| 88 | case kX86: |
| 89 | return kX86PointerSize; |
| 90 | case kX86_64: |
| 91 | return kX86_64PointerSize; |
| 92 | case kMips: |
| 93 | return kMipsPointerSize; |
| 94 | case kNone: |
| 95 | LOG(FATAL) << "ISA kNone does not have pointer size."; |
| 96 | return 0; |
| 97 | default: |
| 98 | LOG(FATAL) << "Unknown ISA " << isa; |
| 99 | return 0; |
| 100 | } |
| 101 | } |
| 102 | |
Andreas Gampe | af13ad9 | 2014-04-11 12:07:48 -0700 | [diff] [blame] | 103 | size_t GetInstructionSetAlignment(InstructionSet isa); |
Alexei Zavjalov | 41c507a | 2014-05-15 16:02:46 +0700 | [diff] [blame] | 104 | |
| 105 | static inline bool Is64BitInstructionSet(InstructionSet isa) { |
| 106 | switch (isa) { |
| 107 | case kArm: |
| 108 | case kThumb2: |
| 109 | case kX86: |
| 110 | case kMips: |
| 111 | return false; |
| 112 | |
| 113 | case kArm64: |
| 114 | case kX86_64: |
| 115 | return true; |
| 116 | |
| 117 | case kNone: |
| 118 | LOG(FATAL) << "ISA kNone does not have bit width."; |
| 119 | return 0; |
| 120 | default: |
| 121 | LOG(FATAL) << "Unknown ISA " << isa; |
| 122 | return 0; |
| 123 | } |
| 124 | } |
| 125 | |
| 126 | static inline size_t GetBytesPerGprSpillLocation(InstructionSet isa) { |
| 127 | switch (isa) { |
| 128 | case kArm: |
| 129 | // Fall-through. |
| 130 | case kThumb2: |
| 131 | return 4; |
| 132 | case kArm64: |
| 133 | return 8; |
| 134 | case kX86: |
| 135 | return 4; |
| 136 | case kX86_64: |
| 137 | return 8; |
| 138 | case kMips: |
| 139 | return 4; |
| 140 | case kNone: |
| 141 | LOG(FATAL) << "ISA kNone does not have spills."; |
| 142 | return 0; |
| 143 | default: |
| 144 | LOG(FATAL) << "Unknown ISA " << isa; |
| 145 | return 0; |
| 146 | } |
| 147 | } |
| 148 | |
| 149 | static inline size_t GetBytesPerFprSpillLocation(InstructionSet isa) { |
| 150 | switch (isa) { |
| 151 | case kArm: |
| 152 | // Fall-through. |
| 153 | case kThumb2: |
| 154 | return 4; |
| 155 | case kArm64: |
| 156 | return 8; |
| 157 | case kX86: |
| 158 | return 8; |
| 159 | case kX86_64: |
| 160 | return 8; |
| 161 | case kMips: |
| 162 | return 4; |
| 163 | case kNone: |
| 164 | LOG(FATAL) << "ISA kNone does not have spills."; |
| 165 | return 0; |
| 166 | default: |
| 167 | LOG(FATAL) << "Unknown ISA " << isa; |
| 168 | return 0; |
| 169 | } |
| 170 | } |
Andreas Gampe | af13ad9 | 2014-04-11 12:07:48 -0700 | [diff] [blame] | 171 | |
Andreas Gampe | 7cd26f3 | 2014-06-18 17:01:15 -0700 | [diff] [blame] | 172 | static constexpr size_t kDefaultStackOverflowReservedBytes = 16 * KB; |
| 173 | static constexpr size_t kArmStackOverflowReservedBytes = kDefaultStackOverflowReservedBytes; |
| 174 | static constexpr size_t kMipsStackOverflowReservedBytes = kDefaultStackOverflowReservedBytes; |
| 175 | |
| 176 | // TODO: shrink reserved space, in particular for 64bit. |
| 177 | |
| 178 | // Worst-case, we would need about 2.6x the amount of x86_64 for many more registers. |
| 179 | // But this one works rather well. |
| 180 | static constexpr size_t kArm64StackOverflowReservedBytes = 32 * KB; |
| 181 | // TODO: Bumped to workaround regression (http://b/14982147) Specifically to fix: |
| 182 | // test-art-host-run-test-interpreter-018-stack-overflow |
| 183 | // test-art-host-run-test-interpreter-107-int-math2 |
| 184 | static constexpr size_t kX86StackOverflowReservedBytes = 24 * KB; |
| 185 | static constexpr size_t kX86_64StackOverflowReservedBytes = 32 * KB; |
| 186 | |
| 187 | static constexpr size_t GetStackOverflowReservedBytes(InstructionSet isa) { |
| 188 | return (isa == kArm || isa == kThumb2) ? kArmStackOverflowReservedBytes : |
| 189 | isa == kArm64 ? kArm64StackOverflowReservedBytes : |
| 190 | isa == kMips ? kMipsStackOverflowReservedBytes : |
| 191 | isa == kX86 ? kX86StackOverflowReservedBytes : |
| 192 | isa == kX86_64 ? kX86_64StackOverflowReservedBytes : |
| 193 | isa == kNone ? (LOG(FATAL) << "kNone has no stack overflow size", 0) : |
| 194 | (LOG(FATAL) << "Unknown instruction set" << isa, 0); |
| 195 | } |
| 196 | |
| 197 | static constexpr size_t kRuntimeStackOverflowReservedBytes = |
| 198 | GetStackOverflowReservedBytes(kRuntimeISA); |
Andreas Gampe | 91268c1 | 2014-04-03 17:50:24 -0700 | [diff] [blame] | 199 | |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 200 | enum InstructionFeatures { |
Vladimir Marko | 674744e | 2014-04-24 15:18:26 +0100 | [diff] [blame] | 201 | kHwDiv = 0x1, // Supports hardware divide. |
| 202 | kHwLpae = 0x2, // Supports Large Physical Address Extension. |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 203 | }; |
| 204 | |
| 205 | // This is a bitmask of supported features per architecture. |
| 206 | class PACKED(4) InstructionSetFeatures { |
| 207 | public: |
| 208 | InstructionSetFeatures() : mask_(0) {} |
| 209 | explicit InstructionSetFeatures(uint32_t mask) : mask_(mask) {} |
| 210 | |
Ian Rogers | 8afeb85 | 2014-04-02 14:55:49 -0700 | [diff] [blame] | 211 | static InstructionSetFeatures GuessInstructionSetFeatures(); |
| 212 | |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 213 | bool HasDivideInstruction() const { |
| 214 | return (mask_ & kHwDiv) != 0; |
| 215 | } |
| 216 | |
| 217 | void SetHasDivideInstruction(bool v) { |
| 218 | mask_ = (mask_ & ~kHwDiv) | (v ? kHwDiv : 0); |
| 219 | } |
| 220 | |
Vladimir Marko | 674744e | 2014-04-24 15:18:26 +0100 | [diff] [blame] | 221 | bool HasLpae() const { |
| 222 | return (mask_ & kHwLpae) != 0; |
| 223 | } |
| 224 | |
| 225 | void SetHasLpae(bool v) { |
| 226 | mask_ = (mask_ & ~kHwLpae) | (v ? kHwLpae : 0); |
| 227 | } |
| 228 | |
Ian Rogers | 8afeb85 | 2014-04-02 14:55:49 -0700 | [diff] [blame] | 229 | std::string GetFeatureString() const; |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 230 | |
| 231 | // Other features in here. |
| 232 | |
| 233 | bool operator==(const InstructionSetFeatures &peer) const { |
| 234 | return mask_ == peer.mask_; |
| 235 | } |
| 236 | |
| 237 | bool operator!=(const InstructionSetFeatures &peer) const { |
| 238 | return mask_ != peer.mask_; |
| 239 | } |
| 240 | |
Serban Constantinescu | 75b9113 | 2014-04-09 18:39:10 +0100 | [diff] [blame] | 241 | bool operator<=(const InstructionSetFeatures &peer) const { |
| 242 | return (mask_ & peer.mask_) == mask_; |
| 243 | } |
| 244 | |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 245 | private: |
| 246 | uint32_t mask_; |
| 247 | }; |
| 248 | |
Andreas Gampe | d58342c | 2014-06-05 14:18:08 -0700 | [diff] [blame] | 249 | // The following definitions create return types for two word-sized entities that will be passed |
| 250 | // in registers so that memory operations for the interface trampolines can be avoided. The entities |
| 251 | // are the resolved method and the pointer to the code to be invoked. |
| 252 | // |
| 253 | // On x86, ARM32 and MIPS, this is given for a *scalar* 64bit value. The definition thus *must* be |
| 254 | // uint64_t or long long int. |
| 255 | // |
| 256 | // On x86_64 and ARM64, structs are decomposed for allocation, so we can create a structs of two |
| 257 | // size_t-sized values. |
| 258 | // |
| 259 | // We need two operations: |
| 260 | // |
| 261 | // 1) A flag value that signals failure. The assembly stubs expect the lower part to be "0". |
| 262 | // GetTwoWordFailureValue() will return a value that has lower part == 0. |
| 263 | // |
| 264 | // 2) A value that combines two word-sized values. |
| 265 | // GetTwoWordSuccessValue() constructs this. |
| 266 | // |
| 267 | // IMPORTANT: If you use this to transfer object pointers, it is your responsibility to ensure |
| 268 | // that the object does not move or the value is updated. Simple use of this is NOT SAFE |
| 269 | // when the garbage collector can move objects concurrently. Ensure that required locks |
| 270 | // are held when using! |
| 271 | |
| 272 | #if defined(__i386__) || defined(__arm__) || defined(__mips__) |
| 273 | typedef uint64_t TwoWordReturn; |
| 274 | |
| 275 | // Encodes method_ptr==nullptr and code_ptr==nullptr |
| 276 | static inline constexpr TwoWordReturn GetTwoWordFailureValue() { |
| 277 | return 0; |
| 278 | } |
| 279 | |
| 280 | // Use the lower 32b for the method pointer and the upper 32b for the code pointer. |
| 281 | static inline TwoWordReturn GetTwoWordSuccessValue(uintptr_t hi, uintptr_t lo) { |
| 282 | uint32_t lo32 = static_cast<uint32_t>(lo); |
| 283 | uint64_t hi64 = static_cast<uint64_t>(hi); |
| 284 | return ((hi64 << 32) | lo32); |
| 285 | } |
| 286 | |
| 287 | #elif defined(__x86_64__) || defined(__aarch64__) |
| 288 | struct TwoWordReturn { |
| 289 | uintptr_t lo; |
| 290 | uintptr_t hi; |
| 291 | }; |
| 292 | |
| 293 | // Encodes method_ptr==nullptr. Leaves random value in code pointer. |
| 294 | static inline TwoWordReturn GetTwoWordFailureValue() { |
| 295 | TwoWordReturn ret; |
| 296 | ret.lo = 0; |
| 297 | return ret; |
| 298 | } |
| 299 | |
| 300 | // Write values into their respective members. |
| 301 | static inline TwoWordReturn GetTwoWordSuccessValue(uintptr_t hi, uintptr_t lo) { |
| 302 | TwoWordReturn ret; |
| 303 | ret.lo = lo; |
| 304 | ret.hi = hi; |
| 305 | return ret; |
| 306 | } |
| 307 | #else |
| 308 | #error "Unsupported architecture" |
| 309 | #endif |
| 310 | |
buzbee | c143c55 | 2011-08-20 17:38:58 -0700 | [diff] [blame] | 311 | } // namespace art |
| 312 | |
Brian Carlstrom | fc0e321 | 2013-07-17 14:40:12 -0700 | [diff] [blame] | 313 | #endif // ART_RUNTIME_INSTRUCTION_SET_H_ |