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Artem Udovichenko4a0dad62016-01-26 12:28:31 +03001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_OPTIMIZING_INSTRUCTION_SIMPLIFIER_SHARED_H_
18#define ART_COMPILER_OPTIMIZING_INSTRUCTION_SIMPLIFIER_SHARED_H_
19
Vladimir Markoe2727152019-10-10 10:46:42 +010020#include "base/macros.h"
Artem Udovichenko4a0dad62016-01-26 12:28:31 +030021#include "nodes.h"
22
Vladimir Markoe2727152019-10-10 10:46:42 +010023namespace art HIDDEN {
Artem Udovichenko4a0dad62016-01-26 12:28:31 +030024
Anton Kirilov74234da2017-01-13 14:42:47 +000025namespace helpers {
26
27inline bool CanFitInShifterOperand(HInstruction* instruction) {
28 if (instruction->IsTypeConversion()) {
29 HTypeConversion* conversion = instruction->AsTypeConversion();
Vladimir Marko0ebe0d82017-09-21 22:50:39 +010030 DataType::Type result_type = conversion->GetResultType();
31 DataType::Type input_type = conversion->GetInputType();
Anton Kirilov74234da2017-01-13 14:42:47 +000032 // We don't expect to see the same type as input and result.
Vladimir Marko0ebe0d82017-09-21 22:50:39 +010033 return DataType::IsIntegralType(result_type) && DataType::IsIntegralType(input_type) &&
Anton Kirilov74234da2017-01-13 14:42:47 +000034 (result_type != input_type);
35 } else {
36 return (instruction->IsShl() && instruction->AsShl()->InputAt(1)->IsIntConstant()) ||
37 (instruction->IsShr() && instruction->AsShr()->InputAt(1)->IsIntConstant()) ||
38 (instruction->IsUShr() && instruction->AsUShr()->InputAt(1)->IsIntConstant());
39 }
40}
41
42inline bool HasShifterOperand(HInstruction* instr, InstructionSet isa) {
43 // On ARM64 `neg` instructions are an alias of `sub` using the zero register
44 // as the first register input.
Vladimir Marko33bff252017-11-01 14:35:42 +000045 bool res = instr->IsAdd() || instr->IsAnd() ||
46 (isa == InstructionSet::kArm64 && instr->IsNeg()) ||
Anton Kirilov74234da2017-01-13 14:42:47 +000047 instr->IsOr() || instr->IsSub() || instr->IsXor();
48 return res;
49}
50
51} // namespace helpers
52
Artem Udovichenko4a0dad62016-01-26 12:28:31 +030053bool TryCombineMultiplyAccumulate(HMul* mul, InstructionSet isa);
Artem Serov7fc63502016-02-09 17:15:29 +000054// For bitwise operations (And/Or/Xor) with a negated input, try to use
55// a negated bitwise instruction.
56bool TryMergeNegatedInput(HBinaryOperation* op);
Artem Udovichenko4a0dad62016-01-26 12:28:31 +030057
Artem Serov328429f2016-07-06 16:23:04 +010058bool TryExtractArrayAccessAddress(HInstruction* access,
59 HInstruction* array,
60 HInstruction* index,
61 size_t data_offset);
62
Artem Serove1811ed2017-04-27 16:50:47 +010063bool TryExtractVecArrayAccessAddress(HVecMemoryOperation* access, HInstruction* index);
Artem Serovf34dd202017-04-10 17:41:46 +010064
Artem Udovichenko4a0dad62016-01-26 12:28:31 +030065} // namespace art
66
67#endif // ART_COMPILER_OPTIMIZING_INSTRUCTION_SIMPLIFIER_SHARED_H_