buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | /* |
| 18 | * This file contains arm-specific codegen factory support. |
| 19 | * It is included by |
| 20 | * |
| 21 | * Codegen-$(TARGET_ARCH_VARIANT).c |
| 22 | * |
| 23 | */ |
| 24 | |
buzbee | ed3e930 | 2011-09-23 17:34:19 -0700 | [diff] [blame^] | 25 | STATIC ArmLIR* genUnconditionalBranch(CompilationUnit*, ArmLIR*); |
| 26 | STATIC ArmLIR* genConditionalBranch(CompilationUnit*, ArmConditionCode, |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 27 | ArmLIR*); |
| 28 | |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 29 | /* |
buzbee | dfd3d70 | 2011-08-28 12:56:51 -0700 | [diff] [blame] | 30 | * Utiltiy to load the current Method*. Broken out |
| 31 | * to allow easy change between placing the current Method* in a |
| 32 | * dedicated register or its home location in the frame. |
| 33 | */ |
buzbee | ed3e930 | 2011-09-23 17:34:19 -0700 | [diff] [blame^] | 34 | STATIC void loadCurrMethodDirect(CompilationUnit *cUnit, int rTgt) |
buzbee | dfd3d70 | 2011-08-28 12:56:51 -0700 | [diff] [blame] | 35 | { |
| 36 | #if defined(METHOD_IN_REG) |
| 37 | genRegCopy(cUnit, rTgt, rMETHOD); |
| 38 | #else |
| 39 | loadWordDisp(cUnit, rSP, 0, rTgt); |
| 40 | #endif |
| 41 | } |
| 42 | |
buzbee | ed3e930 | 2011-09-23 17:34:19 -0700 | [diff] [blame^] | 43 | STATIC int loadCurrMethod(CompilationUnit *cUnit) |
buzbee | 1b4c859 | 2011-08-31 10:43:51 -0700 | [diff] [blame] | 44 | { |
| 45 | #if defined(METHOD_IN_REG) |
| 46 | return rMETHOD; |
| 47 | #else |
| 48 | int mReg = oatAllocTemp(cUnit); |
| 49 | loadCurrMethodDirect(cUnit, mReg); |
| 50 | return mReg; |
| 51 | #endif |
| 52 | } |
| 53 | |
buzbee | ed3e930 | 2011-09-23 17:34:19 -0700 | [diff] [blame^] | 54 | STATIC ArmLIR* genImmedCheck(CompilationUnit* cUnit, ArmConditionCode cCode, |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 55 | int reg, int immVal, MIR* mir, ArmThrowKind kind) |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 56 | { |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 57 | ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true); |
| 58 | tgt->opcode = kArmPseudoThrowTarget; |
| 59 | tgt->operands[0] = kind; |
| 60 | tgt->operands[1] = mir->offset; |
| 61 | ArmLIR* branch; |
| 62 | if (cCode == kArmCondAl) { |
| 63 | branch = genUnconditionalBranch(cUnit, tgt); |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 64 | } else { |
buzbee | ec5adf3 | 2011-09-11 15:25:43 -0700 | [diff] [blame] | 65 | branch = genCmpImmBranch(cUnit, cCode, reg, immVal); |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 66 | branch->generic.target = (LIR*)tgt; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 67 | } |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 68 | // Remember branch target - will process later |
| 69 | oatInsertGrowableList(&cUnit->throwLaunchpads, (intptr_t)tgt); |
| 70 | return branch; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 71 | } |
| 72 | |
buzbee | 43a3642 | 2011-09-14 14:00:13 -0700 | [diff] [blame] | 73 | /* Perform null-check on a register. */ |
buzbee | ed3e930 | 2011-09-23 17:34:19 -0700 | [diff] [blame^] | 74 | STATIC ArmLIR* genNullCheck(CompilationUnit* cUnit, int sReg, int mReg, |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 75 | MIR* mir) |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 76 | { |
buzbee | 43a3642 | 2011-09-14 14:00:13 -0700 | [diff] [blame] | 77 | if (!(cUnit->disableOpt & (1 << kNullCheckElimination)) && |
| 78 | mir->optimizationFlags & MIR_IGNORE_NULL_CHECK) { |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 79 | return NULL; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 80 | } |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 81 | return genImmedCheck(cUnit, kArmCondEq, mReg, 0, mir, kArmThrowNullPointer); |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 82 | } |
| 83 | |
buzbee | ec5adf3 | 2011-09-11 15:25:43 -0700 | [diff] [blame] | 84 | /* Perform check on two registers */ |
buzbee | ed3e930 | 2011-09-23 17:34:19 -0700 | [diff] [blame^] | 85 | STATIC TGT_LIR* genRegRegCheck(CompilationUnit* cUnit, ArmConditionCode cCode, |
buzbee | ec5adf3 | 2011-09-11 15:25:43 -0700 | [diff] [blame] | 86 | int reg1, int reg2, MIR* mir, ArmThrowKind kind) |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 87 | { |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 88 | ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true); |
| 89 | tgt->opcode = kArmPseudoThrowTarget; |
| 90 | tgt->operands[0] = kind; |
buzbee | ec5adf3 | 2011-09-11 15:25:43 -0700 | [diff] [blame] | 91 | tgt->operands[1] = mir ? mir->offset : 0; |
| 92 | tgt->operands[2] = reg1; |
| 93 | tgt->operands[3] = reg2; |
| 94 | opRegReg(cUnit, kOpCmp, reg1, reg2); |
| 95 | ArmLIR* branch = genConditionalBranch(cUnit, cCode, tgt); |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 96 | // Remember branch target - will process later |
| 97 | oatInsertGrowableList(&cUnit->throwLaunchpads, (intptr_t)tgt); |
| 98 | return branch; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 99 | } |