blob: a4574f980e86f176568a22f9c0520e32aaf6b571 [file] [log] [blame]
buzbeeeaf09bc2012-11-15 14:51:41 -08001/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_SRC_COMPILER_CODEGEN_CODEGENUTIL_H_
18#define ART_SRC_COMPILER_CODEGEN_CODEGENUTIL_H_
19
20namespace art {
21
buzbeecbd6d442012-11-17 14:11:25 -080022inline int32_t s4FromSwitchData(const void* switchData) { return *reinterpret_cast<const int32_t*>(switchData); }
buzbeeeaf09bc2012-11-15 14:51:41 -080023inline RegisterClass oatRegClassBySize(OpSize size) { return (size == kUnsignedHalf || size == kSignedHalf || size == kUnsignedByte || size == kSignedByte ) ? kCoreReg : kAnyReg; }
buzbee52a77fc2012-11-20 19:50:46 -080024void AssembleLIR(CompilationUnit* cUnit);
25void SetMemRefType(LIR* lir, bool isLoad, int memType);
26void AnnotateDalvikRegAccess(LIR* lir, int regId, bool isLoad, bool is64bit);
27uint64_t GetRegMaskCommon(CompilationUnit* cUnit, int reg);
28void SetupRegMask(CompilationUnit* cUnit, uint64_t* mask, int reg);
29void SetupResourceMasks(CompilationUnit* cUnit, LIR* lir);
30void DumpLIRInsn(CompilationUnit* cUnit, LIR* arg, unsigned char* baseAddr);
31void DumpPromotionMap(CompilationUnit *cUnit);
buzbee52a77fc2012-11-20 19:50:46 -080032void CodegenDump(CompilationUnit* cUnit);
buzbeeeaf09bc2012-11-15 14:51:41 -080033// TODO: remove default parameters
buzbee52a77fc2012-11-20 19:50:46 -080034LIR* RawLIR(CompilationUnit* cUnit, int dalvikOffset, int opcode, int op0 = 0, int op1 = 0, int op2 = 0, int op3 = 0, int op4 = 0, LIR* target = NULL);
35LIR* NewLIR0(CompilationUnit* cUnit, int opcode);
36LIR* NewLIR1(CompilationUnit* cUnit, int opcode, int dest);
37LIR* NewLIR2(CompilationUnit* cUnit, int opcode, int dest, int src1);
38LIR* NewLIR3(CompilationUnit* cUnit, int opcode, int dest, int src1, int src2);
39LIR* NewLIR4(CompilationUnit* cUnit, int opcode, int dest, int src1, int src2, int info);
40LIR* NewLIR5(CompilationUnit* cUnit, int opcode, int dest, int src1, int src2, int info1, int info2);
41LIR* ScanLiteralPool(LIR* dataTarget, int value, unsigned int delta);
42LIR* ScanLiteralPoolWide(LIR* dataTarget, int valLo, int valHi);
43LIR* AddWordData(CompilationUnit* cUnit, LIR* *constantListP, int value);
44LIR* AddWideData(CompilationUnit* cUnit, LIR* *constantListP, int valLo, int valHi);
45void ProcessSwitchTables(CompilationUnit* cUnit);
46void DumpSparseSwitchTable(const uint16_t* table);
47void DumpPackedSwitchTable(const uint16_t* table);
48LIR* MarkBoundary(CompilationUnit* cUnit, int offset, const char* instStr);
buzbeeeaf09bc2012-11-15 14:51:41 -080049
50} // namespace art
51
52#endif // ART_SRC_COMPILER_CODEGEN_CODEGENUTIL_H_