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gerrit-public.fairphone.software / platform / art / fa57c47f1b72916371a9c2d5c1389219bce655b4 / . / src / compiler / dataflow.cc
blob: 2bca16764a2a7e6a2632ca1c55ac8507f7f28ff5 [file] [log] [blame]
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
buzbeeeaf09bc2012-11-15 14:51:41 -0800[diff] [blame]17#include "compiler_internals.h"
buzbeeefc63692012-11-14 16:31:52 -0800[diff] [blame]18#include "dataflow.h"
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]19
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]20namespace art {
21
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]22/*
23 * Main table containing data flow attributes for each bytecode. The
24 * first kNumPackedOpcodes entries are for Dalvik bytecode
25 * instructions, where extended opcode at the MIR level are appended
26 * afterwards.
27 *
28 * TODO - many optimization flags are incomplete - they will only limit the
29 * scope of optimizations but will not cause mis-optimizations.
30 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]31const int oat_data_flow_attributes[kMirOpLast] = {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]32 // 00 NOP
33 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]34
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]35 // 01 MOVE vA, vB
36 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]37
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]38 // 02 MOVE_FROM16 vAA, vBBBB
39 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]40
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]41 // 03 MOVE_16 vAAAA, vBBBB
42 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]43
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]44 // 04 MOVE_WIDE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]45 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]46
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]47 // 05 MOVE_WIDE_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]48 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]49
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]50 // 06 MOVE_WIDE_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]51 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]52
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]53 // 07 MOVE_OBJECT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]54 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]55
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]56 // 08 MOVE_OBJECT_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]57 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]58
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]59 // 09 MOVE_OBJECT_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]60 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]61
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]62 // 0A MOVE_RESULT vAA
63 DF_DA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]64
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]65 // 0B MOVE_RESULT_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]66 DF_DA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]67
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]68 // 0C MOVE_RESULT_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]69 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]70
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]71 // 0D MOVE_EXCEPTION vAA
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]72 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]73
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]74 // 0E RETURN_VOID
75 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]76
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]77 // 0F RETURN vAA
78 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]79
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]80 // 10 RETURN_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]81 DF_UA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]82
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]83 // 11 RETURN_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]84 DF_UA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]85
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]86 // 12 CONST_4 vA, #+B
87 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]88
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]89 // 13 CONST_16 vAA, #+BBBB
90 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]91
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]92 // 14 CONST vAA, #+BBBBBBBB
93 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]94
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]95 // 15 CONST_HIGH16 VAA, #+BBBB0000
96 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]97
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]98 // 16 CONST_WIDE_16 vAA, #+BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]99 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]100
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]101 // 17 CONST_WIDE_32 vAA, #+BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]102 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]103
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]104 // 18 CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]105 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]106
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]107 // 19 CONST_WIDE_HIGH16 vAA, #+BBBB000000000000
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]108 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]109
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]110 // 1A CONST_STRING vAA, string@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]111 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]112
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]113 // 1B CONST_STRING_JUMBO vAA, string@BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]114 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]115
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]116 // 1C CONST_CLASS vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]117 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]118
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]119 // 1D MONITOR_ENTER vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]120 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]121
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]122 // 1E MONITOR_EXIT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]123 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]124
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]125 // 1F CHK_CAST vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]126 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]127
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]128 // 20 INSTANCE_OF vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]129 DF_DA | DF_UB | DF_CORE_A | DF_REF_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]130
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]131 // 21 ARRAY_LENGTH vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]132 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_CORE_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]133
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]134 // 22 NEW_INSTANCE vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]135 DF_DA | DF_NON_NULL_DST | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]136
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]137 // 23 NEW_ARRAY vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]138 DF_DA | DF_UB | DF_NON_NULL_DST | DF_REF_A | DF_CORE_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]139
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]140 // 24 FILLED_NEW_ARRAY {vD, vE, vF, vG, vA}
141 DF_FORMAT_35C | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]142
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]143 // 25 FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB
144 DF_FORMAT_3RC | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]145
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]146 // 26 FILL_ARRAY_DATA vAA, +BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]147 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]148
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]149 // 27 THROW vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]150 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]151
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]152 // 28 GOTO
153 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]154
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]155 // 29 GOTO_16
156 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]157
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]158 // 2A GOTO_32
159 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]160
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]161 // 2B PACKED_SWITCH vAA, +BBBBBBBB
162 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]163
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]164 // 2C SPARSE_SWITCH vAA, +BBBBBBBB
165 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]166
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]167 // 2D CMPL_FLOAT vAA, vBB, vCC
168 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]169
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]170 // 2E CMPG_FLOAT vAA, vBB, vCC
171 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]172
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]173 // 2F CMPL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]174 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]175
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]176 // 30 CMPG_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]177 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]178
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]179 // 31 CMP_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]180 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]181
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]182 // 32 IF_EQ vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]183 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]184
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]185 // 33 IF_NE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]186 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]187
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]188 // 34 IF_LT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]189 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]190
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]191 // 35 IF_GE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]192 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]193
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]194 // 36 IF_GT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]195 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]196
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]197 // 37 IF_LE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]198 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]199
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]200 // 38 IF_EQZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]201 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]202
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]203 // 39 IF_NEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]204 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]205
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]206 // 3A IF_LTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]207 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]208
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]209 // 3B IF_GEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]210 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]211
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]212 // 3C IF_GTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]213 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]214
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]215 // 3D IF_LEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]216 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]217
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]218 // 3E UNUSED_3E
219 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]220
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]221 // 3F UNUSED_3F
222 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]223
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]224 // 40 UNUSED_40
225 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]226
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]227 // 41 UNUSED_41
228 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]229
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]230 // 42 UNUSED_42
231 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]232
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]233 // 43 UNUSED_43
234 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]235
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]236 // 44 AGET vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]237 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]238
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]239 // 45 AGET_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]240 DF_DA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]241
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]242 // 46 AGET_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]243 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]244
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]245 // 47 AGET_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]246 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]247
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]248 // 48 AGET_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]249 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]250
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]251 // 49 AGET_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]252 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]253
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]254 // 4A AGET_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]255 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]256
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]257 // 4B APUT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]258 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]259
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]260 // 4C APUT_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]261 DF_UA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_2 | DF_RANGE_CHK_3 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]262
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]263 // 4D APUT_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]264 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]265
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]266 // 4E APUT_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]267 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]268
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]269 // 4F APUT_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]270 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]271
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]272 // 50 APUT_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]273 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]274
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]275 // 51 APUT_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]276 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]277
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]278 // 52 IGET vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]279 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]280
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]281 // 53 IGET_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]282 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]283
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]284 // 54 IGET_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]285 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]286
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]287 // 55 IGET_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]288 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]289
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]290 // 56 IGET_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]291 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]292
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]293 // 57 IGET_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]294 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]295
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]296 // 58 IGET_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]297 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]298
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]299 // 59 IPUT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]300 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]301
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]302 // 5A IPUT_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]303 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]304
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]305 // 5B IPUT_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]306 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]307
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]308 // 5C IPUT_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]309 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]310
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]311 // 5D IPUT_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]312 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]313
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]314 // 5E IPUT_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]315 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]316
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]317 // 5F IPUT_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]318 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]319
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]320 // 60 SGET vAA, field@BBBB
321 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]322
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]323 // 61 SGET_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]324 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]325
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]326 // 62 SGET_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]327 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]328
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]329 // 63 SGET_BOOLEAN vAA, field@BBBB
330 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]331
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]332 // 64 SGET_BYTE vAA, field@BBBB
333 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]334
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]335 // 65 SGET_CHAR vAA, field@BBBB
336 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]337
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]338 // 66 SGET_SHORT vAA, field@BBBB
339 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]340
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]341 // 67 SPUT vAA, field@BBBB
342 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]343
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]344 // 68 SPUT_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]345 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]346
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]347 // 69 SPUT_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]348 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]349
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]350 // 6A SPUT_BOOLEAN vAA, field@BBBB
351 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]352
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]353 // 6B SPUT_BYTE vAA, field@BBBB
354 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]355
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]356 // 6C SPUT_CHAR vAA, field@BBBB
357 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]358
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]359 // 6D SPUT_SHORT vAA, field@BBBB
360 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]361
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]362 // 6E INVOKE_VIRTUAL {vD, vE, vF, vG, vA}
363 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]364
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]365 // 6F INVOKE_SUPER {vD, vE, vF, vG, vA}
366 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]367
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]368 // 70 INVOKE_DIRECT {vD, vE, vF, vG, vA}
369 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]370
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]371 // 71 INVOKE_STATIC {vD, vE, vF, vG, vA}
372 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]373
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]374 // 72 INVOKE_INTERFACE {vD, vE, vF, vG, vA}
375 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]376
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]377 // 73 UNUSED_73
378 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]379
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]380 // 74 INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN}
381 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]382
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]383 // 75 INVOKE_SUPER_RANGE {vCCCC .. vNNNN}
384 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]385
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]386 // 76 INVOKE_DIRECT_RANGE {vCCCC .. vNNNN}
387 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]388
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]389 // 77 INVOKE_STATIC_RANGE {vCCCC .. vNNNN}
390 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]391
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]392 // 78 INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN}
393 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]394
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]395 // 79 UNUSED_79
396 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]397
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]398 // 7A UNUSED_7A
399 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]400
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]401 // 7B NEG_INT vA, vB
402 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]403
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]404 // 7C NOT_INT vA, vB
405 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]406
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]407 // 7D NEG_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]408 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]409
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]410 // 7E NOT_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]411 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]412
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]413 // 7F NEG_FLOAT vA, vB
414 DF_DA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]415
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]416 // 80 NEG_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]417 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]418
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]419 // 81 INT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]420 DF_DA | DF_A_WIDE | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]421
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]422 // 82 INT_TO_FLOAT vA, vB
423 DF_DA | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]424
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]425 // 83 INT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]426 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]427
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]428 // 84 LONG_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]429 DF_DA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]430
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]431 // 85 LONG_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]432 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]433
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]434 // 86 LONG_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]435 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]436
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]437 // 87 FLOAT_TO_INT vA, vB
438 DF_DA | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]439
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]440 // 88 FLOAT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]441 DF_DA | DF_A_WIDE | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]442
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]443 // 89 FLOAT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]444 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]445
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]446 // 8A DOUBLE_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]447 DF_DA | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]448
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]449 // 8B DOUBLE_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]450 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]451
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]452 // 8C DOUBLE_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]453 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]454
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]455 // 8D INT_TO_BYTE vA, vB
456 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]457
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]458 // 8E INT_TO_CHAR vA, vB
459 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]460
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]461 // 8F INT_TO_SHORT vA, vB
462 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]463
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]464 // 90 ADD_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]465 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]466
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]467 // 91 SUB_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]468 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]469
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]470 // 92 MUL_INT vAA, vBB, vCC
471 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]472
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]473 // 93 DIV_INT vAA, vBB, vCC
474 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]475
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]476 // 94 REM_INT vAA, vBB, vCC
477 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]478
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]479 // 95 AND_INT vAA, vBB, vCC
480 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]481
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]482 // 96 OR_INT vAA, vBB, vCC
483 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]484
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]485 // 97 XOR_INT vAA, vBB, vCC
486 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]487
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]488 // 98 SHL_INT vAA, vBB, vCC
489 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]490
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]491 // 99 SHR_INT vAA, vBB, vCC
492 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]493
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]494 // 9A USHR_INT vAA, vBB, vCC
495 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]496
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]497 // 9B ADD_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]498 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]499
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]500 // 9C SUB_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]501 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]502
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]503 // 9D MUL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]504 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]505
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]506 // 9E DIV_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]507 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]508
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]509 // 9F REM_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]510 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]511
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]512 // A0 AND_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]513 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]514
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]515 // A1 OR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]516 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]517
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]518 // A2 XOR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]519 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]520
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]521 // A3 SHL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]522 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]523
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]524 // A4 SHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]525 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]526
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]527 // A5 USHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]528 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]529
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]530 // A6 ADD_FLOAT vAA, vBB, vCC
531 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]532
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]533 // A7 SUB_FLOAT vAA, vBB, vCC
534 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]535
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]536 // A8 MUL_FLOAT vAA, vBB, vCC
537 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]538
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]539 // A9 DIV_FLOAT vAA, vBB, vCC
540 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]541
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]542 // AA REM_FLOAT vAA, vBB, vCC
543 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]544
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]545 // AB ADD_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]546 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]547
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]548 // AC SUB_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]549 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]550
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]551 // AD MUL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]552 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]553
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]554 // AE DIV_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]555 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]556
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]557 // AF REM_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]558 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]559
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]560 // B0 ADD_INT_2ADDR vA, vB
561 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]562
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]563 // B1 SUB_INT_2ADDR vA, vB
564 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]565
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]566 // B2 MUL_INT_2ADDR vA, vB
567 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]568
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]569 // B3 DIV_INT_2ADDR vA, vB
570 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]571
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]572 // B4 REM_INT_2ADDR vA, vB
573 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]574
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]575 // B5 AND_INT_2ADDR vA, vB
576 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]577
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]578 // B6 OR_INT_2ADDR vA, vB
579 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]580
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]581 // B7 XOR_INT_2ADDR vA, vB
582 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]583
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]584 // B8 SHL_INT_2ADDR vA, vB
585 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]586
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]587 // B9 SHR_INT_2ADDR vA, vB
588 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]589
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]590 // BA USHR_INT_2ADDR vA, vB
591 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]592
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]593 // BB ADD_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]594 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]595
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]596 // BC SUB_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]597 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]598
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]599 // BD MUL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]600 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]601
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]602 // BE DIV_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]603 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]604
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]605 // BF REM_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]606 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]607
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]608 // C0 AND_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]609 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]610
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]611 // C1 OR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]612 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]613
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]614 // C2 XOR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]615 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]616
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]617 // C3 SHL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]618 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]619
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]620 // C4 SHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]621 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]622
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]623 // C5 USHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]624 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]625
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]626 // C6 ADD_FLOAT_2ADDR vA, vB
627 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]628
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]629 // C7 SUB_FLOAT_2ADDR vA, vB
630 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]631
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]632 // C8 MUL_FLOAT_2ADDR vA, vB
633 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]634
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]635 // C9 DIV_FLOAT_2ADDR vA, vB
636 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]637
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]638 // CA REM_FLOAT_2ADDR vA, vB
639 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]640
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]641 // CB ADD_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]642 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]643
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]644 // CC SUB_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]645 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]646
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]647 // CD MUL_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]648 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]649
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]650 // CE DIV_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]651 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]652
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]653 // CF REM_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]654 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]655
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]656 // D0 ADD_INT_LIT16 vA, vB, #+CCCC
657 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]658
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]659 // D1 RSUB_INT vA, vB, #+CCCC
660 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]661
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]662 // D2 MUL_INT_LIT16 vA, vB, #+CCCC
663 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]664
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]665 // D3 DIV_INT_LIT16 vA, vB, #+CCCC
666 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]667
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]668 // D4 REM_INT_LIT16 vA, vB, #+CCCC
669 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]670
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]671 // D5 AND_INT_LIT16 vA, vB, #+CCCC
672 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]673
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]674 // D6 OR_INT_LIT16 vA, vB, #+CCCC
675 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]676
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]677 // D7 XOR_INT_LIT16 vA, vB, #+CCCC
678 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]679
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]680 // D8 ADD_INT_LIT8 vAA, vBB, #+CC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]681 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]682
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]683 // D9 RSUB_INT_LIT8 vAA, vBB, #+CC
684 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]685
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]686 // DA MUL_INT_LIT8 vAA, vBB, #+CC
687 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]688
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]689 // DB DIV_INT_LIT8 vAA, vBB, #+CC
690 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]691
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]692 // DC REM_INT_LIT8 vAA, vBB, #+CC
693 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]694
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]695 // DD AND_INT_LIT8 vAA, vBB, #+CC
696 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]697
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]698 // DE OR_INT_LIT8 vAA, vBB, #+CC
699 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]700
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]701 // DF XOR_INT_LIT8 vAA, vBB, #+CC
702 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]703
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]704 // E0 SHL_INT_LIT8 vAA, vBB, #+CC
705 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]706
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]707 // E1 SHR_INT_LIT8 vAA, vBB, #+CC
708 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]709
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]710 // E2 USHR_INT_LIT8 vAA, vBB, #+CC
711 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]712
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]713 // E3 IGET_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]714 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]715
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]716 // E4 IPUT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]717 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]718
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]719 // E5 SGET_VOLATILE
720 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]721
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]722 // E6 SPUT_VOLATILE
723 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]724
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]725 // E7 IGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]726 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]727
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]728 // E8 IGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]729 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]730
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]731 // E9 IPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]732 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]733
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]734 // EA SGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]735 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]736
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]737 // EB SPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]738 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]739
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]740 // EC BREAKPOINT
741 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]742
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]743 // ED THROW_VERIFICATION_ERROR
744 DF_NOP | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]745
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]746 // EE EXECUTE_INLINE
747 DF_FORMAT_35C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]748
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]749 // EF EXECUTE_INLINE_RANGE
750 DF_FORMAT_3RC,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]751
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]752 // F0 INVOKE_OBJECT_INIT_RANGE
753 DF_NOP | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]754
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]755 // F1 RETURN_VOID_BARRIER
756 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]757
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]758 // F2 IGET_QUICK
759 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]760
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]761 // F3 IGET_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]762 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]763
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]764 // F4 IGET_OBJECT_QUICK
765 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]766
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]767 // F5 IPUT_QUICK
768 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]769
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]770 // F6 IPUT_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]771 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]772
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]773 // F7 IPUT_OBJECT_QUICK
774 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]775
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]776 // F8 INVOKE_VIRTUAL_QUICK
777 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]778
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]779 // F9 INVOKE_VIRTUAL_QUICK_RANGE
780 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]781
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]782 // FA INVOKE_SUPER_QUICK
783 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]784
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]785 // FB INVOKE_SUPER_QUICK_RANGE
786 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]787
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]788 // FC IPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]789 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]790
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]791 // FD SGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]792 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]793
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]794 // FE SPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]795 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]796
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]797 // FF UNUSED_FF
798 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]799
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]800 // Beginning of extended MIR opcodes
801 // 100 MIR_PHI
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]802 DF_DA | DF_NULL_TRANSFER_N,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]803
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]804 // 101 MIR_COPY
805 DF_DA | DF_UB | DF_IS_MOVE,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]806
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]807 // 102 MIR_FUSED_CMPL_FLOAT
808 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]809
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]810 // 103 MIR_FUSED_CMPG_FLOAT
811 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]812
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]813 // 104 MIR_FUSED_CMPL_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]814 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]815
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]816 // 105 MIR_FUSED_CMPG_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]817 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]818
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]819 // 106 MIR_FUSED_CMP_LONG
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]820 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]821
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]822 // 107 MIR_NOP
823 DF_NOP,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]824
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]825 // 108 MIR_NULL_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]826 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]827
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]828 // 109 MIR_RANGE_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]829 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]830
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]831 // 110 MIR_DIV_ZERO_CHECK
832 0,
833
834 // 111 MIR_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]835 0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]836};
837
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]838/* Return the base virtual register for a SSA name */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]839int SRegToVReg(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]840{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]841 DCHECK_LT(ssa_reg, static_cast<int>(cu->ssa_base_vregs->num_used));
842 return GET_ELEM_N(cu->ssa_base_vregs, int, ssa_reg);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]843}
844
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]845int SRegToSubscript(const CompilationUnit* cu, int ssa_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]846{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]847 DCHECK(ssa_reg < static_cast<int>(cu->ssa_subscripts->num_used));
848 return GET_ELEM_N(cu->ssa_subscripts, int, ssa_reg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]849}
850
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]851static int GetSSAUseCount(CompilationUnit* cu, int s_reg)
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]852{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]853 DCHECK(s_reg < static_cast<int>(cu->raw_use_counts.num_used));
854 return cu->raw_use_counts.elem_list[s_reg];
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]855}
856
857
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]858char* GetDalvikDisassembly(CompilationUnit* cu,
Elliott Hughesadb8c672012-03-06 16:49:32 -0800[diff] [blame]859 const DecodedInstruction& insn, const char* note)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]860{
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]861 std::string str;
862 int opcode = insn.opcode;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]863 int df_attributes = oat_data_flow_attributes[opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]864 int flags;
865 char* ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]866
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]867 if (opcode >= kMirOpFirst) {
868 if (opcode == kMirOpPhi) {
869 str.append("PHI");
870 } else if (opcode == kMirOpCheck) {
871 str.append("Check");
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]872 } else {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]873 str.append(StringPrintf("Opcode %#x", opcode));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]874 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]875 flags = 0;
876 } else {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]877 str.append(Instruction::Name(insn.opcode));
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]878 flags = Instruction::FlagsOf(insn.opcode);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]879 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]880
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]881 if (note) {
882 str.append(note);
883 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]884
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]885 /* For branches, decode the instructions to print out the branch targets */
886 if (flags & Instruction::kBranch) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]887 Instruction::Format dalvik_format = Instruction::FormatOf(insn.opcode);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]888 int offset = 0;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]889 switch (dalvik_format) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]890 case Instruction::k21t:
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]891 str.append(StringPrintf(" v%d,", insn.vA));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]892 offset = insn.vB;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]893 break;
894 case Instruction::k22t:
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]895 str.append(StringPrintf(" v%d, v%d,", insn.vA, insn.vB));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]896 offset = insn.vC;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]897 break;
898 case Instruction::k10t:
899 case Instruction::k20t:
900 case Instruction::k30t:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]901 offset = insn.vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]902 break;
903 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]904 LOG(FATAL) << "Unexpected branch format " << dalvik_format << " from " << insn.opcode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]905 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]906 str.append(StringPrintf(" (%c%x)",
907 offset > 0 ? '+' : '-',
908 offset > 0 ? offset : -offset));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]909 } else if (df_attributes & DF_FORMAT_35C) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]910 unsigned int i;
911 for (i = 0; i < insn.vA; i++) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]912 if (i != 0) str.append(",");
913 str.append(StringPrintf(" v%d", insn.arg[i]));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]914 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]915 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]916 else if (df_attributes & DF_FORMAT_3RC) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]917 str.append(StringPrintf(" v%d..v%d", insn.vC, insn.vC + insn.vA - 1));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]918 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]919 if (df_attributes & DF_A_IS_REG) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]920 str.append(StringPrintf(" v%d", insn.vA));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]921 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]922 if (df_attributes & DF_B_IS_REG) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]923 str.append(StringPrintf(", v%d", insn.vB));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]924 } else if (static_cast<int>(opcode) < static_cast<int>(kMirOpFirst)) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]925 str.append(StringPrintf(", (#%d)", insn.vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]926 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]927 if (df_attributes & DF_C_IS_REG) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]928 str.append(StringPrintf(", v%d", insn.vC));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]929 } else if (static_cast<int>(opcode) < static_cast<int>(kMirOpFirst)) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]930 str.append(StringPrintf(", (#%d)", insn.vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]931 }
932 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]933 int length = str.length() + 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]934 ret = static_cast<char*>(NewMem(cu, length, false, kAllocDFInfo));
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]935 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]936 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]937}
938
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]939static std::string GetSSAName(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]940{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]941 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg),
942 SRegToSubscript(cu, ssa_reg));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]943}
944
945/*
946 * Dalvik instruction disassembler with optional SSA printing.
947 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]948char* FullDisassembler(CompilationUnit* cu, const MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]949{
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]950 std::string str;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]951 const DecodedInstruction* insn = &mir->dalvikInsn;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]952 int opcode = insn->opcode;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]953 int df_attributes = oat_data_flow_attributes[opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]954 char* ret;
955 int length;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]956
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]957 if (opcode >= kMirOpFirst) {
958 if (opcode == kMirOpPhi) {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]959 int* incoming = reinterpret_cast<int*>(mir->dalvikInsn.vB);
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]960 str.append(StringPrintf("PHI %s = (%s",
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]961 GetSSAName(cu, mir->ssa_rep->defs[0]).c_str(),
962 GetSSAName(cu, mir->ssa_rep->uses[0]).c_str()));
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]963 str.append(StringPrintf(":%d",incoming[0]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]964 int i;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]965 for (i = 1; i < mir->ssa_rep->num_uses; i++) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]966 str.append(StringPrintf(", %s:%d",
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]967 GetSSAName(cu, mir->ssa_rep->uses[i]).c_str(),
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]968 incoming[i]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]969 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]970 str.append(")");
971 } else if (opcode == kMirOpCheck) {
972 str.append("Check ");
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]973 str.append(Instruction::Name(mir->meta.throw_insn->dalvikInsn.opcode));
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]974 } else if (opcode == kMirOpNop) {
975 str.append("MirNop");
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]976 } else {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]977 str.append(StringPrintf("Opcode %#x", opcode));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]978 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]979 goto done;
980 } else {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]981 str.append(Instruction::Name(insn->opcode));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]982 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]983
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]984 /* For branches, decode the instructions to print out the branch targets */
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]985 if (Instruction::FlagsOf(insn->opcode) & Instruction::kBranch) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]986 Instruction::Format dalvik_format = Instruction::FormatOf(insn->opcode);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]987 int delta = 0;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]988 switch (dalvik_format) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]989 case Instruction::k21t:
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]990 str.append(StringPrintf(" %s, ",
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]991 GetSSAName(cu, mir->ssa_rep->uses[0]).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]992 delta = insn->vB;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]993 break;
994 case Instruction::k22t:
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]995 str.append(StringPrintf(" %s, %s, ",
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]996 GetSSAName(cu, mir->ssa_rep->uses[0]).c_str(),
997 GetSSAName(cu, mir->ssa_rep->uses[1]).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]998 delta = insn->vC;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]999 break;
1000 case Instruction::k10t:
1001 case Instruction::k20t:
1002 case Instruction::k30t:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1003 delta = insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1004 break;
1005 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1006 LOG(FATAL) << "Unexpected branch format: " << dalvik_format;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1007 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1008 str.append(StringPrintf(" %04x", mir->offset + delta));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1009 } else if (df_attributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1010 unsigned int i;
1011 for (i = 0; i < insn->vA; i++) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1012 if (i != 0) str.append(",");
1013 str.append(" ");
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1014 str.append(GetSSAName(cu, mir->ssa_rep->uses[i]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1015 }
1016 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1017 int ud_idx;
1018 if (mir->ssa_rep->num_defs) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1019
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1020 for (ud_idx = 0; ud_idx < mir->ssa_rep->num_defs; ud_idx++) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1021 str.append(" ");
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1022 str.append(GetSSAName(cu, mir->ssa_rep->defs[ud_idx]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1023 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1024 str.append(",");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1025 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1026 if (mir->ssa_rep->num_uses) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1027 /* No leading ',' for the first use */
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1028 str.append(" ");
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1029 str.append(GetSSAName(cu, mir->ssa_rep->uses[0]));
1030 for (ud_idx = 1; ud_idx < mir->ssa_rep->num_uses; ud_idx++) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1031 str.append(", ");
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1032 str.append(GetSSAName(cu, mir->ssa_rep->uses[ud_idx]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1033 }
1034 }
1035 if (static_cast<int>(opcode) < static_cast<int>(kMirOpFirst)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1036 Instruction::Format dalvik_format = Instruction::FormatOf(insn->opcode);
1037 switch (dalvik_format) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1038 case Instruction::k11n: // op vA, #+B
1039 case Instruction::k21s: // op vAA, #+BBBB
1040 case Instruction::k21h: // op vAA, #+BBBB00000[00000000]
1041 case Instruction::k31i: // op vAA, #+BBBBBBBB
1042 case Instruction::k51l: // op vAA, #+BBBBBBBBBBBBBBBB
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1043 str.append(StringPrintf(" #%#x", insn->vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1044 break;
1045 case Instruction::k21c: // op vAA, thing@BBBB
1046 case Instruction::k31c: // op vAA, thing@BBBBBBBB
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1047 str.append(StringPrintf(" @%#x", insn->vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1048 break;
1049 case Instruction::k22b: // op vAA, vBB, #+CC
1050 case Instruction::k22s: // op vA, vB, #+CCCC
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1051 str.append(StringPrintf(" #%#x", insn->vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1052 break;
1053 case Instruction::k22c: // op vA, vB, thing@CCCC
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1054 str.append(StringPrintf(" @%#x", insn->vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1055 break;
1056 /* No need for special printing */
1057 default:
1058 break;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1059 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1060 }
1061 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1062
1063done:
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1064 length = str.length() + 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1065 ret = static_cast<char*>(NewMem(cu, length, false, kAllocDFInfo));
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1066 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1067 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1068}
1069
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1070char* GetSSAString(CompilationUnit* cu, SSARepresentation* ssa_rep)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1071{
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1072 std::string str;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1073 char* ret;
1074 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1075
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1076 for (i = 0; i < ssa_rep->num_defs; i++) {
1077 int ssa_reg = ssa_rep->defs[i];
1078 str.append(StringPrintf("s%d(v%d_%d) ", ssa_reg,
1079 SRegToVReg(cu, ssa_reg),
1080 SRegToSubscript(cu, ssa_reg)));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1081 }
1082
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1083 if (ssa_rep->num_defs) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1084 str.append("<- ");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1085 }
1086
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1087 for (i = 0; i < ssa_rep->num_uses; i++) {
1088 int ssa_reg = ssa_rep->uses[i];
1089 str.append(StringPrintf("s%d(v%d_%d) ", ssa_reg, SRegToVReg(cu, ssa_reg),
1090 SRegToSubscript(cu, ssa_reg)));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1091 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1092
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1093 int length = str.length() + 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1094 ret = static_cast<char*>(NewMem(cu, length, false, kAllocDFInfo));
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1095 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1096 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1097}
1098
1099/* Any register that is used before being defined is considered live-in */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1100static void HandleLiveInUse(CompilationUnit* cu, ArenaBitVector* use_v, ArenaBitVector* def_v,
1101 ArenaBitVector* live_in_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1102{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1103 SetBit(cu, use_v, dalvik_reg_id);
1104 if (!IsBitSet(def_v, dalvik_reg_id)) {
1105 SetBit(cu, live_in_v, dalvik_reg_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1106 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1107}
1108
1109/* Mark a reg as being defined */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1110static void HandleDef(CompilationUnit* cu, ArenaBitVector* def_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1111{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1112 SetBit(cu, def_v, dalvik_reg_id);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1113}
1114
1115/*
1116 * Find out live-in variables for natural loops. Variables that are live-in in
1117 * the main loop body are considered to be defined in the entry block.
1118 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1119bool FindLocalLiveIn(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1120{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1121 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1122 ArenaBitVector *use_v, *def_v, *live_in_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1123
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1124 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1125
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1126 use_v = bb->data_flow_info->use_v =
1127 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapUse);
1128 def_v = bb->data_flow_info->def_v =
1129 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapDef);
1130 live_in_v = bb->data_flow_info->live_in_v =
1131 AllocBitVector(cu, cu->num_dalvik_registers, false,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1132 kBitMapLiveIn);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1133
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1134 for (mir = bb->first_mir_insn; mir; mir = mir->next) {
1135 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1136 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1137
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1138 if (df_attributes & DF_HAS_USES) {
1139 if (df_attributes & DF_UA) {
1140 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA);
1141 if (df_attributes & DF_A_WIDE) {
1142 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1143 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1144 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1145 if (df_attributes & DF_UB) {
1146 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB);
1147 if (df_attributes & DF_B_WIDE) {
1148 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1149 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1150 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1151 if (df_attributes & DF_UC) {
1152 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC);
1153 if (df_attributes & DF_C_WIDE) {
1154 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1155 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1156 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1157 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1158 if (df_attributes & DF_FORMAT_35C) {
1159 for (unsigned int i = 0; i < d_insn->vA; i++) {
1160 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->arg[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1161 }
1162 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1163 if (df_attributes & DF_FORMAT_3RC) {
1164 for (unsigned int i = 0; i < d_insn->vA; i++) {
1165 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1166 }
1167 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1168 if (df_attributes & DF_HAS_DEFS) {
1169 HandleDef(cu, def_v, d_insn->vA);
1170 if (df_attributes & DF_A_WIDE) {
1171 HandleDef(cu, def_v, d_insn->vA+1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1172 }
1173 }
1174 }
1175 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1176}
1177
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1178static int AddNewSReg(CompilationUnit* cu, int v_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1179{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1180 // Compiler temps always have a subscript of 0
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1181 int subscript = (v_reg < 0) ? 0 : ++cu->ssa_last_defs[v_reg];
1182 int ssa_reg = cu->num_ssa_regs++;
1183 InsertGrowableList(cu, cu->ssa_base_vregs, v_reg);
1184 InsertGrowableList(cu, cu->ssa_subscripts, subscript);
1185 std::string ssa_name = GetSSAName(cu, ssa_reg);
1186 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, false, kAllocDFInfo));
1187 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1188 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
1189 DCHECK_EQ(cu->ssa_base_vregs->num_used, cu->ssa_subscripts->num_used);
1190 return ssa_reg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1191}
1192
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1193/* Find out the latest SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1194static void HandleSSAUse(CompilationUnit* cu, int* uses, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1195{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1196 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1197 uses[reg_index] = cu->vreg_to_ssa_map[dalvik_reg];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1198}
1199
1200/* Setup a new SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1201static void HandleSSADef(CompilationUnit* cu, int* defs, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1202{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1203 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1204 int ssa_reg = AddNewSReg(cu, dalvik_reg);
1205 cu->vreg_to_ssa_map[dalvik_reg] = ssa_reg;
1206 defs[reg_index] = ssa_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1207}
1208
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1209/* Look up new SSA names for format_35c instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1210static void DataFlowSSAFormat35C(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1211{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1212 DecodedInstruction *d_insn = &mir->dalvikInsn;
1213 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1214 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1215
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1216 mir->ssa_rep->num_uses = num_uses;
1217 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1218 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1219 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1220 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1221
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1222 for (i = 0; i < num_uses; i++) {
1223 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->arg[i], i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1224 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1225}
1226
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1227/* Look up new SSA names for format_3rc instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1228static void DataFlowSSAFormat3RC(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1229{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1230 DecodedInstruction *d_insn = &mir->dalvikInsn;
1231 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1232 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1233
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1234 mir->ssa_rep->num_uses = num_uses;
1235 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1236 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1237 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1238 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1239
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1240 for (i = 0; i < num_uses; i++) {
1241 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+i, i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1242 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1243}
1244
1245/* Entry function to convert a block into SSA representation */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1246bool DoSSAConversion(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1247{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1248 MIR* mir;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1249
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1250 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1251
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1252 for (mir = bb->first_mir_insn; mir; mir = mir->next) {
1253 mir->ssa_rep = static_cast<struct SSARepresentation *>(NewMem(cu, sizeof(SSARepresentation),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1254 true, kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1255
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1256 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1257
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1258 // If not a pseudo-op, note non-leaf or can throw
1259 if (static_cast<int>(mir->dalvikInsn.opcode) <
1260 static_cast<int>(kNumPackedOpcodes)) {
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]1261 int flags = Instruction::FlagsOf(mir->dalvikInsn.opcode);
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1262
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1263 if (flags & Instruction::kThrow) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1264 cu->attrs &= ~METHOD_IS_THROW_FREE;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1265 }
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1266
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1267 if (flags & Instruction::kInvoke) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1268 cu->attrs &= ~METHOD_IS_LEAF;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1269 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1270 }
1271
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1272 int num_uses = 0;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1273
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1274 if (df_attributes & DF_FORMAT_35C) {
1275 DataFlowSSAFormat35C(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1276 continue;
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1277 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1278
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1279 if (df_attributes & DF_FORMAT_3RC) {
1280 DataFlowSSAFormat3RC(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1281 continue;
1282 }
1283
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1284 if (df_attributes & DF_HAS_USES) {
1285 if (df_attributes & DF_UA) {
1286 num_uses++;
1287 if (df_attributes & DF_A_WIDE) {
1288 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1289 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1290 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1291 if (df_attributes & DF_UB) {
1292 num_uses++;
1293 if (df_attributes & DF_B_WIDE) {
1294 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1295 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1296 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1297 if (df_attributes & DF_UC) {
1298 num_uses++;
1299 if (df_attributes & DF_C_WIDE) {
1300 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1301 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1302 }
1303 }
1304
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1305 if (num_uses) {
1306 mir->ssa_rep->num_uses = num_uses;
1307 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1308 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1309 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1310 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1311 }
1312
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1313 int num_defs = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1314
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1315 if (df_attributes & DF_HAS_DEFS) {
1316 num_defs++;
1317 if (df_attributes & DF_A_WIDE) {
1318 num_defs++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1319 }
1320 }
1321
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1322 if (num_defs) {
1323 mir->ssa_rep->num_defs = num_defs;
1324 mir->ssa_rep->defs = static_cast<int*>(NewMem(cu, sizeof(int) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1325 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1326 mir->ssa_rep->fp_def = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1327 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1328 }
1329
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1330 DecodedInstruction *d_insn = &mir->dalvikInsn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1331
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1332 if (df_attributes & DF_HAS_USES) {
1333 num_uses = 0;
1334 if (df_attributes & DF_UA) {
1335 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1336 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA, num_uses++);
1337 if (df_attributes & DF_A_WIDE) {
1338 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1339 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1340 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1341 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1342 if (df_attributes & DF_UB) {
1343 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1344 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB, num_uses++);
1345 if (df_attributes & DF_B_WIDE) {
1346 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1347 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1348 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1349 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1350 if (df_attributes & DF_UC) {
1351 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1352 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC, num_uses++);
1353 if (df_attributes & DF_C_WIDE) {
1354 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1355 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1356 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1357 }
1358 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1359 if (df_attributes & DF_HAS_DEFS) {
1360 mir->ssa_rep->fp_def[0] = df_attributes & DF_FP_A;
1361 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA, 0);
1362 if (df_attributes & DF_A_WIDE) {
1363 mir->ssa_rep->fp_def[1] = df_attributes & DF_FP_A;
1364 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA+1, 1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1365 }
1366 }
1367 }
1368
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1369 if (!cu->disable_dataflow) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1370 /*
1371 * Take a snapshot of Dalvik->SSA mapping at the end of each block. The
1372 * input to PHI nodes can be derived from the snapshot of all
1373 * predecessor blocks.
1374 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1375 bb->data_flow_info->vreg_to_ssa_map =
1376 static_cast<int*>(NewMem(cu, sizeof(int) * cu->num_dalvik_registers, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1377 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1378
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1379 memcpy(bb->data_flow_info->vreg_to_ssa_map, cu->vreg_to_ssa_map,
1380 sizeof(int) * cu->num_dalvik_registers);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1381 }
1382 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1383}
1384
1385/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1386static void SetConstant(CompilationUnit* cu, int ssa_reg, int value)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1387{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1388 SetBit(cu, cu->is_constant_v, ssa_reg);
1389 cu->constant_values[ssa_reg] = value;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1390}
1391
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1392bool DoConstantPropogation(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1393{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1394 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1395 ArenaBitVector *is_constant_v = cu->is_constant_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1396
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1397 for (mir = bb->first_mir_insn; mir; mir = mir->next) {
1398 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1399
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1400 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1401
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1402 if (!(df_attributes & DF_HAS_DEFS)) continue;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1403
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1404 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1405 if (df_attributes & DF_SETS_CONST) {
1406 if (df_attributes & DF_DA) {
1407 switch (d_insn->opcode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1408 case Instruction::CONST_4:
1409 case Instruction::CONST_16:
1410 case Instruction::CONST:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1411 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1412 break;
1413 case Instruction::CONST_HIGH16:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1414 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB << 16);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1415 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1416 case Instruction::CONST_WIDE_16:
1417 case Instruction::CONST_WIDE_32:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1418 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB);
1419 SetConstant(cu, mir->ssa_rep->defs[1], 0);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1420 break;
1421 case Instruction::CONST_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1422 SetConstant(cu, mir->ssa_rep->defs[0], static_cast<int>(d_insn->vB_wide));
1423 SetConstant(cu, mir->ssa_rep->defs[1], static_cast<int>(d_insn->vB_wide >> 32));
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1424 break;
1425 case Instruction::CONST_WIDE_HIGH16:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1426 SetConstant(cu, mir->ssa_rep->defs[0], 0);
1427 SetConstant(cu, mir->ssa_rep->defs[1], d_insn->vB << 16);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1428 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1429 default:
1430 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1431 }
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1432 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1433 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1434 } else if (df_attributes & DF_IS_MOVE) {
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1435 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1436
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1437 for (i = 0; i < mir->ssa_rep->num_uses; i++) {
1438 if (!IsBitSet(is_constant_v, mir->ssa_rep->uses[i])) break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1439 }
1440 /* Move a register holding a constant to another register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1441 if (i == mir->ssa_rep->num_uses) {
1442 SetConstant(cu, mir->ssa_rep->defs[0],
1443 cu->constant_values[mir->ssa_rep->uses[0]]);
1444 if (df_attributes & DF_A_WIDE) {
1445 SetConstant(cu, mir->ssa_rep->defs[1],
1446 cu->constant_values[mir->ssa_rep->uses[1]]);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1447 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1448 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1449 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1450 }
1451 /* TODO: implement code to handle arithmetic operations */
1452 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1453}
1454
1455/* Setup the basic data structures for SSA conversion */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1456void CompilerInitializeSSAConversion(CompilationUnit* cu)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1457{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1458 int i;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1459 int num_dalvik_reg = cu->num_dalvik_registers;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1460
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1461 cu->ssa_base_vregs =
1462 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1463 cu->ssa_subscripts =
1464 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1465 cu->ssa_strings =
1466 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1467 // Create the ssa mappings, estimating the max size
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1468 CompilerInitGrowableList(cu, cu->ssa_base_vregs,
1469 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1470 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1471 CompilerInitGrowableList(cu, cu->ssa_subscripts,
1472 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1473 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1474 CompilerInitGrowableList(cu, cu->ssa_strings,
1475 num_dalvik_reg + cu->def_count + 128,
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1476 kListSSAtoDalvikMap);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1477 /*
1478 * Initial number of SSA registers is equal to the number of Dalvik
1479 * registers.
1480 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1481 cu->num_ssa_regs = num_dalvik_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1482
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1483 /*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1484 * Initialize the SSA2Dalvik map list. For the first num_dalvik_reg elements,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1485 * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value
1486 * into "(0 << 16) | i"
1487 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1488 for (i = 0; i < num_dalvik_reg; i++) {
1489 InsertGrowableList(cu, cu->ssa_base_vregs, i);
1490 InsertGrowableList(cu, cu->ssa_subscripts, 0);
1491 std::string ssa_name = GetSSAName(cu, i);
1492 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, true, kAllocDFInfo));
1493 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1494 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1495 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1496
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1497 /*
1498 * Initialize the DalvikToSSAMap map. There is one entry for each
1499 * Dalvik register, and the SSA names for those are the same.
1500 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1501 cu->vreg_to_ssa_map =
1502 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1503 /* Keep track of the higest def for each dalvik reg */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1504 cu->ssa_last_defs =
1505 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1506
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1507 for (i = 0; i < num_dalvik_reg; i++) {
1508 cu->vreg_to_ssa_map[i] = i;
1509 cu->ssa_last_defs[i] = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1510 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1511
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1512 /* Add ssa reg for Method* */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1513 cu->method_sreg = AddNewSReg(cu, SSA_METHOD_BASEREG);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1514
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1515 /*
1516 * Allocate the BasicBlockDataFlow structure for the entry and code blocks
1517 */
1518 GrowableListIterator iterator;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1519
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1520 GrowableListIteratorInit(&cu->block_list, &iterator);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1521
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1522 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1523 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1524 if (bb == NULL) break;
1525 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1526 if (bb->block_type == kDalvikByteCode ||
1527 bb->block_type == kEntryBlock ||
1528 bb->block_type == kExitBlock) {
1529 bb->data_flow_info = static_cast<BasicBlockDataFlow*>(NewMem(cu, sizeof(BasicBlockDataFlow),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1530 true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1531 }
1532 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1533}
1534
1535/* Clear the visited flag for each BB */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1536bool ClearVisitedFlag(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1537{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1538 bb->visited = false;
1539 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1540}
1541
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1542void DataFlowAnalysisDispatcher(CompilationUnit* cu,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1543 bool (*func)(CompilationUnit*, BasicBlock*),
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1544 DataFlowAnalysisMode dfa_mode,
1545 bool is_iterative)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1546{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1547 bool change = true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1548
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1549 while (change) {
1550 change = false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1551
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1552 switch (dfa_mode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1553 /* Scan all blocks and perform the operations specified in func */
1554 case kAllNodes:
1555 {
1556 GrowableListIterator iterator;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1557 GrowableListIteratorInit(&cu->block_list, &iterator);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1558 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1559 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1560 if (bb == NULL) break;
1561 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1562 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1563 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1564 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1565 break;
1566 /* Scan reachable blocks and perform the ops specified in func. */
1567 case kReachableNodes:
1568 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1569 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1570 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1571 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1572
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1573 for (idx = 0; idx < num_reachable_blocks; idx++) {
1574 int block_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1575 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1576 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, block_idx));
1577 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1578 }
1579 }
1580 break;
1581
1582 /* Scan reachable blocks by pre-order dfs and invoke func on each. */
1583 case kPreOrderDFSTraversal:
1584 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1585 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1586 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1587 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1588
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1589 for (idx = 0; idx < num_reachable_blocks; idx++) {
1590 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1591 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1592 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, dfs_idx));
1593 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1594 }
1595 }
1596 break;
1597 /* Scan reachable blocks post-order dfs and invoke func on each. */
1598 case kPostOrderDFSTraversal:
1599 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1600 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1601 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1602 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1603
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1604 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1605 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1606 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1607 reinterpret_cast<BasicBlock *>( GrowableListGetElement(block_list, dfs_idx));
1608 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1609 }
1610 }
1611 break;
1612 /* Scan reachable post-order dom tree and invoke func on each. */
1613 case kPostOrderDOMTraversal:
1614 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1615 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1616 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1617 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1618
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1619 for (idx = 0; idx < num_reachable_blocks; idx++) {
1620 int dom_idx = cu->dom_post_order_traversal.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1621 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1622 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, dom_idx));
1623 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1624 }
1625 }
1626 break;
1627 /* Scan reachable blocks reverse post-order dfs, invoke func on each */
1628 case kReversePostOrderTraversal:
1629 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1630 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1631 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1632 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1633
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1634 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1635 int rev_idx = cu->dfs_post_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1636 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1637 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, rev_idx));
1638 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1639 }
1640 }
1641 break;
1642 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1643 LOG(FATAL) << "Unknown traversal mode: " << dfa_mode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1644 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1645 /* If is_iterative is false, exit the loop after the first iteration */
1646 change &= is_iterative;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1647 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1648}
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1649
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1650/* Advance to next strictly dominated MIR node in an extended basic block */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1651static MIR* AdvanceMIR(CompilationUnit* cu, BasicBlock** p_bb, MIR* mir,
1652 ArenaBitVector* bv, bool clear_mark) {
1653 BasicBlock* bb = *p_bb;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1654 if (mir != NULL) {
1655 mir = mir->next;
1656 if (mir == NULL) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1657 bb = bb->fall_through;
1658 if ((bb == NULL) || bb->predecessors->num_used != 1) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1659 mir = NULL;
1660 } else {
1661 if (bv) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1662 SetBit(cu, bv, bb->id);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1663 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1664 *p_bb = bb;
1665 mir = bb->first_mir_insn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1666 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1667 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1668 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1669 if (mir && clear_mark) {
1670 mir->optimization_flags &= ~MIR_MARK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1671 }
1672 return mir;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1673}
1674
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1675/*
1676 * To be used at an invoke mir. If the logically next mir node represents
1677 * a move-result, return it. Else, return NULL. If a move-result exists,
1678 * it is required to immediately follow the invoke with no intervening
1679 * opcodes or incoming arcs. However, if the result of the invoke is not
1680 * used, a move-result may not be present.
1681 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1682MIR* FindMoveResult(CompilationUnit* cu, BasicBlock* bb, MIR* mir)
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1683{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1684 BasicBlock* tbb = bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1685 mir = AdvanceMIR(cu, &tbb, mir, NULL, false);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1686 while (mir != NULL) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1687 int opcode = mir->dalvikInsn.opcode;
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1688 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) ||
buzbee52ed7762012-06-13 23:43:14 -0700[diff] [blame]1689 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) ||
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1690 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_WIDE)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1691 break;
1692 }
1693 // Keep going if pseudo op, otherwise terminate
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1694 if (opcode < kNumPackedOpcodes) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1695 mir = NULL;
1696 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1697 mir = AdvanceMIR(cu, &tbb, mir, NULL, false);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1698 }
1699 }
1700 return mir;
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1701}
1702
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1703static void SquashDupRangeChecks(CompilationUnit* cu, BasicBlock** p_bp, MIR* mir,
1704 int array_sreg, int index_sreg)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1705{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1706 while (true) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1707 mir = AdvanceMIR(cu, p_bp, mir, NULL, false);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1708 if (!mir) {
1709 break;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1710 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1711 if ((mir->ssa_rep == NULL) ||
1712 (mir->optimization_flags & MIR_IGNORE_RANGE_CHECK)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1713 continue;
1714 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1715 int check_array = INVALID_SREG;
1716 int check_index = INVALID_SREG;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1717 switch (mir->dalvikInsn.opcode) {
1718 case Instruction::AGET:
1719 case Instruction::AGET_OBJECT:
1720 case Instruction::AGET_BOOLEAN:
1721 case Instruction::AGET_BYTE:
1722 case Instruction::AGET_CHAR:
1723 case Instruction::AGET_SHORT:
1724 case Instruction::AGET_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1725 check_array = mir->ssa_rep->uses[0];
1726 check_index = mir->ssa_rep->uses[1];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1727 break;
1728 case Instruction::APUT:
1729 case Instruction::APUT_OBJECT:
1730 case Instruction::APUT_SHORT:
1731 case Instruction::APUT_CHAR:
1732 case Instruction::APUT_BYTE:
1733 case Instruction::APUT_BOOLEAN:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1734 check_array = mir->ssa_rep->uses[1];
1735 check_index = mir->ssa_rep->uses[2];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1736 break;
1737 case Instruction::APUT_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1738 check_array = mir->ssa_rep->uses[2];
1739 check_index = mir->ssa_rep->uses[3];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1740 default:
1741 break;
1742 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1743 if (check_array == INVALID_SREG) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1744 continue;
1745 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1746 if ((array_sreg == check_array) && (index_sreg == check_index)) {
1747 if (cu->verbose) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1748 LOG(INFO) << "Squashing range check @ 0x" << std::hex << mir->offset;
1749 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1750 mir->optimization_flags |= MIR_IGNORE_RANGE_CHECK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1751 }
1752 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1753}
1754
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1755/* Do some MIR-level basic block optimizations */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1756static bool BasicBlockOpt(CompilationUnit* cu, BasicBlock* bb)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1757{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1758 int num_temps = 0;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1759
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1760 for (MIR* mir = bb->first_mir_insn; mir; mir = mir->next) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1761 // Look for interesting opcodes, skip otherwise
1762 Instruction::Code opcode = mir->dalvikInsn.opcode;
1763 switch (opcode) {
1764 case Instruction::AGET:
1765 case Instruction::AGET_OBJECT:
1766 case Instruction::AGET_BOOLEAN:
1767 case Instruction::AGET_BYTE:
1768 case Instruction::AGET_CHAR:
1769 case Instruction::AGET_SHORT:
1770 case Instruction::AGET_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1771 if (!(mir->optimization_flags & MIR_IGNORE_RANGE_CHECK)) {
1772 int arr_sreg = mir->ssa_rep->uses[0];
1773 int idx_sreg = mir->ssa_rep->uses[1];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1774 BasicBlock* tbb = bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1775 SquashDupRangeChecks(cu, &tbb, mir, arr_sreg, idx_sreg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1776 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1777 break;
1778 case Instruction::APUT:
1779 case Instruction::APUT_OBJECT:
1780 case Instruction::APUT_SHORT:
1781 case Instruction::APUT_CHAR:
1782 case Instruction::APUT_BYTE:
1783 case Instruction::APUT_BOOLEAN:
1784 case Instruction::APUT_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1785 if (!(mir->optimization_flags & MIR_IGNORE_RANGE_CHECK)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1786 int start = (opcode == Instruction::APUT_WIDE) ? 2 : 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1787 int arr_sreg = mir->ssa_rep->uses[start];
1788 int idx_sreg = mir->ssa_rep->uses[start + 1];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1789 BasicBlock* tbb = bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1790 SquashDupRangeChecks(cu, &tbb, mir, arr_sreg, idx_sreg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1791 }
1792 break;
1793 case Instruction::CMPL_FLOAT:
1794 case Instruction::CMPL_DOUBLE:
1795 case Instruction::CMPG_FLOAT:
1796 case Instruction::CMPG_DOUBLE:
1797 case Instruction::CMP_LONG:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1798 if (cu->gen_bitcode) {
buzbeeca7a5e42012-08-20 11:12:18 -0700[diff] [blame]1799 // Bitcode doesn't allow this optimization.
1800 break;
1801 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1802 if (mir->next != NULL) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1803 MIR* mir_next = mir->next;
1804 Instruction::Code br_opcode = mir_next->dalvikInsn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1805 ConditionCode ccode = kCondNv;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1806 switch(br_opcode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1807 case Instruction::IF_EQZ:
1808 ccode = kCondEq;
1809 break;
1810 case Instruction::IF_NEZ:
1811 ccode = kCondNe;
1812 break;
1813 case Instruction::IF_LTZ:
1814 ccode = kCondLt;
1815 break;
1816 case Instruction::IF_GEZ:
1817 ccode = kCondGe;
1818 break;
1819 case Instruction::IF_GTZ:
1820 ccode = kCondGt;
1821 break;
1822 case Instruction::IF_LEZ:
1823 ccode = kCondLe;
1824 break;
1825 default:
1826 break;
1827 }
1828 // Make sure result of cmp is used by next insn and nowhere else
1829 if ((ccode != kCondNv) &&
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1830 (mir->ssa_rep->defs[0] == mir_next->ssa_rep->uses[0]) &&
1831 (GetSSAUseCount(cu, mir->ssa_rep->defs[0]) == 1)) {
1832 mir_next->dalvikInsn.arg[0] = ccode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1833 switch(opcode) {
1834 case Instruction::CMPL_FLOAT:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1835 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1836 static_cast<Instruction::Code>(kMirOpFusedCmplFloat);
1837 break;
1838 case Instruction::CMPL_DOUBLE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1839 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1840 static_cast<Instruction::Code>(kMirOpFusedCmplDouble);
1841 break;
1842 case Instruction::CMPG_FLOAT:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1843 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1844 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat);
1845 break;
1846 case Instruction::CMPG_DOUBLE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1847 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1848 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble);
1849 break;
1850 case Instruction::CMP_LONG:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1851 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1852 static_cast<Instruction::Code>(kMirOpFusedCmpLong);
1853 break;
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1854 default: LOG(ERROR) << "Unexpected opcode: " << opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1855 }
1856 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1857 mir_next->ssa_rep->num_uses = mir->ssa_rep->num_uses;
1858 mir_next->ssa_rep->uses = mir->ssa_rep->uses;
1859 mir_next->ssa_rep->fp_use = mir->ssa_rep->fp_use;
1860 mir_next->ssa_rep->num_defs = 0;
1861 mir->ssa_rep->num_uses = 0;
1862 mir->ssa_rep->num_defs = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1863 }
1864 }
1865 break;
1866 default:
1867 break;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1868 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1869 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1870
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1871 if (num_temps > cu->num_compiler_temps) {
1872 cu->num_compiler_temps = num_temps;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1873 }
1874 return true;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1875}
1876
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1877static bool NullCheckEliminationInit(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1878{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1879 if (bb->data_flow_info == NULL) return false;
1880 bb->data_flow_info->ending_null_check_v =
1881 AllocBitVector(cu, cu->num_ssa_regs, false, kBitMapNullCheck);
1882 ClearAllBits(bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1883 return true;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1884}
1885
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1886/* Collect stats on number of checks removed */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1887static bool CountChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1888{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1889 if (bb->data_flow_info == NULL) return false;
1890 for (MIR* mir = bb->first_mir_insn; mir; mir = mir->next) {
1891 if (mir->ssa_rep == NULL) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1892 continue;
1893 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1894 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1895 if (df_attributes & DF_HAS_NULL_CHKS) {
1896 cu->checkstats->null_checks++;
1897 if (mir->optimization_flags & MIR_IGNORE_NULL_CHECK) {
1898 cu->checkstats->null_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1899 }
1900 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1901 if (df_attributes & DF_HAS_RANGE_CHKS) {
1902 cu->checkstats->range_checks++;
1903 if (mir->optimization_flags & MIR_IGNORE_RANGE_CHECK) {
1904 cu->checkstats->range_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1905 }
1906 }
1907 }
1908 return false;
1909}
1910
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1911/* Try to make common case the fallthrough path */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1912static bool LayoutBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1913{
1914 // TODO: For now, just looking for direct throws. Consider generalizing for profile feedback
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1915 if (!bb->explicit_throw) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1916 return false;
1917 }
1918 BasicBlock* walker = bb;
1919 while (true) {
1920 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1921 if ((walker->block_type == kEntryBlock) || (walker->predecessors->num_used != 1)) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1922 break;
1923 }
1924 BasicBlock* prev = GET_ELEM_N(walker->predecessors, BasicBlock*, 0);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1925 if (prev->conditional_branch) {
1926 if (prev->fall_through == walker) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1927 // Already done - return
1928 break;
1929 }
1930 DCHECK_EQ(walker, prev->taken);
1931 // Got one. Flip it and exit
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1932 Instruction::Code opcode = prev->last_mir_insn->dalvikInsn.opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1933 switch (opcode) {
1934 case Instruction::IF_EQ: opcode = Instruction::IF_NE; break;
1935 case Instruction::IF_NE: opcode = Instruction::IF_EQ; break;
1936 case Instruction::IF_LT: opcode = Instruction::IF_GE; break;
1937 case Instruction::IF_GE: opcode = Instruction::IF_LT; break;
1938 case Instruction::IF_GT: opcode = Instruction::IF_LE; break;
1939 case Instruction::IF_LE: opcode = Instruction::IF_GT; break;
1940 case Instruction::IF_EQZ: opcode = Instruction::IF_NEZ; break;
1941 case Instruction::IF_NEZ: opcode = Instruction::IF_EQZ; break;
1942 case Instruction::IF_LTZ: opcode = Instruction::IF_GEZ; break;
1943 case Instruction::IF_GEZ: opcode = Instruction::IF_LTZ; break;
1944 case Instruction::IF_GTZ: opcode = Instruction::IF_LEZ; break;
1945 case Instruction::IF_LEZ: opcode = Instruction::IF_GTZ; break;
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1946 default: LOG(FATAL) << "Unexpected opcode " << opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1947 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1948 prev->last_mir_insn->dalvikInsn.opcode = opcode;
1949 BasicBlock* t_bb = prev->taken;
1950 prev->taken = prev->fall_through;
1951 prev->fall_through = t_bb;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1952 break;
1953 }
1954 walker = prev;
1955 }
1956 return false;
1957}
1958
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1959/* Combine any basic blocks terminated by instructions that we now know can't throw */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1960static bool CombineBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1961{
1962 // Loop here to allow combining a sequence of blocks
1963 while (true) {
1964 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1965 if ((bb->first_mir_insn == NULL)
1966 || (bb->data_flow_info == NULL)
1967 || (bb->block_type == kExceptionHandling)
1968 || (bb->block_type == kExitBlock)
1969 || (bb->block_type == kDead)
1970 || ((bb->taken == NULL) || (bb->taken->block_type != kExceptionHandling))
1971 || (bb->successor_block_list.block_list_type != kNotUsed)
1972 || (static_cast<int>(bb->last_mir_insn->dalvikInsn.opcode) != kMirOpCheck)) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1973 break;
1974 }
1975
1976 // Test the kMirOpCheck instruction
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1977 MIR* mir = bb->last_mir_insn;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1978 // Grab the attributes from the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1979 MIR* throw_insn = mir->meta.throw_insn;
1980 int df_attributes = oat_data_flow_attributes[throw_insn->dalvikInsn.opcode];
1981 bool can_combine = true;
1982 if (df_attributes & DF_HAS_NULL_CHKS) {
1983 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_NULL_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1984 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1985 if (df_attributes & DF_HAS_RANGE_CHKS) {
1986 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_RANGE_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1987 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1988 if (!can_combine) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1989 break;
1990 }
1991 // OK - got one. Combine
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1992 BasicBlock* bb_next = bb->fall_through;
1993 DCHECK(!bb_next->catch_entry);
1994 DCHECK_EQ(bb_next->predecessors->num_used, 1U);
1995 MIR* t_mir = bb->last_mir_insn->prev;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1996 // Overwrite the kOpCheck insn with the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]1997 DCHECK_EQ(bb_next->first_mir_insn, throw_insn);
1998 *bb->last_mir_insn = *throw_insn;
1999 bb->last_mir_insn->prev = t_mir;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2000 // Use the successor info from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2001 bb->successor_block_list = bb_next->successor_block_list;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2002 // Use the ending block linkage from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2003 bb->fall_through = bb_next->fall_through;
2004 bb->taken->block_type = kDead; // Kill the unused exception block
2005 bb->taken = bb_next->taken;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2006 // Include the rest of the instructions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2007 bb->last_mir_insn = bb_next->last_mir_insn;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2008
2009 /*
2010 * NOTE: we aren't updating all dataflow info here. Should either make sure this pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2011 * happens after uses of i_dominated, dom_frontier or update the dataflow info here.
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2012 */
2013
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2014 // Kill bb_next and remap now-dead id to parent
2015 bb_next->block_type = kDead;
2016 cu->block_id_map.Overwrite(bb_next->id, bb->id);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2017
2018 // Now, loop back and see if we can keep going
2019 }
2020 return false;
2021}
2022
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2023/* Eliminate unnecessary null checks for a basic block. */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2024static bool EliminateNullChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2025{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2026 if (bb->data_flow_info == NULL) return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2027
2028 /*
2029 * Set initial state. Be conservative with catch
2030 * blocks and start with no assumptions about null check
2031 * status (except for "this").
2032 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2033 if ((bb->block_type == kEntryBlock) | bb->catch_entry) {
2034 ClearAllBits(cu->temp_ssa_register_v);
2035 if ((cu->access_flags & kAccStatic) == 0) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2036 // If non-static method, mark "this" as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2037 int this_reg = cu->num_dalvik_registers - cu->num_ins;
2038 SetBit(cu, cu->temp_ssa_register_v, this_reg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2039 }
2040 } else {
2041 // Starting state is intesection of all incoming arcs
2042 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2043 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2044 BasicBlock* pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
2045 DCHECK(pred_bb != NULL);
2046 CopyBitVector(cu->temp_ssa_register_v,
2047 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2048 while (true) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2049 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
2050 if (!pred_bb) break;
2051 if ((pred_bb->data_flow_info == NULL) ||
2052 (pred_bb->data_flow_info->ending_null_check_v == NULL)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2053 continue;
2054 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2055 IntersectBitVectors(cu->temp_ssa_register_v,
2056 cu->temp_ssa_register_v,
2057 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2058 }
2059 }
2060
2061 // Walk through the instruction in the block, updating as necessary
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2062 for (MIR* mir = bb->first_mir_insn; mir; mir = mir->next) {
2063 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2064 continue;
2065 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2066 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2067
2068 // Mark target of NEW* as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2069 if (df_attributes & DF_NON_NULL_DST) {
2070 SetBit(cu, cu->temp_ssa_register_v, mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2071 }
2072
2073 // Mark non-null returns from invoke-style NEW*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2074 if (df_attributes & DF_NON_NULL_RET) {
2075 MIR* next_mir = mir->next;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2076 // Next should be an MOVE_RESULT_OBJECT
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2077 if (next_mir &&
2078 next_mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2079 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2080 SetBit(cu, cu->temp_ssa_register_v, next_mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2081 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2082 if (next_mir) {
2083 LOG(WARNING) << "Unexpected opcode following new: " << next_mir->dalvikInsn.opcode;
2084 } else if (bb->fall_through) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2085 // Look in next basic block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2086 struct BasicBlock* next_bb = bb->fall_through;
2087 for (MIR* tmir = next_bb->first_mir_insn; tmir;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2088 tmir =tmir->next) {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2089 if (static_cast<int>(tmir->dalvikInsn.opcode) >= static_cast<int>(kMirOpFirst)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2090 continue;
2091 }
2092 // First non-pseudo should be MOVE_RESULT_OBJECT
2093 if (tmir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
2094 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2095 SetBit(cu, cu->temp_ssa_register_v, tmir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2096 } else {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2097 LOG(WARNING) << "Unexpected op after new: " << tmir->dalvikInsn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2098 }
2099 break;
2100 }
2101 }
2102 }
2103 }
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]2104
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2105 /*
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2106 * Propagate nullcheck state on register copies (including
2107 * Phi pseudo copies. For the latter, nullcheck state is
2108 * the "and" of all the Phi's operands.
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2109 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2110 if (df_attributes & (DF_NULL_TRANSFER_0 | DF_NULL_TRANSFER_N)) {
2111 int tgt_sreg = mir->ssa_rep->defs[0];
2112 int operands = (df_attributes & DF_NULL_TRANSFER_0) ? 1 :
2113 mir->ssa_rep->num_uses;
2114 bool null_checked = true;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2115 for (int i = 0; i < operands; i++) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2116 null_checked &= IsBitSet(cu->temp_ssa_register_v,
2117 mir->ssa_rep->uses[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2118 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2119 if (null_checked) {
2120 SetBit(cu, cu->temp_ssa_register_v, tgt_sreg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2121 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2122 }
2123
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2124 // Already nullchecked?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2125 if ((df_attributes & DF_HAS_NULL_CHKS) && !(mir->optimization_flags & MIR_IGNORE_NULL_CHECK)) {
2126 int src_idx;
2127 if (df_attributes & DF_NULL_CHK_1) {
2128 src_idx = 1;
2129 } else if (df_attributes & DF_NULL_CHK_2) {
2130 src_idx = 2;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2131 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2132 src_idx = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2133 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2134 int src_sreg = mir->ssa_rep->uses[src_idx];
2135 if (IsBitSet(cu->temp_ssa_register_v, src_sreg)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2136 // Eliminate the null check
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2137 mir->optimization_flags |= MIR_IGNORE_NULL_CHECK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2138 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2139 // Mark s_reg as null-checked
2140 SetBit(cu, cu->temp_ssa_register_v, src_sreg);
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2141 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2142 }
2143 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2144
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2145 // Did anything change?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2146 bool res = CompareBitVectors(bb->data_flow_info->ending_null_check_v,
2147 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2148 if (res) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2149 CopyBitVector(bb->data_flow_info->ending_null_check_v,
2150 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2151 }
2152 return res;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2153}
2154
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2155void NullCheckElimination(CompilationUnit *cu)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2156{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2157 if (!(cu->disable_opt & (1 << kNullCheckElimination))) {
2158 DCHECK(cu->temp_ssa_register_v != NULL);
2159 DataFlowAnalysisDispatcher(cu, NullCheckEliminationInit, kAllNodes,
2160 false /* is_iterative */);
2161 DataFlowAnalysisDispatcher(cu, EliminateNullChecks,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2162 kPreOrderDFSTraversal,
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2163 true /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2164 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2165}
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2166
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2167void BasicBlockCombine(CompilationUnit* cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2168{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2169 DataFlowAnalysisDispatcher(cu, CombineBlocks, kPreOrderDFSTraversal, false);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2170}
2171
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2172void CodeLayout(CompilationUnit* cu)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2173{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2174 DataFlowAnalysisDispatcher(cu, LayoutBlocks, kAllNodes, false);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2175}
2176
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2177void DumpCheckStats(CompilationUnit *cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2178{
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2179 Checkstats* stats =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2180 static_cast<Checkstats*>(NewMem(cu, sizeof(Checkstats), true, kAllocDFInfo));
2181 cu->checkstats = stats;
2182 DataFlowAnalysisDispatcher(cu, CountChecks, kAllNodes, false /* is_iterative */);
2183 if (stats->null_checks > 0) {
2184 float eliminated = static_cast<float>(stats->null_checks_eliminated);
2185 float checks = static_cast<float>(stats->null_checks);
2186 LOG(INFO) << "Null Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2187 << stats->null_checks_eliminated << " of " << stats->null_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2188 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2189 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2190 if (stats->range_checks > 0) {
2191 float eliminated = static_cast<float>(stats->range_checks_eliminated);
2192 float checks = static_cast<float>(stats->range_checks);
2193 LOG(INFO) << "Range Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2194 << stats->range_checks_eliminated << " of " << stats->range_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2195 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2196 }
2197}
2198
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2199void BasicBlockOptimization(CompilationUnit *cu)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2200{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2201 if (!(cu->disable_opt & (1 << kBBOpt))) {
2202 CompilerInitGrowableList(cu, &cu->compiler_temps, 6, kListMisc);
2203 DCHECK_EQ(cu->num_compiler_temps, 0);
2204 DataFlowAnalysisDispatcher(cu, BasicBlockOpt,
2205 kAllNodes, false /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2206 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2207}
2208
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2209static void AddLoopHeader(CompilationUnit* cu, BasicBlock* header,
2210 BasicBlock* back_edge)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2211{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2212 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2213 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2214 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2215 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2216 if (loop->header == header) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2217 InsertGrowableList(cu, &loop->incoming_back_edges,
2218 reinterpret_cast<uintptr_t>(back_edge));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2219 return;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2220 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2221 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2222 LoopInfo* info = static_cast<LoopInfo*>(NewMem(cu, sizeof(LoopInfo), true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2223 info->header = header;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2224 CompilerInitGrowableList(cu, &info->incoming_back_edges, 2, kListMisc);
2225 InsertGrowableList(cu, &info->incoming_back_edges, reinterpret_cast<uintptr_t>(back_edge));
2226 InsertGrowableList(cu, &cu->loop_headers, reinterpret_cast<uintptr_t>(info));
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2227}
2228
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2229static bool FindBackEdges(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2230{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2231 if ((bb->data_flow_info == NULL) || (bb->last_mir_insn == NULL)) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2232 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2233 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2234 Instruction::Code opcode = bb->last_mir_insn->dalvikInsn.opcode;
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]2235 if (Instruction::FlagsOf(opcode) & Instruction::kBranch) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2236 if (bb->taken && (bb->taken->start_offset <= bb->start_offset)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2237 DCHECK(bb->dominators != NULL);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2238 if (IsBitSet(bb->dominators, bb->taken->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2239 if (cu->verbose) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2240 LOG(INFO) << "Loop backedge from 0x"
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2241 << std::hex << bb->last_mir_insn->offset
2242 << " to 0x" << std::hex << bb->taken->start_offset;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2243 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2244 AddLoopHeader(cu, bb->taken, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2245 }
2246 }
2247 }
2248 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2249}
2250
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2251static void AddBlocksToLoop(CompilationUnit* cu, ArenaBitVector* blocks,
2252 BasicBlock* bb, int head_id)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2253{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2254 if (!IsBitSet(bb->dominators, head_id) ||
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2255 IsBitSet(blocks, bb->id)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2256 return;
2257 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2258 SetBit(cu, blocks, bb->id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2259 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2260 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2261 BasicBlock* pred_bb;
2262 for (pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); pred_bb;
2263 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2264 AddBlocksToLoop(cu, blocks, pred_bb, head_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2265 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2266}
2267
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2268static void DumpLoops(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2269{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2270 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2271 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2272 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2273 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2274 LOG(INFO) << "Loop head block id " << loop->header->id
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2275 << ", offset 0x" << std::hex << loop->header->start_offset
2276 << ", Depth: " << loop->header->nesting_depth;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2277 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2278 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2279 BasicBlock* edge_bb;
2280 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb;
2281 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2282 LOG(INFO) << " Backedge block id " << edge_bb->id
2283 << ", offset 0x" << std::hex << edge_bb->start_offset;
2284 ArenaBitVectorIterator b_iter;
2285 BitVectorIteratorInit(loop->blocks, &b_iter);
2286 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2287 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2288 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2289 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2290 LOG(INFO) << " (" << bb->id << ", 0x" << std::hex
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2291 << bb->start_offset << ")";
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2292 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2293 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2294 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2295}
2296
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2297void LoopDetection(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2298{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2299 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2300 return;
2301 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2302 CompilerInitGrowableList(cu, &cu->loop_headers, 6, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2303 // Find the loop headers
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2304 DataFlowAnalysisDispatcher(cu, FindBackEdges, kAllNodes, false /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2305 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2306 GrowableListIteratorInit(&cu->loop_headers, &iter);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2307 // Add blocks to each header
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2308 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2309 loop; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2310 loop->blocks = AllocBitVector(cu, cu->num_blocks, true,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2311 kBitMapMisc);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2312 SetBit(cu, loop->blocks, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2313 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2314 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2315 BasicBlock* edge_bb;
2316 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb;
2317 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2318 AddBlocksToLoop(cu, loop->blocks, edge_bb, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2319 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2320 }
2321 // Compute the nesting depth of each header
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2322 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2323 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2324 loop; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2325 GrowableListIterator iter2;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2326 GrowableListIteratorInit(&cu->loop_headers, &iter2);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2327 LoopInfo* loop2;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2328 for (loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2));
2329 loop2; loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2))) {
2330 if (IsBitSet(loop2->blocks, loop->header->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2331 loop->header->nesting_depth++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2332 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2333 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2334 }
2335 // Assign nesting depth to each block in all loops
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2336 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2337 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2338 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2339 ArenaBitVectorIterator b_iter;
2340 BitVectorIteratorInit(loop->blocks, &b_iter);
2341 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2342 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2343 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2344 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
2345 bb->nesting_depth = std::max(bb->nesting_depth,
2346 loop->header->nesting_depth);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2347 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2348 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2349 if (cu->verbose) {
2350 DumpLoops(cu);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2351 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2352}
2353
2354/*
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2355 * This function will make a best guess at whether the invoke will
2356 * end up using Method*. It isn't critical to get it exactly right,
2357 * and attempting to do would involve more complexity than it's
2358 * worth.
2359 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2360static bool InvokeUsesMethodStar(CompilationUnit* cu, MIR* mir)
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2361{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2362 InvokeType type;
2363 Instruction::Code opcode = mir->dalvikInsn.opcode;
2364 switch (opcode) {
2365 case Instruction::INVOKE_STATIC:
2366 case Instruction::INVOKE_STATIC_RANGE:
2367 type = kStatic;
2368 break;
2369 case Instruction::INVOKE_DIRECT:
2370 case Instruction::INVOKE_DIRECT_RANGE:
2371 type = kDirect;
2372 break;
2373 case Instruction::INVOKE_VIRTUAL:
2374 case Instruction::INVOKE_VIRTUAL_RANGE:
2375 type = kVirtual;
2376 break;
2377 case Instruction::INVOKE_INTERFACE:
2378 case Instruction::INVOKE_INTERFACE_RANGE:
2379 return false;
2380 case Instruction::INVOKE_SUPER_RANGE:
2381 case Instruction::INVOKE_SUPER:
2382 type = kSuper;
2383 break;
2384 default:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2385 LOG(WARNING) << "Unexpected invoke op: " << opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2386 return false;
2387 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2388 OatCompilationUnit m_unit(cu->class_loader, cu->class_linker,
2389 *cu->dex_file,
2390 cu->code_item, cu->method_idx,
2391 cu->access_flags);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2392 // TODO: add a flag so we don't counts the stats for this twice
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2393 uint32_t dex_method_idx = mir->dalvikInsn.vB;
2394 int vtable_idx;
2395 uintptr_t direct_code;
2396 uintptr_t direct_method;
2397 bool fast_path =
2398 cu->compiler->ComputeInvokeInfo(dex_method_idx, &m_unit, type,
2399 vtable_idx, direct_code,
2400 direct_method) &&
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2401 !SLOW_INVOKE_PATH;
2402 return (((type == kDirect) || (type == kStatic)) &&
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2403 fast_path && ((direct_code == 0) || (direct_method == 0)));
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2404}
2405
2406/*
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2407 * Count uses, weighting by loop nesting depth. This code only
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2408 * counts explicitly used s_regs. A later phase will add implicit
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2409 * counts for things such as Method*, null-checked references, etc.
2410 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2411static bool CountUses(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2412{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2413 if (bb->block_type != kDalvikByteCode) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2414 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2415 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2416 for (MIR* mir = bb->first_mir_insn; (mir != NULL); mir = mir->next) {
2417 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2418 continue;
2419 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2420 uint32_t weight = std::min(16U, static_cast<uint32_t>(bb->nesting_depth));
2421 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
2422 int s_reg = mir->ssa_rep->uses[i];
2423 DCHECK_LT(s_reg, static_cast<int>(cu->use_counts.num_used));
2424 cu->raw_use_counts.elem_list[s_reg]++;
2425 cu->use_counts.elem_list[s_reg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2426 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2427 if (!(cu->disable_opt & (1 << kPromoteCompilerTemps))) {
2428 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2429 // Implicit use of Method* ? */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2430 if (df_attributes & DF_UMS) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2431 /*
2432 * Some invokes will not use Method* - need to perform test similar
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2433 * to that found in GenInvoke() to decide whether to count refs
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2434 * for Method* on invoke-class opcodes.
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2435 * TODO: refactor for common test here, save results for GenInvoke
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2436 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2437 int uses_method_star = true;
2438 if ((df_attributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) &&
2439 !(df_attributes & DF_NON_NULL_RET)) {
2440 uses_method_star &= InvokeUsesMethodStar(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2441 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2442 if (uses_method_star) {
2443 cu->raw_use_counts.elem_list[cu->method_sreg]++;
2444 cu->use_counts.elem_list[cu->method_sreg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2445 }
2446 }
2447 }
2448 }
2449 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2450}
2451
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2452void MethodUseCount(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2453{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2454 CompilerInitGrowableList(cu, &cu->use_counts, cu->num_ssa_regs + 32, kListMisc);
2455 CompilerInitGrowableList(cu, &cu->raw_use_counts, cu->num_ssa_regs + 32, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2456 // Initialize list
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2457 for (int i = 0; i < cu->num_ssa_regs; i++) {
2458 InsertGrowableList(cu, &cu->use_counts, 0);
2459 InsertGrowableList(cu, &cu->raw_use_counts, 0);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2460 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2461 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2462 return;
2463 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame^]2464 DataFlowAnalysisDispatcher(cu, CountUses,
2465 kAllNodes, false /* is_iterative */);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2466}
2467
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2468} // namespace art