- 91460a5 Disassemble saturation arithmetic x86/x86_64. by Aart Bik · 7 years ago
- 0d2cab5 MIPS: Use PCNT to implement VisitIntegerBitCount() and VisitLongBitCount() by Lena Djokic · 7 years ago
- 67bf42e Header library to remove dependence on runtime/ by David Sehr · 7 years ago
- 30f54cc Merge "ARM: Fix breaking changes from recent VIXL update." by Roland Levillain · 7 years ago
- a556e6b MIPS: InstructionCodeGeneratorMIPS*::DivRemByPowerOfTwo() by Lena Djokic · 7 years ago
- 672b9c1 ARM: Fix breaking changes from recent VIXL update. by Artem Serov · 7 years ago
- 72aba71 MIPS: Add asub_s/u.df by Lena Djokic · 7 years ago
- 33bff25 ART: Make InstructionSet an enum class and add kLast. by Vladimir Marko · 7 years ago
- 3309c01 MIPS: Introduce a few MSA instructions by Lena Djokic · 7 years ago
- 9389ae7 Simplify Android.bp files by Dan Willemsen · 7 years ago
- f708c9a Merge "MIPS: Eliminate hard-coded offsets in branches" by Treehugger Robot · 7 years ago
- 3332db8 Bunch of SIMD for x86 and x86_64 by Aart Bik · 7 years ago
- 0cab656 MIPS: Eliminate hard-coded offsets in branches by Alexey Frunze · 7 years ago
- b3d79e4 MIPS: Add maddv/msubv MSA instructions by Lena Djokic · 7 years ago
- 8cf9cb3 ART: Include cleanup by Andreas Gampe · 7 years ago
- 43e99b0 MIPS: Print register names instead of register numbers in disassembler by Goran Jakovljevic · 7 years ago
- 658263e MIPS64: Add min/max MSA instructions by Goran Jakovljevic · 7 years ago
- 5115efb ART: Fix soong defaults order by Andreas Gampe · 7 years ago
- a1633a7 Merge "Min/max SIMDization support." by Aart Bik · 7 years ago
- c8e93c7 Min/max SIMDization support. by Aart Bik · 7 years ago
- 3837011 MIPS64: Add ilvr.df MSA instructions by Goran Jakovljevic · 7 years ago
- 80248d7 MIPS64: Add add_a.df, ave_s/u.df and aver_s/u.df MSA instructions by Goran Jakovljevic · 8 years ago
- 7cd18fb Merge "SIMD pcmpgtb,w,d,q for x86/x86_64" by Treehugger Robot · 8 years ago
- 8939c64 SIMD pcmpgtb,w,d,q for x86/x86_64 by Aart Bik · 8 years ago
- e2a2395 Merge "MIPS64: Add ldi.df MSA instruction" by Aart Bik · 8 years ago
- 67d3fd7 SIMD pavgb,w for x86/x86_64 by Aart Bik · 8 years ago
- 3f44403 MIPS64: Add ldi.df MSA instruction by Goran Jakovljevic · 8 years ago
- 149fb78 Properly disassemble cmpeq for x86/x86_64 by Aart Bik · 8 years ago
- 5a9e51d Revert "Revert "Introduce a number of MSA instructions for MIPS64"" by Goran Jakovljevic · 8 years ago
- 219bf25 Revert "Introduce a number of MSA instructions for MIPS64" by Aart Bik · 8 years ago
- dcabc8b Introduce a number of MSA instructions for MIPS64 by Goran Jakovljevic · 8 years ago
- 3c89d42 x86/string compression: Use TESTB instead of TESTL in String.charAt(). by Vladimir Marko · 8 years ago
- 68555e9 Added a few integral SIMD extensions for x86/x86_64 (SSE). by Aart Bik · 8 years ago
- 66e3919 Merge "MIPS64: java.lang.String.getChars" by Treehugger Robot · 8 years ago
- 19f6c69 MIPS64: Improve method invocation. by Alexey Frunze · 8 years ago
- e366059 MIPS64: java.lang.String.getChars by Chris Larsen · 8 years ago
- b77051e ARM: VIXL32: Fix breaking changes from recent VIXL update. by Scott Wakeling · 8 years ago
- 674b9ee MIPS32: Implement HSelect by Alexey Frunze · 8 years ago
- 8872cad ARM64: Update the disassembler after the VIXL update. by Alexandre Rames · 8 years ago
- 29b0cde ARM: VIXL32: Implement a disassembler. by Anton Kirilov · 8 years ago
- 31fcbf8 ART: Remove libart from disassembler by Andreas Gampe · 8 years ago
- fe6064a Convert more of art to Android.bp by Colin Cross · 8 years ago
- bda1d60 ART: Detach libart-disassembler from libart by Andreas Gampe · 8 years ago
- 04147ef Add build rules for statically linked oatdump on host. by Roland Levillain · 8 years ago
- 372f3a3 ART: Add thread offset printing hook to disassembler by Andreas Gampe · 8 years ago
- af4e42a ARM64: VIXL: Support a newer version of VIXL. by Artem Serov · 8 years ago
- 2ea9153 ARM64: Use libvixld when compiling for debug mode. by Alexandre Rames · 8 years ago
- 3719016 Merge "ARM: Embed 0.0 in VCMP." by Vladimir Marko · 8 years ago
- 37dd80d ARM: Embed 0.0 in VCMP. by Vladimir Marko · 8 years ago
- ba65cc4 Merge "ART: Convert pointer size to enum" by Treehugger Robot · 8 years ago
- 542451c ART: Convert pointer size to enum by Andreas Gampe · 8 years ago
- 33dd909 Fixed bug in disassembly of roundss/roundsd by Aart Bik · 8 years ago
- ecf75a6 ART: remove gcc cruft from the makefiles by Colin Cross · 8 years ago
- 5668e58 Merge "Fixes to build against new VIXL interface." by Roland Levillain · 8 years ago
- 161c866 Merge "ART: disassembler_x86 doesn't recognize NOPs" by Treehugger Robot · 8 years ago
- 97c72b7 Fixes to build against new VIXL interface. by Scott Wakeling · 8 years ago
- 194bcfe ARM: Shorter fast-path for read barrier field load. by Vladimir Marko · 8 years ago
- dedde3f Merge "Have LOCAL_ASFLAGS honor debug/non-debug configuration." by Roland Levillain · 8 years ago
- b5390f7 Have LOCAL_ASFLAGS honor debug/non-debug configuration. by Roland Levillain · 8 years ago
- e3fb245 MIPS32: Improve method invocation by Alexey Frunze · 8 years ago
- a77ceae Merge "MIPS32: Disassemble and test movf.fmt and movt.fmt (missed earlier)" by Treehugger Robot · 8 years ago
- a8aaf5a MIPS32: Disassemble and test movf.fmt and movt.fmt (missed earlier) by Alexey Frunze · 8 years ago
- e652c12 ARM assembler support for VCNT and VPADDL. by xueliang.zhong · 8 years ago
- d3059e7 Fix oatdump crash on arm64/arm code. Also adds 16 bit literal information. by Aart Bik · 8 years ago
- cb55b29 Thumb2: Fix disassembly of the b.w offset. by Vladimir Marko · 9 years ago
- adf1eaa Thumb2: Show the immediate in ROR (immediate) disassembly. by Vladimir Marko · 9 years ago
- 51aff3a MIPS32: Implement UnsafeCASInt and UnsafeCASObject intrinsics. by Alexey Frunze · 9 years ago
- 07f6818 ART: Do not use vixld - workaround to fix dex2oatds. by Vladimir Marko · 9 years ago
- 3acee73 MIPS32: peek*/poke*, and String.charAt intrinsics. by Chris Larsen · 9 years ago
- 8cdbc2a ART/Thumb2: Disassemble SBFX/UBFX. by Vladimir Marko · 9 years ago
- 3f67e69 Implemented BitCount as an intrinsic. With unit test. by Aart Bik · 9 years ago
- 4414822 ART: disassembler_x86 doesn't recognize NOPs by Serdjuk, Nikolay Y · 9 years ago
- 92d9060 MIPS: Implement HRor by Alexey Frunze · 9 years ago
- 5c7aed3 MIPS32: improvements in code generation (mostly 64-bit ALU ops) by Alexey Frunze · 9 years ago
- cd7b0ee MIPS32: Fuse long and FP compare & condition in Optimizing. by Alexey Frunze · 9 years ago
- e384547 MIPS32: int java.lang.*.numberOfLeadingZeros by Chris Larsen · 9 years ago
- 7d4152f MIPS64: Disassembler support for rotate instructions. by Chris Larsen · 9 years ago
- 8c434dc MIPS: Assemblers changes needed for optimizing compiler by Goran Jakovljevic · 9 years ago
- e295be4 Merge "Additional MIPS64 instructions needed by intrinsics code." by Andreas Gampe · 9 years ago
- bcee092 Add X86 bsf and rotate instructions by Mark Mendell · 9 years ago
- 2fadd7b Additional MIPS64 instructions needed by intrinsics code. by Chris Larsen · 9 years ago
- 2a5c468 ART: Some header cleaning around bit-utils by Andreas Gampe · 9 years ago
- 8ae3ffb Add 'bsr' instruction to x86 and x86_64 by Mark Mendell · 9 years ago
- b9c4bbe Add rep movsw to x86 and x86_64 instructions. by Mark Mendell · 9 years ago
- 3887c46 Remove unnecessary `explicit` qualifiers on constructors. by Roland Levillain · 9 years ago
- 5e2c8d3 Introduce arch-specific checker tests. by Alexandre Rames · 9 years ago
- 611d339 ARM/ARM64: Implement numberOfLeadingZeros intrinsic. by Scott Wakeling · 9 years ago
- 124b392 Added disassembler support for repe_cmpsw instruction in x86, x86_64 by agicsaki · 9 years ago
- eb7b739 Opt compiler: Add disassembly to the '.cfg' output. by Alexandre Rames · 9 years ago
- 4dda337 MIPS: Initial version of optimizing compiler for MIPS64R6. by Alexey Frunze · 9 years ago
- 12bd721 If heap poisoning is on, pass the relevant flag to LOCAL_ASFLAGS. by Roland Levillain · 9 years ago
- 9bd88b0 ARM64: Move xSELF from x18 to x19. by Serban Constantinescu · 10 years ago
- e0705f5 Fix for incorrect encode and parse of PEXTRW instruction by nikolay serdjuk · 10 years ago
- 2cebb24 Replace NULL with nullptr by Mathieu Chartier · 10 years ago
- 6daa9ef Merge "[MIPS] Refactoring code for disassembler" by Andreas Gampe · 10 years ago
- 03fe9c8 Merge "Fix for incorrect parse of PEXTRW instruction" by Andreas Gampe · 10 years ago
- 403e0d5 [MIPS] Refactoring code for disassembler by Goran Jakovljevic · 10 years ago
- caff302 Merge "Fix address formatting in Mips64 disassembler." by David Srbecky · 10 years ago
- 030d304 Merge "Build 32-bit version of the disassembler as well." by David Srbecky · 10 years ago
- bd4e6a8 Fix for incorrect parse of PEXTRW instruction by nikolay serdjuk · 10 years ago