1. 2477320 Step 1 of 2: conditional passes. by Aart Bik · 6 years ago
  2. 89ff8b2 ARM64: Workaround for the callee saved FP registers and SIMD. by Artem Serov · 7 years ago
  3. 2ca10eb Refactored optimization passes setup. by Aart Bik · 7 years ago
  4. 2ffb703 cpplint: Cleanup errors by Igor Murashkin · 7 years ago
  5. 69d310e Use ScopedArenaAllocator for building HGraph. by Vladimir Marko · 7 years ago
  6. e764d2e Use ScopedArenaAllocator for register allocation. by Vladimir Marko · 7 years ago
  7. ca6fff8 ART: Use ScopedArenaAllocator for pass-local data. by Vladimir Marko · 7 years ago
  8. 8cf9cb3 ART: Include cleanup by Andreas Gampe · 7 years ago
  9. 2a3471f Disambiguate memory accesses in instruction scheduling by xueliang.zhong · 7 years ago
  10. f7caf68 Instruction scheduling for ARM. by xueliang.zhong · 7 years ago
  11. d9911ee ART: Clean up field initialization by Andreas Gampe · 7 years ago
  12. 22aa54b AArch64: Add HInstruction scheduling support. by Alexandre Rames · 8 years ago