1. 47b31aa ART: Start implementation of OpRegRegRegExtend for ARM64 by Andreas Gampe · 10 years ago
  2. f987927 ART: Reserve 8B for float literals on ARM64 by Andreas Gampe · 10 years ago
  3. 9f975bf ART: Change rrr add and sub for ARM64 by Andreas Gampe · 10 years ago
  4. c41e6dc AArch64: improve 64-bit immediates loads. by Matteo Franchin · 10 years ago
  5. 33ae558 Arm64 hard-float by buzbee · 10 years ago
  6. 169489b AArch64: Add support for inlined methods by Serban Constantinescu · 10 years ago
  7. e2eb29e AArch64: Enable MOVE_*, some CONST_*, CMP_*. by Zheng Xu · 10 years ago
  8. c0090a4 Merge "Rewrite use/def masks to support 128 bits." by Vladimir Marko · 10 years ago
  9. 8dea81c Rewrite use/def masks to support 128 bits. by Vladimir Marko · 10 years ago
  10. adea0aa Merge "ART: arm64 explicit stack overflow checks" by Bill Buzbee · 10 years ago
  11. f8ec48e ART: arm64 explicit stack overflow checks by Stuart Monteith · 10 years ago
  12. fd2e291 AArch64: fix MarkGCCard, enabling more MIR opcodes. by Matteo Franchin · 10 years ago
  13. 2d41a65 AArch64: Fix kOpLsl, rem-float/double. by Zheng Xu · 10 years ago
  14. 0955f7e AArch64: fixing some assertions. by Matteo Franchin · 10 years ago
  15. ed65c5e AArch64: Enable LONG_* and INT_* opcodes. by Serban Constantinescu · 10 years ago
  16. bc6d197 AArch64: fixes in A64 code generation. by Matteo Franchin · 10 years ago
  17. 2f244e9 ART: Add more ThreadOffset in Mir2Lir and backends by Andreas Gampe · 10 years ago
  18. 674744e Use atomic load/store for volatile IGET/IPUT/SGET/SPUT. by Vladimir Marko · 10 years ago
  19. e45fb9e AArch64: Change arm64 backend to produce A64 code. by Matteo Franchin · 10 years ago
  20. 3bf7c60 Cleanup ARM load/store wide and remove unused param s_reg. by Vladimir Marko · 10 years ago
  21. 455759b Remove LoadBaseDispWide and StoreBaseDispWide. by Vladimir Marko · 10 years ago
  22. 43ec873 AArch64: Added arm64 quick backend as an arm clone. by Matteo Franchin · 10 years ago