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gerrit-public.fairphone.software / platform / art / ab52ce1480d9c4701bfe3ff3530596ec0c5760ee / compiler / optimizing
  1. 15bd228 Implement irreducible loop support in optimizing. by Nicolas Geoffray · 9 years ago
  2. 8422edd Merge "MIPS32: don't use R2+ instructions (mthc1, mfhc1) on MIPS32R1 or with 32-bit FPUs." by Roland Levillain · 9 years ago
  3. da88e57 Merge "Don't encode a DexRegisterMap if there is no live register." by Nicolas Geoffray · 9 years ago
  4. 8e6b237 Merge "MIPS: Improve conversion between ints and floats." by Roland Levillain · 9 years ago
  5. bb9863a MIPS32: don't use R2+ instructions (mthc1, mfhc1) on MIPS32R1 or by Alexey Frunze · 9 years ago
  6. baf60b7 MIPS: Improve conversion between ints and floats. by Alexey Frunze · 9 years ago
  7. 0d9150b MIPS: HRor clean-up by Alexey Frunze · 9 years ago
  8. 08d3ab5 Merge "Fixed bug with hoisting/deopting in taken-block instead of preheader. With a fail-before pass-after regression test." by Aart Bik · 9 years ago
  9. f96c43e Merge "Reduce code size by sharing slow paths." by Aart Bik · 9 years ago
  10. 55b14df Fixed bug with hoisting/deopting in taken-block instead of preheader. by Aart Bik · 9 years ago
  11. 86e4278 Add DWARF type information generation. by Tamas Berghammer · 9 years ago
  12. 5cc349f Report DWARF debug information for JITed code. by David Srbecky · 9 years ago
  13. 780aece Update `ValidateInvokeRuntime()` and HDivZeroCheck. by Alexandre Rames · 9 years ago
  14. 1cde058 HDeoptimize can also trigger GC. by Nicolas Geoffray · 9 years ago
  15. 185be57 Merge "Fix memory fences in the ARM64 UnsafeCas intrinsics." by Roland Levillain · 9 years ago
  16. bb3a8bd Merge "Set side effects to HNullCheck and HBoundsCheck." by Nicolas Geoffray · 9 years ago
  17. 1af564e Set side effects to HNullCheck and HBoundsCheck. by Nicolas Geoffray · 9 years ago
  18. 67fcbd4 Merge "MIPS: Implement HRor" by Vladimir Marko · 9 years ago
  19. 42249c3 Reduce code size by sharing slow paths. by Aart Bik · 9 years ago
  20. a3eca2d Do not leave intermediate addresses across Java calls. by Nicolas Geoffray · 9 years ago
  21. a05cacc Revert "Change condition to opposite if lhs is constant" by Nicolas Geoffray · 9 years ago
  22. f9f196c Change condition to opposite if lhs is constant by Anton Shamin · 9 years ago
  23. 3da15f8 Merge "Optimizing/ARM: Fix CmpConstant()." by Vladimir Marko · 9 years ago
  24. 4bedb38 Fix memory fences in the ARM64 UnsafeCas intrinsics. by Roland Levillain · 9 years ago
  25. 8566a91 Merge "Generate Nops to ensure that debug stack maps have distinct PC." by David Srbecky · 9 years ago
  26. f871d46 Merge "Don't use std::abs on INT_MIN/LONG_MIN, it's undefined." by Nicolas Geoffray · 9 years ago
  27. b7070a2 Generate Nops to ensure that debug stack maps have distinct PC. by David Srbecky · 9 years ago
  28. 68f6289 Don't use std::abs on INT_MIN/LONG_MIN, it's undefined. by Nicolas Geoffray · 9 years ago
  29. 012fc4e Don't encode a DexRegisterMap if there is no live register. by Nicolas Geoffray · 9 years ago
  30. 363910e Merge "Add a missing implicit null check in the ARM codegen." by Roland Levillain · 9 years ago
  31. 80e6709 Small implicit null checks refactoring in the ARM codegen. by Roland Levillain · 9 years ago
  32. 1407ee7 Add a missing implicit null check in the ARM codegen. by Roland Levillain · 9 years ago
  33. c928591 ARM Baker's read barrier fast path implementation. by Roland Levillain · 9 years ago
  34. 0580d96 Fix a crash with unresolved classes. by Nicolas Geoffray · 9 years ago
  35. 744a1c6 ART: Don't set initial RTI for BoundType if input untyped by David Brazdil · 9 years ago
  36. 15693bf ART: Resolve ambiguous ArraySets by David Brazdil · 9 years ago
  37. f555258 ART: Create BoundType for CheckCast early by David Brazdil · 9 years ago
  38. fd2140f ART: Make opt inliner a little bit cleaner/faster by Andreas Gampe · 9 years ago
  39. 92d9060 MIPS: Implement HRor by Alexey Frunze · 9 years ago
  40. d87f3ea ART: Use Primitive::Is64BitType in SsaBuilder::TypePhiFromInputs by David Brazdil · 9 years ago
  41. f196a43 Merge "X86: templatize GenerateTestAndBranch and friends" by David Brazdil · 9 years ago
  42. 06856d3 Merge "Detect phi cycles." by Nicolas Geoffray · 9 years ago
  43. a3f0bf3 Merge "Revert "Revert "Tweak inlining heuristics.""" by Nicolas Geoffray · 9 years ago
  44. 5949fa0 Revert "Revert "Tweak inlining heuristics."" by Nicolas Geoffray · 9 years ago
  45. 5f332cb Merge "MIPS32: improvements in code generation (mostly 64-bit ALU ops)" by Nicolas Geoffray · 9 years ago
  46. b7371a5 Merge "Remove bogus DCHECK in induction analysis." by Nicolas Geoffray · 9 years ago
  47. 8a1c728 X86_64: Replace x86_64 xchg instruction use by Mark Mendell · 9 years ago
  48. 152408f X86: templatize GenerateTestAndBranch and friends by Mark Mendell · 9 years ago
  49. b35302b Remove bogus DCHECK in induction analysis. by Nicolas Geoffray · 9 years ago
  50. 295abc1 ART: Set RTI of HArm64IntermediateAddress by David Brazdil · 9 years ago
  51. 4833f5a ART: Refactor SsaBuilder for more precise typing info by David Brazdil · 9 years ago
  52. 5d75afe Improved side-effects/can-throw information on intrinsics. by Aart Bik · 9 years ago
  53. fa0dc72 Merge "On x64, cmpl can never take a int64 immediate." by Nicolas Geoffray · 9 years ago
  54. 6ce0173 On x64, cmpl can never take a int64 immediate. by Nicolas Geoffray · 9 years ago
  55. 1c421aa Merge "Fix code generation for String.<init> on x64." by Nicolas Geoffray · 9 years ago
  56. 7f59d59 Fix code generation for String.<init> on x64. by Nicolas Geoffray · 9 years ago
  57. e6d0d8d ART: Disable Math.round intrinsics by Andreas Gampe · 9 years ago
  58. 095b1df Revert "Make Math.round consistent on arm64." by Andreas Gampe · 9 years ago
  59. 40041c9 Make Math.round consistent on arm64. by Nicolas Geoffray · 9 years ago
  60. dcdc85b Dex2oat support for multiple oat file and image file outputs. by Jeff Hao · 9 years ago
  61. 0cf4493 Generate more stack maps during native debugging. by David Srbecky · 9 years ago
  62. 5f7b58e Rewrite HInstruction::Is/As<type>(). by Vladimir Marko · 9 years ago
  63. ac6ac10 Optimizing/ARM: Fix CmpConstant(). by Vladimir Marko · 9 years ago
  64. 9865bde Rename NullHandle to ScopedNullHandle by Mathieu Chartier · 9 years ago
  65. 803cbb9 For LSE, further optimize stores for singleton references. by Mingyao Yang · 9 years ago
  66. 280a65b Merge "MIPS64: Fuse long and FP compare & condition in Optimizing." by Roland Levillain · 9 years ago
  67. ecf52df ART: Fix bug in LSE by David Brazdil · 9 years ago
  68. 2739411 Merge "Disable the UnsafeCASObject intrinsic with read barriers." by Roland Levillain · 9 years ago
  69. 391b866 Disable the UnsafeCASObject intrinsic with read barriers. by Roland Levillain · 9 years ago
  70. 570a920 Merge "Revert "Revert "X86: Use locked add rather than mfence""" by Aart Bik · 9 years ago
  71. 299a939 MIPS64: Fuse long and FP compare & condition in Optimizing. by Alexey Frunze · 9 years ago
  72. 14c4e90 Merge "Revert "Revert "ART: Reduce the instructions generated by packed switch.""" by Vladimir Marko · 9 years ago
  73. f3e0ee2 Revert "Revert "ART: Reduce the instructions generated by packed switch."" by Vladimir Marko · 9 years ago
  74. 3e3e4a7 Fix braino in parallel move resolver. by Nicolas Geoffray · 9 years ago
  75. 17077d8 Revert "Revert "X86: Use locked add rather than mfence"" by Mark P Mendell · 9 years ago
  76. 5c7aed3 MIPS32: improvements in code generation (mostly 64-bit ALU ops) by Alexey Frunze · 9 years ago
  77. 1c70f18 Merge "Revert "X86: Use locked add rather than mfence"" by Aart Bik · 9 years ago
  78. 0da3b91 Revert "X86: Use locked add rather than mfence" by Aart Bik · 9 years ago
  79. c3ca1e6 Merge "X86: Use locked add rather than mfence" by Aart Bik · 9 years ago
  80. 698fa97 Remove spurious references to kEmitCompilerReadBarrier in MIPS. by Roland Levillain · 9 years ago
  81. cbf8af8 Merge "MIPS32: Fuse long and FP compare & condition in Optimizing." by Roland Levillain · 9 years ago
  82. 4741516 Merge "Revert "Revert "Introduce support for hardware simulators, starting with ARM64""" by Roland Levillain · 9 years ago
  83. d7d3538 Merge "Revert "ART: Reduce the instructions generated by packed switch."" by Nicolas Geoffray · 9 years ago
  84. f5f64ef Detect phi cycles. by Nicolas Geoffray · 9 years ago
  85. b4c1376 Revert "ART: Reduce the instructions generated by packed switch." by Nicolas Geoffray · 9 years ago
  86. 96f721d Merge "Revert "ART: Set RTI of Arm64IntermediateAddress"" by Nicolas Geoffray · 9 years ago
  87. dce90b9 Revert "ART: Set RTI of Arm64IntermediateAddress" by Nicolas Geoffray · 9 years ago
  88. 68289a5 Revert "ART: Refactor SsaBuilder for more precise typing info" by Alex Light · 9 years ago
  89. cd7b0ee MIPS32: Fuse long and FP compare & condition in Optimizing. by Alexey Frunze · 9 years ago
  90. 7b3e4f9 X86: Use locked add rather than mfence by Mark Mendell · 9 years ago
  91. 7d57d7f Various induction/range analysis improvements. by Aart Bik · 9 years ago
  92. 1e7f8db x86-64 Baker's read barrier fast path implementation. by Roland Levillain · 9 years ago
  93. 7c1559a x86 Baker's read barrier fast path implementation. by Roland Levillain · 9 years ago
  94. e36ae94 ART: Set RTI of Arm64IntermediateAddress by David Brazdil · 9 years ago
  95. d9510df ART: Refactor SsaBuilder for more precise typing info by David Brazdil · 9 years ago
  96. 351dddf Optimizing: Clean up after HRor. by Vladimir Marko · 9 years ago
  97. 58dcb02 Merge "Replace rotate patterns and invokes with HRor IR." by Vladimir Marko · 9 years ago
  98. 40a04bf Replace rotate patterns and invokes with HRor IR. by Scott Wakeling · 9 years ago
  99. bf479be Merge "Don't generate a slow path for strings in the dex cache." by Nicolas Geoffray · 9 years ago
  100. 376cbcc Merge "Optimizing: Add direct calls to math intrinsics" by Nicolas Geoffray · 9 years ago