| commit | 02f285208ca817e3d405d4786d05e0d3127325fa | [log] [tgz] |
|---|---|---|
| author | Duane Sand <duane.sand@imgtec.com> | Wed Jul 09 13:30:52 2014 -0700 |
| committer | Ying Wang <wangying@google.com> | Tue Aug 05 12:39:28 2014 -0700 |
| tree | 7a59a2d5fc4f3fd4fc9f182e7eb16fbe8ed599b2 | |
| parent | 1d04a53ba31488f7e60f34620e569ce1716792e6 [diff] |
[MIPSR6] Add mips64r6 and mips32r6 targets Add mips64r6 target and corresponding mips32r6 target. Defaults remain as mips64r2 and mips32r2. Apply -FP64A codegen subsetting to mips32r6 only. Access FR=0 odd-numbered 32-bit float regs only via double-prec even-numbered regs, not by single-prec ops. (cherry picked from commit 6bab974cdc90cb3a7514c7255b6e6adfb9c98e2b) Change-Id: I447337ce56c15e86cec505d68a6b45294fc3ba77