blob: b2d894fe3ce13ef19d4c5d41e0827d74a5b85e3a [file] [log] [blame]
The Android Open Source Project89c1feb2008-12-17 18:03:55 -08001<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
2
3<html>
4
5<head>
6<title>const</title>
7<link rel=stylesheet href="opcode.css">
8</head>
9
10<body>
11
12<h1>const</h1>
13
14<h2>Purpose</h2>
15
16<p>
17Move the given literal value (sign-extended to 32 bits, if necessary) into the
18specified register.
19</p>
20
21<h2>Details</h2>
22
23<table class="instruc">
24<thead>
25<tr>
26 <th>Op &amp; Format</th>
27 <th>Mnemonic / Syntax</th>
28 <th>Arguments</th>
29</tr>
30</thead>
31<tbody>
32<tr>
33 <td>12 11n</td>
34 <td>const/4 vA, #+B</td>
35 <td><code>A:</code> destination register (4 bits)<br/>
36 <code>B:</code> signed int (4 bits)</td>
37</tr>
38<tr>
39 <td>13 21s</td>
40 <td>const/16 vAA, #+BBBB</td>
41 <td><code>A:</code> destination register (8 bits)<br/>
42 <code>B:</code> signed int (16 bits)</td>
43</tr>
44<tr>
45 <td>14 31i</td>
46 <td>const vAA, #+BBBBBBBB</td>
47 <td><code>A:</code> destination register (8 bits)<br/>
48 <code>B:</code> arbitrary 32-bit constant</td>
49</tr>
50<tr>
51 <td>15 21h</td>
52 <td>const/high16 vAA, #+BBBB0000</td>
53 <td><code>A:</code> destination register (8 bits)<br/>
54 <code>B:</code> signed int (16 bits)</td>
55</tr>
56</tbody>
57</table>
58
59<h2>Constraints</h2>
60
61<ul>
62 <li>
63 A must be a valid register index in the current stackframe.
64 </li>
65</ul>
66
67<h2>Behavior</h2>
68
69<ul>
70 <li>
71 First, an adjusted value B' is determined as follows:
72 <ul>
73 <li>
74 If we are executing the /high16 variant, then B is left-shifted by 16
75 bits, that is, B'=B << 0x10
76 <li>
77 Otherwise, if B is a 4 bit or 16 bit constant, it is sign-extended to 32
78 bits, that is, B'=sign-extended(B).
79 </li>
80 <li>
81 Otherwise, B'=B.
82 </li>
83 </ul>
84 <li>
85 Then, the adjusted value B' is moved into the register A, that is, vA'=B'
86 </li>
87 <li>
88 If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
89 </li>
90 <li>
91 If v(A+1) is the upper half of a register pair, v(A+1)' becomes undefined.
92 </li>
93</ul>
94
95<h2>Exceptions</h2>
96
97<p>
98None.
99</p>
100
101</body>
102</html>