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Anthony Barbier871448e2017-03-24 14:54:29 +00001/*
Anthony Barbierf45d5a92018-01-24 16:23:15 +00002 * Copyright (c) 2017-2018 ARM Limited.
Anthony Barbier871448e2017-03-24 14:54:29 +00003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "arm_compute/runtime/CL/functions/CLPoolingLayer.h"
25
Anthony Barbier8140e1e2017-12-14 23:48:46 +000026#include "arm_compute/core/CL/ICLTensor.h"
Anthony Barbier871448e2017-03-24 14:54:29 +000027#include "arm_compute/core/CL/kernels/CLPoolingLayerKernel.h"
Anthony Barbier8140e1e2017-12-14 23:48:46 +000028#include "arm_compute/runtime/CL/CLScheduler.h"
Kaizen8938bd32017-09-28 14:38:23 +010029#include "support/ToolchainSupport.h"
Anthony Barbier871448e2017-03-24 14:54:29 +000030
31using namespace arm_compute;
32
33void CLPoolingLayer::configure(ICLTensor *input, ICLTensor *output, const PoolingLayerInfo &pool_info)
34{
Anthony Barbier8140e1e2017-12-14 23:48:46 +000035 ARM_COMPUTE_ERROR_ON_NULLPTR(input);
36
Anthony Barbier871448e2017-03-24 14:54:29 +000037 // Configure pooling kernel
Kaizen8938bd32017-09-28 14:38:23 +010038 auto k = arm_compute::support::cpp14::make_unique<CLPoolingLayerKernel>();
Anthony Barbier8140e1e2017-12-14 23:48:46 +000039 k->set_target(CLScheduler::get().target());
Anthony Barbier871448e2017-03-24 14:54:29 +000040 k->configure(input, output, pool_info);
41 _kernel = std::move(k);
42
Anthony Barbierf45d5a92018-01-24 16:23:15 +000043 // Configure border depending on operation required (quantize border in case of asymmetric data_type)
Jenkinsb3a371b2018-05-23 11:36:53 +010044 BorderMode border_mode{};
45 PixelValue pixel_value(0.f);
Anthony Barbier8140e1e2017-12-14 23:48:46 +000046 if(is_data_type_quantized_asymmetric(input->info()->data_type()) && !pool_info.exclude_padding())
47 {
Jenkinsb3a371b2018-05-23 11:36:53 +010048 pixel_value = PixelValue(static_cast<uint32_t>(input->info()->quantization_info().offset));
Anthony Barbier8140e1e2017-12-14 23:48:46 +000049 }
Jenkinsb3a371b2018-05-23 11:36:53 +010050 switch(input->info()->data_layout())
51 {
52 case DataLayout::NCHW:
53 border_mode = (PoolingType::MAX == pool_info.pool_type()) ? BorderMode::REPLICATE : BorderMode::CONSTANT;
54 break;
55 case DataLayout::NHWC:
56 border_mode = BorderMode::CONSTANT;
57 if(PoolingType::MAX == pool_info.pool_type() && !is_data_type_quantized_asymmetric(input->info()->data_type()))
58 {
59 pixel_value = PixelValue(std::numeric_limits<float>::lowest());
60 }
61 break;
62 default:
63 ARM_COMPUTE_ERROR("Data layout not supported");
64 }
65 _border_handler.configure(input, _kernel->border_size(), border_mode, pixel_value);
Anthony Barbier871448e2017-03-24 14:54:29 +000066}
Anthony Barbier8140e1e2017-12-14 23:48:46 +000067
68Status CLPoolingLayer::validate(const ITensorInfo *input, const ITensorInfo *output, const PoolingLayerInfo &pool_info)
69{
70 return CLPoolingLayerKernel::validate(input, output, pool_info);
71}