commit 1227adb5881c06bb61526b56e89c706faa12ebe8
author Marat Dukhan <maratek@google.com> Sat Oct 16 17:33:51 2021 -0700
committer XNNPACK Team <xnnpack-github-robot@google.com> Sat Oct 16 17:34:40 2021 -0700
tree 883904603474313d62a63bf73878bcd3f880152e
parent 2dd18fd3ca1dc445cee96ad70955db1c9ffc6b32

SSE2/SSE4.1/AVX FP16->FP32 VCVT microkernels

PiperOrigin-RevId: 403670135

BUILD.bazel

diff --git a/BUILD.bazel b/BUILD.bazel
index ec8ae08..bac7213 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -3685,6 +3685,14 @@
 ]
 
 ALL_SSE2_MICROKERNEL_SRCS = [
+    "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x8.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x16.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x24.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x8.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x16.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x24.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x32.c",
     "src/f32-argmaxpool/4x-sse2-c4.c",
     "src/f32-argmaxpool/9p8x-sse2-c4.c",
     "src/f32-argmaxpool/9x-sse2-c4.c",
@@ -4050,6 +4058,14 @@
 ]
 
 ALL_SSE41_MICROKERNEL_SRCS = [
+    "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x8.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x24.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x32.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x8.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x16.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x24.c",
+    "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x32.c",
     "src/f32-prelu/gen/sse41-2x4.c",
     "src/f32-prelu/gen/sse41-2x8.c",
     "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
@@ -4360,6 +4376,14 @@
 ]
 
 ALL_AVX_MICROKERNEL_SRCS = [
+    "src/f16-f32-vcvt/gen/vcvt-avx-int16-x8.c",
+    "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c",
+    "src/f16-f32-vcvt/gen/vcvt-avx-int16-x24.c",
+    "src/f16-f32-vcvt/gen/vcvt-avx-int16-x32.c",
+    "src/f16-f32-vcvt/gen/vcvt-avx-int32-x8.c",
+    "src/f16-f32-vcvt/gen/vcvt-avx-int32-x16.c",
+    "src/f16-f32-vcvt/gen/vcvt-avx-int32-x24.c",
+    "src/f16-f32-vcvt/gen/vcvt-avx-int32-x32.c",
     "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
     "src/f32-dwconv/gen/up8x4-minmax-avx.c",
     "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",