commit 28480592d22e9f5883cb4382fab5cfcd926d5c1e
author Marat Dukhan <maratek@google.com> Tue Jul 27 23:52:27 2021 -0700
committer XNNPACK Team <xnnpack-github-robot@google.com> Tue Jul 27 23:53:36 2021 -0700
tree e7dd5ae17ae35b0b8a0449474f82bda9a940f9f9
parent cc96770b6442ee0ff5d2d999ab356094cc6dfde3

Optimize QC8 DWCONV microkernel selection on AVX and XOP

PiperOrigin-RevId: 387283184

BUILD.bazel

diff --git a/BUILD.bazel b/BUILD.bazel
index 0794374..006b297 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -4077,8 +4077,8 @@
     "src/f32-vunary/gen/vabs-avx-x16.c",
     "src/f32-vunary/gen/vneg-avx-x16.c",
     "src/f32-vunary/gen/vsqr-avx-x16.c",
-    "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
-    "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
+    "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c",
+    "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c",
     "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
     "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
     "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
@@ -4417,8 +4417,8 @@
 ]
 
 PROD_XOP_MICROKERNEL_SRCS = [
-    "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
-    "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
+    "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c",
+    "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c",
     "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
     "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
     "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",