Refactor F32 RADDSTOREEXPMINUSMAX microkernels
- Move mask_table into AVX microkernel parameters to unblock amalgamation
- Move constant literals into microkernel parameters
PiperOrigin-RevId: 419984793
diff --git a/src/f32-raddstoreexpminusmax/neon-p5.c.in b/src/f32-raddstoreexpminusmax/neon-p5.c.in
index 2753910..51221c6 100644
--- a/src/f32-raddstoreexpminusmax/neon-p5.c.in
+++ b/src/f32-raddstoreexpminusmax/neon-p5.c.in
@@ -16,74 +16,61 @@
#include <xnnpack/raddstoreexpminusmax.h>
+$PARAMS_STRUCT = "neonfma_rr1_p5" if FMA else "neon_rr2_p5"
void xnn_f32_raddstoreexpminusmax_ukernel__${"neonfma" if FMA else "neon"}_rr${1 if FMA else 2}_p5_x${ELEMENTS_TILE}${"" if ACCUMULATORS == 1 else "_acc%d" % ACCUMULATORS}(
size_t elements,
const float* input,
const float* max,
float* output,
- float* sum) XNN_OOB_READS
+ float* sum,
+ const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
{
assert(elements % sizeof(float) == 0);
- const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
- // The smallest x for which expf(x) is normalized.
- const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
- const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
- $if FMA:
- const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
- const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
- $else:
- // Last 7 bits are zeroes
- const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
- const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
-
- const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
- const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
- const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
- const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
- const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
-
const float32x4_t vi_max = vld1q_dup_f32(max);
+ const float32x4_t vlog2e = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.log2e);
+ const float32x4_t vmagic_bias = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.magic_bias);
+ $if FMA:
+ const float32x4_t vminus_ln2 = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.minus_ln2);
+ $else:
+ const float32x4_t vminus_ln2_hi = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.minus_ln2_hi);
+ const float32x4_t vminus_ln2_lo = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.minus_ln2_lo);
+ const float32x4_t vc5 = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.c5);
+ const float32x4_t vc4 = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.c4);
+ const float32x4_t vc3 = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.c3);
+ const float32x4_t vc2 = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.c2);
+ const float32x4_t vc1 = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.c1);
+ const float32x4_t vdenorm_cutoff = vld1q_dup_f32(¶ms->${PARAMS_STRUCT}.denorm_cutoff);
$if ELEMENTS_TILE > 4:
$for K in range(ACCUMULATORS):
float32x4_t vacc${K} = vmovq_n_f32(0.0f);
for (; elements >= ${ELEMENTS_TILE} * sizeof(float); elements -= ${ELEMENTS_TILE} * sizeof(float)) {
- // Load ${ELEMENTS_TILE} (${SIMD_TILE}x4) inputs at a time.
$for N in range(0, ELEMENTS_TILE, 4):
const float32x4_t vi${ABC[N:N+4]} = vld1q_f32(input); input += 4;
- // Subtract maximum input x := i - i_max. This implies x <= 0.
$for N in range(0, ELEMENTS_TILE, 4):
const float32x4_t vx${ABC[N:N+4]} = vsubq_f32(vi${ABC[N:N+4]}, vi_max);
- // Compute reduced argument n := round(x / log(2)).
- // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
- // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
- // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but that's ok, because
- // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
- // of the algorithm.
$for N in range(0, ELEMENTS_TILE, 4):
float32x4_t vn${ABC[N:N+4]} = ${VMULADDQ_F32}(vmagic_bias, vx${ABC[N:N+4]}, vlog2e);
- // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
- // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
$for N in range(0, ELEMENTS_TILE, 4):
const float32x4_t vs${ABC[N:N+4]} = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn${ABC[N:N+4]}), 23));
- // Subtract the large number back to get final n := round(x / log(2)).
$for N in range(0, ELEMENTS_TILE, 4):
vn${ABC[N:N+4]} = vsubq_f32(vn${ABC[N:N+4]}, vmagic_bias);
- // Compute reduced argument t := z - n * log(2).
- // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
- $for N in range(0, ELEMENTS_TILE, 4):
- float32x4_t vt${ABC[N:N+4]} = ${VMULADDQ_F32}(vx${ABC[N:N+4]}, vn${ABC[N:N+4]}, vminus_ln2_hi);
+ $if FMA:
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x4_t vt${ABC[N:N+4]} = ${VMULADDQ_F32}(vx${ABC[N:N+4]}, vn${ABC[N:N+4]}, vminus_ln2);
+ $else:
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x4_t vt${ABC[N:N+4]} = ${VMULADDQ_F32}(vx${ABC[N:N+4]}, vn${ABC[N:N+4]}, vminus_ln2_hi);
- $for N in range(0, ELEMENTS_TILE, 4):
- vt${ABC[N:N+4]} = ${VMULADDQ_F32}(vt${ABC[N:N+4]}, vn${ABC[N:N+4]}, vminus_ln2_lo);
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vt${ABC[N:N+4]} = ${VMULADDQ_F32}(vt${ABC[N:N+4]}, vn${ABC[N:N+4]}, vminus_ln2_lo);
- // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
$for N in range(0, ELEMENTS_TILE, 4):
float32x4_t vp${ABC[N:N+4]} = ${VMULADDQ_F32}(vc4, vc5, vt${ABC[N:N+4]});
@@ -96,31 +83,22 @@
$for N in range(0, ELEMENTS_TILE, 4):
vp${ABC[N:N+4]} = ${VMULADDQ_F32}(vc1, vp${ABC[N:N+4]}, vt${ABC[N:N+4]});
- // Reconstruct the final f value:
- // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
- // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
- // = s + (t * s) * p
$for N in range(0, ELEMENTS_TILE, 4):
vt${ABC[N:N+4]} = vmulq_f32(vt${ABC[N:N+4]}, vs${ABC[N:N+4]});
$for N in range(0, ELEMENTS_TILE, 4):
float32x4_t vf${ABC[N:N+4]} = ${VMULADDQ_F32}(vs${ABC[N:N+4]}, vp${ABC[N:N+4]}, vt${ABC[N:N+4]});
- // For inputs below denormal cutoff, replace output with +0.0f.
- // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
$for N in range(0, ELEMENTS_TILE, 4):
vf${ABC[N:N+4]} = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf${ABC[N:N+4]}), vcltq_f32(vx${ABC[N:N+4]}, vdenorm_cutoff)));
- // Store ${ELEMENTS_TILE} (${SIMD_TILE}x4) outputs at a time.
$for N in range(0, ELEMENTS_TILE, 4):
vst1q_f32(output, vf${ABC[N:N+4]}); output += 4;
- // Accumulate computed exponents.
$for N in range(0, ELEMENTS_TILE, 4):
vacc${N % ACCUMULATORS} = vaddq_f32(vacc${N % ACCUMULATORS}, vf${ABC[N:N+4]});
}
$if ACCUMULATORS > 1:
- // Add up all accumulators to vacc0
$ACC_SLICE = 1
$while ACC_SLICE < ACCUMULATORS:
$for A in range(0, ACCUMULATORS, ACC_SLICE * 2):
@@ -132,53 +110,34 @@
$else:
float32x4_t vacc = vmovq_n_f32(0.0f);
for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
- // Load 4 inputs at a time.
const float32x4_t vi = vld1q_f32(input); input += 4;
- // Subtract maximum input x := i - i_max. This implies x <= 0.
const float32x4_t vx = vsubq_f32(vi, vi_max);
- // Compute reduced argument n := round(x / log(2)).
- // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
- // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
- // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but that's ok, because
- // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
- // of the algorithm.
float32x4_t vn = ${VMULADDQ_F32}(vmagic_bias, vx, vlog2e);
- // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
- // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
- // Subtract the large number back to get final n := round(x / log(2)).
vn = vsubq_f32(vn, vmagic_bias);
- // Compute reduced argument t := z - n * log(2).
- // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
- float32x4_t vt = ${VMULADDQ_F32}(vx, vn, vminus_ln2_hi);
- vt = ${VMULADDQ_F32}(vt, vn, vminus_ln2_lo);
+ $if FMA:
+ float32x4_t vt = ${VMULADDQ_F32}(vx, vn, vminus_ln2);
+ $else:
+ float32x4_t vt = ${VMULADDQ_F32}(vx, vn, vminus_ln2_hi);
+ vt = ${VMULADDQ_F32}(vt, vn, vminus_ln2_lo);
- // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
float32x4_t vp = ${VMULADDQ_F32}(vc4, vc5, vt);
vp = ${VMULADDQ_F32}(vc3, vp, vt);
vp = ${VMULADDQ_F32}(vc2, vp, vt);
vp = ${VMULADDQ_F32}(vc1, vp, vt);
- // Reconstruct the final f value:
- // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
- // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
- // = s + (t * s) * p
vt = vmulq_f32(vt, vs);
float32x4_t vf = ${VMULADDQ_F32}(vs, vp, vt);
- // For inputs below denormal cutoff, replace output with +0.0f.
- // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
- // Store 4 outputs at a time.
vst1q_f32(output, vf); output += 4;
- // Accumulate computed exponents.
vacc = vaddq_f32(vacc, vf);
}
#if XNN_ARCH_ARM64
@@ -189,55 +148,36 @@
if (elements != 0) {
assert(elements >= 1 * sizeof(float));
assert(elements <= 3 * sizeof(float));
- // Load 4 inputs at a time.
const float32x4_t vi = vld1q_f32(input); input += 4;
- // Subtract maximum input x := i - i_max. This implies x <= 0.
const float32x4_t vx = vsubq_f32(vi, vi_max);
- // Compute reduced argument n := round(x / log(2)).
- // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
- // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
- // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but that's ok, because
- // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
- // of the algorithm.
float32x4_t vn = ${VMULADDQ_F32}(vmagic_bias, vx, vlog2e);
- // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
- // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
- // Subtract the large number back to get final n := round(x / log(2)).
vn = vsubq_f32(vn, vmagic_bias);
- // Compute reduced argument t := z - n * log(2).
- // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
- float32x4_t vt = ${VMULADDQ_F32}(vx, vn, vminus_ln2_hi);
- vt = ${VMULADDQ_F32}(vt, vn, vminus_ln2_lo);
+ $if FMA:
+ float32x4_t vt = ${VMULADDQ_F32}(vx, vn, vminus_ln2);
+ $else:
+ float32x4_t vt = ${VMULADDQ_F32}(vx, vn, vminus_ln2_hi);
+ vt = ${VMULADDQ_F32}(vt, vn, vminus_ln2_lo);
- // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
float32x4_t vp = ${VMULADDQ_F32}(vc4, vc5, vt);
vp = ${VMULADDQ_F32}(vc3, vp, vt);
vp = ${VMULADDQ_F32}(vc2, vp, vt);
vp = ${VMULADDQ_F32}(vc1, vp, vt);
- // Reconstruct the final f value:
- // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
- // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
- // = s + (t * s) * p
vt = vmulq_f32(vt, vs);
float32x4_t vf = ${VMULADDQ_F32}(vs, vp, vt);
- // For inputs below denormal cutoff, replace output with +0.0f.
- // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
float32x2_t vf_lo = vget_low_f32(vf);
if (elements & (2 * sizeof(float))) {
- // Store 2 outputs at a time.
vst1_f32(output, vf_lo); output += 2;
- // Accumulate 2 computed exponents.
#if XNN_ARCH_ARM64
vacc_lo += vaddv_f32(vf_lo);
#else
@@ -247,10 +187,8 @@
vf_lo = vget_high_f32(vf);
}
if (elements & (1 * sizeof(float))) {
- // Store 1 output at a time.
vst1_lane_f32(output, vf_lo, 0);
- // Accumulate 1 computed exponent.
#if XNN_ARCH_ARM64
vacc_lo += vget_lane_f32(vf_lo, 0);
#else
@@ -258,7 +196,6 @@
#endif
}
}
- // Reduce 4 elements in the SIMD register
#if XNN_ARCH_ARM64
*sum = vacc_lo;
#else