Disable MSan in quantized addition microkernels
Quantized VADD[C] microkernels need to read up to XNN_EXTRA_BYTES beyond end of
array for low-level efficiency, which may result in spurious MSan failures when
the extra bytes are uninitialized. This doesn't affect correctness because
calculations results involving out-of-bounds elements are discarded.
PiperOrigin-RevId: 386307231
diff --git a/src/qs8-vadd/avx2-mul32-ld64.c.in b/src/qs8-vadd/avx2-mul32-ld64.c.in
index 32c780a..01c45dd 100644
--- a/src/qs8-vadd/avx2-mul32-ld64.c.in
+++ b/src/qs8-vadd/avx2-mul32-ld64.c.in
@@ -25,7 +25,7 @@
const ${XINT8_T}* input_a,
const ${XINT8_T}* input_b,
${XINT8_T}* output,
- const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i vbias = _mm256_load_si256((const __m256i*) params->avx2.bias);
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c b/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c
index 890e363..69142ff 100644
--- a/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c
+++ b/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul16.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse4_mul16.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c b/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c
index 957d764..01ac080 100644
--- a/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c
+++ b/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul16.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse4_mul16.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c b/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c
index f0a18df..e87c0b3 100644
--- a/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c
+++ b/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul16.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse4_mul16.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c b/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c
index 03f4b60..739018d 100644
--- a/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c
+++ b/src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul16.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse4_mul16.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c b/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c
index a4f248c..bb406d4 100644
--- a/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c
+++ b/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c b/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c
index d31c09e..f6f0917 100644
--- a/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c
+++ b/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c b/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c
index 994ffb1..3c31622 100644
--- a/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c
+++ b/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c b/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
index 71f0af0..2f91916 100644
--- a/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
+++ b/src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c b/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
index 06c0b21..a442a7f 100644
--- a/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
+++ b/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i vbias = _mm256_load_si256((const __m256i*) params->avx2.bias);
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c b/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c
index 36b4388..7b9fa3f 100644
--- a/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c
+++ b/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i vbias = _mm256_load_si256((const __m256i*) params->avx2.bias);
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c b/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c
index 5fa63f9..5c881ef 100644
--- a/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c
+++ b/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i vbias = _mm256_load_si256((const __m256i*) params->avx2.bias);
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c b/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
index e32c34a..f47f48b 100644
--- a/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
+++ b/src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i vbias = _mm256_load_si256((const __m256i*) params->avx2.bias);
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-neon-ld64-x16.c b/src/qs8-vadd/gen/minmax-neon-ld64-x16.c
index ba585d0..601cc33 100644
--- a/src/qs8-vadd/gen/minmax-neon-ld64-x16.c
+++ b/src/qs8-vadd/gen/minmax-neon-ld64-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const int8x8_t va_zero_point = vld1_dup_s8(¶ms->neon.a_zero_point);
const int8x8_t vb_zero_point = vld1_dup_s8(¶ms->neon.b_zero_point);
diff --git a/src/qs8-vadd/gen/minmax-neon-ld64-x24.c b/src/qs8-vadd/gen/minmax-neon-ld64-x24.c
index 385d297..63a8c72 100644
--- a/src/qs8-vadd/gen/minmax-neon-ld64-x24.c
+++ b/src/qs8-vadd/gen/minmax-neon-ld64-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const int8x8_t va_zero_point = vld1_dup_s8(¶ms->neon.a_zero_point);
const int8x8_t vb_zero_point = vld1_dup_s8(¶ms->neon.b_zero_point);
diff --git a/src/qs8-vadd/gen/minmax-neon-ld64-x32.c b/src/qs8-vadd/gen/minmax-neon-ld64-x32.c
index 28ecdc5..e460dd2 100644
--- a/src/qs8-vadd/gen/minmax-neon-ld64-x32.c
+++ b/src/qs8-vadd/gen/minmax-neon-ld64-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const int8x8_t va_zero_point = vld1_dup_s8(¶ms->neon.a_zero_point);
const int8x8_t vb_zero_point = vld1_dup_s8(¶ms->neon.b_zero_point);
diff --git a/src/qs8-vadd/gen/minmax-neon-ld64-x8.c b/src/qs8-vadd/gen/minmax-neon-ld64-x8.c
index 7b2d173..c2056fe 100644
--- a/src/qs8-vadd/gen/minmax-neon-ld64-x8.c
+++ b/src/qs8-vadd/gen/minmax-neon-ld64-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const int8x8_t va_zero_point = vld1_dup_s8(¶ms->neon.a_zero_point);
const int8x8_t vb_zero_point = vld1_dup_s8(¶ms->neon.b_zero_point);
diff --git a/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c b/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
index f0aaf7f..1cc193c 100644
--- a/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
+++ b/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse2.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c b/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c
index a0ec3e7..fdff664 100644
--- a/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c
+++ b/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse2.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c b/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c
index 5dafcdc..bb8d504 100644
--- a/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c
+++ b/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse2.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c b/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
index 8e1ae85..2fd0437 100644
--- a/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
+++ b/src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse2.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c b/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
index ebed509..9bb66a7 100644
--- a/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
+++ b/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul16.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse4_mul16.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c b/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c
index 1e75502..ae7219a 100644
--- a/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c
+++ b/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul16.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse4_mul16.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c b/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c
index f59e6ce..ef73908 100644
--- a/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c
+++ b/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul16.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse4_mul16.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c b/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
index af158c1..c0addcf 100644
--- a/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
+++ b/src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul16.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse4_mul16.a_multiplier_lo);
diff --git a/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c b/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
index e6e9a67..65d6bb2 100644
--- a/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
+++ b/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c b/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c
index 25a4f09..a77d65d 100644
--- a/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c
+++ b/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c b/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c
index c1de1af..8973c9f 100644
--- a/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c
+++ b/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c b/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
index 22927ae..d0917fc 100644
--- a/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
+++ b/src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-wasmsimd-x16.c b/src/qs8-vadd/gen/minmax-wasmsimd-x16.c
index 75c298f..b422b30 100644
--- a/src/qs8-vadd/gen/minmax-wasmsimd-x16.c
+++ b/src/qs8-vadd/gen/minmax-wasmsimd-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t vbias = wasm_v128_load(params->wasmsimd.bias);
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-wasmsimd-x24.c b/src/qs8-vadd/gen/minmax-wasmsimd-x24.c
index c229fe0..b23aceb 100644
--- a/src/qs8-vadd/gen/minmax-wasmsimd-x24.c
+++ b/src/qs8-vadd/gen/minmax-wasmsimd-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t vbias = wasm_v128_load(params->wasmsimd.bias);
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-wasmsimd-x32.c b/src/qs8-vadd/gen/minmax-wasmsimd-x32.c
index 18774e9..298a6f3 100644
--- a/src/qs8-vadd/gen/minmax-wasmsimd-x32.c
+++ b/src/qs8-vadd/gen/minmax-wasmsimd-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t vbias = wasm_v128_load(params->wasmsimd.bias);
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-wasmsimd-x8.c b/src/qs8-vadd/gen/minmax-wasmsimd-x8.c
index 03fef74..6619875 100644
--- a/src/qs8-vadd/gen/minmax-wasmsimd-x8.c
+++ b/src/qs8-vadd/gen/minmax-wasmsimd-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t vbias = wasm_v128_load(params->wasmsimd.bias);
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c b/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c
index 1f08612..04d46e3 100644
--- a/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c
+++ b/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c
@@ -25,7 +25,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c b/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c
index bbf070a..12c3f69 100644
--- a/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c
+++ b/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c
@@ -25,7 +25,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c b/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c
index daf6e86..051ac20 100644
--- a/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c
+++ b/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c
@@ -25,7 +25,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c b/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
index b215f26..7a8c597 100644
--- a/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
+++ b/src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
@@ -25,7 +25,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4_mul32.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
diff --git a/src/qs8-vadd/neon-ld64.c.in b/src/qs8-vadd/neon-ld64.c.in
index cb3bcbc..54bdc3e 100644
--- a/src/qs8-vadd/neon-ld64.c.in
+++ b/src/qs8-vadd/neon-ld64.c.in
@@ -38,7 +38,7 @@
const ${XINT8_T}* input_a,
const ${XINT8_T}* input_b,
${XINT8_T}* output,
- const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const ${XINT8X8_T} va_zero_point = ${VLD1_DUP_X8}(¶ms->neon.a_zero_point);
const ${XINT8X8_T} vb_zero_point = ${VLD1_DUP_X8}(¶ms->neon.b_zero_point);
diff --git a/src/qs8-vadd/sse-mul16-ld64.c.in b/src/qs8-vadd/sse-mul16-ld64.c.in
index 5aaaf5c..33e6baa 100644
--- a/src/qs8-vadd/sse-mul16-ld64.c.in
+++ b/src/qs8-vadd/sse-mul16-ld64.c.in
@@ -29,7 +29,7 @@
const ${XINT8_T}* input_a,
const ${XINT8_T}* input_b,
${XINT8_T}* output,
- const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->${PARAMS_STRUCT}.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->${PARAMS_STRUCT}.a_multiplier_lo);
diff --git a/src/qs8-vadd/sse-mul32-ld32.c.in b/src/qs8-vadd/sse-mul32-ld32.c.in
index 1e13284..23096ce 100644
--- a/src/qs8-vadd/sse-mul32-ld32.c.in
+++ b/src/qs8-vadd/sse-mul32-ld32.c.in
@@ -37,7 +37,7 @@
const ${XINT8_T}* input_a,
const ${XINT8_T}* input_b,
${XINT8_T}* output,
- const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->${PARAMS_STRUCT}.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->${PARAMS_STRUCT}.a_multiplier);
diff --git a/src/qs8-vadd/wasmsimd.c.in b/src/qs8-vadd/wasmsimd.c.in
index 3776c59..ee63982 100644
--- a/src/qs8-vadd/wasmsimd.c.in
+++ b/src/qs8-vadd/wasmsimd.c.in
@@ -26,7 +26,7 @@
const ${XINT8_T}* input_a,
const ${XINT8_T}* input_b,
${XINT8_T}* output,
- const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t vbias = wasm_v128_load(params->wasmsimd.bias);
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
diff --git a/src/qs8-vaddc/avx2-mul32-ld64.c.in b/src/qs8-vaddc/avx2-mul32-ld64.c.in
index 20499f9..5e70262 100644
--- a/src/qs8-vaddc/avx2-mul32-ld64.c.in
+++ b/src/qs8-vaddc/avx2-mul32-ld64.c.in
@@ -25,7 +25,7 @@
const ${XINT8_T}* input_a,
const ${XINT8_T}* input_b,
${XINT8_T}* output,
- const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
const __m256i vrounding = _mm256_load_si256((const __m256i*) params->avx2.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
index 14aefc5..70fa146 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse4_mul16.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c
index 01b0ba7..e3ab482 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse4_mul16.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c
index a04d2c0..0890958 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse4_mul16.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
index 2fbbc2d..2f71494 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse4_mul16.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
index 4a9784e..a364f1d 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c
index 7df2578..9391563 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c
index 72954c0..69c403a 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
index 4b79e1c..2f987c6 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
index 3c00442..2cd1562 100644
--- a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
+++ b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
const __m256i vrounding = _mm256_load_si256((const __m256i*) params->avx2.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
index 68e236a..35a0607 100644
--- a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
const __m256i vrounding = _mm256_load_si256((const __m256i*) params->avx2.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c
index fbbffe5..fdf4c1e 100644
--- a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c
+++ b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
const __m256i vrounding = _mm256_load_si256((const __m256i*) params->avx2.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
index 46782a6..04687ac 100644
--- a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
+++ b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
const __m256i vrounding = _mm256_load_si256((const __m256i*) params->avx2.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-neon-ld64-x16.c b/src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
index a86d2d5..501ddbc 100644
--- a/src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
+++ b/src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
@@ -21,7 +21,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const int8x8_t va_zero_point = vld1_dup_s8(¶ms->neon.a_zero_point);
const int32x4_t va_multiplier = vld1q_dup_s32(¶ms->neon.a_multiplier);
diff --git a/src/qs8-vaddc/gen/minmax-neon-ld64-x24.c b/src/qs8-vaddc/gen/minmax-neon-ld64-x24.c
index e76e138..75eb36b 100644
--- a/src/qs8-vaddc/gen/minmax-neon-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-neon-ld64-x24.c
@@ -21,7 +21,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const int8x8_t va_zero_point = vld1_dup_s8(¶ms->neon.a_zero_point);
const int32x4_t va_multiplier = vld1q_dup_s32(¶ms->neon.a_multiplier);
diff --git a/src/qs8-vaddc/gen/minmax-neon-ld64-x32.c b/src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
index 6fdaa55..a28ee68 100644
--- a/src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
+++ b/src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
@@ -21,7 +21,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const int8x8_t va_zero_point = vld1_dup_s8(¶ms->neon.a_zero_point);
const int32x4_t va_multiplier = vld1q_dup_s32(¶ms->neon.a_multiplier);
diff --git a/src/qs8-vaddc/gen/minmax-neon-ld64-x8.c b/src/qs8-vaddc/gen/minmax-neon-ld64-x8.c
index 43f45e6..e8d6da9 100644
--- a/src/qs8-vaddc/gen/minmax-neon-ld64-x8.c
+++ b/src/qs8-vaddc/gen/minmax-neon-ld64-x8.c
@@ -21,7 +21,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const int8x8_t va_zero_point = vld1_dup_s8(¶ms->neon.a_zero_point);
const int32x4_t va_multiplier = vld1q_dup_s32(¶ms->neon.a_multiplier);
diff --git a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
index 5fdc40f..0ab0d0b 100644
--- a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
+++ b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse2.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c
index 7278c84..beaf1e6 100644
--- a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse2.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c
index 5de0c08..7fabe95 100644
--- a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c
+++ b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse2.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
index 9ca8391..5f24634 100644
--- a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
+++ b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse2.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
index 97e9333..953dcbd 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse4_mul16.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c
index e4e1548..ebbe57c 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse4_mul16.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c
index 00619ea..e23ba02 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse4_mul16.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
index 85ab3f0..f3c6a5a 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse4_mul16.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
index ab1ccfa..b387f24 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c
index 2dae9ff..6e2aa6b 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c
index 635700b..0871e9a 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
index 7532fea..b80e4ed 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
@@ -20,7 +20,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-wasmsimd-x16.c b/src/qs8-vaddc/gen/minmax-wasmsimd-x16.c
index d5cdc12..7976303 100644
--- a/src/qs8-vaddc/gen/minmax-wasmsimd-x16.c
+++ b/src/qs8-vaddc/gen/minmax-wasmsimd-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-wasmsimd-x24.c b/src/qs8-vaddc/gen/minmax-wasmsimd-x24.c
index 9d35e6f..e86cf31 100644
--- a/src/qs8-vaddc/gen/minmax-wasmsimd-x24.c
+++ b/src/qs8-vaddc/gen/minmax-wasmsimd-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-wasmsimd-x32.c b/src/qs8-vaddc/gen/minmax-wasmsimd-x32.c
index ed00d5e..056d705 100644
--- a/src/qs8-vaddc/gen/minmax-wasmsimd-x32.c
+++ b/src/qs8-vaddc/gen/minmax-wasmsimd-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-wasmsimd-x8.c b/src/qs8-vaddc/gen/minmax-wasmsimd-x8.c
index c2885fd..99edf70 100644
--- a/src/qs8-vaddc/gen/minmax-wasmsimd-x8.c
+++ b/src/qs8-vaddc/gen/minmax-wasmsimd-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
index 698085b..f9113b8 100644
--- a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
+++ b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
@@ -25,7 +25,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c
index 8beb90a..3f33ead 100644
--- a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c
+++ b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c
@@ -25,7 +25,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c
index 2b48ee6..3b89fc2 100644
--- a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c
+++ b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c
@@ -25,7 +25,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
index ce4ab97..71ed202 100644
--- a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
+++ b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
@@ -25,7 +25,7 @@
const int8_t* input_a,
const int8_t* input_b,
int8_t* output,
- const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4_mul32.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4_mul32.rounding);
diff --git a/src/qs8-vaddc/neon-ld64.c.in b/src/qs8-vaddc/neon-ld64.c.in
index 023ede0..d691355 100644
--- a/src/qs8-vaddc/neon-ld64.c.in
+++ b/src/qs8-vaddc/neon-ld64.c.in
@@ -40,7 +40,7 @@
const ${XINT8_T}* input_a,
const ${XINT8_T}* input_b,
${XINT8_T}* output,
- const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const ${XINT8X8_T} va_zero_point = ${VLD1_DUP_X8}(¶ms->neon.a_zero_point);
const int32x4_t va_multiplier = vld1q_dup_s32(¶ms->neon.a_multiplier);
diff --git a/src/qs8-vaddc/sse-mul16-ld64.c.in b/src/qs8-vaddc/sse-mul16-ld64.c.in
index fa761b6..f01403a 100644
--- a/src/qs8-vaddc/sse-mul16-ld64.c.in
+++ b/src/qs8-vaddc/sse-mul16-ld64.c.in
@@ -29,7 +29,7 @@
const ${XINT8_T}* input_a,
const ${XINT8_T}* input_b,
${XINT8_T}* output,
- const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->${PARAMS_STRUCT}.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qs8-vaddc/sse-mul32-ld32.c.in b/src/qs8-vaddc/sse-mul32-ld32.c.in
index 46c4c8d..f4d0cb4 100644
--- a/src/qs8-vaddc/sse-mul32-ld32.c.in
+++ b/src/qs8-vaddc/sse-mul32-ld32.c.in
@@ -37,7 +37,7 @@
const ${XINT8_T}* input_a,
const ${XINT8_T}* input_b,
${XINT8_T}* output,
- const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->${PARAMS_STRUCT}.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->${PARAMS_STRUCT}.rounding);
diff --git a/src/qs8-vaddc/wasmsimd.c.in b/src/qs8-vaddc/wasmsimd.c.in
index a87d5a8..9746cd4 100644
--- a/src/qs8-vaddc/wasmsimd.c.in
+++ b/src/qs8-vaddc/wasmsimd.c.in
@@ -26,7 +26,7 @@
const ${XINT8_T}* input_a,
const ${XINT8_T}* input_b,
${XINT8_T}* output,
- const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_${DATATYPE.lower()}_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding);
diff --git a/src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c b/src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c
index 81777cd..d3d1c05 100644
--- a/src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c
+++ b/src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse2.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.a_multiplier_lo);
diff --git a/src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c b/src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c
index e86e815..2f8e08e 100644
--- a/src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c
+++ b/src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse2.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.a_multiplier_lo);
diff --git a/src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c b/src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c
index c2c0c38..cc4b32a 100644
--- a/src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c
+++ b/src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
diff --git a/src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c b/src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
index 3001c57..dad1691 100644
--- a/src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
+++ b/src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
diff --git a/src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c b/src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
index 70aabdd..40c7550 100644
--- a/src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
+++ b/src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i vbias = _mm256_load_si256((const __m256i*) params->avx2.bias);
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
diff --git a/src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c b/src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
index 8cfdb80..13ea608 100644
--- a/src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
+++ b/src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i vbias = _mm256_load_si256((const __m256i*) params->avx2.bias);
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
diff --git a/src/qu8-vadd/gen/minmax-neon-ld64-x16.c b/src/qu8-vadd/gen/minmax-neon-ld64-x16.c
index a6c8756..90b549e 100644
--- a/src/qu8-vadd/gen/minmax-neon-ld64-x16.c
+++ b/src/qu8-vadd/gen/minmax-neon-ld64-x16.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const uint8x8_t va_zero_point = vld1_dup_u8(¶ms->neon.a_zero_point);
const uint8x8_t vb_zero_point = vld1_dup_u8(¶ms->neon.b_zero_point);
diff --git a/src/qu8-vadd/gen/minmax-neon-ld64-x8.c b/src/qu8-vadd/gen/minmax-neon-ld64-x8.c
index 3ff0fb1..9e49735 100644
--- a/src/qu8-vadd/gen/minmax-neon-ld64-x8.c
+++ b/src/qu8-vadd/gen/minmax-neon-ld64-x8.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const uint8x8_t va_zero_point = vld1_dup_u8(¶ms->neon.a_zero_point);
const uint8x8_t vb_zero_point = vld1_dup_u8(¶ms->neon.b_zero_point);
diff --git a/src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c b/src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
index 7deb623..c59bc57 100644
--- a/src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
+++ b/src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse2.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.a_multiplier_lo);
diff --git a/src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c b/src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
index c8095f3..68f1c8f 100644
--- a/src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
+++ b/src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse2.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.a_multiplier_lo);
diff --git a/src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c b/src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
index 345c295..260ae6c 100644
--- a/src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
+++ b/src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse2.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.a_multiplier_lo);
diff --git a/src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c b/src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
index adbbc1d..70fcb29 100644
--- a/src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
+++ b/src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse2.bias);
const __m128i va_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.a_multiplier_lo);
diff --git a/src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c b/src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
index 7affa57..e7809a6 100644
--- a/src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
+++ b/src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
diff --git a/src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c b/src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
index 6cd5185..11fbc54 100644
--- a/src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
+++ b/src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
diff --git a/src/qu8-vadd/gen/minmax-wasmsimd-x16.c b/src/qu8-vadd/gen/minmax-wasmsimd-x16.c
index 563534c..90ea6f4 100644
--- a/src/qu8-vadd/gen/minmax-wasmsimd-x16.c
+++ b/src/qu8-vadd/gen/minmax-wasmsimd-x16.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t vbias = wasm_v128_load(params->wasmsimd.bias);
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
diff --git a/src/qu8-vadd/gen/minmax-wasmsimd-x8.c b/src/qu8-vadd/gen/minmax-wasmsimd-x8.c
index df5b45f..8f5f552 100644
--- a/src/qu8-vadd/gen/minmax-wasmsimd-x8.c
+++ b/src/qu8-vadd/gen/minmax-wasmsimd-x8.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t vbias = wasm_v128_load(params->wasmsimd.bias);
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
diff --git a/src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c b/src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c
index c7e4e9d..7d60fab 100644
--- a/src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c
+++ b/src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c
@@ -25,7 +25,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
diff --git a/src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c b/src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
index 006833b..483db71 100644
--- a/src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
+++ b/src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
@@ -25,7 +25,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_load_si128((const __m128i*) params->sse4.bias);
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
diff --git a/src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c b/src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
index 738b63c..8be6ef0 100644
--- a/src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
+++ b/src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse2.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c b/src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
index 5aaacdf..d8d9f29 100644
--- a/src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
+++ b/src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse2.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c b/src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
index 9c8aee6..5dbaca2 100644
--- a/src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
+++ b/src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4.rounding);
diff --git a/src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c b/src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
index cd69c65..8565698 100644
--- a/src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
+++ b/src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4.rounding);
diff --git a/src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c b/src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
index 8ea54a2..485763a 100644
--- a/src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
+++ b/src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
const __m256i vrounding = _mm256_load_si256((const __m256i*) params->avx2.rounding);
diff --git a/src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c b/src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
index 4263956..0703024 100644
--- a/src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
+++ b/src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m256i va_multiplier = _mm256_load_si256((const __m256i*) params->avx2.a_multiplier);
const __m256i vrounding = _mm256_load_si256((const __m256i*) params->avx2.rounding);
diff --git a/src/qu8-vaddc/gen/minmax-neon-ld64-x16.c b/src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
index dec0c9e..de82c6b 100644
--- a/src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
+++ b/src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
@@ -21,7 +21,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const uint8x8_t va_zero_point = vld1_dup_u8(¶ms->neon.a_zero_point);
const int32x4_t va_multiplier = vld1q_dup_s32(¶ms->neon.a_multiplier);
diff --git a/src/qu8-vaddc/gen/minmax-neon-ld64-x8.c b/src/qu8-vaddc/gen/minmax-neon-ld64-x8.c
index 252ce2c..3fcc7b6 100644
--- a/src/qu8-vaddc/gen/minmax-neon-ld64-x8.c
+++ b/src/qu8-vaddc/gen/minmax-neon-ld64-x8.c
@@ -21,7 +21,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const uint8x8_t va_zero_point = vld1_dup_u8(¶ms->neon.a_zero_point);
const int32x4_t va_multiplier = vld1q_dup_s32(¶ms->neon.a_multiplier);
diff --git a/src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c b/src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
index e020360..3fc0eab 100644
--- a/src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
+++ b/src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse2.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c b/src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
index 77346a3..2a9ade5 100644
--- a/src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
+++ b/src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse2.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c b/src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
index fa852f1..50084ad 100644
--- a/src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
+++ b/src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse2.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c b/src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
index 3fe3855..062ab77 100644
--- a/src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
+++ b/src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i vbias = _mm_add_epi32(
_mm_shuffle_epi32(_mm_cvtsi32_si128(params->sse2.b_multiplier * (int32_t) *input_b), _MM_SHUFFLE(0, 0, 0, 0)),
diff --git a/src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c b/src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
index 10d5b86..c16b892 100644
--- a/src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
+++ b/src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4.rounding);
diff --git a/src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c b/src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
index b6fdcb3..667db67 100644
--- a/src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
+++ b/src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
@@ -20,7 +20,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4.rounding);
diff --git a/src/qu8-vaddc/gen/minmax-wasmsimd-x16.c b/src/qu8-vaddc/gen/minmax-wasmsimd-x16.c
index 9f566b0..602328e 100644
--- a/src/qu8-vaddc/gen/minmax-wasmsimd-x16.c
+++ b/src/qu8-vaddc/gen/minmax-wasmsimd-x16.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding);
diff --git a/src/qu8-vaddc/gen/minmax-wasmsimd-x8.c b/src/qu8-vaddc/gen/minmax-wasmsimd-x8.c
index d86eee4..cde3e9d 100644
--- a/src/qu8-vaddc/gen/minmax-wasmsimd-x8.c
+++ b/src/qu8-vaddc/gen/minmax-wasmsimd-x8.c
@@ -19,7 +19,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const v128_t va_multiplier = wasm_v128_load(params->wasmsimd.a_multiplier);
const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding);
diff --git a/src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c b/src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
index 3c8e309..03a1082 100644
--- a/src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
+++ b/src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
@@ -25,7 +25,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4.rounding);
diff --git a/src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c b/src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
index 9710e51..c77660c 100644
--- a/src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
+++ b/src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
@@ -25,7 +25,7 @@
const uint8_t* input_a,
const uint8_t* input_b,
uint8_t* output,
- const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse4.a_multiplier);
const __m128i vrounding = _mm_load_si128((const __m128i*) params->sse4.rounding);