NEON/NEONFMA RAddStoreExpMinusMax micro-kernels
PiperOrigin-RevId: 291547227
diff --git a/BUILD.bazel b/BUILD.bazel
index b418e28..cb4adca 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -518,6 +518,30 @@
"src/f32-ppmm/gen/8x8-neon.c",
"src/f32-prelu/gen/neon-2x4.c",
"src/f32-prelu/gen/neon-2x8.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
"src/f32-rmax/neon.c",
"src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
"src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
@@ -632,6 +656,30 @@
"src/f32-hswish/gen/neonfma-x8.c",
"src/f32-ppmm/gen/4x8-neonfma.c",
"src/f32-ppmm/gen/8x8-neonfma.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
+ "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
"src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
"src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
"src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 7fe039d..e01c5e4 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -519,6 +519,30 @@
src/f32-ppmm/gen/8x8-neon.c
src/f32-prelu/gen/neon-2x4.c
src/f32-prelu/gen/neon-2x8.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c
src/f32-rmax/neon.c
src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c
src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c
@@ -632,6 +656,30 @@
src/f32-hswish/gen/neonfma-x8.c
src/f32-ppmm/gen/4x8-neonfma.c
src/f32-ppmm/gen/8x8-neonfma.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c
+ src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c
src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c
src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c
src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c
diff --git a/bench/f32-raddstoreexpminusmax.cc b/bench/f32-raddstoreexpminusmax.cc
index 9d7aa2d..19eab72 100644
--- a/bench/f32-raddstoreexpminusmax.cc
+++ b/bench/f32-raddstoreexpminusmax.cc
@@ -73,6 +73,204 @@
}
}
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x4,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x4,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x8,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x8_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8_acc2,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x12,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x12_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc2,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x12_acc3,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc3,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x16,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x16_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc2,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x16_acc4,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc4,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x20,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x20_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc2,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_p5_x20_acc5,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc5,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x4,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x4,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x8,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x8_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8_acc2,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x12,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x12_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc2,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x12_acc3,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc3,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x16,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x16_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc2,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x16_acc4,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc4,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x20,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x20_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc2,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neon_lut64_p2_x20_acc5,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc5,
+ benchmark::utils::CheckNEON)->Apply(CharacteristicArguments)->UseRealTime();
+
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x4,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x4,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x8,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x8_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8_acc2,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x12,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x12_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc2,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x12_acc3,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc3,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x16,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x16_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc2,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x16_acc4,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc4,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x20,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x20_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc2,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_p5_x20_acc5,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc5,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x4,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x4,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x8,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x8_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8_acc2,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x12,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x12_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc2,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x12_acc3,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc3,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x16,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x16_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc2,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x16_acc4,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc4,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x20,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x20_acc2,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc2,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+ BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, neonfma_lut64_p2_x20_acc5,
+ xnn_f32_rmax_ukernel__neon,
+ xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc5,
+ benchmark::utils::CheckNEONFMA)->Apply(CharacteristicArguments)->UseRealTime();
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
#if XNN_ARCH_X86 || XNN_ARCH_X86_64
BENCHMARK_CAPTURE(f32_raddstoreexpminusmax, avx512f_p5_scalef_x128,
xnn_f32_rmax_ukernel__avx,
diff --git a/scripts/generate-f32-raddstoreexpminusmax.sh b/scripts/generate-f32-raddstoreexpminusmax.sh
index db975bf..5bbd50f 100755
--- a/scripts/generate-f32-raddstoreexpminusmax.sh
+++ b/scripts/generate-f32-raddstoreexpminusmax.sh
@@ -4,6 +4,59 @@
# This source code is licensed under the BSD-style license found in the
# LICENSE file in the root directory of this source tree.
+################################### ARM NEON ##################################
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=4 -D ACCUMULATORS=1 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=8 -D ACCUMULATORS=1 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=8 -D ACCUMULATORS=2 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=1 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=2 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=3 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=1 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=2 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=4 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=1 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=2 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=5 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c
+
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=4 -D ACCUMULATORS=1 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=8 -D ACCUMULATORS=1 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=8 -D ACCUMULATORS=2 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=1 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=2 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=3 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=1 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=2 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=4 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=1 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=2 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=5 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c
+
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=4 -D ACCUMULATORS=1 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=8 -D ACCUMULATORS=1 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=8 -D ACCUMULATORS=2 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=1 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=2 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=3 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=1 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=2 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=4 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=1 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=2 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-p5.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=5 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c
+
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=4 -D ACCUMULATORS=1 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=8 -D ACCUMULATORS=1 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=8 -D ACCUMULATORS=2 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=1 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=2 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=12 -D ACCUMULATORS=3 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=1 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=2 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=16 -D ACCUMULATORS=4 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=1 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=2 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c
+tools/xngen src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=5 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c
+
################################### x86 SSE2 ##################################
tools/xngen src/f32-raddstoreexpminusmax/sse2-p5.c.in -D ELEMENTS_TILE=4 -D ACCUMULATORS=1 -o src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c
tools/xngen src/f32-raddstoreexpminusmax/sse2-p5.c.in -D ELEMENTS_TILE=8 -D ACCUMULATORS=1 -o src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c
new file mode 100644
index 0000000..fc9fdf5
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c
@@ -0,0 +1,338 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c
new file mode 100644
index 0000000..7ebb3e5
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c
@@ -0,0 +1,340 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc3(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc1 = vaddq_f32(vacc1, vf4567);
+ vacc2 = vaddq_f32(vacc2, vf89AB);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c
new file mode 100644
index 0000000..0a7536f
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c
@@ -0,0 +1,335 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c
new file mode 100644
index 0000000..116ab07
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c
@@ -0,0 +1,360 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vmlaq_f32(vtCDEF, vtCDEF, vpCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vsCDEF, vpCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c
new file mode 100644
index 0000000..591e20d
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c
@@ -0,0 +1,364 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc4(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ float32x4_t vacc3 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vmlaq_f32(vtCDEF, vtCDEF, vpCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vsCDEF, vpCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc2 = vaddq_f32(vacc2, vacc3);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c
new file mode 100644
index 0000000..7974e1d
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c
@@ -0,0 +1,357 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vmlaq_f32(vtCDEF, vtCDEF, vpCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vsCDEF, vpCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c
new file mode 100644
index 0000000..673370b
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c
@@ -0,0 +1,382 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+ float32x4_t vnGHIJ = vmlaq_f32(vmagic_bias, vxGHIJ, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veGHIJ = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnGHIJ), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+ const uint64x2_t vidxGHIJ = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnGHIJ), vindex_mask));
+ const uint64_t vidxGH = vgetq_lane_u64(vidxGHIJ, 0);
+ const uint64_t vidxIJ = vgetq_lane_u64(vidxGHIJ, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+ float32x2_t vlGH = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxGH]);
+ float32x2_t vlIJ = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxIJ]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+ vlGH = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxGH >> 32)], vlGH, 1);
+ vlIJ = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxIJ >> 32)], vlIJ, 1);
+ const float32x4_t vlGHIJ = vcombine_f32(vlGH, vlIJ);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlGHIJ), veGHIJ));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+ float32x4_t vtGHIJ = vmlaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+ vtGHIJ = vmlaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+ float32x4_t vpGHIJ = vmulq_f32(vtGHIJ, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vmlaq_f32(vtCDEF, vtCDEF, vpCDEF);
+ vpGHIJ = vmlaq_f32(vtGHIJ, vtGHIJ, vpGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vsCDEF, vpCDEF);
+ float32x4_t vfGHIJ = vmlaq_f32(vsGHIJ, vsGHIJ, vpGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ vacc0 = vaddq_f32(vacc0, vfGHIJ);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c
new file mode 100644
index 0000000..0200a06
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c
@@ -0,0 +1,388 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc5(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ float32x4_t vacc3 = vmovq_n_f32(0.0f);
+ float32x4_t vacc4 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+ float32x4_t vnGHIJ = vmlaq_f32(vmagic_bias, vxGHIJ, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veGHIJ = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnGHIJ), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+ const uint64x2_t vidxGHIJ = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnGHIJ), vindex_mask));
+ const uint64_t vidxGH = vgetq_lane_u64(vidxGHIJ, 0);
+ const uint64_t vidxIJ = vgetq_lane_u64(vidxGHIJ, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+ float32x2_t vlGH = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxGH]);
+ float32x2_t vlIJ = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxIJ]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+ vlGH = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxGH >> 32)], vlGH, 1);
+ vlIJ = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxIJ >> 32)], vlIJ, 1);
+ const float32x4_t vlGHIJ = vcombine_f32(vlGH, vlIJ);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlGHIJ), veGHIJ));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+ float32x4_t vtGHIJ = vmlaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+ vtGHIJ = vmlaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+ float32x4_t vpGHIJ = vmulq_f32(vtGHIJ, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vmlaq_f32(vtCDEF, vtCDEF, vpCDEF);
+ vpGHIJ = vmlaq_f32(vtGHIJ, vtGHIJ, vpGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vsCDEF, vpCDEF);
+ float32x4_t vfGHIJ = vmlaq_f32(vsGHIJ, vsGHIJ, vpGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc4 = vaddq_f32(vacc4, vf4567);
+ vacc3 = vaddq_f32(vacc3, vf89AB);
+ vacc2 = vaddq_f32(vacc2, vfCDEF);
+ vacc1 = vaddq_f32(vacc1, vfGHIJ);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc2 = vaddq_f32(vacc2, vacc3);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+ vacc0 = vaddq_f32(vacc0, vacc4);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c
new file mode 100644
index 0000000..3199ade
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c
@@ -0,0 +1,379 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+ float32x4_t vnGHIJ = vmlaq_f32(vmagic_bias, vxGHIJ, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veGHIJ = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnGHIJ), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+ const uint64x2_t vidxGHIJ = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnGHIJ), vindex_mask));
+ const uint64_t vidxGH = vgetq_lane_u64(vidxGHIJ, 0);
+ const uint64_t vidxIJ = vgetq_lane_u64(vidxGHIJ, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+ float32x2_t vlGH = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxGH]);
+ float32x2_t vlIJ = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxIJ]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+ vlGH = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxGH >> 32)], vlGH, 1);
+ vlIJ = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxIJ >> 32)], vlIJ, 1);
+ const float32x4_t vlGHIJ = vcombine_f32(vlGH, vlIJ);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlGHIJ), veGHIJ));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+ float32x4_t vtGHIJ = vmlaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+ vtGHIJ = vmlaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+ float32x4_t vpGHIJ = vmulq_f32(vtGHIJ, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vmlaq_f32(vtCDEF, vtCDEF, vpCDEF);
+ vpGHIJ = vmlaq_f32(vtGHIJ, vtGHIJ, vpGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vsCDEF, vpCDEF);
+ float32x4_t vfGHIJ = vmlaq_f32(vsGHIJ, vsGHIJ, vpGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ vacc0 = vaddq_f32(vacc0, vfGHIJ);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c
new file mode 100644
index 0000000..630490f
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c
@@ -0,0 +1,215 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x4(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc = vmovq_n_f32(0.0f);
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c
new file mode 100644
index 0000000..9ffc6dc
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c
@@ -0,0 +1,316 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
+ // Load 8 (2x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+
+ // Store 8 (2x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c
new file mode 100644
index 0000000..9a48d4d
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c
@@ -0,0 +1,313 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
+ // Load 8 (2x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+
+ vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+
+ // Store 8 (2x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vmlaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vmlaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c
new file mode 100644
index 0000000..2817b0e
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c
@@ -0,0 +1,269 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c
new file mode 100644
index 0000000..9a8b9ac
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c
@@ -0,0 +1,271 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc3(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc1 = vaddq_f32(vacc1, vf4567);
+ vacc2 = vaddq_f32(vacc2, vf89AB);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c
new file mode 100644
index 0000000..e3a33ac
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c
@@ -0,0 +1,266 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c
new file mode 100644
index 0000000..4026bef
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c
@@ -0,0 +1,285 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vmlaq_f32(vc4, vc5, vtCDEF);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc3, vpCDEF, vtCDEF);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc2, vpCDEF, vtCDEF);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc1, vpCDEF, vtCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vpCDEF, vtCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c
new file mode 100644
index 0000000..7af363a
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c
@@ -0,0 +1,289 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc4(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ float32x4_t vacc3 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vmlaq_f32(vc4, vc5, vtCDEF);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc3, vpCDEF, vtCDEF);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc2, vpCDEF, vtCDEF);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc1, vpCDEF, vtCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vpCDEF, vtCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc2 = vaddq_f32(vacc2, vacc3);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c
new file mode 100644
index 0000000..22ce848
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c
@@ -0,0 +1,282 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vmlaq_f32(vc4, vc5, vtCDEF);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc3, vpCDEF, vtCDEF);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc2, vpCDEF, vtCDEF);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc1, vpCDEF, vtCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vpCDEF, vtCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c
new file mode 100644
index 0000000..dce5edc
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c
@@ -0,0 +1,301 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e);
+ float32x4_t vnGHIJ = vmlaq_f32(vmagic_bias, vxGHIJ, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnGHIJ), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+ float32x4_t vtGHIJ = vmlaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+ vtGHIJ = vmlaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vmlaq_f32(vc4, vc5, vtCDEF);
+ float32x4_t vpGHIJ = vmlaq_f32(vc4, vc5, vtGHIJ);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc3, vpCDEF, vtCDEF);
+ vpGHIJ = vmlaq_f32(vc3, vpGHIJ, vtGHIJ);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc2, vpCDEF, vtCDEF);
+ vpGHIJ = vmlaq_f32(vc2, vpGHIJ, vtGHIJ);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc1, vpCDEF, vtCDEF);
+ vpGHIJ = vmlaq_f32(vc1, vpGHIJ, vtGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+ vtGHIJ = vmulq_f32(vtGHIJ, vsGHIJ);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vpCDEF, vtCDEF);
+ float32x4_t vfGHIJ = vmlaq_f32(vsGHIJ, vpGHIJ, vtGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ vacc0 = vaddq_f32(vacc0, vfGHIJ);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c
new file mode 100644
index 0000000..af6bc25
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c
@@ -0,0 +1,307 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc5(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ float32x4_t vacc3 = vmovq_n_f32(0.0f);
+ float32x4_t vacc4 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e);
+ float32x4_t vnGHIJ = vmlaq_f32(vmagic_bias, vxGHIJ, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnGHIJ), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+ float32x4_t vtGHIJ = vmlaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+ vtGHIJ = vmlaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vmlaq_f32(vc4, vc5, vtCDEF);
+ float32x4_t vpGHIJ = vmlaq_f32(vc4, vc5, vtGHIJ);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc3, vpCDEF, vtCDEF);
+ vpGHIJ = vmlaq_f32(vc3, vpGHIJ, vtGHIJ);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc2, vpCDEF, vtCDEF);
+ vpGHIJ = vmlaq_f32(vc2, vpGHIJ, vtGHIJ);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc1, vpCDEF, vtCDEF);
+ vpGHIJ = vmlaq_f32(vc1, vpGHIJ, vtGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+ vtGHIJ = vmulq_f32(vtGHIJ, vsGHIJ);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vpCDEF, vtCDEF);
+ float32x4_t vfGHIJ = vmlaq_f32(vsGHIJ, vpGHIJ, vtGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc4 = vaddq_f32(vacc4, vf4567);
+ vacc3 = vaddq_f32(vacc3, vf89AB);
+ vacc2 = vaddq_f32(vacc2, vfCDEF);
+ vacc1 = vaddq_f32(vacc1, vfGHIJ);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc2 = vaddq_f32(vacc2, vacc3);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+ vacc0 = vaddq_f32(vacc0, vacc4);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c
new file mode 100644
index 0000000..4984203
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c
@@ -0,0 +1,298 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e);
+ float32x4_t vnGHIJ = vmlaq_f32(vmagic_bias, vxGHIJ, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnGHIJ), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+ float32x4_t vtGHIJ = vmlaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+ vtGHIJ = vmlaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vmlaq_f32(vc4, vc5, vtCDEF);
+ float32x4_t vpGHIJ = vmlaq_f32(vc4, vc5, vtGHIJ);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc3, vpCDEF, vtCDEF);
+ vpGHIJ = vmlaq_f32(vc3, vpGHIJ, vtGHIJ);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc2, vpCDEF, vtCDEF);
+ vpGHIJ = vmlaq_f32(vc2, vpGHIJ, vtGHIJ);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vmlaq_f32(vc1, vpCDEF, vtCDEF);
+ vpGHIJ = vmlaq_f32(vc1, vpGHIJ, vtGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+ vtGHIJ = vmulq_f32(vtGHIJ, vsGHIJ);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vpCDEF, vtCDEF);
+ float32x4_t vfGHIJ = vmlaq_f32(vsGHIJ, vpGHIJ, vtGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ vacc0 = vaddq_f32(vacc0, vfGHIJ);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c
new file mode 100644
index 0000000..3bc7511
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c
@@ -0,0 +1,177 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x4(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc = vmovq_n_f32(0.0f);
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c
new file mode 100644
index 0000000..627f4b3
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c
@@ -0,0 +1,253 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
+ // Load 8 (2x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+
+ // Store 8 (2x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c b/src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c
new file mode 100644
index 0000000..7b6f1b0
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c
@@ -0,0 +1,250 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
+ // Load 8 (2x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
+
+ vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
+
+ vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
+
+ vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
+
+ vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+
+ float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+
+ // Store 8 (2x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
+ vp = vmlaq_f32(vc3, vp, vt);
+ vp = vmlaq_f32(vc2, vp, vt);
+ vp = vmlaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vmlaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c
new file mode 100644
index 0000000..9542df6
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c
@@ -0,0 +1,337 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vfmaq_f32(vt89AB, vt89AB, vp89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vs89AB, vp89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c
new file mode 100644
index 0000000..57564d0
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c
@@ -0,0 +1,339 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc3(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vfmaq_f32(vt89AB, vt89AB, vp89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vs89AB, vp89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc1 = vaddq_f32(vacc1, vf4567);
+ vacc2 = vaddq_f32(vacc2, vf89AB);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c
new file mode 100644
index 0000000..6292965
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c
@@ -0,0 +1,334 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vfmaq_f32(vt89AB, vt89AB, vp89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vs89AB, vp89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c
new file mode 100644
index 0000000..6b61ee2
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c
@@ -0,0 +1,359 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vfmaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vfmaq_f32(vtCDEF, vtCDEF, vpCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vsCDEF, vpCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c
new file mode 100644
index 0000000..4c48f8d
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c
@@ -0,0 +1,363 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc4(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ float32x4_t vacc3 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vfmaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vfmaq_f32(vtCDEF, vtCDEF, vpCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vsCDEF, vpCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc2 = vaddq_f32(vacc2, vacc3);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c
new file mode 100644
index 0000000..d18d499
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c
@@ -0,0 +1,356 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vfmaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vfmaq_f32(vtCDEF, vtCDEF, vpCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vsCDEF, vpCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c
new file mode 100644
index 0000000..7b69b09
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c
@@ -0,0 +1,381 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+ float32x4_t vnGHIJ = vfmaq_f32(vmagic_bias, vxGHIJ, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veGHIJ = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnGHIJ), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+ const uint64x2_t vidxGHIJ = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnGHIJ), vindex_mask));
+ const uint64_t vidxGH = vgetq_lane_u64(vidxGHIJ, 0);
+ const uint64_t vidxIJ = vgetq_lane_u64(vidxGHIJ, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+ float32x2_t vlGH = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxGH]);
+ float32x2_t vlIJ = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxIJ]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+ vlGH = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxGH >> 32)], vlGH, 1);
+ vlIJ = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxIJ >> 32)], vlIJ, 1);
+ const float32x4_t vlGHIJ = vcombine_f32(vlGH, vlIJ);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlGHIJ), veGHIJ));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+ float32x4_t vtGHIJ = vfmaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+ vtGHIJ = vfmaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+ float32x4_t vpGHIJ = vmulq_f32(vtGHIJ, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vfmaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vfmaq_f32(vtCDEF, vtCDEF, vpCDEF);
+ vpGHIJ = vfmaq_f32(vtGHIJ, vtGHIJ, vpGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vsCDEF, vpCDEF);
+ float32x4_t vfGHIJ = vfmaq_f32(vsGHIJ, vsGHIJ, vpGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ vacc0 = vaddq_f32(vacc0, vfGHIJ);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c
new file mode 100644
index 0000000..4756fa9
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c
@@ -0,0 +1,387 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc5(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ float32x4_t vacc3 = vmovq_n_f32(0.0f);
+ float32x4_t vacc4 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+ float32x4_t vnGHIJ = vfmaq_f32(vmagic_bias, vxGHIJ, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veGHIJ = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnGHIJ), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+ const uint64x2_t vidxGHIJ = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnGHIJ), vindex_mask));
+ const uint64_t vidxGH = vgetq_lane_u64(vidxGHIJ, 0);
+ const uint64_t vidxIJ = vgetq_lane_u64(vidxGHIJ, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+ float32x2_t vlGH = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxGH]);
+ float32x2_t vlIJ = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxIJ]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+ vlGH = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxGH >> 32)], vlGH, 1);
+ vlIJ = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxIJ >> 32)], vlIJ, 1);
+ const float32x4_t vlGHIJ = vcombine_f32(vlGH, vlIJ);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlGHIJ), veGHIJ));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+ float32x4_t vtGHIJ = vfmaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+ vtGHIJ = vfmaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+ float32x4_t vpGHIJ = vmulq_f32(vtGHIJ, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vfmaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vfmaq_f32(vtCDEF, vtCDEF, vpCDEF);
+ vpGHIJ = vfmaq_f32(vtGHIJ, vtGHIJ, vpGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vsCDEF, vpCDEF);
+ float32x4_t vfGHIJ = vfmaq_f32(vsGHIJ, vsGHIJ, vpGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc4 = vaddq_f32(vacc4, vf4567);
+ vacc3 = vaddq_f32(vacc3, vf89AB);
+ vacc2 = vaddq_f32(vacc2, vfCDEF);
+ vacc1 = vaddq_f32(vacc1, vfGHIJ);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc2 = vaddq_f32(vacc2, vacc3);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+ vacc0 = vaddq_f32(vacc0, vacc4);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c
new file mode 100644
index 0000000..502e81d
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c
@@ -0,0 +1,378 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
+ float32x4_t vnGHIJ = vfmaq_f32(vmagic_bias, vxGHIJ, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t veGHIJ = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnGHIJ), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+ const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
+ const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
+ const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
+ const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
+ const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
+ const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
+ const uint64x2_t vidxGHIJ = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnGHIJ), vindex_mask));
+ const uint64_t vidxGH = vgetq_lane_u64(vidxGHIJ, 0);
+ const uint64_t vidxIJ = vgetq_lane_u64(vidxGHIJ, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+ float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
+ float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
+ float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
+ float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
+ float32x2_t vlGH = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxGH]);
+ float32x2_t vlIJ = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxIJ]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+ vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
+ vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
+ const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
+ vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
+ vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
+ const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
+ vlGH = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxGH >> 32)], vlGH, 1);
+ vlIJ = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxIJ >> 32)], vlIJ, 1);
+ const float32x4_t vlGHIJ = vcombine_f32(vlGH, vlIJ);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlGHIJ), veGHIJ));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
+ float32x4_t vtGHIJ = vfmaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
+ vtGHIJ = vfmaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+ float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
+ float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
+ float32x4_t vpGHIJ = vmulq_f32(vtGHIJ, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+ vp89AB = vfmaq_f32(vt89AB, vt89AB, vp89AB);
+ vpCDEF = vfmaq_f32(vtCDEF, vtCDEF, vpCDEF);
+ vpGHIJ = vfmaq_f32(vtGHIJ, vtGHIJ, vpGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vs89AB, vp89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vsCDEF, vpCDEF);
+ float32x4_t vfGHIJ = vfmaq_f32(vsGHIJ, vsGHIJ, vpGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ vacc0 = vaddq_f32(vacc0, vfGHIJ);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c
new file mode 100644
index 0000000..cc85f20
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c
@@ -0,0 +1,214 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x4(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc = vmovq_n_f32(0.0f);
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c
new file mode 100644
index 0000000..80d4b5d
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c
@@ -0,0 +1,315 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
+ // Load 8 (2x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+
+ // Store 8 (2x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c
new file mode 100644
index 0000000..9e986ca
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c
@@ -0,0 +1,312 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
+ // Load 8 (2x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
+ const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
+ const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
+ const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
+ const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
+ const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
+ const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
+
+ float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
+ float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
+ float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
+ float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
+
+ vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
+ vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
+ const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
+ vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
+ vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
+ const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
+ float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
+
+ vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
+ vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+
+ // Store 8 (2x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = vfmaq_f32(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = vfmaq_f32(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c
new file mode 100644
index 0000000..e03f9c6
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c
@@ -0,0 +1,268 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c
new file mode 100644
index 0000000..a8faf3b
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c
@@ -0,0 +1,270 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc3(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc1 = vaddq_f32(vacc1, vf4567);
+ vacc2 = vaddq_f32(vacc2, vf89AB);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c
new file mode 100644
index 0000000..6867884
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c
@@ -0,0 +1,265 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
+ // Load 12 (3x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+
+ // Store 12 (3x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c
new file mode 100644
index 0000000..fe97342
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c
@@ -0,0 +1,284 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vfmaq_f32(vc4, vc5, vtCDEF);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc3, vpCDEF, vtCDEF);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc2, vpCDEF, vtCDEF);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc1, vpCDEF, vtCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vpCDEF, vtCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c
new file mode 100644
index 0000000..783cfca
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c
@@ -0,0 +1,288 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc4(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ float32x4_t vacc3 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vfmaq_f32(vc4, vc5, vtCDEF);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc3, vpCDEF, vtCDEF);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc2, vpCDEF, vtCDEF);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc1, vpCDEF, vtCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vpCDEF, vtCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc2 = vaddq_f32(vacc2, vacc3);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c
new file mode 100644
index 0000000..49ee72f
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c
@@ -0,0 +1,281 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
+ // Load 16 (4x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vfmaq_f32(vc4, vc5, vtCDEF);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc3, vpCDEF, vtCDEF);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc2, vpCDEF, vtCDEF);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc1, vpCDEF, vtCDEF);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vpCDEF, vtCDEF);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+
+ // Store 16 (4x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c
new file mode 100644
index 0000000..43bd94c
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c
@@ -0,0 +1,300 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e);
+ float32x4_t vnGHIJ = vfmaq_f32(vmagic_bias, vxGHIJ, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnGHIJ), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+ float32x4_t vtGHIJ = vfmaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+ vtGHIJ = vfmaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vfmaq_f32(vc4, vc5, vtCDEF);
+ float32x4_t vpGHIJ = vfmaq_f32(vc4, vc5, vtGHIJ);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc3, vpCDEF, vtCDEF);
+ vpGHIJ = vfmaq_f32(vc3, vpGHIJ, vtGHIJ);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc2, vpCDEF, vtCDEF);
+ vpGHIJ = vfmaq_f32(vc2, vpGHIJ, vtGHIJ);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc1, vpCDEF, vtCDEF);
+ vpGHIJ = vfmaq_f32(vc1, vpGHIJ, vtGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+ vtGHIJ = vmulq_f32(vtGHIJ, vsGHIJ);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vpCDEF, vtCDEF);
+ float32x4_t vfGHIJ = vfmaq_f32(vsGHIJ, vpGHIJ, vtGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ vacc0 = vaddq_f32(vacc0, vfGHIJ);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c
new file mode 100644
index 0000000..4134ebb
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c
@@ -0,0 +1,306 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc5(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ float32x4_t vacc2 = vmovq_n_f32(0.0f);
+ float32x4_t vacc3 = vmovq_n_f32(0.0f);
+ float32x4_t vacc4 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e);
+ float32x4_t vnGHIJ = vfmaq_f32(vmagic_bias, vxGHIJ, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnGHIJ), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+ float32x4_t vtGHIJ = vfmaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+ vtGHIJ = vfmaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vfmaq_f32(vc4, vc5, vtCDEF);
+ float32x4_t vpGHIJ = vfmaq_f32(vc4, vc5, vtGHIJ);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc3, vpCDEF, vtCDEF);
+ vpGHIJ = vfmaq_f32(vc3, vpGHIJ, vtGHIJ);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc2, vpCDEF, vtCDEF);
+ vpGHIJ = vfmaq_f32(vc2, vpGHIJ, vtGHIJ);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc1, vpCDEF, vtCDEF);
+ vpGHIJ = vfmaq_f32(vc1, vpGHIJ, vtGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+ vtGHIJ = vmulq_f32(vtGHIJ, vsGHIJ);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vpCDEF, vtCDEF);
+ float32x4_t vfGHIJ = vfmaq_f32(vsGHIJ, vpGHIJ, vtGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc4 = vaddq_f32(vacc4, vf4567);
+ vacc3 = vaddq_f32(vacc3, vf89AB);
+ vacc2 = vaddq_f32(vacc2, vfCDEF);
+ vacc1 = vaddq_f32(vacc1, vfGHIJ);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+ vacc2 = vaddq_f32(vacc2, vacc3);
+ vacc0 = vaddq_f32(vacc0, vacc2);
+ vacc0 = vaddq_f32(vacc0, vacc4);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c
new file mode 100644
index 0000000..73da24d
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c
@@ -0,0 +1,297 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
+ // Load 20 (5x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+ const float32x4_t vi89AB = vld1q_f32(input); input += 4;
+ const float32x4_t viCDEF = vld1q_f32(input); input += 4;
+ const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+ const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
+ const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
+ const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+ float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
+ float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e);
+ float32x4_t vnGHIJ = vfmaq_f32(vmagic_bias, vxGHIJ, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+ const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
+ const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
+ const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnGHIJ), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+ vn89AB = vsubq_f32(vn89AB, vmagic_bias);
+ vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
+ vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+ float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
+ float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
+ float32x4_t vtGHIJ = vfmaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+ vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
+ vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
+ vtGHIJ = vfmaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+ float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
+ float32x4_t vpCDEF = vfmaq_f32(vc4, vc5, vtCDEF);
+ float32x4_t vpGHIJ = vfmaq_f32(vc4, vc5, vtGHIJ);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc3, vpCDEF, vtCDEF);
+ vpGHIJ = vfmaq_f32(vc3, vpGHIJ, vtGHIJ);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc2, vpCDEF, vtCDEF);
+ vpGHIJ = vfmaq_f32(vc2, vpGHIJ, vtGHIJ);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+ vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
+ vpCDEF = vfmaq_f32(vc1, vpCDEF, vtCDEF);
+ vpGHIJ = vfmaq_f32(vc1, vpGHIJ, vtGHIJ);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+ vt89AB = vmulq_f32(vt89AB, vs89AB);
+ vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
+ vtGHIJ = vmulq_f32(vtGHIJ, vsGHIJ);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+ float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
+ float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vpCDEF, vtCDEF);
+ float32x4_t vfGHIJ = vfmaq_f32(vsGHIJ, vpGHIJ, vtGHIJ);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+ vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
+ vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
+ vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
+
+ // Store 20 (5x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+ vst1q_f32(output, vf89AB); output += 4;
+ vst1q_f32(output, vfCDEF); output += 4;
+ vst1q_f32(output, vfGHIJ); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ vacc0 = vaddq_f32(vacc0, vf89AB);
+ vacc0 = vaddq_f32(vacc0, vfCDEF);
+ vacc0 = vaddq_f32(vacc0, vfGHIJ);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c
new file mode 100644
index 0000000..58d03b6
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c
@@ -0,0 +1,176 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x4(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc = vmovq_n_f32(0.0f);
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c
new file mode 100644
index 0000000..1e1be00
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c
@@ -0,0 +1,252 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8_acc2(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ float32x4_t vacc1 = vmovq_n_f32(0.0f);
+ for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
+ // Load 8 (2x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+
+ // Store 8 (2x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ }
+ // Add up all accumulators to vacc0
+ vacc0 = vaddq_f32(vacc0, vacc1);
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c
new file mode 100644
index 0000000..f69dff6
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c
@@ -0,0 +1,249 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
+// Generator: tools/xngen
+//
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ float32x4_t vacc0 = vmovq_n_f32(0.0f);
+ for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
+ // Load 8 (2x4) inputs at a time.
+ const float32x4_t vi0123 = vld1q_f32(input); input += 4;
+ const float32x4_t vi4567 = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
+ const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
+ float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
+ const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn0123 = vsubq_f32(vn0123, vmagic_bias);
+ vn4567 = vsubq_f32(vn4567, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
+ float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
+
+ vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
+ vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
+ float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
+
+ vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
+
+ vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
+
+ vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
+ vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt0123 = vmulq_f32(vt0123, vs0123);
+ vt4567 = vmulq_f32(vt4567, vs4567);
+
+ float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
+ float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
+ vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
+
+ // Store 8 (2x4) outputs at a time.
+ vst1q_f32(output, vf0123); output += 4;
+ vst1q_f32(output, vf4567); output += 4;
+
+ // Accumulate computed exponents.
+ vacc0 = vaddq_f32(vacc0, vf0123);
+ vacc0 = vaddq_f32(vacc0, vf4567);
+ }
+
+ float32x4_t vacc = vacc0;
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
+ vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
+ vp = vfmaq_f32(vc3, vp, vt);
+ vp = vfmaq_f32(vc2, vp, vt);
+ vp = vfmaq_f32(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = vfmaq_f32(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in b/src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
new file mode 100644
index 0000000..b7a2674
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
@@ -0,0 +1,325 @@
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+$assert ELEMENTS_TILE % 4 == 0
+$assert ELEMENTS_TILE >= 4
+$SIMD_TILE = ELEMENTS_TILE // 4
+$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
+$VMULADDQ_F32 = "vfmaq_f32" if FMA else "vmlaq_f32"
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
+
+void xnn_f32_raddstoreexpminusmax_ukernel__${"neonfma" if FMA else "neon"}_lut64_p2_x${ELEMENTS_TILE}${"" if ACCUMULATORS == 1 else "_acc%d" % ACCUMULATORS}(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
+ $if FMA:
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
+ $else:
+ // Last 13 bits are zeroes
+ const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
+ const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
+
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
+
+ const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ $if ELEMENTS_TILE > 4:
+ $for K in range(ACCUMULATORS):
+ float32x4_t vacc${K} = vmovq_n_f32(0.0f);
+ for (; elements >= ${ELEMENTS_TILE} * sizeof(float); elements -= ${ELEMENTS_TILE} * sizeof(float)) {
+ // Load ${ELEMENTS_TILE} (${SIMD_TILE}x4) inputs at a time.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ const float32x4_t vi${ABC[N:N+4]} = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ const float32x4_t vx${ABC[N:N+4]} = vsubq_f32(vi${ABC[N:N+4]}, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x4_t vn${ABC[N:N+4]} = ${VMULADDQ_F32}(vmagic_bias, vx${ABC[N:N+4]}, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ $for N in range(0, ELEMENTS_TILE, 4):
+ const int32x4_t ve${ABC[N:N+4]} = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn${ABC[N:N+4]}), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ $for N in range(0, ELEMENTS_TILE, 4):
+ const uint64x2_t vidx${ABC[N:N+4]} = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn${ABC[N:N+4]}), vindex_mask));
+ const uint64_t vidx${ABC[N:N+2]} = vgetq_lane_u64(vidx${ABC[N:N+4]}, 0);
+ const uint64_t vidx${ABC[N+2:N+4]} = vgetq_lane_u64(vidx${ABC[N:N+4]}, 1);
+
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x2_t vl${ABC[N:N+2]} = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx${ABC[N:N+2]}]);
+ float32x2_t vl${ABC[N+2:N+4]} = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx${ABC[N+2:N+4]}]);
+
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vl${ABC[N:N+2]} = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx${ABC[N:N+2]} >> 32)], vl${ABC[N:N+2]}, 1);
+ vl${ABC[N+2:N+4]} = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx${ABC[N+2:N+4]} >> 32)], vl${ABC[N+2:N+4]}, 1);
+ const float32x4_t vl${ABC[N:N+4]} = vcombine_f32(vl${ABC[N:N+2]}, vl${ABC[N+2:N+4]});
+
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ const float32x4_t vs${ABC[N:N+4]} = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl${ABC[N:N+4]}), ve${ABC[N:N+4]}));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vn${ABC[N:N+4]} = vsubq_f32(vn${ABC[N:N+4]}, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x4_t vt${ABC[N:N+4]} = ${VMULADDQ_F32}(vx${ABC[N:N+4]}, vn${ABC[N:N+4]}, vminus_ln2_o64_hi);
+
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vt${ABC[N:N+4]} = ${VMULADDQ_F32}(vt${ABC[N:N+4]}, vn${ABC[N:N+4]}, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x4_t vp${ABC[N:N+4]} = vmulq_f32(vt${ABC[N:N+4]}, vc2);
+
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vp${ABC[N:N+4]} = ${VMULADDQ_F32}(vt${ABC[N:N+4]}, vt${ABC[N:N+4]}, vp${ABC[N:N+4]});
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x4_t vf${ABC[N:N+4]} = ${VMULADDQ_F32}(vs${ABC[N:N+4]}, vs${ABC[N:N+4]}, vp${ABC[N:N+4]});
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vf${ABC[N:N+4]} = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf${ABC[N:N+4]}), vcltq_f32(vx${ABC[N:N+4]}, vdenorm_cutoff)));
+
+ // Store ${ELEMENTS_TILE} (${SIMD_TILE}x4) outputs at a time.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vst1q_f32(output, vf${ABC[N:N+4]}); output += 4;
+
+ // Accumulate computed exponents.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vacc${N % ACCUMULATORS} = vaddq_f32(vacc${N % ACCUMULATORS}, vf${ABC[N:N+4]});
+ }
+ $if ACCUMULATORS > 1:
+ // Add up all accumulators to vacc0
+ $ACC_SLICE = 1
+ $while ACC_SLICE < ACCUMULATORS:
+ $for A in range(0, ACCUMULATORS, ACC_SLICE * 2):
+ $if A + ACC_SLICE < ACCUMULATORS:
+ vacc${A} = vaddq_f32(vacc${A}, vacc${A + ACC_SLICE});
+ $ACC_SLICE *= 2
+
+ float32x4_t vacc = vacc0;
+ $else:
+ float32x4_t vacc = vmovq_n_f32(0.0f);
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = ${VMULADDQ_F32}(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = ${VMULADDQ_F32}(vx, vn, vminus_ln2_o64_hi);
+ vt = ${VMULADDQ_F32}(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = ${VMULADDQ_F32}(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = ${VMULADDQ_F32}(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x * 64 / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
+ // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
+ // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
+ // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
+ // algorithm.
+ float32x4_t vn = ${VMULADDQ_F32}(vmagic_bias, vx, vlog2e_x64);
+
+ // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
+ // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
+ // e := int(n / 64). We create s in two steps:
+ // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
+ // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
+ // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
+ // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
+ // and thus the adjusted exponent is not lower than -126.
+ //
+ // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
+ const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
+
+ // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
+ const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
+ const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
+ const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
+ float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
+ float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
+ vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
+ vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
+ const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
+ // Adjust exponent of the value l fetched from the table to get the final s value.
+ const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
+
+ // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := x - n * log(2) / 64.
+ // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
+ float32x4_t vt = ${VMULADDQ_F32}(vx, vn, vminus_ln2_o64_hi);
+ vt = ${VMULADDQ_F32}(vt, vn, vminus_ln2_o64_lo);
+
+ // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
+ float32x4_t vp = vmulq_f32(vt, vc2);
+ vp = ${VMULADDQ_F32}(vt, vt, vp);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (1 + t * c2))
+ // = s * (1 + t + t * (t * c2))
+ // = s + s * (t + t * (t * c2))
+ // = s + s * p
+ float32x4_t vf = ${VMULADDQ_F32}(vs, vs, vp);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/f32-raddstoreexpminusmax/neon-p5.c.in b/src/f32-raddstoreexpminusmax/neon-p5.c.in
new file mode 100644
index 0000000..2bceff0
--- /dev/null
+++ b/src/f32-raddstoreexpminusmax/neon-p5.c.in
@@ -0,0 +1,267 @@
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+$assert ELEMENTS_TILE % 4 == 0
+$assert ELEMENTS_TILE >= 4
+$SIMD_TILE = ELEMENTS_TILE // 4
+$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
+$VMULADDQ_F32 = "vfmaq_f32" if FMA else "vmlaq_f32"
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/raddstoreexpminusmax.h>
+
+
+void xnn_f32_raddstoreexpminusmax_ukernel__${"neonfma" if FMA else "neon"}_p5_x${ELEMENTS_TILE}${"" if ACCUMULATORS == 1 else "_acc%d" % ACCUMULATORS}(
+ size_t elements,
+ const float* input,
+ float* output,
+ float* sum,
+ float max)
+{
+ assert(elements % sizeof(float) == 0);
+
+ const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
+ // The smallest x for which expf(x) is normalized.
+ const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
+ const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
+ $if FMA:
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
+ $else:
+ // Last 7 bits are zeroes
+ const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
+ const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
+
+ const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
+ const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
+ const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
+ const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
+ const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
+
+ const float32x4_t vi_max = vdupq_n_f32(max);
+
+ $if ELEMENTS_TILE > 4:
+ $for K in range(ACCUMULATORS):
+ float32x4_t vacc${K} = vmovq_n_f32(0.0f);
+ for (; elements >= ${ELEMENTS_TILE} * sizeof(float); elements -= ${ELEMENTS_TILE} * sizeof(float)) {
+ // Load ${ELEMENTS_TILE} (${SIMD_TILE}x4) inputs at a time.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ const float32x4_t vi${ABC[N:N+4]} = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ const float32x4_t vx${ABC[N:N+4]} = vsubq_f32(vi${ABC[N:N+4]}, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x4_t vn${ABC[N:N+4]} = ${VMULADDQ_F32}(vmagic_bias, vx${ABC[N:N+4]}, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ const float32x4_t vs${ABC[N:N+4]} = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn${ABC[N:N+4]}), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vn${ABC[N:N+4]} = vsubq_f32(vn${ABC[N:N+4]}, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x4_t vt${ABC[N:N+4]} = ${VMULADDQ_F32}(vx${ABC[N:N+4]}, vn${ABC[N:N+4]}, vminus_ln2_hi);
+
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vt${ABC[N:N+4]} = ${VMULADDQ_F32}(vt${ABC[N:N+4]}, vn${ABC[N:N+4]}, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x4_t vp${ABC[N:N+4]} = ${VMULADDQ_F32}(vc4, vc5, vt${ABC[N:N+4]});
+
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vp${ABC[N:N+4]} = ${VMULADDQ_F32}(vc3, vp${ABC[N:N+4]}, vt${ABC[N:N+4]});
+
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vp${ABC[N:N+4]} = ${VMULADDQ_F32}(vc2, vp${ABC[N:N+4]}, vt${ABC[N:N+4]});
+
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vp${ABC[N:N+4]} = ${VMULADDQ_F32}(vc1, vp${ABC[N:N+4]}, vt${ABC[N:N+4]});
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vt${ABC[N:N+4]} = vmulq_f32(vt${ABC[N:N+4]}, vs${ABC[N:N+4]});
+
+ $for N in range(0, ELEMENTS_TILE, 4):
+ float32x4_t vf${ABC[N:N+4]} = ${VMULADDQ_F32}(vs${ABC[N:N+4]}, vp${ABC[N:N+4]}, vt${ABC[N:N+4]});
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vf${ABC[N:N+4]} = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf${ABC[N:N+4]}), vcltq_f32(vx${ABC[N:N+4]}, vdenorm_cutoff)));
+
+ // Store ${ELEMENTS_TILE} (${SIMD_TILE}x4) outputs at a time.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vst1q_f32(output, vf${ABC[N:N+4]}); output += 4;
+
+ // Accumulate computed exponents.
+ $for N in range(0, ELEMENTS_TILE, 4):
+ vacc${N % ACCUMULATORS} = vaddq_f32(vacc${N % ACCUMULATORS}, vf${ABC[N:N+4]});
+ }
+ $if ACCUMULATORS > 1:
+ // Add up all accumulators to vacc0
+ $ACC_SLICE = 1
+ $while ACC_SLICE < ACCUMULATORS:
+ $for A in range(0, ACCUMULATORS, ACC_SLICE * 2):
+ $if A + ACC_SLICE < ACCUMULATORS:
+ vacc${A} = vaddq_f32(vacc${A}, vacc${A + ACC_SLICE});
+ $ACC_SLICE *= 2
+
+ float32x4_t vacc = vacc0;
+ $else:
+ float32x4_t vacc = vmovq_n_f32(0.0f);
+ for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = ${VMULADDQ_F32}(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = ${VMULADDQ_F32}(vx, vn, vminus_ln2_hi);
+ vt = ${VMULADDQ_F32}(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = ${VMULADDQ_F32}(vc4, vc5, vt);
+ vp = ${VMULADDQ_F32}(vc3, vp, vt);
+ vp = ${VMULADDQ_F32}(vc2, vp, vt);
+ vp = ${VMULADDQ_F32}(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = ${VMULADDQ_F32}(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ // Store 4 outputs at a time.
+ vst1q_f32(output, vf); output += 4;
+
+ // Accumulate computed exponents.
+ vacc = vaddq_f32(vacc, vf);
+ }
+#if XNN_ARCH_ARM64
+ float vacc_lo = vaddvq_f32(vacc);
+#else
+ float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
+#endif
+ if (elements != 0) {
+ assert(elements >= 1 * sizeof(float));
+ assert(elements <= 3 * sizeof(float));
+ // Load 4 inputs at a time.
+ const float32x4_t vi = vld1q_f32(input); input += 4;
+
+ // Subtract maximum input x := i - i_max. This implies x <= 0.
+ const float32x4_t vx = vsubq_f32(vi, vi_max);
+
+ // Compute reduced argument n := round(x / log(2)).
+ // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
+ // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
+ // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
+ // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
+ // of the algorithm.
+ float32x4_t vn = ${VMULADDQ_F32}(vmagic_bias, vx, vlog2e);
+
+ // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
+ // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
+ const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
+
+ // Subtract the large number back to get final n := round(x / log(2)).
+ vn = vsubq_f32(vn, vmagic_bias);
+
+ // Compute reduced argument t := z - n * log(2).
+ // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
+ float32x4_t vt = ${VMULADDQ_F32}(vx, vn, vminus_ln2_hi);
+ vt = ${VMULADDQ_F32}(vt, vn, vminus_ln2_lo);
+
+ // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
+ float32x4_t vp = ${VMULADDQ_F32}(vc4, vc5, vt);
+ vp = ${VMULADDQ_F32}(vc3, vp, vt);
+ vp = ${VMULADDQ_F32}(vc2, vp, vt);
+ vp = ${VMULADDQ_F32}(vc1, vp, vt);
+
+ // Reconstruct the final f value:
+ // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
+ // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
+ // = s + (t * s) * p
+ vt = vmulq_f32(vt, vs);
+ float32x4_t vf = ${VMULADDQ_F32}(vs, vp, vt);
+
+ // For inputs below denormal cutoff, replace output with +0.0f.
+ // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
+ vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
+
+ float32x2_t vf_lo = vget_low_f32(vf);
+ if (elements & (2 * sizeof(float))) {
+ // Store 2 outputs at a time.
+ vst1_f32(output, vf_lo); output += 2;
+
+ // Accumulate 2 computed exponents.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vaddv_f32(vf_lo);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vf_lo);
+ #endif
+
+ vf_lo = vget_high_f32(vf);
+ }
+ if (elements & (1 * sizeof(float))) {
+ // Store 1 output at a time.
+ vst1_lane_f32(output, vf_lo, 0);
+
+ // Accumulate 1 computed exponent.
+ #if XNN_ARCH_ARM64
+ vacc_lo += vget_lane_f32(vf_lo, 0);
+ #else
+ vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
+ #endif
+ }
+ }
+ // Reduce 4 elements in the SIMD register
+#if XNN_ARCH_ARM64
+ *sum = vacc_lo;
+#else
+ vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
+#endif
+}
diff --git a/src/xnnpack/raddstoreexpminusmax.h b/src/xnnpack/raddstoreexpminusmax.h
index 5b2c36b..a46c507 100644
--- a/src/xnnpack/raddstoreexpminusmax.h
+++ b/src/xnnpack/raddstoreexpminusmax.h
@@ -23,6 +23,58 @@
float* sum, \
float max);
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x4)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc3)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc4)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc5)
+
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x4)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc3)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc4)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc5)
+
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x4)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc3)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc4)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc5)
+
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x4)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc3)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc4)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc2)
+DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc5)
+
DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__sse2_p5_x4)
DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__sse2_p5_x8)
DECLARE_F32_RADDSTOREEXPMINUSMAX_UKERNEL_FUNCTION(xnn_f32_raddstoreexpminusmax_ukernel__sse2_p5_x8_acc2)
diff --git a/test/f32-raddstoreexpminusmax.cc b/test/f32-raddstoreexpminusmax.cc
index 4d4f3dd..57b2b6f 100644
--- a/test/f32-raddstoreexpminusmax.cc
+++ b/test/f32-raddstoreexpminusmax.cc
@@ -17,6 +17,1782 @@
#include "raddstoreexpminusmax-microkernel-tester.h"
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X4, elements_eq_4) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(4)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x4);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X4, elements_div_4) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 8; elements < 40; elements += 4) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X4, elements_lt_4) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 4; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X4, elements_gt_4) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 5; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x4);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X8, elements_eq_8) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(8)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X8, elements_div_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 16; elements < 80; elements += 8) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X8, elements_lt_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X8, elements_gt_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 9; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X8_ACC2, elements_eq_8) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(8)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X8_ACC2, elements_div_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 16; elements < 80; elements += 8) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X8_ACC2, elements_lt_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X8_ACC2, elements_gt_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 9; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12_ACC2, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12_ACC2, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12_ACC2, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12_ACC2, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12_ACC3, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc3);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12_ACC3, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc3);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12_ACC3, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc3);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X12_ACC3, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc3);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16_ACC2, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16_ACC2, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16_ACC2, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16_ACC2, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16_ACC4, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc4);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16_ACC4, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16_ACC4, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X16_ACC4, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc4);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20_ACC2, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20_ACC2, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20_ACC2, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20_ACC2, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20_ACC5, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc5);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20_ACC5, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc5);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20_ACC5, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc5);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_P5_X20_ACC5, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc5);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X4, elements_eq_4) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(4)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x4);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X4, elements_div_4) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 8; elements < 40; elements += 4) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X4, elements_lt_4) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 4; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X4, elements_gt_4) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 5; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x4);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X8, elements_eq_8) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(8)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X8, elements_div_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 16; elements < 80; elements += 8) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X8, elements_lt_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X8, elements_gt_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 9; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X8_ACC2, elements_eq_8) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(8)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X8_ACC2, elements_div_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 16; elements < 80; elements += 8) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X8_ACC2, elements_lt_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X8_ACC2, elements_gt_8) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 9; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12_ACC2, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12_ACC2, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12_ACC2, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12_ACC2, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12_ACC3, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc3);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12_ACC3, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc3);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12_ACC3, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc3);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X12_ACC3, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc3);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16_ACC2, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16_ACC2, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16_ACC2, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16_ACC2, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16_ACC4, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc4);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16_ACC4, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16_ACC4, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X16_ACC4, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc4);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20_ACC2, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20_ACC2, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20_ACC2, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20_ACC2, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20_ACC5, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc5);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20_ACC5, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc5);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20_ACC5, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc5);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEON_LUT64_P2_X20_ACC5, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc5);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X4, elements_eq_4) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(4)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x4);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X4, elements_div_4) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 8; elements < 40; elements += 4) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X4, elements_lt_4) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 4; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X4, elements_gt_4) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 5; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x4);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X8, elements_eq_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(8)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X8, elements_div_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 16; elements < 80; elements += 8) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X8, elements_lt_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X8, elements_gt_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 9; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X8_ACC2, elements_eq_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(8)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X8_ACC2, elements_div_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 16; elements < 80; elements += 8) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X8_ACC2, elements_lt_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X8_ACC2, elements_gt_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 9; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12_ACC2, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12_ACC2, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12_ACC2, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12_ACC2, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12_ACC3, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc3);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12_ACC3, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc3);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12_ACC3, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc3);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X12_ACC3, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc3);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16_ACC2, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16_ACC2, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16_ACC2, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16_ACC2, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16_ACC4, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc4);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16_ACC4, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16_ACC4, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X16_ACC4, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc4);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20_ACC2, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20_ACC2, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20_ACC2, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20_ACC2, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20_ACC5, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc5);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20_ACC5, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc5);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20_ACC5, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc5);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_P5_X20_ACC5, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc5);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X4, elements_eq_4) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(4)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x4);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X4, elements_div_4) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 8; elements < 40; elements += 4) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X4, elements_lt_4) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 4; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X4, elements_gt_4) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 5; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x4);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X8, elements_eq_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(8)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X8, elements_div_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 16; elements < 80; elements += 8) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X8, elements_lt_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X8, elements_gt_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 9; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X8_ACC2, elements_eq_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(8)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X8_ACC2, elements_div_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 16; elements < 80; elements += 8) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X8_ACC2, elements_lt_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 8; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X8_ACC2, elements_gt_8) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 9; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12_ACC2, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12_ACC2, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12_ACC2, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12_ACC2, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12_ACC3, elements_eq_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(12)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc3);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12_ACC3, elements_div_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 24; elements < 120; elements += 12) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc3);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12_ACC3, elements_lt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 12; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc3);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X12_ACC3, elements_gt_12) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 13; elements < 24; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc3);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16_ACC2, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16_ACC2, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16_ACC2, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16_ACC2, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16_ACC4, elements_eq_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(16)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc4);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16_ACC4, elements_div_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 32; elements < 160; elements += 16) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16_ACC4, elements_lt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 16; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc4);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X16_ACC4, elements_gt_16) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 17; elements < 32; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc4);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20_ACC2, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc2);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20_ACC2, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20_ACC2, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc2);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20_ACC2, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc2);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20_ACC5, elements_eq_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(20)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc5);
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20_ACC5, elements_div_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 40; elements < 200; elements += 20) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc5);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20_ACC5, elements_lt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 1; elements < 20; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc5);
+ }
+ }
+
+ TEST(F32_RADDSTOREEXPMINUSMAX__NEONFMA_LUT64_P2_X20_ACC5, elements_gt_20) {
+ TEST_REQUIRES_ARM_NEON_FMA;
+ for (size_t elements = 21; elements < 40; elements++) {
+ RAddStoreExpMinusMaxMicrokernelTester()
+ .elements(elements)
+ .Test(xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc5);
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
#if XNN_ARCH_X86 || XNN_ARCH_X86_64
TEST(F32_RADDSTOREEXPMINUSMAX__SSE2_P5_X4, elements_eq_4) {
TEST_REQUIRES_X86_SSE2;
diff --git a/test/f32-raddstoreexpminusmax.yaml b/test/f32-raddstoreexpminusmax.yaml
index 5d67686..97138e9 100644
--- a/test/f32-raddstoreexpminusmax.yaml
+++ b/test/f32-raddstoreexpminusmax.yaml
@@ -2,6 +2,54 @@
#
# This source code is licensed under the BSD-style license found in the
# LICENSE file in the root directory of this source tree.
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x4
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x8_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc3
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x16_acc4
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x20_acc5
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x4
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x12_acc3
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc4
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x20_acc5
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x4
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x8_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x12_acc3
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc4
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x20_acc5
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x4
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x12_acc3
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16_acc4
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc2
+- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc5
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_p5_x4
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_p5_x8
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_p5_x8_acc2