commit 947c29858f1cd91de096b38812807e0495f2f51c
author Marat Dukhan <maratek@google.com> Tue Jul 20 13:11:29 2021 -0700
committer XNNPACK Team <xnnpack-github-robot@google.com> Tue Jul 20 13:12:12 2021 -0700
tree 42680e67c7fa46daebf0bdd25001c1256bbdfbc2
parent c0612f04a32b0e877476f0da74ad291255c5405e

Simplify requantization in SSE2/SSE4/AVX/XOP/AVX2 QS8 VADD[C] microkernels

PiperOrigin-RevId: 385854982

src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c

diff --git a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
index 54dab5a..639b820 100644
--- a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
@@ -23,8 +23,7 @@
     const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
 {
   const __m256i va_multiplier = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.a_multiplier));
-  const __m256i vremainder_mask = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.remainder_mask));
-  const __m256i vremainder_threshold = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.remainder_threshold));
+  const __m256i vrounding = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.rounding));
   const __m128i vshift = _mm_cvtsi32_si128((int) params->sse2.shift);
   const __m256i voutput_zero_point = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.output_zero_point));
   const __m256i voutput_min = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.output_min));
@@ -43,13 +42,16 @@
     __m256i vacc89ABCDEF = _mm256_add_epi32(vbias, _mm256_mullo_epi32(va89ABCDEF, va_multiplier));
     __m256i vaccGHIJKLMN = _mm256_add_epi32(vbias, _mm256_mullo_epi32(vaGHIJKLMN, va_multiplier));
 
-    const __m256i vrem01234567 = _mm256_add_epi32(_mm256_and_si256(vacc01234567, vremainder_mask), _mm256_srai_epi32(vacc01234567, 31));
-    const __m256i vrem89ABCDEF = _mm256_add_epi32(_mm256_and_si256(vacc89ABCDEF, vremainder_mask), _mm256_srai_epi32(vacc89ABCDEF, 31));
-    const __m256i vremGHIJKLMN = _mm256_add_epi32(_mm256_and_si256(vaccGHIJKLMN, vremainder_mask), _mm256_srai_epi32(vaccGHIJKLMN, 31));
+    const __m256i vadj01234567 = _mm256_srai_epi32(vacc01234567, 31);
+    vacc01234567 = _mm256_add_epi32(vacc01234567, vrounding);
+    const __m256i vadj89ABCDEF = _mm256_srai_epi32(vacc89ABCDEF, 31);
+    vacc89ABCDEF = _mm256_add_epi32(vacc89ABCDEF, vrounding);
+    const __m256i vadjGHIJKLMN = _mm256_srai_epi32(vaccGHIJKLMN, 31);
+    vaccGHIJKLMN = _mm256_add_epi32(vaccGHIJKLMN, vrounding);
 
-    vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem01234567, vremainder_threshold));
-    vacc89ABCDEF = _mm256_sub_epi32(_mm256_sra_epi32(vacc89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89ABCDEF, vremainder_threshold));
-    vaccGHIJKLMN = _mm256_sub_epi32(_mm256_sra_epi32(vaccGHIJKLMN, vshift), _mm256_cmpgt_epi32(vremGHIJKLMN, vremainder_threshold));
+    vacc01234567 = _mm256_sra_epi32(_mm256_add_epi32(vacc01234567, vadj01234567), vshift);
+    vacc89ABCDEF = _mm256_sra_epi32(_mm256_add_epi32(vacc89ABCDEF, vadj89ABCDEF), vshift);
+    vaccGHIJKLMN = _mm256_sra_epi32(_mm256_add_epi32(vaccGHIJKLMN, vadjGHIJKLMN), vshift);
 
     __m256i vout012389AB4567CDEF = _mm256_adds_epi16(_mm256_packs_epi32(vacc01234567, vacc89ABCDEF), voutput_zero_point);
     __m128i voutGHIJKLMN = _mm_adds_epi16(_mm_packs_epi32(_mm256_castsi256_si128(vaccGHIJKLMN), _mm256_extracti128_si256(vaccGHIJKLMN, 1)), _mm256_castsi256_si128(voutput_zero_point));
@@ -71,9 +73,9 @@
 
       __m256i vacc01234567 = _mm256_add_epi32(vbias, _mm256_mullo_epi32(va01234567, va_multiplier));
 
-      const __m256i vrem01234567 = _mm256_add_epi32(_mm256_and_si256(vacc01234567, vremainder_mask), _mm256_srai_epi32(vacc01234567, 31));
-
-      vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem01234567, vremainder_threshold));
+      const __m256i vadj01234567 = _mm256_srai_epi32(vacc01234567, 31);
+      vacc01234567 = _mm256_add_epi32(vacc01234567, vrounding);
+      vacc01234567 = _mm256_sra_epi32(_mm256_add_epi32(vacc01234567, vadj01234567), vshift);
 
       __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(_mm256_castsi256_si128(vacc01234567), _mm256_extracti128_si256(vacc01234567, 1)), _mm256_castsi256_si128(voutput_zero_point));
       vout01234567 = _mm_min_epi16(_mm_max_epi16(vout01234567, _mm256_castsi256_si128(voutput_min)), _mm256_castsi256_si128(voutput_max));