| # Copyright 2020 Google LLC |
| # |
| # This source code is licensed under the BSD-style license found in the |
| # LICENSE file in the root directory of this source tree. |
| # |
| # Description: |
| # XNNPACK - optimized floating-point neural network operators library |
| |
| load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility") |
| |
| licenses(["notice"]) |
| |
| exports_files(["LICENSE"]) |
| |
| OPERATOR_BENCHMARK_DEPS = [ |
| ":XNNPACK", |
| ":bench_utils", |
| "@cpuinfo", |
| "@FP16", |
| "@pthreadpool", |
| ] |
| |
| MICROKERNEL_BENCHMARK_DEPS = [ |
| ":bench_microkernels", |
| ":bench_utils", |
| ":enable_assembly", |
| "@cpuinfo", |
| "@FP16", |
| "@pthreadpool", |
| ] |
| |
| ACCURACY_EVAL_DEPS = [ |
| ":XNNPACK", |
| ":bench_microkernels", |
| "@FP16", |
| "@pthreadpool", |
| ] |
| |
| MICROKERNEL_TEST_DEPS = [ |
| ":test_microkernels", |
| ":enable_assembly", |
| "@cpuinfo", |
| "@FP16", |
| "@pthreadpool", |
| ] |
| |
| OPERATOR_TEST_DEPS = [ |
| ":XNNPACK_test_mode", |
| "@pthreadpool", |
| "@FP16", |
| ] |
| |
| OPERATOR_SRCS = [ |
| "src/operators/argmax-pooling-nhwc.c", |
| "src/operators/average-pooling-nhwc.c", |
| "src/operators/binary-elementwise-nd.c", |
| "src/operators/channel-shuffle-nc.c", |
| "src/operators/constant-pad-nd.c", |
| "src/operators/convolution-nchw.c", |
| "src/operators/convolution-nhwc.c", |
| "src/operators/deconvolution-nhwc.c", |
| "src/operators/depth-to-space-nchw2nhwc.c", |
| "src/operators/depth-to-space-nhwc.c", |
| "src/operators/fully-connected-nc.c", |
| "src/operators/global-average-pooling-ncw.c", |
| "src/operators/global-average-pooling-nwc.c", |
| "src/operators/lut-elementwise-nc.c", |
| "src/operators/max-pooling-nhwc.c", |
| "src/operators/prelu-nc.c", |
| "src/operators/resize-bilinear-nchw.c", |
| "src/operators/resize-bilinear-nhwc.c", |
| "src/operators/softmax-nc.c", |
| "src/operators/unary-elementwise-nc.c", |
| "src/operators/unpooling-nhwc.c", |
| ] |
| |
| SUBGRAPH_SRCS = [ |
| "src/subgraph/abs.c", |
| "src/subgraph/add2.c", |
| "src/subgraph/argmax-pooling-2d.c", |
| "src/subgraph/average-pooling-2d.c", |
| "src/subgraph/bankers-rounding.c", |
| "src/subgraph/ceiling.c", |
| "src/subgraph/clamp.c", |
| "src/subgraph/convert.c", |
| "src/subgraph/convolution-2d.c", |
| "src/subgraph/deconvolution-2d.c", |
| "src/subgraph/depth-to-space.c", |
| "src/subgraph/depthwise-convolution-2d.c", |
| "src/subgraph/divide.c", |
| "src/subgraph/elu.c", |
| "src/subgraph/floor.c", |
| "src/subgraph/fully-connected.c", |
| "src/subgraph/global-average-pooling-2d.c", |
| "src/subgraph/hardswish.c", |
| "src/subgraph/leaky-relu.c", |
| "src/subgraph/max-pooling-2d.c", |
| "src/subgraph/maximum2.c", |
| "src/subgraph/minimum2.c", |
| "src/subgraph/multiply2.c", |
| "src/subgraph/negate.c", |
| "src/subgraph/prelu.c", |
| "src/subgraph/sigmoid.c", |
| "src/subgraph/softmax.c", |
| "src/subgraph/square-root.c", |
| "src/subgraph/square.c", |
| "src/subgraph/squared-difference.c", |
| "src/subgraph/static-constant-pad.c", |
| "src/subgraph/static-reshape.c", |
| "src/subgraph/static-resize-bilinear-2d.c", |
| "src/subgraph/subtract.c", |
| "src/subgraph/unpooling-2d.c", |
| ] |
| |
| TABLE_SRCS = [ |
| "src/tables/exp2-k-over-64.c", |
| "src/tables/exp2-k-over-2048.c", |
| "src/tables/exp2minus-k-over-4.c", |
| "src/tables/exp2minus-k-over-8.c", |
| "src/tables/exp2minus-k-over-16.c", |
| "src/tables/exp2minus-k-over-64.c", |
| "src/tables/exp2minus-k-over-2048.c", |
| ] |
| |
| PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS = [ |
| "src/params-init.c", |
| "src/u8-lut32norm/scalar.c", |
| "src/x8-lut/gen/lut-scalar-x4.c", |
| "src/x32-depthtospace2d-chw2hwc/scalar.c", |
| "src/xx-copy/memcpy.c", |
| ] |
| |
| PROD_SCALAR_AARCH32_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| "src/f32-argmaxpool/4x-scalar-c1.c", |
| "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| "src/f32-argmaxpool/9x-scalar-c1.c", |
| "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c", |
| "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| "src/f32-gavgpool-cw/scalar-x1.c", |
| "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| "src/f32-gemm/gen/1x4-relu-scalar.c", |
| "src/f32-gemm/gen/1x4-scalar.c", |
| "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| "src/f32-gemm/gen/4x2-scalar.c", |
| "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| "src/f32-gemm/gen/4x4-relu-scalar.c", |
| "src/f32-gemm/gen/4x4-scalar.c", |
| "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| "src/f32-ibilinear/gen/scalar-c2.c", |
| "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| "src/f32-igemm/gen/1x4-relu-scalar.c", |
| "src/f32-igemm/gen/1x4-scalar.c", |
| "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| "src/f32-igemm/gen/4x2-scalar.c", |
| "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| "src/f32-igemm/gen/4x4-relu-scalar.c", |
| "src/f32-igemm/gen/4x4-scalar.c", |
| "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| "src/f32-prelu/gen/scalar-2x4.c", |
| "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c", |
| "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c", |
| "src/f32-rmax/scalar.c", |
| "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c", |
| "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| "src/f32-vunary/gen/vabs-scalar-x4.c", |
| "src/f32-vunary/gen/vneg-scalar-x4.c", |
| "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c", |
| "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c", |
| "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c", |
| "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c", |
| "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-vadd/gen/minmax-scalar-x1.c", |
| "src/qs8-vaddc/gen/minmax-scalar-x1.c", |
| "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c", |
| "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c", |
| "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c", |
| "src/qu8-gavgpool/7x-minmax-scalar-c1.c", |
| "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-vadd/gen/minmax-scalar-x1.c", |
| "src/qu8-vaddc/gen/minmax-scalar-x1.c", |
| "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| "src/s8-ibilinear/gen/scalar-c1.c", |
| "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| "src/s8-vclamp/scalar-x4.c", |
| "src/u8-ibilinear/gen/scalar-c1.c", |
| "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| "src/u8-rmax/scalar.c", |
| "src/u8-vclamp/scalar-x4.c", |
| "src/x8-zip/x2-scalar.c", |
| "src/x8-zip/x3-scalar.c", |
| "src/x8-zip/x4-scalar.c", |
| "src/x8-zip/xm-scalar.c", |
| "src/x32-packx/x2-scalar.c", |
| "src/x32-packx/x3-scalar.c", |
| "src/x32-packx/x4-scalar.c", |
| "src/x32-unpool/scalar.c", |
| "src/x32-zip/x2-scalar.c", |
| "src/x32-zip/x3-scalar.c", |
| "src/x32-zip/x4-scalar.c", |
| "src/x32-zip/xm-scalar.c", |
| "src/xx-fill/scalar-x16.c", |
| "src/xx-pad/scalar.c", |
| ] |
| |
| PROD_SCALAR_WASM_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-scalar-x1.c", |
| "src/f32-argmaxpool/4x-scalar-c1.c", |
| "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| "src/f32-argmaxpool/9x-scalar-c1.c", |
| "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c", |
| "src/f32-gavgpool-cw/scalar-x1.c", |
| "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| "src/f32-gemm/gen/2x4-minmax-scalar.c", |
| "src/f32-gemm/gen/2x4-relu-scalar.c", |
| "src/f32-gemm/gen/2x4-scalar.c", |
| "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| "src/f32-ibilinear/gen/scalar-c2.c", |
| "src/f32-igemm/gen/2x4-minmax-scalar.c", |
| "src/f32-igemm/gen/2x4-relu-scalar.c", |
| "src/f32-igemm/gen/2x4-scalar.c", |
| "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| "src/f32-prelu/gen/scalar-2x4.c", |
| "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c", |
| "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c", |
| "src/f32-rmax/scalar.c", |
| "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c", |
| "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c", |
| "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c", |
| "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c", |
| "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c", |
| "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| "src/f32-vunary/gen/vabs-scalar-x4.c", |
| "src/f32-vunary/gen/vneg-scalar-x4.c", |
| "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| "src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c", |
| "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c", |
| "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| "src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c", |
| "src/qu8-gavgpool/7x-minmax-scalar-c1.c", |
| "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| "src/s8-ibilinear/gen/scalar-c1.c", |
| "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| "src/s8-vclamp/scalar-x4.c", |
| "src/u8-ibilinear/gen/scalar-c1.c", |
| "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| "src/u8-rmax/scalar.c", |
| "src/u8-vclamp/scalar-x4.c", |
| "src/x8-zip/x2-scalar.c", |
| "src/x8-zip/x3-scalar.c", |
| "src/x8-zip/x4-scalar.c", |
| "src/x8-zip/xm-scalar.c", |
| "src/x32-packx/x2-scalar.c", |
| "src/x32-packx/x3-scalar.c", |
| "src/x32-packx/x4-scalar.c", |
| "src/x32-unpool/scalar.c", |
| "src/x32-zip/x2-scalar.c", |
| "src/x32-zip/x3-scalar.c", |
| "src/x32-zip/x4-scalar.c", |
| "src/x32-zip/xm-scalar.c", |
| "src/xx-fill/scalar-x16.c", |
| "src/xx-pad/scalar.c", |
| ] |
| |
| ALL_SCALAR_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-scalar-x1.c", |
| "src/f16-f32-vcvt/gen/vcvt-scalar-x2.c", |
| "src/f16-f32-vcvt/gen/vcvt-scalar-x3.c", |
| "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| "src/f32-argmaxpool/4x-scalar-c1.c", |
| "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| "src/f32-argmaxpool/9x-scalar-c1.c", |
| "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x3-minmax-scalar.c", |
| "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x3-scalar.c", |
| "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x4-minmax-scalar.c", |
| "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x4-scalar.c", |
| "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x9-minmax-scalar.c", |
| "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x9-scalar.c", |
| "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x25-minmax-scalar.c", |
| "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| "src/f32-dwconv/gen/up1x25-scalar.c", |
| "src/f32-dwconv/gen/up2x3-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up2x3-minmax-scalar.c", |
| "src/f32-dwconv/gen/up2x3-scalar-acc2.c", |
| "src/f32-dwconv/gen/up2x3-scalar.c", |
| "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up2x4-minmax-scalar.c", |
| "src/f32-dwconv/gen/up2x4-scalar-acc2.c", |
| "src/f32-dwconv/gen/up2x4-scalar.c", |
| "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up2x9-minmax-scalar.c", |
| "src/f32-dwconv/gen/up2x9-scalar-acc2.c", |
| "src/f32-dwconv/gen/up2x9-scalar.c", |
| "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c", |
| "src/f32-dwconv/gen/up2x25-minmax-scalar.c", |
| "src/f32-dwconv/gen/up2x25-scalar-acc2.c", |
| "src/f32-dwconv/gen/up2x25-scalar.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c", |
| "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x1.c", |
| "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x2.c", |
| "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x3.c", |
| "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c", |
| "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x1.c", |
| "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x3.c", |
| "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x4.c", |
| "src/f32-gavgpool-cw/scalar-x1.c", |
| "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c", |
| "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c", |
| "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c", |
| "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| "src/f32-gemm/gen/1x4-relu-scalar.c", |
| "src/f32-gemm/gen/1x4-scalar.c", |
| "src/f32-gemm/gen/2x4-minmax-scalar.c", |
| "src/f32-gemm/gen/2x4-relu-scalar.c", |
| "src/f32-gemm/gen/2x4-scalar.c", |
| "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| "src/f32-gemm/gen/4x2-relu-scalar.c", |
| "src/f32-gemm/gen/4x2-scalar.c", |
| "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| "src/f32-gemm/gen/4x4-relu-scalar.c", |
| "src/f32-gemm/gen/4x4-scalar.c", |
| "src/f32-ibilinear-chw/gen/scalar-p1.c", |
| "src/f32-ibilinear-chw/gen/scalar-p2.c", |
| "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| "src/f32-ibilinear/gen/scalar-c1.c", |
| "src/f32-ibilinear/gen/scalar-c2.c", |
| "src/f32-ibilinear/gen/scalar-c4.c", |
| "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| "src/f32-igemm/gen/1x4-relu-scalar.c", |
| "src/f32-igemm/gen/1x4-scalar.c", |
| "src/f32-igemm/gen/2x4-minmax-scalar.c", |
| "src/f32-igemm/gen/2x4-relu-scalar.c", |
| "src/f32-igemm/gen/2x4-scalar.c", |
| "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| "src/f32-igemm/gen/4x2-relu-scalar.c", |
| "src/f32-igemm/gen/4x2-scalar.c", |
| "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| "src/f32-igemm/gen/4x4-relu-scalar.c", |
| "src/f32-igemm/gen/4x4-scalar.c", |
| "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| "src/f32-ppmm/gen/2x4-minmax-scalar.c", |
| "src/f32-ppmm/gen/3x3-minmax-scalar.c", |
| "src/f32-ppmm/gen/4x2-minmax-scalar.c", |
| "src/f32-ppmm/gen/4x4-minmax-scalar.c", |
| "src/f32-prelu/gen/scalar-2x1.c", |
| "src/f32-prelu/gen/scalar-2x4.c", |
| "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x1.c", |
| "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x2.c", |
| "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x3.c", |
| "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x4.c", |
| "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c", |
| "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x2.c", |
| "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x3.c", |
| "src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c", |
| "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x1.c", |
| "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x2.c", |
| "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x3.c", |
| "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x4.c", |
| "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c", |
| "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x2.c", |
| "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x3.c", |
| "src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c", |
| "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c", |
| "src/f32-rmax/scalar.c", |
| "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c", |
| "src/f32-spmm/gen/1x1-minmax-scalar.c", |
| "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c", |
| "src/f32-spmm/gen/2x1-minmax-scalar.c", |
| "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c", |
| "src/f32-spmm/gen/4x1-minmax-scalar.c", |
| "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c", |
| "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vadd-relu-scalar-x1.c", |
| "src/f32-vbinary/gen/vadd-relu-scalar-x2.c", |
| "src/f32-vbinary/gen/vadd-relu-scalar-x4.c", |
| "src/f32-vbinary/gen/vadd-relu-scalar-x8.c", |
| "src/f32-vbinary/gen/vadd-scalar-x1.c", |
| "src/f32-vbinary/gen/vadd-scalar-x2.c", |
| "src/f32-vbinary/gen/vadd-scalar-x4.c", |
| "src/f32-vbinary/gen/vadd-scalar-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c", |
| "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c", |
| "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c", |
| "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c", |
| "src/f32-vbinary/gen/vaddc-scalar-x1.c", |
| "src/f32-vbinary/gen/vaddc-scalar-x2.c", |
| "src/f32-vbinary/gen/vaddc-scalar-x4.c", |
| "src/f32-vbinary/gen/vaddc-scalar-x8.c", |
| "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c", |
| "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c", |
| "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c", |
| "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c", |
| "src/f32-vbinary/gen/vdiv-scalar-x1.c", |
| "src/f32-vbinary/gen/vdiv-scalar-x2.c", |
| "src/f32-vbinary/gen/vdiv-scalar-x4.c", |
| "src/f32-vbinary/gen/vdiv-scalar-x8.c", |
| "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c", |
| "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c", |
| "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c", |
| "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c", |
| "src/f32-vbinary/gen/vdivc-scalar-x1.c", |
| "src/f32-vbinary/gen/vdivc-scalar-x2.c", |
| "src/f32-vbinary/gen/vdivc-scalar-x4.c", |
| "src/f32-vbinary/gen/vdivc-scalar-x8.c", |
| "src/f32-vbinary/gen/vmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vmaxc-scalar-x1.c", |
| "src/f32-vbinary/gen/vmaxc-scalar-x2.c", |
| "src/f32-vbinary/gen/vmaxc-scalar-x4.c", |
| "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| "src/f32-vbinary/gen/vmin-scalar-x1.c", |
| "src/f32-vbinary/gen/vmin-scalar-x2.c", |
| "src/f32-vbinary/gen/vmin-scalar-x4.c", |
| "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| "src/f32-vbinary/gen/vminc-scalar-x1.c", |
| "src/f32-vbinary/gen/vminc-scalar-x2.c", |
| "src/f32-vbinary/gen/vminc-scalar-x4.c", |
| "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vmul-relu-scalar-x1.c", |
| "src/f32-vbinary/gen/vmul-relu-scalar-x2.c", |
| "src/f32-vbinary/gen/vmul-relu-scalar-x4.c", |
| "src/f32-vbinary/gen/vmul-relu-scalar-x8.c", |
| "src/f32-vbinary/gen/vmul-scalar-x1.c", |
| "src/f32-vbinary/gen/vmul-scalar-x2.c", |
| "src/f32-vbinary/gen/vmul-scalar-x4.c", |
| "src/f32-vbinary/gen/vmul-scalar-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c", |
| "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c", |
| "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c", |
| "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c", |
| "src/f32-vbinary/gen/vmulc-scalar-x1.c", |
| "src/f32-vbinary/gen/vmulc-scalar-x2.c", |
| "src/f32-vbinary/gen/vmulc-scalar-x4.c", |
| "src/f32-vbinary/gen/vmulc-scalar-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c", |
| "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c", |
| "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c", |
| "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c", |
| "src/f32-vbinary/gen/vrdivc-scalar-x1.c", |
| "src/f32-vbinary/gen/vrdivc-scalar-x2.c", |
| "src/f32-vbinary/gen/vrdivc-scalar-x4.c", |
| "src/f32-vbinary/gen/vrdivc-scalar-x8.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c", |
| "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c", |
| "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c", |
| "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c", |
| "src/f32-vbinary/gen/vrsubc-scalar-x1.c", |
| "src/f32-vbinary/gen/vrsubc-scalar-x2.c", |
| "src/f32-vbinary/gen/vrsubc-scalar-x4.c", |
| "src/f32-vbinary/gen/vrsubc-scalar-x8.c", |
| "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c", |
| "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c", |
| "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c", |
| "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c", |
| "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c", |
| "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c", |
| "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vsub-relu-scalar-x1.c", |
| "src/f32-vbinary/gen/vsub-relu-scalar-x2.c", |
| "src/f32-vbinary/gen/vsub-relu-scalar-x4.c", |
| "src/f32-vbinary/gen/vsub-relu-scalar-x8.c", |
| "src/f32-vbinary/gen/vsub-scalar-x1.c", |
| "src/f32-vbinary/gen/vsub-scalar-x2.c", |
| "src/f32-vbinary/gen/vsub-scalar-x4.c", |
| "src/f32-vbinary/gen/vsub-scalar-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c", |
| "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c", |
| "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c", |
| "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c", |
| "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c", |
| "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c", |
| "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c", |
| "src/f32-vbinary/gen/vsubc-scalar-x1.c", |
| "src/f32-vbinary/gen/vsubc-scalar-x2.c", |
| "src/f32-vbinary/gen/vsubc-scalar-x4.c", |
| "src/f32-vbinary/gen/vsubc-scalar-x8.c", |
| "src/f32-vclamp/gen/vclamp-scalar-x1.c", |
| "src/f32-vclamp/gen/vclamp-scalar-x2.c", |
| "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c", |
| "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c", |
| "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c", |
| "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c", |
| "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c", |
| "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c", |
| "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c", |
| "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c", |
| "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c", |
| "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c", |
| "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c", |
| "src/f32-vhswish/gen/vhswish-scalar-x1.c", |
| "src/f32-vhswish/gen/vhswish-scalar-x2.c", |
| "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| "src/f32-vlrelu/gen/vlrelu-scalar-x1.c", |
| "src/f32-vlrelu/gen/vlrelu-scalar-x2.c", |
| "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c", |
| "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c", |
| "src/f32-vrelu/gen/vrelu-scalar-x1.c", |
| "src/f32-vrelu/gen/vrelu-scalar-x2.c", |
| "src/f32-vrelu/gen/vrelu-scalar-x4.c", |
| "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c", |
| "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c", |
| "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c", |
| "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c", |
| "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c", |
| "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c", |
| "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c", |
| "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c", |
| "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c", |
| "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| "src/f32-vsqrt/gen/scalar-sqrt-x2.c", |
| "src/f32-vsqrt/gen/scalar-sqrt-x4.c", |
| "src/f32-vunary/gen/vabs-scalar-x1.c", |
| "src/f32-vunary/gen/vabs-scalar-x2.c", |
| "src/f32-vunary/gen/vabs-scalar-x4.c", |
| "src/f32-vunary/gen/vneg-scalar-x1.c", |
| "src/f32-vunary/gen/vneg-scalar-x2.c", |
| "src/f32-vunary/gen/vneg-scalar-x4.c", |
| "src/f32-vunary/gen/vsqr-scalar-x1.c", |
| "src/f32-vunary/gen/vsqr-scalar-x2.c", |
| "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| "src/math/cvt-f32-f16-scalar-bitcast.c", |
| "src/math/cvt-f32-f16-scalar-fabsf.c", |
| "src/math/expm1minus-scalar-rr2-lut4-p4.c", |
| "src/math/expm1minus-scalar-rr2-lut8-p3.c", |
| "src/math/expm1minus-scalar-rr2-lut8-p4.c", |
| "src/math/expm1minus-scalar-rr2-lut16-p3.c", |
| "src/math/expm1minus-scalar-rr2-lut16-p4.c", |
| "src/math/expm1minus-scalar-rr2-p5.c", |
| "src/math/expm1minus-scalar-rr2-p6.c", |
| "src/math/expminus-scalar-rr2-lut64-p2.c", |
| "src/math/expminus-scalar-rr2-lut2048-p1.c", |
| "src/math/expminus-scalar-rr2-p5.c", |
| "src/math/roundd-scalar-addsub.c", |
| "src/math/roundd-scalar-cvt.c", |
| "src/math/roundd-scalar-floor.c", |
| "src/math/roundne-scalar-addsub.c", |
| "src/math/roundne-scalar-nearbyint.c", |
| "src/math/roundne-scalar-rint.c", |
| "src/math/roundu-scalar-addsub.c", |
| "src/math/roundu-scalar-ceil.c", |
| "src/math/roundu-scalar-cvt.c", |
| "src/math/roundz-scalar-addsub.c", |
| "src/math/roundz-scalar-cvt.c", |
| "src/math/roundz-scalar-trunc.c", |
| "src/math/sigmoid-scalar-rr2-lut64-p2-div.c", |
| "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c", |
| "src/math/sigmoid-scalar-rr2-p5-div.c", |
| "src/params-init.c", |
| "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c", |
| "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c", |
| "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c", |
| "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c", |
| "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c", |
| "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c", |
| "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c", |
| "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c", |
| "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c", |
| "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c", |
| "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c", |
| "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c", |
| "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c", |
| "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c", |
| "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c", |
| "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c", |
| "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c", |
| "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c", |
| "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c", |
| "src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| "src/qs8-f32-vcvt/gen/vcvt-scalar-x2.c", |
| "src/qs8-f32-vcvt/gen/vcvt-scalar-x3.c", |
| "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c", |
| "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c", |
| "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c", |
| "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/1x2-minmax-rndnu-scalar.c", |
| "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c", |
| "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/2x2-minmax-rndnu-scalar.c", |
| "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/2x4-minmax-rndnu-scalar.c", |
| "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/3x2-minmax-rndnu-scalar.c", |
| "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c", |
| "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/4x2-minmax-rndnu-scalar.c", |
| "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-gemm/gen/4x4-minmax-rndnu-scalar.c", |
| "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/1x2-minmax-rndnu-scalar.c", |
| "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c", |
| "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/2x2-minmax-rndnu-scalar.c", |
| "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/2x4-minmax-rndnu-scalar.c", |
| "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/3x2-minmax-rndnu-scalar.c", |
| "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c", |
| "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/4x2-minmax-rndnu-scalar.c", |
| "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qs8-igemm/gen/4x4-minmax-rndnu-scalar.c", |
| "src/qs8-requantization/fp32-scalar-lrintf.c", |
| "src/qs8-requantization/fp32-scalar-magic.c", |
| "src/qs8-requantization/gemmlowp-scalar.c", |
| "src/qs8-requantization/rndna-scalar-signed64.c", |
| "src/qs8-requantization/rndna-scalar-unsigned32.c", |
| "src/qs8-requantization/rndna-scalar-unsigned64.c", |
| "src/qs8-requantization/rndnu-scalar.c", |
| "src/qs8-vadd/gen/minmax-scalar-x1.c", |
| "src/qs8-vadd/gen/minmax-scalar-x2.c", |
| "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| "src/qs8-vaddc/gen/minmax-scalar-x1.c", |
| "src/qs8-vaddc/gen/minmax-scalar-x2.c", |
| "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| "src/qs8-vmul/gen/minmax-fp32-scalar-x1.c", |
| "src/qs8-vmul/gen/minmax-fp32-scalar-x2.c", |
| "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| "src/qs8-vmulc/gen/minmax-fp32-scalar-x1.c", |
| "src/qs8-vmulc/gen/minmax-fp32-scalar-x2.c", |
| "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c", |
| "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c", |
| "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c", |
| "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c", |
| "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c", |
| "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c", |
| "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c", |
| "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c", |
| "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c", |
| "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c", |
| "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c", |
| "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c", |
| "src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| "src/qu8-f32-vcvt/gen/vcvt-scalar-x2.c", |
| "src/qu8-f32-vcvt/gen/vcvt-scalar-x3.c", |
| "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c", |
| "src/qu8-gavgpool/7x-minmax-scalar-c1.c", |
| "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c", |
| "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c", |
| "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c", |
| "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c", |
| "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c", |
| "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c", |
| "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c", |
| "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c", |
| "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c", |
| "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c", |
| "src/qu8-requantization/fp32-scalar-lrintf.c", |
| "src/qu8-requantization/fp32-scalar-magic.c", |
| "src/qu8-requantization/gemmlowp-scalar.c", |
| "src/qu8-requantization/rndna-scalar-signed64.c", |
| "src/qu8-requantization/rndna-scalar-unsigned32.c", |
| "src/qu8-requantization/rndna-scalar-unsigned64.c", |
| "src/qu8-vadd/gen/minmax-scalar-x1.c", |
| "src/qu8-vadd/gen/minmax-scalar-x2.c", |
| "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| "src/qu8-vaddc/gen/minmax-scalar-x1.c", |
| "src/qu8-vaddc/gen/minmax-scalar-x2.c", |
| "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| "src/qu8-vmul/gen/minmax-fp32-scalar-x1.c", |
| "src/qu8-vmul/gen/minmax-fp32-scalar-x2.c", |
| "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| "src/qu8-vmulc/gen/minmax-fp32-scalar-x1.c", |
| "src/qu8-vmulc/gen/minmax-fp32-scalar-x2.c", |
| "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| "src/s8-ibilinear/gen/scalar-c1.c", |
| "src/s8-ibilinear/gen/scalar-c2.c", |
| "src/s8-ibilinear/gen/scalar-c4.c", |
| "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| "src/s8-vclamp/scalar-x4.c", |
| "src/u8-ibilinear/gen/scalar-c1.c", |
| "src/u8-ibilinear/gen/scalar-c2.c", |
| "src/u8-ibilinear/gen/scalar-c4.c", |
| "src/u8-lut32norm/scalar.c", |
| "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| "src/u8-rmax/scalar.c", |
| "src/u8-vclamp/scalar-x4.c", |
| "src/x8-lut/gen/lut-scalar-x1.c", |
| "src/x8-lut/gen/lut-scalar-x2.c", |
| "src/x8-lut/gen/lut-scalar-x4.c", |
| "src/x8-lut/gen/lut-scalar-x8.c", |
| "src/x8-lut/gen/lut-scalar-x16.c", |
| "src/x8-zip/x2-scalar.c", |
| "src/x8-zip/x3-scalar.c", |
| "src/x8-zip/x4-scalar.c", |
| "src/x8-zip/xm-scalar.c", |
| "src/x32-depthtospace2d-chw2hwc/scalar.c", |
| "src/x32-packx/x2-scalar.c", |
| "src/x32-packx/x3-scalar.c", |
| "src/x32-packx/x4-scalar.c", |
| "src/x32-unpool/scalar.c", |
| "src/x32-zip/x2-scalar.c", |
| "src/x32-zip/x3-scalar.c", |
| "src/x32-zip/x4-scalar.c", |
| "src/x32-zip/xm-scalar.c", |
| "src/xx-copy/memcpy.c", |
| "src/xx-fill/scalar-x16.c", |
| "src/xx-pad/scalar.c", |
| ] |
| |
| ALL_WASM_MICROKERNEL_SRCS = [ |
| "src/f32-avgpool/9p8x-minmax-wasm-c1.c", |
| "src/f32-avgpool/9x-minmax-wasm-c1.c", |
| "src/f32-dwconv/gen/up1x3-minmax-wasm-acc2.c", |
| "src/f32-dwconv/gen/up1x3-minmax-wasm.c", |
| "src/f32-dwconv/gen/up1x3-wasm-acc2.c", |
| "src/f32-dwconv/gen/up1x3-wasm.c", |
| "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c", |
| "src/f32-dwconv/gen/up1x4-minmax-wasm.c", |
| "src/f32-dwconv/gen/up1x4-wasm-acc2.c", |
| "src/f32-dwconv/gen/up1x4-wasm.c", |
| "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c", |
| "src/f32-dwconv/gen/up1x9-minmax-wasm.c", |
| "src/f32-dwconv/gen/up1x9-wasm-acc2.c", |
| "src/f32-dwconv/gen/up1x9-wasm.c", |
| "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c", |
| "src/f32-dwconv/gen/up1x25-minmax-wasm.c", |
| "src/f32-dwconv/gen/up1x25-wasm-acc2.c", |
| "src/f32-dwconv/gen/up1x25-wasm.c", |
| "src/f32-dwconv/gen/up2x3-minmax-wasm-acc2.c", |
| "src/f32-dwconv/gen/up2x3-minmax-wasm.c", |
| "src/f32-dwconv/gen/up2x3-wasm-acc2.c", |
| "src/f32-dwconv/gen/up2x3-wasm.c", |
| "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c", |
| "src/f32-dwconv/gen/up2x4-minmax-wasm.c", |
| "src/f32-dwconv/gen/up2x4-wasm-acc2.c", |
| "src/f32-dwconv/gen/up2x4-wasm.c", |
| "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c", |
| "src/f32-dwconv/gen/up2x9-minmax-wasm.c", |
| "src/f32-dwconv/gen/up2x9-wasm-acc2.c", |
| "src/f32-dwconv/gen/up2x9-wasm.c", |
| "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c", |
| "src/f32-dwconv/gen/up2x25-minmax-wasm.c", |
| "src/f32-dwconv/gen/up2x25-wasm-acc2.c", |
| "src/f32-dwconv/gen/up2x25-wasm.c", |
| "src/f32-gavgpool/7p7x-minmax-wasm-c1.c", |
| "src/f32-gavgpool/7x-minmax-wasm-c1.c", |
| "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c", |
| "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c", |
| "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c", |
| "src/f32-gemm/gen/1x4-minmax-wasm.c", |
| "src/f32-gemm/gen/1x4-relu-wasm.c", |
| "src/f32-gemm/gen/1x4-wasm.c", |
| "src/f32-gemm/gen/2x4-minmax-wasm.c", |
| "src/f32-gemm/gen/2x4-relu-wasm.c", |
| "src/f32-gemm/gen/2x4-wasm.c", |
| "src/f32-gemm/gen/4x2-minmax-wasm.c", |
| "src/f32-gemm/gen/4x2-relu-wasm.c", |
| "src/f32-gemm/gen/4x2-wasm.c", |
| "src/f32-gemm/gen/4x4-minmax-wasm.c", |
| "src/f32-gemm/gen/4x4-relu-wasm.c", |
| "src/f32-gemm/gen/4x4-wasm.c", |
| "src/f32-igemm/gen/1x4-minmax-wasm.c", |
| "src/f32-igemm/gen/1x4-relu-wasm.c", |
| "src/f32-igemm/gen/1x4-wasm.c", |
| "src/f32-igemm/gen/2x4-minmax-wasm.c", |
| "src/f32-igemm/gen/2x4-relu-wasm.c", |
| "src/f32-igemm/gen/2x4-wasm.c", |
| "src/f32-igemm/gen/4x2-minmax-wasm.c", |
| "src/f32-igemm/gen/4x2-relu-wasm.c", |
| "src/f32-igemm/gen/4x2-wasm.c", |
| "src/f32-igemm/gen/4x4-minmax-wasm.c", |
| "src/f32-igemm/gen/4x4-relu-wasm.c", |
| "src/f32-igemm/gen/4x4-wasm.c", |
| "src/f32-maxpool/9p8x-minmax-wasm-c1.c", |
| "src/f32-pavgpool/9p8x-minmax-wasm-c1.c", |
| "src/f32-pavgpool/9x-minmax-wasm-c1.c", |
| "src/f32-prelu/gen/wasm-2x1.c", |
| "src/f32-prelu/gen/wasm-2x4.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasm-magic-fminmax-x1.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasm-magic-fminmax-x2.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasm-magic-fminmax-x3.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasm-magic-fminmax-x4.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasm-magic-fminmax-x1.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasm-magic-fminmax-x2.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasm-magic-fminmax-x3.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasm-magic-fminmax-x4.c", |
| "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vadd-relu-wasm-x1.c", |
| "src/f32-vbinary/gen/vadd-relu-wasm-x2.c", |
| "src/f32-vbinary/gen/vadd-relu-wasm-x4.c", |
| "src/f32-vbinary/gen/vadd-relu-wasm-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c", |
| "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c", |
| "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c", |
| "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c", |
| "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c", |
| "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c", |
| "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c", |
| "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c", |
| "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c", |
| "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c", |
| "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c", |
| "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c", |
| "src/f32-vbinary/gen/vmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vmaxc-wasm-x1.c", |
| "src/f32-vbinary/gen/vmaxc-wasm-x2.c", |
| "src/f32-vbinary/gen/vmaxc-wasm-x4.c", |
| "src/f32-vbinary/gen/vmaxc-wasm-x8.c", |
| "src/f32-vbinary/gen/vmin-wasm-x1.c", |
| "src/f32-vbinary/gen/vmin-wasm-x2.c", |
| "src/f32-vbinary/gen/vmin-wasm-x4.c", |
| "src/f32-vbinary/gen/vmin-wasm-x8.c", |
| "src/f32-vbinary/gen/vminc-wasm-x1.c", |
| "src/f32-vbinary/gen/vminc-wasm-x2.c", |
| "src/f32-vbinary/gen/vminc-wasm-x4.c", |
| "src/f32-vbinary/gen/vminc-wasm-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vmul-relu-wasm-x1.c", |
| "src/f32-vbinary/gen/vmul-relu-wasm-x2.c", |
| "src/f32-vbinary/gen/vmul-relu-wasm-x4.c", |
| "src/f32-vbinary/gen/vmul-relu-wasm-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c", |
| "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c", |
| "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c", |
| "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c", |
| "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c", |
| "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c", |
| "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c", |
| "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c", |
| "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c", |
| "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vsub-relu-wasm-x1.c", |
| "src/f32-vbinary/gen/vsub-relu-wasm-x2.c", |
| "src/f32-vbinary/gen/vsub-relu-wasm-x4.c", |
| "src/f32-vbinary/gen/vsub-relu-wasm-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c", |
| "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c", |
| "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c", |
| "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c", |
| "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c", |
| "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c", |
| "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c", |
| "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c", |
| "src/f32-vclamp/gen/vclamp-wasm-x1.c", |
| "src/f32-vclamp/gen/vclamp-wasm-x2.c", |
| "src/f32-vclamp/gen/vclamp-wasm-x4.c", |
| "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c", |
| "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c", |
| "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c", |
| "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c", |
| "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c", |
| "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c", |
| "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c", |
| "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c", |
| "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c", |
| "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c", |
| "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c", |
| "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c", |
| "src/f32-vhswish/gen/vhswish-wasm-x1.c", |
| "src/f32-vhswish/gen/vhswish-wasm-x2.c", |
| "src/f32-vhswish/gen/vhswish-wasm-x4.c", |
| "src/f32-vlrelu/gen/vlrelu-wasm-x1.c", |
| "src/f32-vlrelu/gen/vlrelu-wasm-x2.c", |
| "src/f32-vlrelu/gen/vlrelu-wasm-x4.c", |
| "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c", |
| "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c", |
| "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c", |
| "src/f32-vrelu/gen/vrelu-wasm-x1.c", |
| "src/f32-vrelu/gen/vrelu-wasm-x2.c", |
| "src/f32-vrelu/gen/vrelu-wasm-x4.c", |
| "src/f32-vrelu/gen/vrelu-wasm-x8.c", |
| ] |
| |
| ALL_WASMSIMD_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x24.c", |
| "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x32.c", |
| "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x24.c", |
| "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x32.c", |
| "src/f32-argmaxpool/4x-wasmsimd-c4.c", |
| "src/f32-argmaxpool/9p8x-wasmsimd-c4.c", |
| "src/f32-argmaxpool/9x-wasmsimd-c4.c", |
| "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c", |
| "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c", |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c", |
| "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-arm-acc2.c", |
| "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-arm.c", |
| "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-x86-acc2.c", |
| "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-x86.c", |
| "src/f32-dwconv/gen/up4x3-wasmsimd.c", |
| "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c", |
| "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c", |
| "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c", |
| "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c", |
| "src/f32-dwconv/gen/up4x4-wasmsimd.c", |
| "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c", |
| "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c", |
| "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c", |
| "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c", |
| "src/f32-dwconv/gen/up4x9-wasmsimd.c", |
| "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c", |
| "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c", |
| "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c", |
| "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c", |
| "src/f32-dwconv/gen/up4x25-wasmsimd.c", |
| "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-arm-acc2.c", |
| "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-arm.c", |
| "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-x86-acc2.c", |
| "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-x86.c", |
| "src/f32-dwconv/gen/up8x3-wasmsimd.c", |
| "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c", |
| "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c", |
| "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c", |
| "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c", |
| "src/f32-dwconv/gen/up8x4-wasmsimd.c", |
| "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c", |
| "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c", |
| "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c", |
| "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c", |
| "src/f32-dwconv/gen/up8x9-wasmsimd.c", |
| "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c", |
| "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c", |
| "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c", |
| "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c", |
| "src/f32-dwconv/gen/up8x25-wasmsimd.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
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| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c", |
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| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c", |
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| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c", |
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| "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c", |
| "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c", |
| "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c", |
| "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c", |
| "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c", |
| "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c", |
| "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c", |
| "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c", |
| "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c", |
| "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c", |
| "src/f32-prelu/gen/wasmsimd-minmax-1x4.c", |
| "src/f32-prelu/gen/wasmsimd-minmax-1x8.c", |
| "src/f32-prelu/gen/wasmsimd-minmax-1x16.c", |
| "src/f32-prelu/gen/wasmsimd-minmax-2x4.c", |
| "src/f32-prelu/gen/wasmsimd-minmax-2x8.c", |
| "src/f32-prelu/gen/wasmsimd-minmax-2x16.c", |
| "src/f32-prelu/gen/wasmsimd-minmax-4x4.c", |
| "src/f32-prelu/gen/wasmsimd-minmax-4x8.c", |
| "src/f32-prelu/gen/wasmsimd-minmax-4x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x24.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x32.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x24.c", |
| "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x8.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x16.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x24.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x8.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x16.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x24.c", |
| "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x32.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c", |
| "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c", |
| "src/f32-rmax/wasmsimd-arm.c", |
| "src/f32-rmax/wasmsimd-x86.c", |
| "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c", |
| "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c", |
| "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c", |
| "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c", |
| "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c", |
| "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c", |
| "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c", |
| "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c", |
| "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c", |
| "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c", |
| "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c", |
| "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c", |
| "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c", |
| "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c", |
| "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c", |
| "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c", |
| "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c", |
| "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c", |
| "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c", |
| "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c", |
| "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c", |
| "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c", |
| "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c", |
| "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c", |
| "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c", |
| "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c", |
| "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c", |
| "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c", |
| "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c", |
| "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c", |
| "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c", |
| "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c", |
| "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vadd-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vadd-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vadd-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vmul-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vmul-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vmul-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vsub-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vsub-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vsub-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c", |
| "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c", |
| "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c", |
| "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c", |
| "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c", |
| "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c", |
| "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c", |
| "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c", |
| "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c", |
| "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c", |
| "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c", |
| "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c", |
| "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c", |
| "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c", |
| "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c", |
| "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c", |
| "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c", |
| "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c", |
| "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c", |
| "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c", |
| "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c", |
| "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c", |
| "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c", |
| "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c", |
| "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c", |
| "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c", |
| "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c", |
| "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c", |
| "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c", |
| "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c", |
| "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c", |
| "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c", |
| "src/f32-vrnd/gen/vrndd-wasmsimd-native-x4.c", |
| "src/f32-vrnd/gen/vrndd-wasmsimd-native-x8.c", |
| "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c", |
| "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c", |
| "src/f32-vrnd/gen/vrndne-wasmsimd-native-x4.c", |
| "src/f32-vrnd/gen/vrndne-wasmsimd-native-x8.c", |
| "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c", |
| "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c", |
| "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c", |
| "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c", |
| "src/f32-vrnd/gen/vrndu-wasmsimd-native-x4.c", |
| "src/f32-vrnd/gen/vrndu-wasmsimd-native-x8.c", |
| "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c", |
| "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c", |
| "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c", |
| "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c", |
| "src/f32-vrnd/gen/vrndz-wasmsimd-native-x4.c", |
| "src/f32-vrnd/gen/vrndz-wasmsimd-native-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c", |
| "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c", |
| "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c", |
| "src/f32-vunary/gen/vabs-wasmsimd-x4.c", |
| "src/f32-vunary/gen/vabs-wasmsimd-x8.c", |
| "src/f32-vunary/gen/vneg-wasmsimd-x4.c", |
| "src/f32-vunary/gen/vneg-wasmsimd-x8.c", |
| "src/f32-vunary/gen/vsqr-wasmsimd-x4.c", |
| "src/f32-vunary/gen/vsqr-wasmsimd-x8.c", |
| "src/math/cvt-f16-f32-wasmsimd-int16.c", |
| "src/math/cvt-f16-f32-wasmsimd-int32.c", |
| "src/math/cvt-f32-f16-wasmsimd.c", |
| "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c", |
| "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c", |
| "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c", |
| "src/math/expm1minus-wasmsimd-rr2-p6-max.c", |
| "src/math/roundd-wasmsimd-addsub.c", |
| "src/math/roundd-wasmsimd-cvt.c", |
| "src/math/roundd-wasmsimd-native.c", |
| "src/math/roundne-wasmsimd-addsub.c", |
| "src/math/roundne-wasmsimd-native.c", |
| "src/math/roundu-wasmsimd-addsub.c", |
| "src/math/roundu-wasmsimd-cvt.c", |
| "src/math/roundu-wasmsimd-native.c", |
| "src/math/roundz-wasmsimd-addsub.c", |
| "src/math/roundz-wasmsimd-cvt.c", |
| "src/math/roundz-wasmsimd-native.c", |
| "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c", |
| "src/math/sigmoid-wasmsimd-rr2-p5-div.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| "src/qc8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qc8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qc8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qc8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qc8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qc8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qc8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qc8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qc8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x8.c", |
| "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x24.c", |
| "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x32.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c", |
| "src/qs8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| "src/qs8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| "src/qs8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| "src/qs8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| "src/qs8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| "src/qs8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| "src/qs8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| "src/qs8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-gemm/gen/4x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| "src/qs8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qs8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qs8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| "src/qs8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qs8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qs8-requantization/fp32-wasmsimd.c", |
| "src/qs8-requantization/gemmlowp-wasmsimd.c", |
| "src/qs8-vadd/gen/minmax-wasmsimd-x8.c", |
| "src/qs8-vadd/gen/minmax-wasmsimd-x16.c", |
| "src/qs8-vadd/gen/minmax-wasmsimd-x24.c", |
| "src/qs8-vadd/gen/minmax-wasmsimd-x32.c", |
| "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c", |
| "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c", |
| "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c", |
| "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c", |
| "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x8.c", |
| "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x24.c", |
| "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x32.c", |
| "src/qu8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| "src/qu8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| "src/qu8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| "src/qu8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| "src/qu8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| "src/qu8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| "src/qu8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| "src/qu8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| "src/qu8-requantization/fp32-wasmsimd.c", |
| "src/qu8-requantization/gemmlowp-wasmsimd.c", |
| "src/qu8-vadd/gen/minmax-wasmsimd-x8.c", |
| "src/qu8-vadd/gen/minmax-wasmsimd-x16.c", |
| "src/qu8-vadd/gen/minmax-wasmsimd-x32.c", |
| "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c", |
| "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c", |
| "src/qu8-vaddc/gen/minmax-wasmsimd-x32.c", |
| "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| "src/s8-ibilinear/gen/wasmsimd-dot16x2-c8.c", |
| "src/s8-ibilinear/gen/wasmsimd-dot16x2-c16.c", |
| "src/s8-ibilinear/gen/wasmsimd-mul32-c8.c", |
| "src/s8-ibilinear/gen/wasmsimd-mul32-c16.c", |
| "src/s8-maxpool/9p8x-minmax-wasmsimd-c16.c", |
| "src/s8-vclamp/wasmsimd-x64.c", |
| "src/u8-ibilinear/gen/wasmsimd-dot16x2-c8.c", |
| "src/u8-ibilinear/gen/wasmsimd-dot16x2-c16.c", |
| "src/u8-ibilinear/gen/wasmsimd-mul32-c8.c", |
| "src/u8-ibilinear/gen/wasmsimd-mul32-c16.c", |
| "src/u8-maxpool/9p8x-minmax-wasmsimd-c16.c", |
| "src/u8-vclamp/wasmsimd-x64.c", |
| "src/x8-lut/gen/lut-wasmsimd-x16.c", |
| "src/x8-lut/gen/lut-wasmsimd-x32.c", |
| "src/x8-lut/gen/lut-wasmsimd-x48.c", |
| "src/x8-lut/gen/lut-wasmsimd-x64.c", |
| "src/x32-packx/x4-wasmsimd.c", |
| "src/x32-transpose/4x4-wasmsimd.c", |
| "src/x32-unpool/wasmsimd.c", |
| "src/x32-zip/x2-wasmsimd.c", |
| "src/x32-zip/x3-wasmsimd.c", |
| "src/x32-zip/x4-wasmsimd.c", |
| "src/x32-zip/xm-wasmsimd.c", |
| "src/xx-fill/wasmsimd-x64.c", |
| "src/xx-pad/wasmsimd.c", |
| ] |
| |
| # ISA-specific micro-kernels |
| PROD_NEON_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c", |
| "src/f32-argmaxpool/4x-neon-c4.c", |
| "src/f32-argmaxpool/9p8x-neon-c4.c", |
| "src/f32-argmaxpool/9x-neon-c4.c", |
| "src/f32-avgpool/9p8x-minmax-neon-c4.c", |
| "src/f32-avgpool/9x-minmax-neon-c4.c", |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c", |
| "src/f32-dwconv/gen/up8x3-minmax-neon.c", |
| "src/f32-dwconv/gen/up8x4-minmax-neon.c", |
| "src/f32-dwconv/gen/up8x9-minmax-neon.c", |
| "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c", |
| "src/f32-f16-vcvt/gen/vcvt-neon-x8.c", |
| "src/f32-gavgpool-cw/neon-x4.c", |
| "src/f32-gavgpool/7p7x-minmax-neon-c4.c", |
| "src/f32-gavgpool/7x-minmax-neon-c4.c", |
| "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c", |
| "src/f32-ibilinear-chw/gen/neon-p8.c", |
| "src/f32-ibilinear/gen/neon-c8.c", |
| "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c", |
| "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c", |
| "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c", |
| "src/f32-maxpool/9p8x-minmax-neon-c4.c", |
| "src/f32-pavgpool/9p8x-minmax-neon-c4.c", |
| "src/f32-pavgpool/9x-minmax-neon-c4.c", |
| "src/f32-prelu/gen/neon-2x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-neon-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-neon-x32.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c", |
| "src/f32-rmax/neon.c", |
| "src/f32-spmm/gen/32x1-minmax-neon.c", |
| "src/f32-vbinary/gen/vadd-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vmax-neon-x8.c", |
| "src/f32-vbinary/gen/vmaxc-neon-x8.c", |
| "src/f32-vbinary/gen/vmin-neon-x8.c", |
| "src/f32-vbinary/gen/vminc-neon-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vsqrdiff-neon-x8.c", |
| "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c", |
| "src/f32-vclamp/gen/vclamp-neon-x8.c", |
| "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c", |
| "src/f32-vhswish/gen/vhswish-neon-x16.c", |
| "src/f32-vlrelu/gen/vlrelu-neon-x8.c", |
| "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c", |
| "src/f32-vrnd/gen/vrndd-neon-x8.c", |
| "src/f32-vrnd/gen/vrndne-neon-x8.c", |
| "src/f32-vrnd/gen/vrndu-neon-x8.c", |
| "src/f32-vrnd/gen/vrndz-neon-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c", |
| "src/f32-vunary/gen/vabs-neon-x8.c", |
| "src/f32-vunary/gen/vneg-neon-x8.c", |
| "src/f32-vunary/gen/vsqr-neon-x8.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c", |
| "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c", |
| "src/qs8-f32-vcvt/gen/vcvt-neon-x32.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c", |
| "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-vadd/gen/minmax-neon-ld64-x16.c", |
| "src/qs8-vadd/gen/minmax-neon-ld64-x32.c", |
| "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c", |
| "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c", |
| "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| "src/qu8-avgpool/9p8x-minmax-neon-c8.c", |
| "src/qu8-avgpool/9x-minmax-neon-c8.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c", |
| "src/qu8-f32-vcvt/gen/vcvt-neon-x32.c", |
| "src/qu8-gavgpool/7p7x-minmax-neon-c8.c", |
| "src/qu8-gavgpool/7x-minmax-neon-c8.c", |
| "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-vadd/gen/minmax-neon-ld64-x16.c", |
| "src/qu8-vadd/gen/minmax-neon-ld64-x32.c", |
| "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c", |
| "src/qu8-vaddc/gen/minmax-neon-ld64-x32.c", |
| "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| "src/s8-ibilinear/gen/neon-c8.c", |
| "src/s8-ibilinear/gen/neon-c16.c", |
| "src/s8-maxpool/9p8x-minmax-neon-c16.c", |
| "src/s8-vclamp/neon-x64.c", |
| "src/u8-ibilinear/gen/neon-c8.c", |
| "src/u8-ibilinear/gen/neon-c16.c", |
| "src/u8-maxpool/9p8x-minmax-neon-c16.c", |
| "src/u8-rmax/neon.c", |
| "src/u8-vclamp/neon-x64.c", |
| "src/x8-zip/x2-neon.c", |
| "src/x8-zip/x3-neon.c", |
| "src/x8-zip/x4-neon.c", |
| "src/x8-zip/xm-neon.c", |
| "src/x32-packx/x4-neon-st4.c", |
| "src/x32-unpool/neon.c", |
| "src/x32-zip/x2-neon.c", |
| "src/x32-zip/x3-neon.c", |
| "src/x32-zip/x4-neon.c", |
| "src/x32-zip/xm-neon.c", |
| "src/xx-fill/neon-x64.c", |
| "src/xx-pad/neon.c", |
| ] |
| |
| ALL_NEON_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-neon-int16-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-neon-int16-x24.c", |
| "src/f16-f32-vcvt/gen/vcvt-neon-int16-x32.c", |
| "src/f16-f32-vcvt/gen/vcvt-neon-int32-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-neon-int32-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-neon-int32-x24.c", |
| "src/f16-f32-vcvt/gen/vcvt-neon-int32-x32.c", |
| "src/f32-argmaxpool/4x-neon-c4.c", |
| "src/f32-argmaxpool/9p8x-neon-c4.c", |
| "src/f32-argmaxpool/9x-neon-c4.c", |
| "src/f32-avgpool/9p8x-minmax-neon-c4.c", |
| "src/f32-avgpool/9x-minmax-neon-c4.c", |
| "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c", |
| "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c", |
| "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c", |
| "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c", |
| "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c", |
| "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c", |
| "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c", |
| "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c", |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c", |
| "src/f32-dwconv/gen/up4x3-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up4x3-minmax-neon.c", |
| "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up4x4-minmax-neon.c", |
| "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up4x9-minmax-neon.c", |
| "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up4x25-minmax-neon.c", |
| "src/f32-dwconv/gen/up8x3-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up8x3-minmax-neon.c", |
| "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up8x4-minmax-neon.c", |
| "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up8x9-minmax-neon.c", |
| "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up8x25-minmax-neon.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c", |
| "src/f32-f16-vcvt/gen/vcvt-neon-x8.c", |
| "src/f32-f16-vcvt/gen/vcvt-neon-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-neon-x24.c", |
| "src/f32-f16-vcvt/gen/vcvt-neon-x32.c", |
| "src/f32-gavgpool-cw/neon-x4.c", |
| "src/f32-gavgpool/7p7x-minmax-neon-c4.c", |
| "src/f32-gavgpool/7x-minmax-neon-c4.c", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c", |
| "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c", |
| "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c", |
| "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c", |
| "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c", |
| "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c", |
| "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen/1x8s4-minmax-neon.c", |
| "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c", |
| "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c", |
| "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c", |
| "src/f32-gemm/gen/4x8s4-minmax-neon.c", |
| "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c", |
| "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c", |
| "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c", |
| "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c", |
| "src/f32-gemm/gen/6x8s4-minmax-neon.c", |
| "src/f32-gemm/gen/8x8s4-minmax-neon.c", |
| "src/f32-ibilinear-chw/gen/neon-p4.c", |
| "src/f32-ibilinear-chw/gen/neon-p8.c", |
| "src/f32-ibilinear/gen/neon-c4.c", |
| "src/f32-ibilinear/gen/neon-c8.c", |
| "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c", |
| "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c", |
| "src/f32-igemm/gen/1x8s4-minmax-neon.c", |
| "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c", |
| "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c", |
| "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c", |
| "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c", |
| "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c", |
| "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c", |
| "src/f32-igemm/gen/4x8s4-minmax-neon.c", |
| "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c", |
| "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c", |
| "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c", |
| "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c", |
| "src/f32-igemm/gen/6x8s4-minmax-neon.c", |
| "src/f32-igemm/gen/8x8s4-minmax-neon.c", |
| "src/f32-maxpool/9p8x-minmax-neon-c4.c", |
| "src/f32-pavgpool/9p8x-minmax-neon-c4.c", |
| "src/f32-pavgpool/9x-minmax-neon-c4.c", |
| "src/f32-ppmm/gen/4x8-minmax-neon.c", |
| "src/f32-ppmm/gen/8x8-minmax-neon.c", |
| "src/f32-prelu/gen/neon-1x4.c", |
| "src/f32-prelu/gen/neon-1x8.c", |
| "src/f32-prelu/gen/neon-1x16.c", |
| "src/f32-prelu/gen/neon-2x4.c", |
| "src/f32-prelu/gen/neon-2x8.c", |
| "src/f32-prelu/gen/neon-2x16.c", |
| "src/f32-prelu/gen/neon-4x4.c", |
| "src/f32-prelu/gen/neon-4x8.c", |
| "src/f32-prelu/gen/neon-4x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-neon-x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-neon-x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-neon-x24.c", |
| "src/f32-qs8-vcvt/gen/vcvt-neon-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-neon-x8.c", |
| "src/f32-qu8-vcvt/gen/vcvt-neon-x16.c", |
| "src/f32-qu8-vcvt/gen/vcvt-neon-x24.c", |
| "src/f32-qu8-vcvt/gen/vcvt-neon-x32.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c", |
| "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c", |
| "src/f32-rmax/neon.c", |
| "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c", |
| "src/f32-spmm/gen/4x1-minmax-neon-x2.c", |
| "src/f32-spmm/gen/4x1-minmax-neon.c", |
| "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c", |
| "src/f32-spmm/gen/8x1-minmax-neon-x2.c", |
| "src/f32-spmm/gen/8x1-minmax-neon.c", |
| "src/f32-spmm/gen/12x1-minmax-neon.c", |
| "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c", |
| "src/f32-spmm/gen/16x1-minmax-neon-x2.c", |
| "src/f32-spmm/gen/16x1-minmax-neon.c", |
| "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c", |
| "src/f32-spmm/gen/32x1-minmax-neon-x2.c", |
| "src/f32-spmm/gen/32x1-minmax-neon.c", |
| "src/f32-vbinary/gen/vadd-minmax-neon-x4.c", |
| "src/f32-vbinary/gen/vadd-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c", |
| "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vmax-neon-x4.c", |
| "src/f32-vbinary/gen/vmax-neon-x8.c", |
| "src/f32-vbinary/gen/vmaxc-neon-x4.c", |
| "src/f32-vbinary/gen/vmaxc-neon-x8.c", |
| "src/f32-vbinary/gen/vmin-neon-x4.c", |
| "src/f32-vbinary/gen/vmin-neon-x8.c", |
| "src/f32-vbinary/gen/vminc-neon-x4.c", |
| "src/f32-vbinary/gen/vminc-neon-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-neon-x4.c", |
| "src/f32-vbinary/gen/vmul-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c", |
| "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vsqrdiff-neon-x4.c", |
| "src/f32-vbinary/gen/vsqrdiff-neon-x8.c", |
| "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c", |
| "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-neon-x4.c", |
| "src/f32-vbinary/gen/vsub-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c", |
| "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c", |
| "src/f32-vclamp/gen/vclamp-neon-x4.c", |
| "src/f32-vclamp/gen/vclamp-neon-x8.c", |
| "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c", |
| "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c", |
| "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c", |
| "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c", |
| "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c", |
| "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c", |
| "src/f32-velu/gen/velu-neon-rr2-p6-x4.c", |
| "src/f32-velu/gen/velu-neon-rr2-p6-x8.c", |
| "src/f32-velu/gen/velu-neon-rr2-p6-x12.c", |
| "src/f32-velu/gen/velu-neon-rr2-p6-x16.c", |
| "src/f32-velu/gen/velu-neon-rr2-p6-x20.c", |
| "src/f32-velu/gen/velu-neon-rr2-p6-x24.c", |
| "src/f32-vhswish/gen/vhswish-neon-x4.c", |
| "src/f32-vhswish/gen/vhswish-neon-x8.c", |
| "src/f32-vhswish/gen/vhswish-neon-x16.c", |
| "src/f32-vlrelu/gen/vlrelu-neon-x4.c", |
| "src/f32-vlrelu/gen/vlrelu-neon-x8.c", |
| "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c", |
| "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c", |
| "src/f32-vrelu/gen/vrelu-neon-x4.c", |
| "src/f32-vrelu/gen/vrelu-neon-x8.c", |
| "src/f32-vrnd/gen/vrndd-neon-x4.c", |
| "src/f32-vrnd/gen/vrndd-neon-x8.c", |
| "src/f32-vrnd/gen/vrndne-neon-x4.c", |
| "src/f32-vrnd/gen/vrndne-neon-x8.c", |
| "src/f32-vrnd/gen/vrndu-neon-x4.c", |
| "src/f32-vrnd/gen/vrndu-neon-x8.c", |
| "src/f32-vrnd/gen/vrndz-neon-x4.c", |
| "src/f32-vrnd/gen/vrndz-neon-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c", |
| "src/f32-vunary/gen/vabs-neon-x4.c", |
| "src/f32-vunary/gen/vabs-neon-x8.c", |
| "src/f32-vunary/gen/vneg-neon-x4.c", |
| "src/f32-vunary/gen/vneg-neon-x8.c", |
| "src/f32-vunary/gen/vsqr-neon-x4.c", |
| "src/f32-vunary/gen/vsqr-neon-x8.c", |
| "src/math/cvt-f16-f32-neon-int16.c", |
| "src/math/cvt-f16-f32-neon-int32.c", |
| "src/math/cvt-f32-f16-neon.c", |
| "src/math/cvt-f32-qs8-neon.c", |
| "src/math/cvt-f32-qu8-neon.c", |
| "src/math/expm1minus-neon-rr2-lut16-p3.c", |
| "src/math/expm1minus-neon-rr2-p6.c", |
| "src/math/roundd-neon-addsub.c", |
| "src/math/roundd-neon-cvt.c", |
| "src/math/roundne-neon-addsub.c", |
| "src/math/roundu-neon-addsub.c", |
| "src/math/roundu-neon-cvt.c", |
| "src/math/roundz-neon-addsub.c", |
| "src/math/roundz-neon-cvt.c", |
| "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c", |
| "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c", |
| "src/math/sigmoid-neon-rr2-p5-nr2recps.c", |
| "src/math/sqrt-neon-nr1rsqrts.c", |
| "src/math/sqrt-neon-nr2rsqrts.c", |
| "src/math/sqrt-neon-nr3rsqrts.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c", |
| "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| "src/qs8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c", |
| "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| "src/qs8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-neon-x8.c", |
| "src/qs8-f32-vcvt/gen/vcvt-neon-x16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-neon-x24.c", |
| "src/qs8-f32-vcvt/gen/vcvt-neon-x32.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c", |
| "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| "src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/1x8c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/1x16c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| "src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/2x8c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/2x16c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/3x8c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/3x16c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/4x8c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-gemm/gen/4x16c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| "src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/1x8c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/1x16c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| "src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/2x8c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/2x16c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/3x8c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/3x16c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/4x8c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c", |
| "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| "src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| "src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mull.c", |
| "src/qs8-igemm/gen/4x16c16-minmax-rndnu-neon-mlal.c", |
| "src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| "src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qs8-requantization/fp32-neon.c", |
| "src/qs8-requantization/gemmlowp-neon.c", |
| "src/qs8-requantization/rndna-neon.c", |
| "src/qs8-requantization/rndnu-neon-mull.c", |
| "src/qs8-requantization/rndnu-neon-qdmulh.c", |
| "src/qs8-vadd/gen/minmax-neon-ld64-x8.c", |
| "src/qs8-vadd/gen/minmax-neon-ld64-x16.c", |
| "src/qs8-vadd/gen/minmax-neon-ld64-x24.c", |
| "src/qs8-vadd/gen/minmax-neon-ld64-x32.c", |
| "src/qs8-vadd/gen/minmax-neon-ld128-x16.c", |
| "src/qs8-vadd/gen/minmax-neon-ld128-x32.c", |
| "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c", |
| "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c", |
| "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c", |
| "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c", |
| "src/qs8-vaddc/gen/minmax-neon-ld128-x16.c", |
| "src/qs8-vaddc/gen/minmax-neon-ld128-x32.c", |
| "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x8.c", |
| "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| "src/qs8-vmul/gen/minmax-fp32-neon-ld128-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x8.c", |
| "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-neon-ld128-x16.c", |
| "src/qu8-avgpool/9p8x-minmax-neon-c8.c", |
| "src/qu8-avgpool/9x-minmax-neon-c8.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c", |
| "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| "src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul8.c", |
| "src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c", |
| "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| "src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul8.c", |
| "src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c", |
| "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| "src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul8.c", |
| "src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c", |
| "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| "src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul8.c", |
| "src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-neon-x8.c", |
| "src/qu8-f32-vcvt/gen/vcvt-neon-x16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-neon-x24.c", |
| "src/qu8-f32-vcvt/gen/vcvt-neon-x32.c", |
| "src/qu8-gavgpool/7p7x-minmax-neon-c8.c", |
| "src/qu8-gavgpool/7x-minmax-neon-c8.c", |
| "src/qu8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| "src/qu8-requantization/fp32-neon.c", |
| "src/qu8-requantization/gemmlowp-neon.c", |
| "src/qu8-requantization/rndna-neon.c", |
| "src/qu8-vadd/gen/minmax-neon-ld64-x8.c", |
| "src/qu8-vadd/gen/minmax-neon-ld64-x16.c", |
| "src/qu8-vadd/gen/minmax-neon-ld64-x32.c", |
| "src/qu8-vadd/gen/minmax-neon-ld128-x16.c", |
| "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c", |
| "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c", |
| "src/qu8-vaddc/gen/minmax-neon-ld64-x32.c", |
| "src/qu8-vaddc/gen/minmax-neon-ld128-x16.c", |
| "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x8.c", |
| "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| "src/qu8-vmul/gen/minmax-fp32-neon-ld128-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x8.c", |
| "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-neon-ld128-x16.c", |
| "src/s8-ibilinear/gen/neon-c8.c", |
| "src/s8-ibilinear/gen/neon-c16.c", |
| "src/s8-maxpool/9p8x-minmax-neon-c16.c", |
| "src/s8-vclamp/neon-x64.c", |
| "src/u8-ibilinear/gen/neon-c8.c", |
| "src/u8-ibilinear/gen/neon-c16.c", |
| "src/u8-maxpool/9p8x-minmax-neon-c16.c", |
| "src/u8-rmax/neon.c", |
| "src/u8-vclamp/neon-x64.c", |
| "src/x8-zip/x2-neon.c", |
| "src/x8-zip/x3-neon.c", |
| "src/x8-zip/x4-neon.c", |
| "src/x8-zip/xm-neon.c", |
| "src/x32-packx/x4-neon-st4.c", |
| "src/x32-unpool/neon.c", |
| "src/x32-zip/x2-neon.c", |
| "src/x32-zip/x3-neon.c", |
| "src/x32-zip/x4-neon.c", |
| "src/x32-zip/xm-neon.c", |
| "src/xx-fill/neon-x64.c", |
| "src/xx-pad/neon.c", |
| ] |
| |
| PROD_NEONFP16_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c", |
| ] |
| |
| ALL_NEONFP16_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-neonfp16-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-neonfp16-x8.c", |
| "src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c", |
| "src/math/cvt-f16-f32-neonfp16.c", |
| "src/math/cvt-f32-f16-neonfp16.c", |
| ] |
| |
| PROD_NEONFMA_MICROKERNEL_SRCS = [ |
| "src/f32-dwconv/gen/up8x3-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up8x4-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up8x9-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c", |
| "src/f32-gemm/gen/1x8s4-minmax-neonfma.c", |
| "src/f32-gemm/gen/6x8s4-minmax-neonfma.c", |
| "src/f32-ibilinear-chw/gen/neonfma-p8.c", |
| "src/f32-ibilinear/gen/neonfma-c8.c", |
| "src/f32-igemm/gen/1x8s4-minmax-neonfma.c", |
| "src/f32-igemm/gen/6x8s4-minmax-neonfma.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c", |
| "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c", |
| "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c", |
| ] |
| |
| ALL_NEONFMA_MICROKERNEL_SRCS = [ |
| "src/f32-dwconv/gen/up4x3-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up4x3-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up4x4-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up4x9-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up4x25-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up8x3-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up8x3-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up8x4-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up8x9-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up8x25-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up16x3-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up16x3-minmax-neon.c", |
| "src/f32-dwconv/gen/up16x3-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up16x3-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up16x4-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up16x4-minmax-neon.c", |
| "src/f32-dwconv/gen/up16x4-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up16x4-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up16x9-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up16x9-minmax-neon.c", |
| "src/f32-dwconv/gen/up16x9-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up16x9-minmax-neonfma.c", |
| "src/f32-dwconv/gen/up16x25-minmax-neon-acc2.c", |
| "src/f32-dwconv/gen/up16x25-minmax-neon.c", |
| "src/f32-dwconv/gen/up16x25-minmax-neonfma-acc2.c", |
| "src/f32-dwconv/gen/up16x25-minmax-neonfma.c", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c", |
| "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c", |
| "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c", |
| "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c", |
| "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c", |
| "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c", |
| "src/f32-gemm/gen/1x8s4-minmax-neonfma.c", |
| "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c", |
| "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c", |
| "src/f32-gemm/gen/4x8s4-minmax-neonfma.c", |
| "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c", |
| "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c", |
| "src/f32-gemm/gen/6x8s4-minmax-neonfma.c", |
| "src/f32-gemm/gen/8x8s4-minmax-neonfma.c", |
| "src/f32-ibilinear-chw/gen/neonfma-p4.c", |
| "src/f32-ibilinear-chw/gen/neonfma-p8.c", |
| "src/f32-ibilinear/gen/neonfma-c4.c", |
| "src/f32-ibilinear/gen/neonfma-c8.c", |
| "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c", |
| "src/f32-igemm/gen/1x8s4-minmax-neonfma.c", |
| "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c", |
| "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c", |
| "src/f32-igemm/gen/4x8s4-minmax-neonfma.c", |
| "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c", |
| "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c", |
| "src/f32-igemm/gen/6x8s4-minmax-neonfma.c", |
| "src/f32-igemm/gen/8x8s4-minmax-neonfma.c", |
| "src/f32-ppmm/gen/4x8-minmax-neonfma.c", |
| "src/f32-ppmm/gen/8x8-minmax-neonfma.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c", |
| "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c", |
| "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c", |
| "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c", |
| "src/f32-spmm/gen/4x1-minmax-neonfma.c", |
| "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c", |
| "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c", |
| "src/f32-spmm/gen/8x1-minmax-neonfma.c", |
| "src/f32-spmm/gen/12x1-minmax-neonfma.c", |
| "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c", |
| "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c", |
| "src/f32-spmm/gen/16x1-minmax-neonfma.c", |
| "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c", |
| "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c", |
| "src/f32-spmm/gen/32x1-minmax-neonfma.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c", |
| "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c", |
| "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c", |
| "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c", |
| "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c", |
| "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c", |
| "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c", |
| "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c", |
| "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c", |
| "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c", |
| "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c", |
| "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c", |
| "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c", |
| "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c", |
| "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c", |
| "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c", |
| "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c", |
| "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c", |
| "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c", |
| "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c", |
| "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c", |
| "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c", |
| "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c", |
| "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c", |
| "src/math/exp-neonfma-rr2-lut64-p2.c", |
| "src/math/exp-neonfma-rr2-p5.c", |
| "src/math/expm1minus-neonfma-rr1-lut16-p3.c", |
| "src/math/expm1minus-neonfma-rr1-p6.c", |
| "src/math/expminus-neonfma-rr2-lut64-p2.c", |
| "src/math/expminus-neonfma-rr2-lut2048-p1.c", |
| "src/math/expminus-neonfma-rr2-p5.c", |
| "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c", |
| "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c", |
| "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c", |
| "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c", |
| "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c", |
| "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c", |
| "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c", |
| "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c", |
| "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c", |
| "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c", |
| "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c", |
| "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c", |
| "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c", |
| "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c", |
| "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c", |
| "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c", |
| "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c", |
| "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c", |
| "src/math/sqrt-neonfma-nr1fma.c", |
| "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c", |
| "src/math/sqrt-neonfma-nr2fma.c", |
| "src/math/sqrt-neonfma-nr2fma1adj.c", |
| "src/math/sqrt-neonfma-nr3fma.c", |
| ] |
| |
| PROD_AARCH64_NEON_MICROKERNEL_SRCS = [ |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c", |
| "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-spmm/gen/32x2-minmax-neonfma.c", |
| "src/f32-spmm/gen/32x4-minmax-neonfma.c", |
| "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c", |
| "src/f32-vsqrt/gen/neon-sqrt-x4.c", |
| "src/x8-lut/gen/lut-neon-tbx128x4-x64.c", |
| ] |
| |
| ALL_AARCH64_NEON_MICROKERNEL_SRCS = [ |
| "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c", |
| "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c", |
| "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c", |
| "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c", |
| "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c", |
| "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c", |
| "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c", |
| "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c", |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c", |
| "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c", |
| "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c", |
| "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c", |
| "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c", |
| "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c", |
| "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c", |
| "src/f32-spmm/gen/4x2-minmax-neonfma.c", |
| "src/f32-spmm/gen/4x4-minmax-neonfma.c", |
| "src/f32-spmm/gen/8x2-minmax-neonfma.c", |
| "src/f32-spmm/gen/8x4-minmax-neonfma.c", |
| "src/f32-spmm/gen/12x2-minmax-neonfma.c", |
| "src/f32-spmm/gen/12x4-minmax-neonfma.c", |
| "src/f32-spmm/gen/16x2-minmax-neonfma.c", |
| "src/f32-spmm/gen/16x4-minmax-neonfma.c", |
| "src/f32-spmm/gen/32x2-minmax-neonfma.c", |
| "src/f32-spmm/gen/32x4-minmax-neonfma.c", |
| "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c", |
| "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c", |
| "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c", |
| "src/f32-vsqrt/gen/neon-sqrt-x4.c", |
| "src/f32-vsqrt/gen/neon-sqrt-x8.c", |
| "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c", |
| "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c", |
| "src/math/sigmoid-neonfma-rr1-p5-div.c", |
| "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c", |
| "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c", |
| "src/math/sigmoid-neonfma-rr2-p5-div.c", |
| "src/x8-lut/gen/lut-neon-tbx128x4-x16.c", |
| "src/x8-lut/gen/lut-neon-tbx128x4-x32.c", |
| "src/x8-lut/gen/lut-neon-tbx128x4-x48.c", |
| "src/x8-lut/gen/lut-neon-tbx128x4-x64.c", |
| ] |
| |
| PROD_NEONV8_MICROKERNEL_SRCS = [ |
| "src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c", |
| "src/f32-vrnd/gen/vrndd-neonv8-x8.c", |
| "src/f32-vrnd/gen/vrndne-neonv8-x8.c", |
| "src/f32-vrnd/gen/vrndu-neonv8-x8.c", |
| "src/f32-vrnd/gen/vrndz-neonv8-x8.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c", |
| "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| ] |
| |
| ALL_NEONV8_MICROKERNEL_SRCS = [ |
| "src/f32-qs8-vcvt/gen/vcvt-neonv8-x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-neonv8-x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-neonv8-x24.c", |
| "src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-neonv8-x8.c", |
| "src/f32-qu8-vcvt/gen/vcvt-neonv8-x16.c", |
| "src/f32-qu8-vcvt/gen/vcvt-neonv8-x24.c", |
| "src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c", |
| "src/f32-vrnd/gen/vrndd-neonv8-x4.c", |
| "src/f32-vrnd/gen/vrndd-neonv8-x8.c", |
| "src/f32-vrnd/gen/vrndne-neonv8-x4.c", |
| "src/f32-vrnd/gen/vrndne-neonv8-x8.c", |
| "src/f32-vrnd/gen/vrndu-neonv8-x4.c", |
| "src/f32-vrnd/gen/vrndu-neonv8-x8.c", |
| "src/f32-vrnd/gen/vrndz-neonv8-x4.c", |
| "src/f32-vrnd/gen/vrndz-neonv8-x8.c", |
| "src/math/cvt-f32-qs8-neonv8.c", |
| "src/math/cvt-f32-qu8-neonv8.c", |
| "src/math/roundd-neonv8.c", |
| "src/math/roundne-neonv8.c", |
| "src/math/roundu-neonv8.c", |
| "src/math/roundz-neonv8.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| "src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| "src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| "src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| "src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| "src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c", |
| "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| "src/qs8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c", |
| "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c", |
| "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| "src/qu8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c", |
| "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c", |
| ] |
| |
| PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [ |
| "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c", |
| "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c", |
| "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c", |
| "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c", |
| "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c", |
| "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c", |
| "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c", |
| "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c", |
| ] |
| |
| ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [ |
| "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c", |
| "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c", |
| "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c", |
| "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c", |
| "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c", |
| "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c", |
| "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c", |
| "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c", |
| "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c", |
| "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c", |
| "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c", |
| "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c", |
| "src/f16-dwconv/gen/up32x4-minmax-neonfp16arith-acc2.c", |
| "src/f16-dwconv/gen/up32x4-minmax-neonfp16arith.c", |
| "src/f16-dwconv/gen/up32x9-minmax-neonfp16arith-acc2.c", |
| "src/f16-dwconv/gen/up32x9-minmax-neonfp16arith.c", |
| "src/f16-dwconv/gen/up32x25-minmax-neonfp16arith-acc2.c", |
| "src/f16-dwconv/gen/up32x25-minmax-neonfp16arith.c", |
| "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c", |
| "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c", |
| "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c", |
| "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c", |
| "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c", |
| "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c", |
| "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c", |
| "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c", |
| "src/f16-prelu/gen/neonfp16arith-2x8.c", |
| "src/f16-prelu/gen/neonfp16arith-2x16.c", |
| "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c", |
| "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c", |
| "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c", |
| "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c", |
| "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c", |
| "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c", |
| "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c", |
| "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c", |
| "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c", |
| "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c", |
| "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c", |
| "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c", |
| "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c", |
| "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c", |
| "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c", |
| "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c", |
| "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c", |
| "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c", |
| "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c", |
| ] |
| |
| PROD_NEONDOT_MICROKERNEL_SRCS = [ |
| "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c", |
| "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| ] |
| |
| ALL_NEONDOT_MICROKERNEL_SRCS = [ |
| "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c", |
| "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c", |
| "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c", |
| "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c", |
| "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c", |
| "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| "src/qs8-gemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-gemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| "src/qs8-gemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-gemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| "src/qs8-igemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| "src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/1x32c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/2x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/2x16c4-minmax-fp32-neondot.c", |
| "src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/2x32c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/3x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/3x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/3x32c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| "src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/5x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/5x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-gemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| "src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/1x32c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/2x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/2x16c4-minmax-fp32-neondot.c", |
| "src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/2x32c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/3x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/3x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/3x32c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| "src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/5x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/5x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| "src/qu8-igemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| ] |
| |
| PROD_SSE_MICROKERNEL_SRCS = [ |
| "src/f32-avgpool/9p8x-minmax-sse-c4.c", |
| "src/f32-avgpool/9x-minmax-sse-c4.c", |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c", |
| "src/f32-dwconv/gen/up8x3-minmax-sse.c", |
| "src/f32-dwconv/gen/up8x4-minmax-sse.c", |
| "src/f32-dwconv/gen/up8x9-minmax-sse.c", |
| "src/f32-dwconv/gen/up8x25-minmax-sse.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c", |
| "src/f32-gavgpool-cw/sse-x4.c", |
| "src/f32-gavgpool/7p7x-minmax-sse-c4.c", |
| "src/f32-gavgpool/7x-minmax-sse-c4.c", |
| "src/f32-gemm/gen/1x8-minmax-sse-load1.c", |
| "src/f32-gemm/gen/4x2c4-minmax-sse.c", |
| "src/f32-gemm/gen/4x8-minmax-sse-load1.c", |
| "src/f32-ibilinear-chw/gen/sse-p8.c", |
| "src/f32-ibilinear/gen/sse-c8.c", |
| "src/f32-igemm/gen/1x8-minmax-sse-load1.c", |
| "src/f32-igemm/gen/4x2c4-minmax-sse.c", |
| "src/f32-igemm/gen/4x8-minmax-sse-load1.c", |
| "src/f32-maxpool/9p8x-minmax-sse-c4.c", |
| "src/f32-pavgpool/9p8x-minmax-sse-c4.c", |
| "src/f32-pavgpool/9x-minmax-sse-c4.c", |
| "src/f32-rmax/sse.c", |
| "src/f32-spmm/gen/32x1-minmax-sse.c", |
| "src/f32-vbinary/gen/vadd-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vmax-sse-x8.c", |
| "src/f32-vbinary/gen/vmaxc-sse-x8.c", |
| "src/f32-vbinary/gen/vmin-sse-x8.c", |
| "src/f32-vbinary/gen/vminc-sse-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vsqrdiff-sse-x8.c", |
| "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c", |
| "src/f32-vclamp/gen/vclamp-sse-x8.c", |
| "src/f32-vhswish/gen/vhswish-sse-x8.c", |
| "src/f32-vlrelu/gen/vlrelu-sse-x8.c", |
| "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c", |
| "src/f32-vsqrt/gen/sse-sqrt-x4.c", |
| "src/f32-vunary/gen/vabs-sse-x8.c", |
| "src/f32-vunary/gen/vneg-sse-x8.c", |
| "src/f32-vunary/gen/vsqr-sse-x8.c", |
| "src/x32-packx/x4-sse.c", |
| ] |
| |
| ALL_SSE_MICROKERNEL_SRCS = [ |
| "src/f32-avgpool/9p8x-minmax-sse-c4.c", |
| "src/f32-avgpool/9x-minmax-sse-c4.c", |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c", |
| "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c", |
| "src/f32-dwconv/gen/up4x3-minmax-sse-acc2.c", |
| "src/f32-dwconv/gen/up4x3-minmax-sse.c", |
| "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c", |
| "src/f32-dwconv/gen/up4x4-minmax-sse.c", |
| "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c", |
| "src/f32-dwconv/gen/up4x9-minmax-sse.c", |
| "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c", |
| "src/f32-dwconv/gen/up4x25-minmax-sse.c", |
| "src/f32-dwconv/gen/up8x3-minmax-sse-acc2.c", |
| "src/f32-dwconv/gen/up8x3-minmax-sse.c", |
| "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c", |
| "src/f32-dwconv/gen/up8x4-minmax-sse.c", |
| "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c", |
| "src/f32-dwconv/gen/up8x9-minmax-sse.c", |
| "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c", |
| "src/f32-dwconv/gen/up8x25-minmax-sse.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c", |
| "src/f32-gavgpool-cw/sse-x4.c", |
| "src/f32-gavgpool/7p7x-minmax-sse-c4.c", |
| "src/f32-gavgpool/7x-minmax-sse-c4.c", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c", |
| "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c", |
| "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c", |
| "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c", |
| "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c", |
| "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c", |
| "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c", |
| "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c", |
| "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c", |
| "src/f32-gemm/gen/1x8-minmax-sse-dup.c", |
| "src/f32-gemm/gen/1x8-minmax-sse-load1.c", |
| "src/f32-gemm/gen/1x8s4-minmax-sse.c", |
| "src/f32-gemm/gen/3x8-minmax-sse-dup.c", |
| "src/f32-gemm/gen/3x8-minmax-sse-load1.c", |
| "src/f32-gemm/gen/3x8s4-minmax-sse.c", |
| "src/f32-gemm/gen/4x2c4-minmax-sse.c", |
| "src/f32-gemm/gen/4x8-minmax-sse-dup.c", |
| "src/f32-gemm/gen/4x8-minmax-sse-load1.c", |
| "src/f32-gemm/gen/4x8s4-minmax-sse.c", |
| "src/f32-gemm/gen/5x8-minmax-sse-dup.c", |
| "src/f32-gemm/gen/5x8-minmax-sse-load1.c", |
| "src/f32-gemm/gen/5x8s4-minmax-sse.c", |
| "src/f32-ibilinear-chw/gen/sse-p4.c", |
| "src/f32-ibilinear-chw/gen/sse-p8.c", |
| "src/f32-ibilinear/gen/sse-c4.c", |
| "src/f32-ibilinear/gen/sse-c8.c", |
| "src/f32-igemm/gen/1x8-minmax-sse-dup.c", |
| "src/f32-igemm/gen/1x8-minmax-sse-load1.c", |
| "src/f32-igemm/gen/1x8s4-minmax-sse.c", |
| "src/f32-igemm/gen/3x8-minmax-sse-dup.c", |
| "src/f32-igemm/gen/3x8-minmax-sse-load1.c", |
| "src/f32-igemm/gen/3x8s4-minmax-sse.c", |
| "src/f32-igemm/gen/4x2c4-minmax-sse.c", |
| "src/f32-igemm/gen/4x8-minmax-sse-dup.c", |
| "src/f32-igemm/gen/4x8-minmax-sse-load1.c", |
| "src/f32-igemm/gen/4x8s4-minmax-sse.c", |
| "src/f32-igemm/gen/5x8-minmax-sse-dup.c", |
| "src/f32-igemm/gen/5x8-minmax-sse-load1.c", |
| "src/f32-igemm/gen/5x8s4-minmax-sse.c", |
| "src/f32-maxpool/9p8x-minmax-sse-c4.c", |
| "src/f32-pavgpool/9p8x-minmax-sse-c4.c", |
| "src/f32-pavgpool/9x-minmax-sse-c4.c", |
| "src/f32-ppmm/gen/4x8-minmax-sse.c", |
| "src/f32-prelu/gen/sse-2x4.c", |
| "src/f32-prelu/gen/sse-2x8.c", |
| "src/f32-rmax/sse.c", |
| "src/f32-spmm/gen/4x1-minmax-sse.c", |
| "src/f32-spmm/gen/8x1-minmax-sse.c", |
| "src/f32-spmm/gen/16x1-minmax-sse.c", |
| "src/f32-spmm/gen/32x1-minmax-sse.c", |
| "src/f32-vbinary/gen/vadd-minmax-sse-x4.c", |
| "src/f32-vbinary/gen/vadd-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c", |
| "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c", |
| "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c", |
| "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vmax-sse-x4.c", |
| "src/f32-vbinary/gen/vmax-sse-x8.c", |
| "src/f32-vbinary/gen/vmaxc-sse-x4.c", |
| "src/f32-vbinary/gen/vmaxc-sse-x8.c", |
| "src/f32-vbinary/gen/vmin-sse-x4.c", |
| "src/f32-vbinary/gen/vmin-sse-x8.c", |
| "src/f32-vbinary/gen/vminc-sse-x4.c", |
| "src/f32-vbinary/gen/vminc-sse-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-sse-x4.c", |
| "src/f32-vbinary/gen/vmul-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c", |
| "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vsqrdiff-sse-x4.c", |
| "src/f32-vbinary/gen/vsqrdiff-sse-x8.c", |
| "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c", |
| "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-sse-x4.c", |
| "src/f32-vbinary/gen/vsub-minmax-sse-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c", |
| "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c", |
| "src/f32-vclamp/gen/vclamp-sse-x4.c", |
| "src/f32-vclamp/gen/vclamp-sse-x8.c", |
| "src/f32-vhswish/gen/vhswish-sse-x4.c", |
| "src/f32-vhswish/gen/vhswish-sse-x8.c", |
| "src/f32-vlrelu/gen/vlrelu-sse-x4.c", |
| "src/f32-vlrelu/gen/vlrelu-sse-x8.c", |
| "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c", |
| "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c", |
| "src/f32-vrelu/gen/vrelu-sse-x4.c", |
| "src/f32-vrelu/gen/vrelu-sse-x8.c", |
| "src/f32-vsqrt/gen/sse-sqrt-x4.c", |
| "src/f32-vsqrt/gen/sse-sqrt-x8.c", |
| "src/f32-vunary/gen/vabs-sse-x4.c", |
| "src/f32-vunary/gen/vabs-sse-x8.c", |
| "src/f32-vunary/gen/vneg-sse-x4.c", |
| "src/f32-vunary/gen/vneg-sse-x8.c", |
| "src/f32-vunary/gen/vsqr-sse-x4.c", |
| "src/f32-vunary/gen/vsqr-sse-x8.c", |
| "src/math/roundd-sse-addsub.c", |
| "src/math/roundne-sse-addsub.c", |
| "src/math/roundu-sse-addsub.c", |
| "src/math/roundz-sse-addsub.c", |
| "src/math/sqrt-sse-hh1mac.c", |
| "src/math/sqrt-sse-nr1mac.c", |
| "src/math/sqrt-sse-nr2mac.c", |
| "src/x32-packx/x4-sse.c", |
| "src/x32-transpose/4x4-sse.c", |
| ] |
| |
| PROD_SSE2_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c", |
| "src/f32-argmaxpool/4x-sse2-c4.c", |
| "src/f32-argmaxpool/9p8x-sse2-c4.c", |
| "src/f32-argmaxpool/9x-sse2-c4.c", |
| "src/f32-f16-vcvt/gen/vcvt-sse2-x16.c", |
| "src/f32-prelu/gen/sse2-2x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c", |
| "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c", |
| "src/f32-vlrelu/gen/vlrelu-sse2-x8.c", |
| "src/f32-vrnd/gen/vrndd-sse2-x8.c", |
| "src/f32-vrnd/gen/vrndne-sse2-x8.c", |
| "src/f32-vrnd/gen/vrndu-sse2-x8.c", |
| "src/f32-vrnd/gen/vrndz-sse2-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| "src/qu8-avgpool/9p8x-minmax-sse2-c8.c", |
| "src/qu8-avgpool/9x-minmax-sse2-c8.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c", |
| "src/qu8-gavgpool/7x-minmax-sse2-c8.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| "src/s8-ibilinear/gen/sse2-c8.c", |
| "src/s8-maxpool/9p8x-minmax-sse2-c16.c", |
| "src/s8-vclamp/sse2-x64.c", |
| "src/u8-ibilinear/gen/sse2-c8.c", |
| "src/u8-maxpool/9p8x-minmax-sse2-c16.c", |
| "src/u8-rmax/sse2.c", |
| "src/u8-vclamp/sse2-x64.c", |
| "src/x8-zip/x2-sse2.c", |
| "src/x8-zip/x3-sse2.c", |
| "src/x8-zip/x4-sse2.c", |
| "src/x8-zip/xm-sse2.c", |
| "src/x32-unpool/sse2.c", |
| "src/x32-zip/x2-sse2.c", |
| "src/x32-zip/x3-sse2.c", |
| "src/x32-zip/x4-sse2.c", |
| "src/x32-zip/xm-sse2.c", |
| "src/xx-fill/sse2-x64.c", |
| "src/xx-pad/sse2.c", |
| ] |
| |
| ALL_SSE2_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x24.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x24.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x32.c", |
| "src/f32-argmaxpool/4x-sse2-c4.c", |
| "src/f32-argmaxpool/9p8x-sse2-c4.c", |
| "src/f32-argmaxpool/9x-sse2-c4.c", |
| "src/f32-f16-vcvt/gen/vcvt-sse2-x8.c", |
| "src/f32-f16-vcvt/gen/vcvt-sse2-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-sse2-x24.c", |
| "src/f32-f16-vcvt/gen/vcvt-sse2-x32.c", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c", |
| "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c", |
| "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c", |
| "src/f32-gemm/gen/1x8-minmax-sse2-dup.c", |
| "src/f32-gemm/gen/3x8-minmax-sse2-dup.c", |
| "src/f32-gemm/gen/4x8-minmax-sse2-dup.c", |
| "src/f32-gemm/gen/5x8-minmax-sse2-dup.c", |
| "src/f32-igemm/gen/1x8-minmax-sse2-dup.c", |
| "src/f32-igemm/gen/3x8-minmax-sse2-dup.c", |
| "src/f32-igemm/gen/4x8-minmax-sse2-dup.c", |
| "src/f32-igemm/gen/5x8-minmax-sse2-dup.c", |
| "src/f32-prelu/gen/sse2-2x4.c", |
| "src/f32-prelu/gen/sse2-2x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-sse2-x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-sse2-x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-sse2-x24.c", |
| "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-sse2-x8.c", |
| "src/f32-qu8-vcvt/gen/vcvt-sse2-x16.c", |
| "src/f32-qu8-vcvt/gen/vcvt-sse2-x24.c", |
| "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c", |
| "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c", |
| "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c", |
| "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c", |
| "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c", |
| "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c", |
| "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c", |
| "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c", |
| "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c", |
| "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c", |
| "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c", |
| "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c", |
| "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c", |
| "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c", |
| "src/f32-vlrelu/gen/vlrelu-sse2-x4.c", |
| "src/f32-vlrelu/gen/vlrelu-sse2-x8.c", |
| "src/f32-vrnd/gen/vrndd-sse2-x4.c", |
| "src/f32-vrnd/gen/vrndd-sse2-x8.c", |
| "src/f32-vrnd/gen/vrndne-sse2-x4.c", |
| "src/f32-vrnd/gen/vrndne-sse2-x8.c", |
| "src/f32-vrnd/gen/vrndu-sse2-x4.c", |
| "src/f32-vrnd/gen/vrndu-sse2-x8.c", |
| "src/f32-vrnd/gen/vrndz-sse2-x4.c", |
| "src/f32-vrnd/gen/vrndz-sse2-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c", |
| "src/math/cvt-f16-f32-sse2-int16.c", |
| "src/math/cvt-f16-f32-sse2-int32.c", |
| "src/math/cvt-f32-f16-sse2.c", |
| "src/math/exp-sse2-rr2-lut64-p2.c", |
| "src/math/exp-sse2-rr2-p5.c", |
| "src/math/expm1minus-sse2-rr2-lut16-p3.c", |
| "src/math/expm1minus-sse2-rr2-p6.c", |
| "src/math/expminus-sse2-rr2-p5.c", |
| "src/math/roundd-sse2-cvt.c", |
| "src/math/roundne-sse2-cvt.c", |
| "src/math/roundu-sse2-cvt.c", |
| "src/math/roundz-sse2-cvt.c", |
| "src/math/sigmoid-sse2-rr2-lut64-p2-div.c", |
| "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c", |
| "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c", |
| "src/math/sigmoid-sse2-rr2-p5-div.c", |
| "src/math/sigmoid-sse2-rr2-p5-nr1.c", |
| "src/math/sigmoid-sse2-rr2-p5-nr2.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c", |
| "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-sse2-x8.c", |
| "src/qs8-f32-vcvt/gen/vcvt-sse2-x16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-sse2-x24.c", |
| "src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c", |
| "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse2.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse2.c", |
| "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse2.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse2.c", |
| "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse2.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse2.c", |
| "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse2.c", |
| "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qs8-requantization/fp32-sse2.c", |
| "src/qs8-requantization/gemmlowp-sse2.c", |
| "src/qs8-requantization/rndna-sse2.c", |
| "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c", |
| "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c", |
| "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c", |
| "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c", |
| "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c", |
| "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c", |
| "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| "src/qu8-avgpool/9p8x-minmax-sse2-c8.c", |
| "src/qu8-avgpool/9x-minmax-sse2-c8.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-sse2-x8.c", |
| "src/qu8-f32-vcvt/gen/vcvt-sse2-x16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-sse2-x24.c", |
| "src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c", |
| "src/qu8-gavgpool/7x-minmax-sse2-c8.c", |
| "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| "src/qu8-requantization/fp32-sse2.c", |
| "src/qu8-requantization/gemmlowp-sse2.c", |
| "src/qu8-requantization/rndna-sse2.c", |
| "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c", |
| "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c", |
| "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| "src/s8-ibilinear/gen/sse2-c8.c", |
| "src/s8-ibilinear/gen/sse2-c16.c", |
| "src/s8-maxpool/9p8x-minmax-sse2-c16.c", |
| "src/s8-vclamp/sse2-x64.c", |
| "src/u8-ibilinear/gen/sse2-c8.c", |
| "src/u8-ibilinear/gen/sse2-c16.c", |
| "src/u8-maxpool/9p8x-minmax-sse2-c16.c", |
| "src/u8-rmax/sse2.c", |
| "src/u8-vclamp/sse2-x64.c", |
| "src/x8-zip/x2-sse2.c", |
| "src/x8-zip/x3-sse2.c", |
| "src/x8-zip/x4-sse2.c", |
| "src/x8-zip/xm-sse2.c", |
| "src/x16-transpose/4x8-sse2.c", |
| "src/x32-unpool/sse2.c", |
| "src/x32-zip/x2-sse2.c", |
| "src/x32-zip/x3-sse2.c", |
| "src/x32-zip/x4-sse2.c", |
| "src/x32-zip/xm-sse2.c", |
| "src/xx-fill/sse2-x64.c", |
| "src/xx-pad/sse2.c", |
| ] |
| |
| PROD_SSSE3_MICROKERNEL_SRCS = [ |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c", |
| ] |
| |
| ALL_SSSE3_MICROKERNEL_SRCS = [ |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c", |
| "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c", |
| "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-ssse3.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c", |
| "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-ssse3.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c", |
| "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-ssse3.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c", |
| "src/qs8-requantization/gemmlowp-ssse3.c", |
| "src/qs8-requantization/rndna-ssse3.c", |
| "src/qu8-requantization/gemmlowp-ssse3.c", |
| "src/qu8-requantization/rndna-ssse3.c", |
| "src/x8-lut/gen/lut-ssse3-x16.c", |
| "src/x8-lut/gen/lut-ssse3-x32.c", |
| ] |
| |
| PROD_SSE41_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-sse41-x8.c", |
| "src/f32-prelu/gen/sse41-2x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c", |
| "src/f32-vlrelu/gen/vlrelu-sse41-x8.c", |
| "src/f32-vrnd/gen/vrndd-sse41-x8.c", |
| "src/f32-vrnd/gen/vrndne-sse41-x8.c", |
| "src/f32-vrnd/gen/vrndu-sse41-x8.c", |
| "src/f32-vrnd/gen/vrndz-sse41-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| "src/s8-ibilinear/gen/sse41-c16.c", |
| "src/s8-maxpool/9p8x-minmax-sse41-c16.c", |
| "src/s8-vclamp/sse41-x64.c", |
| "src/u8-ibilinear/gen/sse41-c16.c", |
| ] |
| |
| ALL_SSE41_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x24.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x32.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x24.c", |
| "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x32.c", |
| "src/f32-f16-vcvt/gen/vcvt-sse41-x8.c", |
| "src/f32-f16-vcvt/gen/vcvt-sse41-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-sse41-x24.c", |
| "src/f32-f16-vcvt/gen/vcvt-sse41-x32.c", |
| "src/f32-prelu/gen/sse41-2x4.c", |
| "src/f32-prelu/gen/sse41-2x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-sse41-x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-sse41-x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-sse41-x24.c", |
| "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c", |
| "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c", |
| "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c", |
| "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c", |
| "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c", |
| "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c", |
| "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c", |
| "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c", |
| "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c", |
| "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c", |
| "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c", |
| "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c", |
| "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c", |
| "src/f32-vlrelu/gen/vlrelu-sse41-x4.c", |
| "src/f32-vlrelu/gen/vlrelu-sse41-x8.c", |
| "src/f32-vrnd/gen/vrndd-sse41-x4.c", |
| "src/f32-vrnd/gen/vrndd-sse41-x8.c", |
| "src/f32-vrnd/gen/vrndne-sse41-x4.c", |
| "src/f32-vrnd/gen/vrndne-sse41-x8.c", |
| "src/f32-vrnd/gen/vrndu-sse41-x4.c", |
| "src/f32-vrnd/gen/vrndu-sse41-x8.c", |
| "src/f32-vrnd/gen/vrndz-sse41-x4.c", |
| "src/f32-vrnd/gen/vrndz-sse41-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c", |
| "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c", |
| "src/math/cvt-f16-f32-sse41-int16.c", |
| "src/math/cvt-f16-f32-sse41-int32.c", |
| "src/math/cvt-f32-f16-sse41.c", |
| "src/math/roundd-sse41.c", |
| "src/math/roundne-sse41.c", |
| "src/math/roundu-sse41.c", |
| "src/math/roundz-sse41.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c", |
| "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c", |
| "src/qs8-f32-vcvt/gen/vcvt-sse41-x8.c", |
| "src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-sse41-x24.c", |
| "src/qs8-f32-vcvt/gen/vcvt-sse41-x32.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c", |
| "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c", |
| "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c", |
| "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse41.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse41.c", |
| "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse41.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse41.c", |
| "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse41.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse41.c", |
| "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse41.c", |
| "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qs8-requantization/fp32-sse4.c", |
| "src/qs8-requantization/gemmlowp-sse4.c", |
| "src/qs8-requantization/rndna-sse4.c", |
| "src/qs8-requantization/rndnu-sse4-sra.c", |
| "src/qs8-requantization/rndnu-sse4-srl.c", |
| "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c", |
| "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c", |
| "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c", |
| "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c", |
| "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c", |
| "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c", |
| "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c", |
| "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c", |
| "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c", |
| "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c", |
| "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c", |
| "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c", |
| "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c", |
| "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c", |
| "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| "src/qu8-f32-vcvt/gen/vcvt-sse41-x8.c", |
| "src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-sse41-x24.c", |
| "src/qu8-f32-vcvt/gen/vcvt-sse41-x32.c", |
| "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| "src/qu8-requantization/gemmlowp-sse4.c", |
| "src/qu8-requantization/rndna-sse4.c", |
| "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c", |
| "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c", |
| "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c", |
| "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c", |
| "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c", |
| "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c", |
| "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| "src/s8-ibilinear/gen/sse41-c8.c", |
| "src/s8-ibilinear/gen/sse41-c16.c", |
| "src/s8-maxpool/9p8x-minmax-sse41-c16.c", |
| "src/s8-vclamp/sse41-x64.c", |
| "src/u8-ibilinear/gen/sse41-c8.c", |
| "src/u8-ibilinear/gen/sse41-c16.c", |
| ] |
| |
| PROD_AVX_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c", |
| "src/f32-dwconv/gen/up8x25-minmax-avx.c", |
| "src/f32-dwconv/gen/up16x3-minmax-avx.c", |
| "src/f32-dwconv/gen/up16x4-minmax-avx.c", |
| "src/f32-dwconv/gen/up16x9-minmax-avx.c", |
| "src/f32-f16-vcvt/gen/vcvt-avx-x24.c", |
| "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c", |
| "src/f32-prelu/gen/avx-2x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx-x32.c", |
| "src/f32-vbinary/gen/vadd-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vmax-avx-x16.c", |
| "src/f32-vbinary/gen/vmaxc-avx-x16.c", |
| "src/f32-vbinary/gen/vmin-avx-x16.c", |
| "src/f32-vbinary/gen/vminc-avx-x16.c", |
| "src/f32-vbinary/gen/vmul-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vsqrdiff-avx-x16.c", |
| "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c", |
| "src/f32-vbinary/gen/vsub-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c", |
| "src/f32-vclamp/gen/vclamp-avx-x16.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c", |
| "src/f32-vhswish/gen/vhswish-avx-x16.c", |
| "src/f32-vlrelu/gen/vlrelu-avx-x16.c", |
| "src/f32-vrnd/gen/vrndd-avx-x16.c", |
| "src/f32-vrnd/gen/vrndne-avx-x16.c", |
| "src/f32-vrnd/gen/vrndu-avx-x16.c", |
| "src/f32-vrnd/gen/vrndz-avx-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c", |
| "src/f32-vsqrt/gen/avx-sqrt-x8.c", |
| "src/f32-vunary/gen/vabs-avx-x16.c", |
| "src/f32-vunary/gen/vneg-avx-x16.c", |
| "src/f32-vunary/gen/vsqr-avx-x16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx-x32.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx-x32.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| "src/x8-lut/gen/lut-avx-x64.c", |
| ] |
| |
| ALL_AVX_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-avx-int16-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-avx-int16-x24.c", |
| "src/f16-f32-vcvt/gen/vcvt-avx-int16-x32.c", |
| "src/f16-f32-vcvt/gen/vcvt-avx-int32-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-avx-int32-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-avx-int32-x24.c", |
| "src/f16-f32-vcvt/gen/vcvt-avx-int32-x32.c", |
| "src/f32-dwconv/gen/up8x3-minmax-avx-acc2.c", |
| "src/f32-dwconv/gen/up8x3-minmax-avx.c", |
| "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c", |
| "src/f32-dwconv/gen/up8x4-minmax-avx.c", |
| "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c", |
| "src/f32-dwconv/gen/up8x9-minmax-avx.c", |
| "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c", |
| "src/f32-dwconv/gen/up8x25-minmax-avx.c", |
| "src/f32-dwconv/gen/up16x3-minmax-avx-acc2.c", |
| "src/f32-dwconv/gen/up16x3-minmax-avx.c", |
| "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c", |
| "src/f32-dwconv/gen/up16x4-minmax-avx.c", |
| "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c", |
| "src/f32-dwconv/gen/up16x9-minmax-avx.c", |
| "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c", |
| "src/f32-dwconv/gen/up16x25-minmax-avx.c", |
| "src/f32-f16-vcvt/gen/vcvt-avx-x8.c", |
| "src/f32-f16-vcvt/gen/vcvt-avx-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-avx-x24.c", |
| "src/f32-f16-vcvt/gen/vcvt-avx-x32.c", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c", |
| "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c", |
| "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c", |
| "src/f32-prelu/gen/avx-2x8.c", |
| "src/f32-prelu/gen/avx-2x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx-x8.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx-x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx-x24.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx-x8.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx-x16.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx-x24.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx-x32.c", |
| "src/f32-rmax/avx.c", |
| "src/f32-vbinary/gen/vadd-minmax-avx-x8.c", |
| "src/f32-vbinary/gen/vadd-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c", |
| "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c", |
| "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c", |
| "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vmax-avx-x8.c", |
| "src/f32-vbinary/gen/vmax-avx-x16.c", |
| "src/f32-vbinary/gen/vmaxc-avx-x8.c", |
| "src/f32-vbinary/gen/vmaxc-avx-x16.c", |
| "src/f32-vbinary/gen/vmin-avx-x8.c", |
| "src/f32-vbinary/gen/vmin-avx-x16.c", |
| "src/f32-vbinary/gen/vminc-avx-x8.c", |
| "src/f32-vbinary/gen/vminc-avx-x16.c", |
| "src/f32-vbinary/gen/vmul-minmax-avx-x8.c", |
| "src/f32-vbinary/gen/vmul-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c", |
| "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vsqrdiff-avx-x8.c", |
| "src/f32-vbinary/gen/vsqrdiff-avx-x16.c", |
| "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c", |
| "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c", |
| "src/f32-vbinary/gen/vsub-minmax-avx-x8.c", |
| "src/f32-vbinary/gen/vsub-minmax-avx-x16.c", |
| "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c", |
| "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c", |
| "src/f32-vclamp/gen/vclamp-avx-x8.c", |
| "src/f32-vclamp/gen/vclamp-avx-x16.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c", |
| "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c", |
| "src/f32-velu/gen/velu-avx-rr2-p6-x8.c", |
| "src/f32-velu/gen/velu-avx-rr2-p6-x16.c", |
| "src/f32-velu/gen/velu-avx-rr2-p6-x24.c", |
| "src/f32-velu/gen/velu-avx-rr2-p6-x32.c", |
| "src/f32-velu/gen/velu-avx-rr2-p6-x40.c", |
| "src/f32-velu/gen/velu-avx-rr2-p6-x48.c", |
| "src/f32-vhswish/gen/vhswish-avx-x8.c", |
| "src/f32-vhswish/gen/vhswish-avx-x16.c", |
| "src/f32-vlrelu/gen/vlrelu-avx-x8.c", |
| "src/f32-vlrelu/gen/vlrelu-avx-x16.c", |
| "src/f32-vrelu/gen/vrelu-avx-x8.c", |
| "src/f32-vrelu/gen/vrelu-avx-x16.c", |
| "src/f32-vrnd/gen/vrndd-avx-x8.c", |
| "src/f32-vrnd/gen/vrndd-avx-x16.c", |
| "src/f32-vrnd/gen/vrndne-avx-x8.c", |
| "src/f32-vrnd/gen/vrndne-avx-x16.c", |
| "src/f32-vrnd/gen/vrndu-avx-x8.c", |
| "src/f32-vrnd/gen/vrndu-avx-x16.c", |
| "src/f32-vrnd/gen/vrndz-avx-x8.c", |
| "src/f32-vrnd/gen/vrndz-avx-x16.c", |
| "src/f32-vscale/avx-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c", |
| "src/f32-vsqrt/gen/avx-sqrt-x8.c", |
| "src/f32-vsqrt/gen/avx-sqrt-x16.c", |
| "src/f32-vunary/gen/vabs-avx-x8.c", |
| "src/f32-vunary/gen/vabs-avx-x16.c", |
| "src/f32-vunary/gen/vneg-avx-x8.c", |
| "src/f32-vunary/gen/vneg-avx-x16.c", |
| "src/f32-vunary/gen/vsqr-avx-x8.c", |
| "src/f32-vunary/gen/vsqr-avx-x16.c", |
| "src/math/exp-avx-rr2-p5.c", |
| "src/math/expm1minus-avx-rr2-lut4-p4-perm.c", |
| "src/math/expm1minus-avx-rr2-lut16-p3.c", |
| "src/math/expm1minus-avx-rr2-p6.c", |
| "src/math/sigmoid-avx-rr2-lut64-p2-div.c", |
| "src/math/sigmoid-avx-rr2-p5-div.c", |
| "src/math/sigmoid-avx-rr2-p5-nr1.c", |
| "src/math/sigmoid-avx-rr2-p5-nr2.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c", |
| "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx-x8.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx-x16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx-x24.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx-x32.c", |
| "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-avx.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-avx.c", |
| "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-avx.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-avx.c", |
| "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-avx.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-avx.c", |
| "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-avx.c", |
| "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c", |
| "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c", |
| "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c", |
| "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c", |
| "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c", |
| "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c", |
| "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c", |
| "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c", |
| "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c", |
| "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c", |
| "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c", |
| "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c", |
| "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c", |
| "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c", |
| "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx-x8.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx-x16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx-x24.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx-x32.c", |
| "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c", |
| "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c", |
| "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c", |
| "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c", |
| "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c", |
| "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c", |
| "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| "src/x8-lut/gen/lut-avx-x16.c", |
| "src/x8-lut/gen/lut-avx-x32.c", |
| "src/x8-lut/gen/lut-avx-x48.c", |
| "src/x8-lut/gen/lut-avx-x64.c", |
| ] |
| |
| PROD_F16C_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-f16c-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-f16c-x16.c", |
| ] |
| |
| ALL_F16C_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-f16c-x8.c", |
| "src/f16-f32-vcvt/gen/vcvt-f16c-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-f16c-x8.c", |
| "src/f32-f16-vcvt/gen/vcvt-f16c-x16.c", |
| "src/math/cvt-f16-f32-f16c.c", |
| "src/math/cvt-f32-f16-f16c.c", |
| ] |
| |
| PROD_XOP_MICROKERNEL_SRCS = [ |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| ] |
| |
| ALL_XOP_MICROKERNEL_SRCS = [ |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c", |
| "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c", |
| "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-xop.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-xop.c", |
| "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-xop.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-xop.c", |
| "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-xop.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-xop.c", |
| "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-xop.c", |
| "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c", |
| "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c", |
| "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c", |
| "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c", |
| "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c", |
| "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c", |
| "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c", |
| ] |
| |
| PROD_FMA3_MICROKERNEL_SRCS = [ |
| "src/f32-dwconv/gen/up8x25-minmax-fma3.c", |
| "src/f32-dwconv/gen/up16x3-minmax-fma3.c", |
| "src/f32-dwconv/gen/up16x4-minmax-fma3.c", |
| "src/f32-dwconv/gen/up16x9-minmax-fma3.c", |
| "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c", |
| "src/f32-vhswish/gen/vhswish-fma3-x16.c", |
| ] |
| |
| ALL_FMA3_MICROKERNEL_SRCS = [ |
| "src/f32-dwconv/gen/up8x3-minmax-fma3-acc2.c", |
| "src/f32-dwconv/gen/up8x3-minmax-fma3.c", |
| "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c", |
| "src/f32-dwconv/gen/up8x4-minmax-fma3.c", |
| "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c", |
| "src/f32-dwconv/gen/up8x9-minmax-fma3.c", |
| "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c", |
| "src/f32-dwconv/gen/up8x25-minmax-fma3.c", |
| "src/f32-dwconv/gen/up16x3-minmax-fma3-acc2.c", |
| "src/f32-dwconv/gen/up16x3-minmax-fma3.c", |
| "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c", |
| "src/f32-dwconv/gen/up16x4-minmax-fma3.c", |
| "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c", |
| "src/f32-dwconv/gen/up16x9-minmax-fma3.c", |
| "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c", |
| "src/f32-dwconv/gen/up16x25-minmax-fma3.c", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c", |
| "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c", |
| "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c", |
| "src/f32-vhswish/gen/vhswish-fma3-x8.c", |
| "src/f32-vhswish/gen/vhswish-fma3-x16.c", |
| "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c", |
| "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c", |
| "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c", |
| "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c", |
| "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c", |
| "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c", |
| "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c", |
| "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c", |
| "src/math/sqrt-fma3-nr1fma.c", |
| "src/math/sqrt-fma3-nr1fma1adj.c", |
| "src/math/sqrt-fma3-nr2fma.c", |
| ] |
| |
| PROD_AVX2_MICROKERNEL_SRCS = [ |
| "src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| "src/x8-lut/gen/lut-avx2-x128.c", |
| ] |
| |
| ALL_AVX2_MICROKERNEL_SRCS = [ |
| "src/f32-qs8-vcvt/gen/vcvt-avx2-x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx2-x32.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx2-x48.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx2-x16.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx2-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx2-x48.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x64.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x72.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x80.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c", |
| "src/f32-raddexpminusmax/gen/avx2-p5-x96.c", |
| "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c", |
| "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c", |
| "src/f32-raddextexp/gen/avx2-p5-x64.c", |
| "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c", |
| "src/f32-raddextexp/gen/avx2-p5-x72.c", |
| "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c", |
| "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c", |
| "src/f32-raddextexp/gen/avx2-p5-x80.c", |
| "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c", |
| "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c", |
| "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c", |
| "src/f32-raddextexp/gen/avx2-p5-x96.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c", |
| "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c", |
| "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c", |
| "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c", |
| "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c", |
| "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c", |
| "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c", |
| "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c", |
| "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c", |
| "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c", |
| "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c", |
| "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c", |
| "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c", |
| "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x8.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x16.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x24.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x32.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x40.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x48.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x56.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x64.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x72.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x80.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x88.c", |
| "src/f32-vscaleextexp/gen/avx2-p5-x96.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c", |
| "src/math/exp-avx2-rr2-lut8-p3-perm.c", |
| "src/math/exp-avx2-rr2-lut8-p4-perm.c", |
| "src/math/exp-avx2-rr2-p5.c", |
| "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c", |
| "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c", |
| "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c", |
| "src/math/expm1minus-avx2-rr1-p6.c", |
| "src/math/expminus-avx2-rr2-p5.c", |
| "src/math/extexp-avx2-p5.c", |
| "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c", |
| "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c", |
| "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c", |
| "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c", |
| "src/math/sigmoid-avx2-rr1-p5-div.c", |
| "src/math/sigmoid-avx2-rr1-p5-nr1fma.c", |
| "src/math/sigmoid-avx2-rr1-p5-nr2fma.c", |
| "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c", |
| "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c", |
| "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c", |
| "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c", |
| "src/math/sigmoid-avx2-rr2-p5-div.c", |
| "src/math/sigmoid-avx2-rr2-p5-nr1fma.c", |
| "src/math/sigmoid-avx2-rr2-p5-nr2fma.c", |
| "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c", |
| "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c", |
| "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c", |
| "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c", |
| "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c", |
| "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c", |
| "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c", |
| "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx2-x8.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx2-x24.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx2-x32.c", |
| "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c", |
| "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c", |
| "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c", |
| "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c", |
| "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c", |
| "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c", |
| "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c", |
| "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c", |
| "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c", |
| "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx2-x8.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx2-x24.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx2-x32.c", |
| "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c", |
| "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c", |
| "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| "src/x8-lut/gen/lut-avx2-x32.c", |
| "src/x8-lut/gen/lut-avx2-x64.c", |
| "src/x8-lut/gen/lut-avx2-x96.c", |
| "src/x8-lut/gen/lut-avx2-x128.c", |
| ] |
| |
| PROD_AVX512F_MICROKERNEL_SRCS = [ |
| "src/f32-dwconv/gen/up16x3-minmax-avx512f.c", |
| "src/f32-dwconv/gen/up16x4-minmax-avx512f.c", |
| "src/f32-dwconv/gen/up16x9-minmax-avx512f.c", |
| "src/f32-dwconv/gen/up16x25-minmax-avx512f.c", |
| "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c", |
| "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c", |
| "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c", |
| "src/f32-prelu/gen/avx512f-2x16.c", |
| "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vmaxc-avx512f-x32.c", |
| "src/f32-vbinary/gen/vmin-avx512f-x32.c", |
| "src/f32-vbinary/gen/vminc-avx512f-x32.c", |
| "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c", |
| "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c", |
| "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c", |
| "src/f32-vclamp/gen/vclamp-avx512f-x16.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c", |
| "src/f32-vhswish/gen/vhswish-avx512f-x16.c", |
| "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c", |
| "src/f32-vrnd/gen/vrndd-avx512f-x16.c", |
| "src/f32-vrnd/gen/vrndne-avx512f-x16.c", |
| "src/f32-vrnd/gen/vrndu-avx512f-x16.c", |
| "src/f32-vrnd/gen/vrndz-avx512f-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c", |
| "src/f32-vunary/gen/vabs-avx512f-x16.c", |
| "src/f32-vunary/gen/vneg-avx512f-x16.c", |
| "src/f32-vunary/gen/vsqr-avx512f-x16.c", |
| ] |
| |
| ALL_AVX512F_MICROKERNEL_SRCS = [ |
| "src/f32-dwconv/gen/up16x3-minmax-avx512f-acc2.c", |
| "src/f32-dwconv/gen/up16x3-minmax-avx512f.c", |
| "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c", |
| "src/f32-dwconv/gen/up16x4-minmax-avx512f.c", |
| "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c", |
| "src/f32-dwconv/gen/up16x9-minmax-avx512f.c", |
| "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c", |
| "src/f32-dwconv/gen/up16x25-minmax-avx512f.c", |
| "src/f32-dwconv/gen/up32x3-minmax-avx512f-acc2.c", |
| "src/f32-dwconv/gen/up32x3-minmax-avx512f.c", |
| "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c", |
| "src/f32-dwconv/gen/up32x4-minmax-avx512f.c", |
| "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c", |
| "src/f32-dwconv/gen/up32x9-minmax-avx512f.c", |
| "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c", |
| "src/f32-dwconv/gen/up32x25-minmax-avx512f.c", |
| "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c", |
| "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c", |
| "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c", |
| "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c", |
| "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c", |
| "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c", |
| "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c", |
| "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c", |
| "src/f32-prelu/gen/avx512f-2x16.c", |
| "src/f32-prelu/gen/avx512f-2x32.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c", |
| "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c", |
| "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c", |
| "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| "src/f32-rmax/avx512f.c", |
| "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vmaxc-avx512f-x16.c", |
| "src/f32-vbinary/gen/vmaxc-avx512f-x32.c", |
| "src/f32-vbinary/gen/vmin-avx512f-x16.c", |
| "src/f32-vbinary/gen/vmin-avx512f-x32.c", |
| "src/f32-vbinary/gen/vminc-avx512f-x16.c", |
| "src/f32-vbinary/gen/vminc-avx512f-x32.c", |
| "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c", |
| "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c", |
| "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c", |
| "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c", |
| "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c", |
| "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c", |
| "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c", |
| "src/f32-vclamp/gen/vclamp-avx512f-x16.c", |
| "src/f32-vclamp/gen/vclamp-avx512f-x32.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c", |
| "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c", |
| "src/f32-vhswish/gen/vhswish-avx512f-x16.c", |
| "src/f32-vhswish/gen/vhswish-avx512f-x32.c", |
| "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c", |
| "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c", |
| "src/f32-vrelu/gen/vrelu-avx512f-x16.c", |
| "src/f32-vrelu/gen/vrelu-avx512f-x32.c", |
| "src/f32-vrnd/gen/vrndd-avx512f-x16.c", |
| "src/f32-vrnd/gen/vrndd-avx512f-x32.c", |
| "src/f32-vrnd/gen/vrndne-avx512f-x16.c", |
| "src/f32-vrnd/gen/vrndne-avx512f-x32.c", |
| "src/f32-vrnd/gen/vrndu-avx512f-x16.c", |
| "src/f32-vrnd/gen/vrndu-avx512f-x32.c", |
| "src/f32-vrnd/gen/vrndz-avx512f-x16.c", |
| "src/f32-vrnd/gen/vrndz-avx512f-x32.c", |
| "src/f32-vscale/avx512f-x64.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c", |
| "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c", |
| "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c", |
| "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c", |
| "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c", |
| "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c", |
| "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c", |
| "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c", |
| "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c", |
| "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c", |
| "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c", |
| "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c", |
| "src/f32-vunary/gen/vabs-avx512f-x16.c", |
| "src/f32-vunary/gen/vabs-avx512f-x32.c", |
| "src/f32-vunary/gen/vneg-avx512f-x16.c", |
| "src/f32-vunary/gen/vneg-avx512f-x32.c", |
| "src/f32-vunary/gen/vsqr-avx512f-x16.c", |
| "src/f32-vunary/gen/vsqr-avx512f-x32.c", |
| "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c", |
| "src/math/exp-avx512f-rr2-lut16-p3-perm.c", |
| "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c", |
| "src/math/exp-avx512f-rr2-lut32-p2-perm2.c", |
| "src/math/exp-avx512f-rr2-p5-scalef.c", |
| "src/math/exp-avx512f-rr2-p5.c", |
| "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c", |
| "src/math/expm1minus-avx512f-rr1-p6.c", |
| "src/math/extexp-avx512f-p5.c", |
| "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c", |
| "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c", |
| "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c", |
| "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c", |
| "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c", |
| "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c", |
| "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c", |
| "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c", |
| "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c", |
| "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c", |
| "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c", |
| "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c", |
| "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c", |
| "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c", |
| "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c", |
| "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c", |
| "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c", |
| "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c", |
| "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c", |
| "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c", |
| "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c", |
| "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c", |
| "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c", |
| "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c", |
| "src/math/sqrt-avx512f-nr1fma.c", |
| "src/math/sqrt-avx512f-nr1fma1adj.c", |
| "src/math/sqrt-avx512f-nr2fma.c", |
| ] |
| |
| PROD_AVX512SKX_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c", |
| "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| "src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c", |
| ] |
| |
| ALL_AVX512SKX_MICROKERNEL_SRCS = [ |
| "src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| "src/f16-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| "src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c", |
| "src/f32-f16-vcvt/gen/vcvt-avx512skx-x32.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x32.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x64.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x96.c", |
| "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x32.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x64.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x96.c", |
| "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c", |
| "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x48.c", |
| "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x64.c", |
| "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x48.c", |
| "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x64.c", |
| "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| "src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c", |
| "src/x8-lut/gen/lut-avx512skx-vpshufb-x128.c", |
| "src/x8-lut/gen/lut-avx512skx-vpshufb-x192.c", |
| "src/x8-lut/gen/lut-avx512skx-vpshufb-x256.c", |
| ] |
| |
| WASM32_ASM_MICROKERNEL_SRCS = [ |
| "src/f32-vrelu/wasm_shr_x1.S", |
| "src/f32-vrelu/wasm_shr_x2.S", |
| "src/f32-vrelu/wasm_shr_x4.S", |
| ] |
| |
| AARCH32_ASM_MICROKERNEL_SRCS = [ |
| "src/f32-gemm/4x4-aarch32-vfp-ld64.S", |
| "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S", |
| "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S", |
| "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S", |
| "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S", |
| "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S", |
| "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S", |
| "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S", |
| "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S", |
| "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S", |
| "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S", |
| "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S", |
| "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S", |
| "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S", |
| "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S", |
| "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S", |
| "src/qs8-gemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S", |
| "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S", |
| "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S", |
| "src/qs8-igemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S", |
| "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-ld64.S", |
| "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-ld64.S", |
| "src/qc8-gemm/gen/4x8c4-minmax-fp32-aarch32-neondot-ld64.S", |
| "src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-ld64.S", |
| "src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-ld64.S", |
| "src/qc8-igemm/gen/4x8c4-minmax-fp32-aarch32-neondot-ld64.S", |
| ] |
| |
| AARCH64_ASM_MICROKERNEL_SRCS = [ |
| "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S", |
| "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S", |
| "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S", |
| "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S", |
| "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S", |
| "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S", |
| "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S", |
| "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S", |
| "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S", |
| "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S", |
| "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S", |
| "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S", |
| "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S", |
| "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S", |
| "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S", |
| "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S", |
| "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S", |
| "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S", |
| "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S", |
| "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S", |
| "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S", |
| "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S", |
| "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S", |
| "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S", |
| "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S", |
| "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S", |
| "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S", |
| "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S", |
| "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S", |
| "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S", |
| "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S", |
| "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S", |
| "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S", |
| "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S", |
| "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S", |
| "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull.S", |
| "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S", |
| "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S", |
| "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S", |
| "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S", |
| "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| "src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| "src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S", |
| "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S", |
| "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| "src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| "src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| "src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| "src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| ] |
| |
| INTERNAL_MICROKERNEL_HDRS = [ |
| "src/xnnpack/allocator.h", |
| "src/xnnpack/argmaxpool.h", |
| "src/xnnpack/avgpool.h", |
| "src/xnnpack/common.h", |
| "src/xnnpack/conv.h", |
| "src/xnnpack/depthtospace.h", |
| "src/xnnpack/dwconv.h", |
| "src/xnnpack/fill.h", |
| "src/xnnpack/gavgpool.h", |
| "src/xnnpack/gemm.h", |
| "src/xnnpack/ibilinear.h", |
| "src/xnnpack/igemm.h", |
| "src/xnnpack/intrinsics-polyfill.h", |
| "src/xnnpack/lut.h", |
| "src/xnnpack/math.h", |
| "src/xnnpack/maxpool.h", |
| "src/xnnpack/packx.h", |
| "src/xnnpack/pad.h", |
| "src/xnnpack/params.h", |
| "src/xnnpack/pavgpool.h", |
| "src/xnnpack/ppmm.h", |
| "src/xnnpack/prelu.h", |
| "src/xnnpack/raddexpminusmax.h", |
| "src/xnnpack/raddextexp.h", |
| "src/xnnpack/raddstoreexpminusmax.h", |
| "src/xnnpack/rmax.h", |
| "src/xnnpack/spmm.h", |
| "src/xnnpack/transpose.h", |
| "src/xnnpack/unpool.h", |
| "src/xnnpack/vaddsub.h", |
| "src/xnnpack/vbinary.h", |
| "src/xnnpack/vcvt.h", |
| "src/xnnpack/vmul.h", |
| "src/xnnpack/vmulcaddc.h", |
| "src/xnnpack/vscale.h", |
| "src/xnnpack/vscaleexpminusmax.h", |
| "src/xnnpack/vscaleextexp.h", |
| "src/xnnpack/vunary.h", |
| "src/xnnpack/zip.h", |
| ] |
| |
| INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| "include/xnnpack.h", |
| "src/xnnpack/compute.h", |
| "src/xnnpack/im2col.h", |
| "src/xnnpack/indirection.h", |
| "src/xnnpack/math-stubs.h", |
| "src/xnnpack/memory-planner.h", |
| "src/xnnpack/operator.h", |
| "src/xnnpack/pack.h", |
| "src/xnnpack/params-init.h", |
| "src/xnnpack/requantization-stubs.h", |
| "src/xnnpack/requantization.h", |
| "src/xnnpack/subgraph.h", |
| ] |
| |
| ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| "src/xnnpack/math-stubs.h", |
| ] |
| |
| MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| "include/xnnpack.h", |
| "src/xnnpack/params-init.h", |
| ] |
| |
| MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [ |
| "include/xnnpack.h", |
| "src/xnnpack/isa-checks.h", |
| "src/xnnpack/params-init.h", |
| "src/xnnpack/requantization.h", |
| ] |
| |
| OPERATOR_TEST_PARAMS_HDRS = [ |
| "src/xnnpack/common.h", |
| "src/xnnpack/params.h", |
| ] |
| |
| WEIGHTS_PACK_HDRS = [ |
| "src/xnnpack/compute.h", |
| "src/xnnpack/operator.h", |
| "src/xnnpack/pack.h", |
| ] |
| |
| LOGGING_COPTS = select({ |
| # No logging in optimized mode |
| ":optimized_build": ["-DXNN_LOG_LEVEL=0"], |
| # Full logging in debug mode |
| ":debug_build": ["-DXNN_LOG_LEVEL=5"], |
| # Error-only logging in default (fastbuild) mode |
| "//conditions:default": ["-DXNN_LOG_LEVEL=2"], |
| }) |
| |
| LOGGING_SRCS = select({ |
| # No logging in optimized mode |
| ":optimized_build": [], |
| "//conditions:default": [ |
| "src/datatype-strings.c", |
| "src/operator-strings.c", |
| "src/subgraph-strings.c", |
| ], |
| }) |
| |
| LOGGING_HDRS = [ |
| "src/xnnpack/log.h", |
| ] |
| |
| xnnpack_cc_library( |
| name = "tables", |
| srcs = TABLE_SRCS, |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| ) |
| |
| xnnpack_cc_library( |
| name = "scalar_bench_microkernels", |
| srcs = ALL_SCALAR_MICROKERNEL_SRCS, |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = ["-marm"], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@FXdiv", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "scalar_prod_microkernels", |
| srcs = PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS, |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = ["-marm"], |
| aarch32_srcs = PROD_SCALAR_AARCH32_MICROKERNEL_SRCS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| wasm_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS, |
| wasmrelaxedsimd_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS, |
| wasmsimd_srcs = PROD_SCALAR_WASM_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@FXdiv", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "scalar_test_microkernels", |
| srcs = ALL_SCALAR_MICROKERNEL_SRCS, |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = ["-marm"], |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@FXdiv", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "wasm_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@FXdiv", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "wasm_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@FXdiv", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "wasm_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| wasm_srcs = ALL_WASM_MICROKERNEL_SRCS, |
| wasmrelaxedsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| wasmsimd_srcs = ALL_WASM_MICROKERNEL_SRCS + ALL_WASMSIMD_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@FXdiv", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neon_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv7-a", |
| "-mfpu=neon", |
| ], |
| aarch32_srcs = ALL_NEON_MICROKERNEL_SRCS, |
| aarch64_srcs = ALL_NEON_MICROKERNEL_SRCS + ALL_AARCH64_NEON_MICROKERNEL_SRCS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neon_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv7-a", |
| "-mfpu=neon", |
| ], |
| aarch32_srcs = PROD_NEON_MICROKERNEL_SRCS, |
| aarch64_srcs = PROD_NEON_MICROKERNEL_SRCS + PROD_AARCH64_NEON_MICROKERNEL_SRCS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neon_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv7-a", |
| "-mfpu=neon", |
| ], |
| aarch32_srcs = ALL_NEON_MICROKERNEL_SRCS, |
| aarch64_srcs = ALL_NEON_MICROKERNEL_SRCS + ALL_AARCH64_NEON_MICROKERNEL_SRCS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonfp16_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv7-a", |
| "-mfpu=neon-fp16", |
| ], |
| aarch32_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| aarch64_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| apple_aarch32_copts = [ |
| "-mcpu=cortex-a9", |
| "-mtune=generic", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonfp16_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv7-a", |
| "-mfpu=neon-fp16", |
| ], |
| aarch32_srcs = PROD_NEONFP16_MICROKERNEL_SRCS, |
| aarch64_srcs = PROD_NEONFP16_MICROKERNEL_SRCS, |
| apple_aarch32_copts = [ |
| "-mcpu=cortex-a9", |
| "-mtune=generic", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonfp16_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv7-a", |
| "-mfpu=neon-fp16", |
| ], |
| aarch32_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| aarch64_srcs = ALL_NEONFP16_MICROKERNEL_SRCS, |
| apple_aarch32_copts = [ |
| "-mcpu=cortex-a9", |
| "-mtune=generic", |
| ], |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonfma_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv7-a", |
| "-mfpu=neon-vfpv4", |
| ], |
| aarch32_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| aarch64_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| apple_aarch32_copts = [ |
| "-mcpu=swift", |
| "-mtune=generic", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonfma_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv7-a", |
| "-mfpu=neon-vfpv4", |
| ], |
| aarch32_srcs = PROD_NEONFMA_MICROKERNEL_SRCS, |
| aarch64_srcs = PROD_NEONFMA_MICROKERNEL_SRCS, |
| apple_aarch32_copts = [ |
| "-mcpu=swift", |
| "-mtune=generic", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonfma_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv7-a", |
| "-mfpu=neon-vfpv4", |
| ], |
| aarch32_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| aarch64_srcs = ALL_NEONFMA_MICROKERNEL_SRCS, |
| apple_aarch32_copts = [ |
| "-mcpu=swift", |
| "-mtune=generic", |
| ], |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonv8_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv8-a", |
| "-mfpu=neon-fp-armv8", |
| ], |
| aarch32_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| aarch64_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| apple_aarch32_copts = [ |
| "-mcpu=cyclone", |
| "-mtune=generic", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonv8_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv8-a", |
| "-mfpu=neon-fp-armv8", |
| ], |
| aarch32_srcs = PROD_NEONV8_MICROKERNEL_SRCS, |
| aarch64_srcs = PROD_NEONV8_MICROKERNEL_SRCS, |
| apple_aarch32_copts = [ |
| "-mcpu=cyclone", |
| "-mtune=generic", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonv8_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv8-a", |
| "-mfpu=neon-fp-armv8", |
| ], |
| aarch32_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| aarch64_srcs = ALL_NEONV8_MICROKERNEL_SRCS, |
| apple_aarch32_copts = [ |
| "-mcpu=cyclone", |
| "-mtune=generic", |
| ], |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonfp16arith_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch64_copts = ["-march=armv8.2-a+fp16"], |
| aarch64_srcs = ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonfp16arith_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch64_copts = ["-march=armv8.2-a+fp16"], |
| aarch64_srcs = PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neonfp16arith_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch64_copts = ["-march=armv8.2-a+fp16"], |
| aarch64_srcs = ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neondot_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv8.2-a+dotprod", |
| "-mfpu=neon-fp-armv8", |
| ], |
| aarch32_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| aarch64_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neondot_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv8.2-a+dotprod", |
| "-mfpu=neon-fp-armv8", |
| ], |
| aarch32_srcs = PROD_NEONDOT_MICROKERNEL_SRCS, |
| aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| aarch64_srcs = PROD_NEONDOT_MICROKERNEL_SRCS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "neondot_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv8.2-a+dotprod", |
| "-mfpu=neon-fp-armv8", |
| ], |
| aarch32_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| aarch64_copts = ["-march=armv8.2-a+dotprod"], |
| aarch64_srcs = ALL_NEONDOT_MICROKERNEL_SRCS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "sse2_amalgam_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-msse2"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = [ |
| "src/amalgam/sse.c", |
| "src/amalgam/sse2.c", |
| ], |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "sse2_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-msse2"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "sse2_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-msse2"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = PROD_SSE_MICROKERNEL_SRCS + PROD_SSE2_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "sse2_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-msse2"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "ssse3_amalgam_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mssse3"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = ["src/amalgam/ssse3.c"], |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "ssse3_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mssse3"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = ALL_SSSE3_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "ssse3_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mssse3"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = PROD_SSSE3_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "ssse3_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mssse3"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = ALL_SSSE3_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "sse41_amalgam_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-msse4.1"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = ["src/amalgam/sse41.c"], |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "sse41_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-msse4.1"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = ALL_SSE41_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "sse41_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-msse4.1"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = PROD_SSE41_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "sse41_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-msse4.1"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:SSE2"], |
| x86_srcs = ALL_SSE41_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mavx"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = ALL_AVX_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mavx"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = PROD_AVX_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mavx"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = ALL_AVX_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "f16c_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mf16c"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = ALL_F16C_MICROKERNEL_SRCS, |
| deps = [ |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "f16c_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mf16c"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = PROD_F16C_MICROKERNEL_SRCS, |
| deps = [ |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "f16c_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mf16c"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = ALL_F16C_MICROKERNEL_SRCS, |
| deps = [ |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "xop_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mxop"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = ALL_XOP_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "xop_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mxop"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = PROD_XOP_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "xop_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mxop"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = ALL_XOP_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "fma3_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mfma"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = ALL_FMA3_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "fma3_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mfma"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = PROD_FMA3_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "fma3_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mfma"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX"], |
| msvc_x86_64_copts = ["/arch:AVX"], |
| x86_srcs = ALL_FMA3_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx2_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = [ |
| "-mfma", |
| "-mavx2", |
| ], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX2"], |
| msvc_x86_64_copts = ["/arch:AVX2"], |
| x86_srcs = ALL_AVX2_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx2_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = [ |
| "-mfma", |
| "-mavx2", |
| ], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX2"], |
| msvc_x86_64_copts = ["/arch:AVX2"], |
| x86_srcs = PROD_AVX2_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx2_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = [ |
| "-mfma", |
| "-mavx2", |
| ], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX2"], |
| msvc_x86_64_copts = ["/arch:AVX2"], |
| x86_srcs = ALL_AVX2_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx512f_amalgam_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mavx512f"], |
| mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX512"], |
| msvc_x86_64_copts = ["/arch:AVX512"], |
| msys_copts = ["-fno-asynchronous-unwind-tables"], |
| x86_srcs = ["src/amalgam/avx512f.c"], |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx512f_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mavx512f"], |
| mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX512"], |
| msvc_x86_64_copts = ["/arch:AVX512"], |
| msys_copts = ["-fno-asynchronous-unwind-tables"], |
| x86_srcs = ALL_AVX512F_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx512f_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mavx512f"], |
| mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX512"], |
| msvc_x86_64_copts = ["/arch:AVX512"], |
| msys_copts = ["-fno-asynchronous-unwind-tables"], |
| x86_srcs = PROD_AVX512F_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx512f_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = ["-mavx512f"], |
| mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX512"], |
| msvc_x86_64_copts = ["/arch:AVX512"], |
| msys_copts = ["-fno-asynchronous-unwind-tables"], |
| x86_srcs = ALL_AVX512F_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx512skx_amalgam_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = [ |
| "-mavx512f", |
| "-mavx512cd", |
| "-mavx512bw", |
| "-mavx512dq", |
| "-mavx512vl", |
| ], |
| mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX512"], |
| msvc_x86_64_copts = ["/arch:AVX512"], |
| msys_copts = ["-fno-asynchronous-unwind-tables"], |
| x86_srcs = ["src/amalgam/avx512skx.c"], |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx512skx_bench_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = [ |
| "-mavx512f", |
| "-mavx512cd", |
| "-mavx512bw", |
| "-mavx512dq", |
| "-mavx512vl", |
| ], |
| mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX512"], |
| msvc_x86_64_copts = ["/arch:AVX512"], |
| msys_copts = ["-fno-asynchronous-unwind-tables"], |
| x86_srcs = ALL_AVX512SKX_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx512skx_prod_microkernels", |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = [ |
| "-mavx512f", |
| "-mavx512cd", |
| "-mavx512bw", |
| "-mavx512dq", |
| "-mavx512vl", |
| ], |
| mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX512"], |
| msvc_x86_64_copts = ["/arch:AVX512"], |
| msys_copts = ["-fno-asynchronous-unwind-tables"], |
| x86_srcs = PROD_AVX512SKX_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "avx512skx_test_microkernels", |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| gcc_x86_copts = [ |
| "-mavx512f", |
| "-mavx512cd", |
| "-mavx512bw", |
| "-mavx512dq", |
| "-mavx512vl", |
| ], |
| mingw_copts = ["-fno-asynchronous-unwind-tables"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| msvc_x86_32_copts = ["/arch:AVX512"], |
| msvc_x86_64_copts = ["/arch:AVX512"], |
| msys_copts = ["-fno-asynchronous-unwind-tables"], |
| x86_srcs = ALL_AVX512SKX_MICROKERNEL_SRCS, |
| deps = [ |
| ":tables", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "asm_microkernels", |
| hdrs = ["src/xnnpack/assembly.h"], |
| aarch32_copts = [ |
| "-marm", |
| "-march=armv8.2-a+dotprod", |
| "-mfpu=neon-fp-armv8", |
| ], |
| aarch32_srcs = AARCH32_ASM_MICROKERNEL_SRCS, |
| aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"], |
| aarch64_srcs = AARCH64_ASM_MICROKERNEL_SRCS, |
| wasm_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| wasmrelaxedsimd_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| wasmsimd_srcs = WASM32_ASM_MICROKERNEL_SRCS, |
| ) |
| |
| xnnpack_cc_library( |
| name = "logging_utils", |
| srcs = LOGGING_SRCS, |
| hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| copts = LOGGING_COPTS + [ |
| "-Isrc", |
| "-Iinclude", |
| ] + select({ |
| ":debug_build": [], |
| "//conditions:default": xnnpack_min_size_copts(), |
| }), |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| visibility = xnnpack_visibility(), |
| deps = [ |
| "@FP16", |
| "@clog", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_aggregate_library( |
| name = "amalgam_microkernels", |
| aarch32_ios_deps = [ |
| ":neon_prod_microkernels", |
| ":neonfp16_prod_microkernels", |
| ":neonfma_prod_microkernels", |
| ":neonv8_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| aarch32_nonios_deps = [ |
| ":neon_prod_microkernels", |
| ":neonfp16_prod_microkernels", |
| ":neonfma_prod_microkernels", |
| ":neonv8_prod_microkernels", |
| ":neondot_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| aarch64_deps = [ |
| ":neon_prod_microkernels", |
| ":neonfp16_prod_microkernels", |
| ":neonfma_prod_microkernels", |
| ":neonv8_prod_microkernels", |
| ":neonfp16arith_prod_microkernels", |
| ":neondot_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| generic_deps = [ |
| ":scalar_prod_microkernels", |
| ], |
| wasm_deps = [ |
| ":wasm_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| wasmrelaxedsimd_deps = [ |
| ":wasm_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| wasmsimd_deps = [ |
| ":wasm_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| x86_deps = [ |
| ":sse2_amalgam_microkernels", |
| ":ssse3_amalgam_microkernels", |
| ":sse41_amalgam_microkernels", |
| ":avx_prod_microkernels", |
| ":f16c_prod_microkernels", |
| ":xop_prod_microkernels", |
| ":fma3_prod_microkernels", |
| ":avx2_prod_microkernels", |
| ":avx512f_amalgam_microkernels", |
| ":avx512skx_amalgam_microkernels", |
| ], |
| ) |
| |
| xnnpack_aggregate_library( |
| name = "bench_microkernels", |
| aarch32_ios_deps = [ |
| ":neon_bench_microkernels", |
| ":neonfp16_bench_microkernels", |
| ":neonfma_bench_microkernels", |
| ":neonv8_bench_microkernels", |
| ":asm_microkernels", |
| ], |
| aarch32_nonios_deps = [ |
| ":neon_bench_microkernels", |
| ":neonfp16_bench_microkernels", |
| ":neonfma_bench_microkernels", |
| ":neonv8_bench_microkernels", |
| ":neondot_bench_microkernels", |
| ":asm_microkernels", |
| ], |
| aarch64_deps = [ |
| ":neon_bench_microkernels", |
| ":neonfp16_bench_microkernels", |
| ":neonfma_bench_microkernels", |
| ":neonv8_bench_microkernels", |
| ":neonfp16arith_bench_microkernels", |
| ":neondot_bench_microkernels", |
| ":asm_microkernels", |
| ], |
| generic_deps = [ |
| ":scalar_bench_microkernels", |
| ], |
| wasm_deps = [ |
| ":wasm_bench_microkernels", |
| ":asm_microkernels", |
| ], |
| wasmrelaxedsimd_deps = [ |
| ":wasm_bench_microkernels", |
| ":asm_microkernels", |
| ], |
| wasmsimd_deps = [ |
| ":wasm_bench_microkernels", |
| ":asm_microkernels", |
| ], |
| x86_deps = [ |
| ":sse2_bench_microkernels", |
| ":ssse3_bench_microkernels", |
| ":sse41_bench_microkernels", |
| ":avx_bench_microkernels", |
| ":f16c_bench_microkernels", |
| ":xop_bench_microkernels", |
| ":fma3_bench_microkernels", |
| ":avx2_bench_microkernels", |
| ":avx512f_bench_microkernels", |
| ":avx512skx_bench_microkernels", |
| ], |
| ) |
| |
| xnnpack_aggregate_library( |
| name = "prod_microkernels", |
| aarch32_ios_deps = [ |
| ":neon_prod_microkernels", |
| ":neonfp16_prod_microkernels", |
| ":neonfma_prod_microkernels", |
| ":neonv8_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| aarch32_nonios_deps = [ |
| ":neon_prod_microkernels", |
| ":neonfp16_prod_microkernels", |
| ":neonfma_prod_microkernels", |
| ":neonv8_prod_microkernels", |
| ":neondot_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| aarch64_deps = [ |
| ":neon_prod_microkernels", |
| ":neonfp16_prod_microkernels", |
| ":neonfma_prod_microkernels", |
| ":neonv8_prod_microkernels", |
| ":neonfp16arith_prod_microkernels", |
| ":neondot_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| generic_deps = [ |
| ":scalar_prod_microkernels", |
| ], |
| wasm_deps = [ |
| ":wasm_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| wasmrelaxedsimd_deps = [ |
| ":wasm_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| wasmsimd_deps = [ |
| ":wasm_prod_microkernels", |
| ":asm_microkernels", |
| ], |
| x86_deps = [ |
| ":sse2_prod_microkernels", |
| ":ssse3_prod_microkernels", |
| ":sse41_prod_microkernels", |
| ":avx_prod_microkernels", |
| ":f16c_prod_microkernels", |
| ":xop_prod_microkernels", |
| ":fma3_prod_microkernels", |
| ":avx2_prod_microkernels", |
| ":avx512f_prod_microkernels", |
| ":avx512skx_prod_microkernels", |
| ], |
| ) |
| |
| xnnpack_aggregate_library( |
| name = "test_microkernels", |
| aarch32_ios_deps = [ |
| ":neon_test_microkernels", |
| ":neonfp16_test_microkernels", |
| ":neonfma_test_microkernels", |
| ":neonv8_test_microkernels", |
| ":asm_microkernels", |
| ], |
| aarch32_nonios_deps = [ |
| ":neon_test_microkernels", |
| ":neonfp16_test_microkernels", |
| ":neonfma_test_microkernels", |
| ":neonv8_test_microkernels", |
| ":neondot_test_microkernels", |
| ":asm_microkernels", |
| ], |
| aarch64_deps = [ |
| ":neon_test_microkernels", |
| ":neonfp16_test_microkernels", |
| ":neonfma_test_microkernels", |
| ":neonv8_test_microkernels", |
| ":neonfp16arith_test_microkernels", |
| ":neondot_test_microkernels", |
| ":asm_microkernels", |
| ], |
| generic_deps = [ |
| ":scalar_test_microkernels", |
| ], |
| wasm_deps = [ |
| ":wasm_test_microkernels", |
| ":asm_microkernels", |
| ], |
| wasmrelaxedsimd_deps = [ |
| ":wasm_test_microkernels", |
| ":asm_microkernels", |
| ], |
| wasmsimd_deps = [ |
| ":wasm_test_microkernels", |
| ":asm_microkernels", |
| ], |
| x86_deps = [ |
| ":sse2_test_microkernels", |
| ":ssse3_test_microkernels", |
| ":sse41_test_microkernels", |
| ":avx_test_microkernels", |
| ":f16c_test_microkernels", |
| ":xop_test_microkernels", |
| ":fma3_test_microkernels", |
| ":avx2_test_microkernels", |
| ":avx512f_test_microkernels", |
| ":avx512skx_test_microkernels", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "im2col", |
| srcs = ["src/im2col.c"], |
| hdrs = [ |
| "src/xnnpack/common.h", |
| "src/xnnpack/im2col.h", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| ) |
| |
| xnnpack_cc_library( |
| name = "indirection", |
| srcs = ["src/indirection.c"], |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| "@FP16", |
| "@FXdiv", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "indirection_test_mode", |
| srcs = ["src/indirection.c"], |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| "@FP16", |
| "@FXdiv", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "packing", |
| srcs = ["src/packing.c"], |
| hdrs = INTERNAL_HDRS, |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| "@FP16", |
| "@FXdiv", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "packing_test_mode", |
| srcs = ["src/packing.c"], |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| "@FP16", |
| "@FXdiv", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "operator_run", |
| srcs = ["src/operator-run.c"], |
| hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| copts = LOGGING_COPTS + select({ |
| ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| "//conditions:default": [], |
| }), |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":logging_utils", |
| "@FP16", |
| "@FXdiv", |
| "@clog", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "operator_run_test_mode", |
| srcs = ["src/operator-run.c"], |
| hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| copts = LOGGING_COPTS + [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ] + select({ |
| ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| "//conditions:default": [], |
| }), |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":logging_utils", |
| "@FP16", |
| "@FXdiv", |
| "@clog", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "memory_planner", |
| srcs = ["src/memory-planner.c"], |
| hdrs = INTERNAL_HDRS, |
| defines = select({ |
| ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"], |
| ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"], |
| "//conditions:default": ["XNN_ENABLE_MEMOPT=1"], |
| }), |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":logging_utils", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "memory_planner_test_mode", |
| srcs = ["src/memory-planner.c"], |
| hdrs = INTERNAL_HDRS, |
| copts = [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| defines = select({ |
| ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"], |
| ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"], |
| "//conditions:default": ["XNN_ENABLE_MEMOPT=1"], |
| }), |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":logging_utils", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "enable_assembly", |
| defines = select({ |
| ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"], |
| ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"], |
| "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"], |
| }), |
| ) |
| |
| cc_library( |
| name = "enable_sparse", |
| defines = select({ |
| ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"], |
| ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"], |
| "//conditions:default": ["XNN_ENABLE_SPARSE=1"], |
| }), |
| ) |
| |
| xnnpack_cc_library( |
| name = "operators", |
| srcs = OPERATOR_SRCS + [ |
| "src/allocator.c", |
| "src/operator-delete.c", |
| ], |
| hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| copts = LOGGING_COPTS + [ |
| "-Isrc", |
| "-Iinclude", |
| ] + select({ |
| ":debug_build": [], |
| "//conditions:default": xnnpack_min_size_copts(), |
| }) + select({ |
| ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| "//conditions:default": [], |
| }), |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":indirection", |
| ":logging_utils", |
| ":operator_run", |
| ":packing", |
| "@FP16", |
| "@FXdiv", |
| "@clog", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "operators_test_mode", |
| srcs = OPERATOR_SRCS + [ |
| "src/allocator.c", |
| "src/operator-delete.c", |
| ], |
| hdrs = INTERNAL_HDRS + LOGGING_HDRS, |
| copts = LOGGING_COPTS + [ |
| "-Isrc", |
| "-Iinclude", |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ] + select({ |
| ":debug_build": [], |
| "//conditions:default": xnnpack_min_size_copts(), |
| }) + select({ |
| ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| "//conditions:default": [], |
| }), |
| gcc_copts = xnnpack_gcc_std_copts(), |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":indirection_test_mode", |
| ":logging_utils", |
| ":operator_run_test_mode", |
| ":packing_test_mode", |
| "@FP16", |
| "@FXdiv", |
| "@clog", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "jit", |
| srcs = [ |
| "src/jit/aarch32-assembler.cc", |
| "src/jit/memory.c", |
| ], |
| hdrs = INTERNAL_HDRS + [ |
| "src/xnnpack/aarch32-assembler.h", |
| ], |
| aarch32_srcs = [ |
| "src/f32-gemm/4x8-aarch32-neon-cortex-a55.cc", |
| ], |
| copts = LOGGING_COPTS, |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":logging_utils", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "jit_test_mode", |
| srcs = [ |
| "src/jit/aarch32-assembler.cc", |
| "src/jit/memory.c", |
| ], |
| hdrs = INTERNAL_HDRS + [ |
| "src/xnnpack/aarch32-assembler.h", |
| ], |
| copts = LOGGING_COPTS + [ |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| deps = [ |
| ":logging_utils", |
| ], |
| ) |
| |
| xnnpack_cc_library( |
| name = "XNNPACK", |
| srcs = [ |
| "src/init.c", |
| "src/runtime.c", |
| "src/subgraph.c", |
| "src/tensor.c", |
| ] + SUBGRAPH_SRCS, |
| hdrs = ["include/xnnpack.h"], |
| copts = LOGGING_COPTS + [ |
| "-Isrc", |
| "-Iinclude", |
| ] + select({ |
| ":debug_build": [], |
| "//conditions:default": xnnpack_min_size_copts(), |
| }) + select({ |
| ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| "//conditions:default": [], |
| }) + select({ |
| ":xnn_wasmsimd_version_m87": [ |
| "-DXNN_WASMSIMD_VERSION=87", |
| ], |
| ":xnn_wasmsimd_version_m88": [ |
| "-DXNN_WASMSIMD_VERSION=88", |
| ], |
| ":xnn_wasmsimd_version_m91": [ |
| "-DXNN_WASMSIMD_VERSION=91", |
| ], |
| "//conditions:default": [ |
| "-DXNN_WASMSIMD_VERSION=87", |
| ], |
| }), |
| gcc_copts = xnnpack_gcc_std_copts(), |
| includes = ["include"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| visibility = xnnpack_visibility(), |
| deps = [ |
| ":enable_assembly", |
| ":enable_sparse", |
| ":logging_utils", |
| ":memory_planner", |
| ":operators", |
| ":prod_microkernels", |
| "@clog", |
| "@FP16", |
| "@pthreadpool", |
| ] + select({ |
| ":emscripten": [], |
| "//conditions:default": ["@cpuinfo"], |
| }), |
| ) |
| |
| xnnpack_cc_library( |
| name = "XNNPACK_test_mode", |
| srcs = [ |
| "src/init.c", |
| "src/runtime.c", |
| "src/subgraph.c", |
| "src/tensor.c", |
| ] + SUBGRAPH_SRCS, |
| hdrs = ["include/xnnpack.h"], |
| copts = LOGGING_COPTS + [ |
| "-Isrc", |
| "-Iinclude", |
| "-UNDEBUG", |
| "-DXNN_TEST_MODE=1", |
| ] + select({ |
| ":debug_build": [], |
| "//conditions:default": xnnpack_min_size_copts(), |
| }) + select({ |
| ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| "//conditions:default": [], |
| }) + select({ |
| ":xnn_wasmsimd_version_m87": [ |
| "-DXNN_WASMSIMD_VERSION=87", |
| ], |
| ":xnn_wasmsimd_version_m88": [ |
| "-DXNN_WASMSIMD_VERSION=88", |
| ], |
| ":xnn_wasmsimd_version_m91": [ |
| "-DXNN_WASMSIMD_VERSION=91", |
| ], |
| "//conditions:default": [ |
| "-DXNN_WASMSIMD_VERSION=87", |
| ], |
| }), |
| gcc_copts = xnnpack_gcc_std_copts(), |
| includes = ["include"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| visibility = xnnpack_visibility(), |
| deps = [ |
| ":enable_assembly", |
| ":enable_sparse", |
| ":logging_utils", |
| ":memory_planner_test_mode", |
| ":operators_test_mode", |
| ":test_microkernels", |
| "@clog", |
| "@FP16", |
| "@pthreadpool", |
| ] + select({ |
| ":emscripten": [], |
| "//conditions:default": ["@cpuinfo"], |
| }), |
| ) |
| |
| # Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently |
| # not used by the TensorFlow Lite XNNPACK delegate to minimize code size. |
| xnnpack_cc_library( |
| name = "xnnpack_for_tflite", |
| srcs = [ |
| "src/init.c", |
| "src/runtime.c", |
| "src/subgraph.c", |
| "src/tensor.c", |
| ] + SUBGRAPH_SRCS, |
| hdrs = ["include/xnnpack.h"], |
| copts = LOGGING_COPTS + [ |
| "-Isrc", |
| "-Iinclude", |
| ] + select({ |
| ":debug_build": [], |
| "//conditions:default": xnnpack_min_size_copts(), |
| }) + select({ |
| ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| "//conditions:default": [], |
| }), |
| defines = select({ |
| ":xnn_enable_qu8_explicit_true": [], |
| ":xnn_enable_qu8_explicit_false": [ |
| "XNN_NO_QU8_OPERATORS", |
| "XNN_NO_U8_OPERATORS", |
| ], |
| ":emscripten": [], |
| "//conditions:default": [ |
| "XNN_NO_QU8_OPERATORS", |
| "XNN_NO_U8_OPERATORS", |
| ], |
| }) + select({ |
| ":xnn_wasmsimd_version_m87": [ |
| "XNN_WASMSIMD_VERSION=87", |
| ], |
| ":xnn_wasmsimd_version_m88": [ |
| "XNN_WASMSIMD_VERSION=88", |
| ], |
| ":xnn_wasmsimd_version_m91": [ |
| "XNN_WASMSIMD_VERSION=91", |
| ], |
| "//conditions:default": [ |
| "XNN_WASMSIMD_VERSION=87", |
| ], |
| }), |
| gcc_copts = xnnpack_gcc_std_copts(), |
| includes = ["include"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| visibility = xnnpack_visibility(), |
| deps = [ |
| ":enable_assembly", |
| ":enable_sparse", |
| ":logging_utils", |
| ":memory_planner", |
| ":operator_run", |
| ":operators", |
| ":amalgam_microkernels", |
| "@clog", |
| "@FP16", |
| "@pthreadpool", |
| ] + select({ |
| ":emscripten": [], |
| "//conditions:default": ["@cpuinfo"], |
| }), |
| ) |
| |
| # Specialized XNNPACK version for TensorFlow.js. Excludes operators currently |
| # not used by the TensorFlow.js WebAssembly backend to minimize code size. |
| xnnpack_cc_library( |
| name = "xnnpack_for_tfjs", |
| srcs = [ |
| "src/init.c", |
| ], |
| hdrs = ["include/xnnpack.h"], |
| copts = LOGGING_COPTS + [ |
| "-Isrc", |
| "-Iinclude", |
| ] + select({ |
| ":debug_build": [], |
| "//conditions:default": xnnpack_min_size_copts(), |
| }) + select({ |
| ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"], |
| "//conditions:default": [], |
| }), |
| defines = [ |
| "XNN_NO_QS8_OPERATORS", |
| "XNN_NO_QU8_OPERATORS", |
| "XNN_NO_S8_OPERATORS", |
| "XNN_NO_U8_OPERATORS", |
| "XNN_NO_X8_OPERATORS", |
| "XNN_NO_NCHW_OPERATORS", |
| ], |
| gcc_copts = xnnpack_gcc_std_copts(), |
| includes = ["include"], |
| msvc_copts = xnnpack_msvc_std_copts(), |
| visibility = xnnpack_visibility(), |
| deps = [ |
| ":enable_assembly", |
| ":logging_utils", |
| ":operator_run", |
| ":operators", |
| ":prod_microkernels", |
| "@clog", |
| "@pthreadpool", |
| ] + select({ |
| ":emscripten": [], |
| "//conditions:default": ["@cpuinfo"], |
| }), |
| ) |
| |
| xnnpack_cc_library( |
| name = "bench_utils", |
| srcs = ["bench/utils.cc"], |
| hdrs = ["bench/utils.h"], |
| deps = [ |
| "@com_google_benchmark//:benchmark", |
| "@cpuinfo", |
| ], |
| ) |
| |
| ######################### Benchmarks for micro-kernels ######################### |
| |
| xnnpack_benchmark( |
| name = "qs8_dwconv_bench", |
| srcs = [ |
| "bench/dwconv.h", |
| "bench/qs8-dwconv.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":indirection", |
| ":packing", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "qs8_f32_vcvt_bench", |
| srcs = [ |
| "bench/qs8-f32-vcvt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qs8_gemm_bench", |
| srcs = [ |
| "bench/gemm.h", |
| "bench/qs8-gemm.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(), |
| deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "qs8_requantization_bench", |
| srcs = [ |
| "bench/qs8-requantization.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/requantization-stubs.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qs8_vadd_bench", |
| srcs = [ |
| "bench/qs8-vadd.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qs8_vaddc_bench", |
| srcs = [ |
| "bench/qs8-vaddc.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qs8_vmul_bench", |
| srcs = [ |
| "bench/qs8-vmul.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qs8_vmulc_bench", |
| srcs = [ |
| "bench/qs8-vmulc.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qu8_f32_vcvt_bench", |
| srcs = [ |
| "bench/qu8-f32-vcvt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qu8_gemm_bench", |
| srcs = [ |
| "bench/gemm.h", |
| "bench/qu8-gemm.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(), |
| deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "qu8_requantization_bench", |
| srcs = [ |
| "bench/qu8-requantization.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/requantization-stubs.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qu8_vadd_bench", |
| srcs = [ |
| "bench/qu8-vadd.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qu8_vaddc_bench", |
| srcs = [ |
| "bench/qu8-vaddc.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qu8_vmul_bench", |
| srcs = [ |
| "bench/qu8-vmul.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "qu8_vmulc_bench", |
| srcs = [ |
| "bench/qu8-vmulc.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f16_igemm_bench", |
| srcs = [ |
| "bench/f16-igemm.cc", |
| "bench/conv.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":indirection", |
| ":packing", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f16_gemm_bench", |
| srcs = [ |
| "bench/f16-gemm.cc", |
| "bench/gemm.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":packing", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f16_spmm_bench", |
| srcs = [ |
| "bench/f16-spmm.cc", |
| "bench/spmm.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f16_vrelu_bench", |
| srcs = [ |
| "bench/f16-vrelu.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f16_f32_vcvt_bench", |
| srcs = [ |
| "bench/f16-f32-vcvt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_igemm_bench", |
| srcs = [ |
| "bench/f32-igemm.cc", |
| "bench/conv.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":indirection", |
| ":packing", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_conv_hwc_bench", |
| srcs = [ |
| "bench/f32-conv-hwc.cc", |
| "bench/dconv.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":packing", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_conv_hwc2chw_bench", |
| srcs = [ |
| "bench/f32-conv-hwc2chw.cc", |
| "bench/dconv.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":packing", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f16_dwconv_bench", |
| srcs = [ |
| "bench/f16-dwconv.cc", |
| "bench/dwconv.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":indirection", |
| ":packing", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_dwconv_bench", |
| srcs = [ |
| "bench/f32-dwconv.cc", |
| "bench/dwconv.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":indirection", |
| ":packing", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_dwconv2d_chw_bench", |
| srcs = [ |
| "bench/f32-dwconv2d-chw.cc", |
| "bench/dwconv.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":indirection", |
| ":packing", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_f16_vcvt_bench", |
| srcs = [ |
| "bench/f32-f16-vcvt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "x16_transpose_bench", |
| srcs = [ |
| "bench/x16-transpose.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "x32_transpose_bench", |
| srcs = [ |
| "bench/x32-transpose.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_gemm_bench", |
| srcs = [ |
| "bench/f32-gemm.cc", |
| "bench/gemm.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| copts = xnnpack_optional_ruy_copts(), |
| deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_qs8_vcvt_bench", |
| srcs = [ |
| "bench/f32-qs8-vcvt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_qu8_vcvt_bench", |
| srcs = [ |
| "bench/f32-qu8-vcvt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_raddexpminusmax_bench", |
| srcs = [ |
| "bench/f32-raddexpminusmax.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_raddextexp_bench", |
| srcs = [ |
| "bench/f32-raddextexp.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_raddstoreexpminusmax_bench", |
| srcs = [ |
| "bench/f32-raddstoreexpminusmax.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_rmax_bench", |
| srcs = [ |
| "bench/f32-rmax.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_spmm_bench", |
| srcs = [ |
| "bench/f32-spmm.cc", |
| "bench/spmm.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_softmax_bench", |
| srcs = [ |
| "bench/f32-softmax.cc", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| copts = xnnpack_optional_dnnl_copts(), |
| deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_velu_bench", |
| srcs = [ |
| "bench/f32-velu.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_vhswish_bench", |
| srcs = [ |
| "bench/f32-vhswish.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_vlrelu_bench", |
| srcs = [ |
| "bench/f32-vlrelu.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_vrelu_bench", |
| srcs = [ |
| "bench/f32-vrelu.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_vscaleexpminusmax_bench", |
| srcs = [ |
| "bench/f32-vscaleexpminusmax.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_vscaleextexp_bench", |
| srcs = [ |
| "bench/f32-vscaleextexp.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_vsigmoid_bench", |
| srcs = [ |
| "bench/f32-vsigmoid.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_vsqrt_bench", |
| srcs = [ |
| "bench/f32-vsqrt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_im2col_gemm_bench", |
| srcs = [ |
| "bench/f32-im2col-gemm.cc", |
| "bench/conv.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":im2col", |
| ":packing", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "rounding_bench", |
| srcs = [ |
| "bench/rounding.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "x8_lut_bench", |
| srcs = [ |
| "bench/x8-lut.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS, |
| ) |
| |
| ########################### Benchmarks for operators ########################### |
| |
| xnnpack_benchmark( |
| name = "abs_bench", |
| srcs = ["bench/abs.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "average_pooling_bench", |
| srcs = ["bench/average-pooling.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "bankers_rounding_bench", |
| srcs = ["bench/bankers-rounding.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "ceiling_bench", |
| srcs = ["bench/ceiling.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "channel_shuffle_bench", |
| srcs = ["bench/channel-shuffle.cc"], |
| deps = OPERATOR_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "convert_bench", |
| srcs = [ |
| "bench/convert.cc", |
| ], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "convolution_bench", |
| srcs = ["bench/convolution.cc"], |
| copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "deconvolution_bench", |
| srcs = ["bench/deconvolution.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "elu_bench", |
| srcs = ["bench/elu.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "floor_bench", |
| srcs = ["bench/floor.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "global_average_pooling_bench", |
| srcs = ["bench/global-average-pooling.cc"], |
| deps = OPERATOR_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "hardswish_bench", |
| srcs = ["bench/hardswish.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "leaky_relu_bench", |
| srcs = ["bench/leaky-relu.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "max_pooling_bench", |
| srcs = ["bench/max-pooling.cc"], |
| deps = OPERATOR_BENCHMARK_DEPS, |
| ) |
| |
| xnnpack_benchmark( |
| name = "negate_bench", |
| srcs = ["bench/negate.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "sigmoid_bench", |
| srcs = ["bench/sigmoid.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "prelu_bench", |
| srcs = ["bench/prelu.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "softmax_bench", |
| srcs = ["bench/softmax.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "square_bench", |
| srcs = ["bench/square.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "square_root_bench", |
| srcs = ["bench/square-root.cc"], |
| copts = xnnpack_optional_tflite_copts(), |
| tags = ["nowin32"], |
| deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(), |
| ) |
| |
| xnnpack_benchmark( |
| name = "truncation_bench", |
| srcs = ["bench/truncation.cc"], |
| deps = OPERATOR_BENCHMARK_DEPS, |
| ) |
| |
| ############################# End-to-end benchmarks ############################ |
| |
| cc_library( |
| name = "fp32_mobilenet_v1", |
| srcs = ["models/fp32-mobilenet-v1.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp32_sparse_mobilenet_v1", |
| srcs = ["models/fp32-sparse-mobilenet-v1.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp16_mobilenet_v1", |
| srcs = ["models/fp16-mobilenet-v1.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "qc8_mobilenet_v1", |
| srcs = ["models/qc8-mobilenet-v1.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "qc8_mobilenet_v2", |
| srcs = ["models/qc8-mobilenet-v2.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "qs8_mobilenet_v1", |
| srcs = ["models/qs8-mobilenet-v1.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "qs8_mobilenet_v2", |
| srcs = ["models/qs8-mobilenet-v2.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "qu8_mobilenet_v1", |
| srcs = ["models/qu8-mobilenet-v1.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "qu8_mobilenet_v2", |
| srcs = ["models/qu8-mobilenet-v2.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp32_mobilenet_v2", |
| srcs = ["models/fp32-mobilenet-v2.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp32_sparse_mobilenet_v2", |
| srcs = ["models/fp32-sparse-mobilenet-v2.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp16_mobilenet_v2", |
| srcs = ["models/fp16-mobilenet-v2.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp32_mobilenet_v3_large", |
| srcs = ["models/fp32-mobilenet-v3-large.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp32_sparse_mobilenet_v3_large", |
| srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp16_mobilenet_v3_large", |
| srcs = ["models/fp16-mobilenet-v3-large.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp32_mobilenet_v3_small", |
| srcs = ["models/fp32-mobilenet-v3-small.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp32_sparse_mobilenet_v3_small", |
| srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@pthreadpool", |
| ], |
| ) |
| |
| cc_library( |
| name = "fp16_mobilenet_v3_small", |
| srcs = ["models/fp16-mobilenet-v3-small.cc"], |
| hdrs = ["models/models.h"], |
| copts = xnnpack_std_cxxopts(), |
| linkstatic = True, |
| deps = [ |
| ":XNNPACK", |
| "@FP16", |
| "@pthreadpool", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_dwconv_e2e_bench", |
| srcs = [ |
| "bench/f32-dwconv-e2e.cc", |
| "bench/end2end.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":XNNPACK", |
| ":fp32_mobilenet_v1", |
| ":fp32_mobilenet_v2", |
| ":fp32_mobilenet_v3_large", |
| ":fp32_mobilenet_v3_small", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_gemm_e2e_bench", |
| srcs = [ |
| "bench/f32-gemm-e2e.cc", |
| "bench/end2end.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":XNNPACK", |
| ":fp32_mobilenet_v1", |
| ":fp32_mobilenet_v2", |
| ":fp32_mobilenet_v3_large", |
| ":fp32_mobilenet_v3_small", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "qs8_dwconv_e2e_bench", |
| srcs = [ |
| "bench/qs8-dwconv-e2e.cc", |
| "bench/end2end.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":XNNPACK", |
| ":qs8_mobilenet_v1", |
| ":qs8_mobilenet_v2", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "qs8_gemm_e2e_bench", |
| srcs = [ |
| "bench/qs8-gemm-e2e.cc", |
| "bench/end2end.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":XNNPACK", |
| ":qs8_mobilenet_v1", |
| ":qs8_mobilenet_v2", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "qu8_gemm_e2e_bench", |
| srcs = [ |
| "bench/qu8-gemm-e2e.cc", |
| "bench/end2end.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":XNNPACK", |
| ":qu8_mobilenet_v1", |
| ":qu8_mobilenet_v2", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "qu8_dwconv_e2e_bench", |
| srcs = [ |
| "bench/qu8-dwconv-e2e.cc", |
| "bench/end2end.h", |
| ] + MICROKERNEL_BENCHMARK_HDRS, |
| deps = MICROKERNEL_BENCHMARK_DEPS + [ |
| ":XNNPACK", |
| ":qu8_mobilenet_v1", |
| ":qu8_mobilenet_v2", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "end2end_bench", |
| srcs = ["bench/end2end.cc"], |
| deps = [ |
| ":XNNPACK", |
| ":bench_utils", |
| ":fp16_mobilenet_v1", |
| ":fp16_mobilenet_v2", |
| ":fp16_mobilenet_v3_large", |
| ":fp16_mobilenet_v3_small", |
| ":fp32_mobilenet_v1", |
| ":fp32_mobilenet_v2", |
| ":fp32_mobilenet_v3_large", |
| ":fp32_mobilenet_v3_small", |
| ":fp32_sparse_mobilenet_v1", |
| ":fp32_sparse_mobilenet_v2", |
| ":fp32_sparse_mobilenet_v3_large", |
| ":fp32_sparse_mobilenet_v3_small", |
| ":qc8_mobilenet_v1", |
| ":qc8_mobilenet_v2", |
| ":qs8_mobilenet_v1", |
| ":qs8_mobilenet_v2", |
| ":qu8_mobilenet_v1", |
| ":qu8_mobilenet_v2", |
| "@pthreadpool", |
| ], |
| ) |
| |
| #################### Accuracy evaluation for math functions #################### |
| |
| xnnpack_benchmark( |
| name = "f32_exp_ulp_eval", |
| srcs = [ |
| "eval/f32-exp-ulp.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + ACCURACY_EVAL_HDRS, |
| deps = ACCURACY_EVAL_DEPS + [ |
| ":bench_utils", |
| "@cpuinfo", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_expminus_ulp_eval", |
| srcs = [ |
| "eval/f32-expminus-ulp.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + ACCURACY_EVAL_HDRS, |
| deps = ACCURACY_EVAL_DEPS + [ |
| ":bench_utils", |
| "@cpuinfo", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_expm1minus_ulp_eval", |
| srcs = [ |
| "eval/f32-expm1minus-ulp.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + ACCURACY_EVAL_HDRS, |
| deps = ACCURACY_EVAL_DEPS + [ |
| ":bench_utils", |
| "@cpuinfo", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_extexp_ulp_eval", |
| srcs = [ |
| "eval/f32-extexp-ulp.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + ACCURACY_EVAL_HDRS, |
| deps = ACCURACY_EVAL_DEPS + [ |
| ":bench_utils", |
| "@cpuinfo", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_sigmoid_ulp_eval", |
| srcs = [ |
| "eval/f32-sigmoid-ulp.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + ACCURACY_EVAL_HDRS, |
| deps = ACCURACY_EVAL_DEPS + [ |
| ":bench_utils", |
| "@cpuinfo", |
| ], |
| ) |
| |
| xnnpack_benchmark( |
| name = "f32_sqrt_ulp_eval", |
| srcs = [ |
| "eval/f32-sqrt-ulp.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + ACCURACY_EVAL_HDRS, |
| deps = ACCURACY_EVAL_DEPS + [ |
| ":bench_utils", |
| "@cpuinfo", |
| ], |
| ) |
| |
| ################### Accuracy verification for math functions ################## |
| |
| xnnpack_unit_test( |
| name = "f16_f32_cvt_eval", |
| srcs = [ |
| "eval/f16-f32-cvt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_f16_cvt_eval", |
| srcs = [ |
| "eval/f32-f16-cvt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_qs8_cvt_eval", |
| srcs = [ |
| "eval/f32-qs8-cvt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_qu8_cvt_eval", |
| srcs = [ |
| "eval/f32-qu8-cvt.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_exp_eval", |
| srcs = [ |
| "eval/f32-exp.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_expm1minus_eval", |
| srcs = [ |
| "eval/f32-expm1minus.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_expminus_eval", |
| srcs = [ |
| "eval/f32-expminus.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_roundne_eval", |
| srcs = [ |
| "eval/f32-roundne.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_roundd_eval", |
| srcs = [ |
| "eval/f32-roundd.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_roundu_eval", |
| srcs = [ |
| "eval/f32-roundu.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_roundz_eval", |
| srcs = [ |
| "eval/f32-roundz.cc", |
| "src/xnnpack/AlignedAllocator.h", |
| "src/xnnpack/math-stubs.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| automatic = False, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| ######################### Unit tests for micro-kernels ######################### |
| |
| xnnpack_unit_test( |
| name = "f16_f32_vcvt_test", |
| srcs = [ |
| "test/f16-f32-vcvt.cc", |
| "test/vcvt-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_dwconv_minmax_test", |
| srcs = [ |
| "test/f16-dwconv-minmax.cc", |
| "test/dwconv-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_gavgpool_minmax_test", |
| srcs = [ |
| "test/f16-gavgpool-minmax.cc", |
| "test/gavgpool-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_gemm_minmax_test", |
| srcs = [ |
| "test/f16-gemm-minmax.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_igemm_minmax_test", |
| srcs = [ |
| "test/f16-igemm-minmax.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_spmm_minmax_test", |
| srcs = [ |
| "test/f16-spmm-minmax.cc", |
| "test/spmm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vadd_minmax_test", |
| srcs = [ |
| "test/f16-vadd-minmax.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vaddc_minmax_test", |
| srcs = [ |
| "test/f16-vaddc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vclamp_test", |
| srcs = [ |
| "test/f16-vclamp.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vdiv_minmax_test", |
| srcs = [ |
| "test/f16-vdiv-minmax.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vdivc_minmax_test", |
| srcs = [ |
| "test/f16-vdivc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vrdivc_minmax_test", |
| srcs = [ |
| "test/f16-vrdivc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vhswish_test", |
| srcs = [ |
| "test/f16-vhswish.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vmax_test", |
| srcs = [ |
| "test/f16-vmax.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vmaxc_test", |
| srcs = [ |
| "test/f16-vmaxc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vmin_test", |
| srcs = [ |
| "test/f16-vmin.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vminc_test", |
| srcs = [ |
| "test/f16-vminc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vmul_minmax_test", |
| srcs = [ |
| "test/f16-vmul-minmax.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vmulc_minmax_test", |
| srcs = [ |
| "test/f16-vmulc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vmulcaddc_minmax_test", |
| srcs = [ |
| "test/f16-vmulcaddc-minmax.cc", |
| "test/vmulcaddc-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vsub_minmax_test", |
| srcs = [ |
| "test/f16-vsub-minmax.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vsubc_minmax_test", |
| srcs = [ |
| "test/f16-vsubc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_vrsubc_minmax_test", |
| srcs = [ |
| "test/f16-vrsubc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_argmaxpool_test", |
| srcs = [ |
| "test/f32-argmaxpool.cc", |
| "test/argmaxpool-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_avgpool_minmax_test", |
| srcs = [ |
| "test/f32-avgpool-minmax.cc", |
| "test/avgpool-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_ibilinear_test", |
| srcs = [ |
| "test/f32-ibilinear.cc", |
| "test/ibilinear-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_ibilinear_chw_test", |
| srcs = [ |
| "test/f32-ibilinear-chw.cc", |
| "test/ibilinear-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_igemm_test", |
| srcs = [ |
| "test/f32-igemm.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_igemm_relu_test", |
| srcs = [ |
| "test/f32-igemm-relu.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_igemm_minmax_test", |
| srcs = [ |
| "test/f32-igemm-minmax.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_conv_hwc_test", |
| srcs = [ |
| "test/f32-conv-hwc.cc", |
| "test/conv-hwc-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_conv_hwc2chw_test", |
| srcs = [ |
| "test/f32-conv-hwc2chw.cc", |
| "test/conv-hwc2chw-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_dwconv_test", |
| srcs = [ |
| "test/f32-dwconv.cc", |
| "test/dwconv-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_dwconv_minmax_test", |
| srcs = [ |
| "test/f32-dwconv-minmax.cc", |
| "test/dwconv-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_dwconv2d_chw_test", |
| srcs = [ |
| "test/f32-dwconv2d-chw.cc", |
| "test/dwconv2d-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_f16_vcvt_test", |
| srcs = [ |
| "test/f32-f16-vcvt.cc", |
| "test/vcvt-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_gavgpool_minmax_test", |
| srcs = [ |
| "test/f32-gavgpool-minmax.cc", |
| "test/gavgpool-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_gavgpool_cw_test", |
| srcs = [ |
| "test/f32-gavgpool-cw.cc", |
| "test/gavgpool-cw-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_gemm_test", |
| srcs = [ |
| "test/f32-gemm.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_gemm_relu_test", |
| srcs = [ |
| "test/f32-gemm-relu.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_gemm_minmax_test", |
| srcs = [ |
| "test/f32-gemm-minmax.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [ |
| ":packing", |
| ":jit", |
| ], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_gemminc_minmax_test", |
| srcs = [ |
| "test/f32-gemminc-minmax.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vhswish_test", |
| srcs = [ |
| "test/f32-vhswish.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_maxpool_minmax_test", |
| srcs = [ |
| "test/f32-maxpool-minmax.cc", |
| "test/maxpool-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_pavgpool_minmax_test", |
| srcs = [ |
| "test/f32-pavgpool-minmax.cc", |
| "test/avgpool-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_ppmm_minmax_test", |
| srcs = [ |
| "test/f32-ppmm-minmax.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f16_prelu_test", |
| srcs = [ |
| "test/f16-prelu.cc", |
| "test/prelu-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_prelu_test", |
| srcs = [ |
| "test/f32-prelu.cc", |
| "test/prelu-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_qs8_vcvt_test", |
| srcs = [ |
| "test/f32-qs8-vcvt.cc", |
| "test/vcvt-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_qu8_vcvt_test", |
| srcs = [ |
| "test/f32-qu8-vcvt.cc", |
| "test/vcvt-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_raddexpminusmax_test", |
| srcs = [ |
| "test/f32-raddexpminusmax.cc", |
| "test/raddexpminusmax-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_raddextexp_test", |
| srcs = [ |
| "test/f32-raddextexp.cc", |
| "test/raddextexp-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_raddstoreexpminusmax_test", |
| srcs = [ |
| "test/f32-raddstoreexpminusmax.cc", |
| "test/raddstoreexpminusmax-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_rmax_test", |
| srcs = [ |
| "test/f32-rmax.cc", |
| "test/rmax-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_spmm_minmax_test", |
| srcs = [ |
| "test/f32-spmm-minmax.cc", |
| "test/spmm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vabs_test", |
| srcs = [ |
| "test/f32-vabs.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vadd_test", |
| srcs = [ |
| "test/f32-vadd.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vadd_minmax_test", |
| srcs = [ |
| "test/f32-vadd-minmax.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vadd_relu_test", |
| srcs = [ |
| "test/f32-vadd-relu.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vaddc_test", |
| srcs = [ |
| "test/f32-vaddc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vaddc_minmax_test", |
| srcs = [ |
| "test/f32-vaddc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vaddc_relu_test", |
| srcs = [ |
| "test/f32-vaddc-relu.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vclamp_test", |
| srcs = [ |
| "test/f32-vclamp.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vdiv_test", |
| srcs = [ |
| "test/f32-vdiv.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vdiv_minmax_test", |
| srcs = [ |
| "test/f32-vdiv-minmax.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vdiv_relu_test", |
| srcs = [ |
| "test/f32-vdiv-relu.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vdivc_test", |
| srcs = [ |
| "test/f32-vdivc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vdivc_minmax_test", |
| srcs = [ |
| "test/f32-vdivc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vdivc_relu_test", |
| srcs = [ |
| "test/f32-vdivc-relu.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrdivc_test", |
| srcs = [ |
| "test/f32-vrdivc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrdivc_minmax_test", |
| srcs = [ |
| "test/f32-vrdivc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrdivc_relu_test", |
| srcs = [ |
| "test/f32-vrdivc-relu.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_velu_test", |
| srcs = [ |
| "test/f32-velu.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vmax_test", |
| srcs = [ |
| "test/f32-vmax.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vmaxc_test", |
| srcs = [ |
| "test/f32-vmaxc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vmin_test", |
| srcs = [ |
| "test/f32-vmin.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vminc_test", |
| srcs = [ |
| "test/f32-vminc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vmul_test", |
| srcs = [ |
| "test/f32-vmul.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vmul_minmax_test", |
| srcs = [ |
| "test/f32-vmul-minmax.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vmul_relu_test", |
| srcs = [ |
| "test/f32-vmul-relu.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vmulc_test", |
| srcs = [ |
| "test/f32-vmulc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vmulc_minmax_test", |
| srcs = [ |
| "test/f32-vmulc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vmulc_relu_test", |
| srcs = [ |
| "test/f32-vmulc-relu.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vmulcaddc_minmax_test", |
| srcs = [ |
| "test/f32-vmulcaddc-minmax.cc", |
| "test/vmulcaddc-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vlrelu_test", |
| srcs = [ |
| "test/f32-vlrelu.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vneg_test", |
| srcs = [ |
| "test/f32-vneg.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrelu_test", |
| srcs = [ |
| "test/f32-vrelu.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrndne_test", |
| srcs = [ |
| "test/f32-vrndne.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrndz_test", |
| srcs = [ |
| "test/f32-vrndz.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrndu_test", |
| srcs = [ |
| "test/f32-vrndu.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrndd_test", |
| srcs = [ |
| "test/f32-vrndd.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vscale_test", |
| srcs = [ |
| "test/f32-vscale.cc", |
| "test/vscale-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vscaleexpminusmax_test", |
| srcs = [ |
| "test/f32-vscaleexpminusmax.cc", |
| "test/vscaleexpminusmax-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vscaleextexp_test", |
| srcs = [ |
| "test/f32-vscaleextexp.cc", |
| "test/vscaleextexp-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsigmoid_test", |
| srcs = [ |
| "test/f32-vsigmoid.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsqr_test", |
| srcs = [ |
| "test/f32-vsqr.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsqrdiff_test", |
| srcs = [ |
| "test/f32-vsqrdiff.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsqrdiffc_test", |
| srcs = [ |
| "test/f32-vsqrdiffc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsqrt_test", |
| srcs = [ |
| "test/f32-vsqrt.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsub_test", |
| srcs = [ |
| "test/f32-vsub.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsub_minmax_test", |
| srcs = [ |
| "test/f32-vsub-minmax.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsub_relu_test", |
| srcs = [ |
| "test/f32-vsub-relu.cc", |
| "test/vbinary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsubc_test", |
| srcs = [ |
| "test/f32-vsubc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsubc_minmax_test", |
| srcs = [ |
| "test/f32-vsubc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vsubc_relu_test", |
| srcs = [ |
| "test/f32-vsubc-relu.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrsubc_test", |
| srcs = [ |
| "test/f32-vrsubc.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrsubc_minmax_test", |
| srcs = [ |
| "test/f32-vrsubc-minmax.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "f32_vrsubc_relu_test", |
| srcs = [ |
| "test/f32-vrsubc-relu.cc", |
| "test/vbinaryc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qc8_dwconv_minmax_fp32_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/qc8-dwconv-minmax-fp32.cc", |
| "test/dwconv-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| shard_count = 10, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qc8_gemm_minmax_fp32_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/qc8-gemm-minmax-fp32.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| shard_count = 10, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qc8_igemm_minmax_fp32_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/qc8-igemm-minmax-fp32.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| shard_count = 10, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_dwconv_minmax_fp32_test", |
| srcs = [ |
| "test/qs8-dwconv-minmax-fp32.cc", |
| "test/dwconv-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| shard_count = 10, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_dwconv_minmax_rndnu_test", |
| srcs = [ |
| "test/qs8-dwconv-minmax-rndnu.cc", |
| "test/dwconv-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_f32_vcvt_test", |
| srcs = [ |
| "test/qs8-f32-vcvt.cc", |
| "test/vcvt-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_gavgpool_minmax_test", |
| srcs = [ |
| "test/qs8-gavgpool-minmax.cc", |
| "test/gavgpool-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_gemm_minmax_fp32_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/qs8-gemm-minmax-fp32.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| shard_count = 10, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_gemm_minmax_rndnu_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/qs8-gemm-minmax-rndnu.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_igemm_minmax_fp32_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/qs8-igemm-minmax-fp32.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| shard_count = 10, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_igemm_minmax_rndnu_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/qs8-igemm-minmax-rndnu.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_requantization_test", |
| srcs = [ |
| "src/xnnpack/requantization-stubs.h", |
| "test/qs8-requantization.cc", |
| "test/requantization-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_vadd_minmax_test", |
| srcs = [ |
| "test/qs8-vadd-minmax.cc", |
| "test/vadd-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_vaddc_minmax_test", |
| srcs = [ |
| "test/qs8-vaddc-minmax.cc", |
| "test/vaddc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_vmul_minmax_fp32_test", |
| srcs = [ |
| "test/qs8-vmul-minmax-fp32.cc", |
| "test/vmul-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qs8_vmulc_minmax_fp32_test", |
| srcs = [ |
| "test/qs8-vmulc-minmax-fp32.cc", |
| "test/vmulc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_avgpool_minmax_test", |
| srcs = [ |
| "test/qu8-avgpool-minmax.cc", |
| "test/avgpool-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_dwconv_minmax_fp32_test", |
| srcs = [ |
| "test/qu8-dwconv-minmax-fp32.cc", |
| "test/dwconv-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_dwconv_minmax_rndnu_test", |
| srcs = [ |
| "test/qu8-dwconv-minmax-rndnu.cc", |
| "test/dwconv-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_f32_vcvt_test", |
| srcs = [ |
| "test/qu8-f32-vcvt.cc", |
| "test/vcvt-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_gavgpool_minmax_test", |
| srcs = [ |
| "test/qu8-gavgpool-minmax.cc", |
| "test/gavgpool-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_gemm_minmax_fp32_test", |
| srcs = [ |
| "test/qu8-gemm-minmax-fp32.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| shard_count = 10, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_gemm_minmax_rndnu_test", |
| srcs = [ |
| "test/qu8-gemm-minmax-rndnu.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_igemm_minmax_fp32_test", |
| srcs = [ |
| "test/qu8-igemm-minmax-fp32.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| shard_count = 10, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_igemm_minmax_rndnu_test", |
| srcs = [ |
| "test/qu8-igemm-minmax-rndnu.cc", |
| "test/gemm-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS + [":packing"], |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_requantization_test", |
| srcs = [ |
| "src/xnnpack/requantization-stubs.h", |
| "test/qu8-requantization.cc", |
| "test/requantization-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_vadd_minmax_test", |
| srcs = [ |
| "test/qu8-vadd-minmax.cc", |
| "test/vadd-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_vaddc_minmax_test", |
| srcs = [ |
| "test/qu8-vaddc-minmax.cc", |
| "test/vaddc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_vmul_minmax_fp32_test", |
| srcs = [ |
| "test/qu8-vmul-minmax-fp32.cc", |
| "test/vmul-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "qu8_vmulc_minmax_fp32_test", |
| srcs = [ |
| "test/qu8-vmulc-minmax-fp32.cc", |
| "test/vmulc-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "s8_ibilinear_test", |
| srcs = [ |
| "test/s8-ibilinear.cc", |
| "test/ibilinear-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "s8_maxpool_minmax_test", |
| srcs = [ |
| "test/s8-maxpool-minmax.cc", |
| "test/maxpool-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "s8_vclamp_test", |
| srcs = [ |
| "test/s8-vclamp.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "u8_ibilinear_test", |
| srcs = [ |
| "test/u8-ibilinear.cc", |
| "test/ibilinear-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "u8_lut32norm_test", |
| srcs = [ |
| "test/u8-lut32norm.cc", |
| "test/lut-norm-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "u8_maxpool_minmax_test", |
| srcs = [ |
| "test/u8-maxpool-minmax.cc", |
| "test/maxpool-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "u8_rmax_test", |
| srcs = [ |
| "test/u8-rmax.cc", |
| "test/rmax-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "u8_vclamp_test", |
| srcs = [ |
| "test/u8-vclamp.cc", |
| "test/vunary-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "x8_lut_test", |
| srcs = [ |
| "test/x8-lut.cc", |
| "test/lut-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "x8_zip_test", |
| srcs = [ |
| "test/x8-zip.cc", |
| "test/zip-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "x32_depthtospace2d_chw2hwc_test", |
| srcs = [ |
| "test/x32-depthtospace2d-chw2hwc.cc", |
| "test/depthtospace-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "x32_packx_test", |
| srcs = [ |
| "test/x32-packx.cc", |
| "test/pack-microkernel-tester.h", |
| "src/xnnpack/AlignedAllocator.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "x16_transpose_test", |
| srcs = [ |
| "test/x16-transpose.cc", |
| "test/transpose-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "x32_transpose_test", |
| srcs = [ |
| "test/x32-transpose.cc", |
| "test/transpose-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "x32_unpool_test", |
| srcs = [ |
| "test/x32-unpool.cc", |
| "test/unpool-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "x32_zip_test", |
| srcs = [ |
| "test/x32-zip.cc", |
| "test/zip-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "xx_fill_test", |
| srcs = [ |
| "test/xx-fill.cc", |
| "test/fill-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "xx_pad_test", |
| srcs = [ |
| "test/xx-pad.cc", |
| "test/pad-microkernel-tester.h", |
| ] + MICROKERNEL_TEST_HDRS, |
| deps = MICROKERNEL_TEST_DEPS, |
| ) |
| |
| ########################## Size tests for the library ######################### |
| |
| xnnpack_binary( |
| name = "operator_size_test", |
| srcs = ["test/operator-size.c"], |
| deps = [":xnnpack_for_tfjs"], |
| ) |
| |
| xnnpack_binary( |
| name = "subgraph_size_test", |
| srcs = ["test/subgraph-size.c"], |
| deps = [":XNNPACK"], |
| ) |
| |
| ########################### Unit tests for operators ########################## |
| |
| xnnpack_unit_test( |
| name = "abs_nc_test", |
| srcs = [ |
| "test/abs-nc.cc", |
| "test/abs-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "add_nd_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/add-nd.cc", |
| "test/binary-elementwise-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "argmax_pooling_nhwc_test", |
| srcs = [ |
| "test/argmax-pooling-nhwc.cc", |
| "test/argmax-pooling-operator-tester.h", |
| ] + OPERATOR_TEST_PARAMS_HDRS, |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "average_pooling_nhwc_test", |
| srcs = [ |
| "test/average-pooling-nhwc.cc", |
| "test/average-pooling-operator-tester.h", |
| ] + OPERATOR_TEST_PARAMS_HDRS, |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "bankers_rounding_nc_test", |
| srcs = [ |
| "test/bankers-rounding-nc.cc", |
| "test/bankers-rounding-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "ceiling_nc_test", |
| srcs = [ |
| "test/ceiling-nc.cc", |
| "test/ceiling-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "channel_shuffle_nc_test", |
| srcs = [ |
| "test/channel-shuffle-nc.cc", |
| "test/channel-shuffle-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "clamp_nc_test", |
| srcs = [ |
| "test/clamp-nc.cc", |
| "test/clamp-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "constant_pad_nd_test", |
| srcs = [ |
| "test/constant-pad-nd.cc", |
| "test/constant-pad-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "convert_nc_test", |
| srcs = [ |
| "test/convert-nc.cc", |
| "test/convert-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "convolution_nhwc_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/convolution-nhwc.cc", |
| "test/convolution-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "convolution_nchw_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/convolution-nchw.cc", |
| "test/convolution-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "copy_nc_test", |
| srcs = [ |
| "test/copy-nc.cc", |
| "test/copy-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "deconvolution_nhwc_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/deconvolution-nhwc.cc", |
| "test/deconvolution-operator-tester.h", |
| ] + OPERATOR_TEST_PARAMS_HDRS, |
| shard_count = 10, |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "depth_to_space_nchw2nhwc_test", |
| srcs = [ |
| "test/depth-to-space-nchw2nhwc.cc", |
| "test/depth-to-space-operator-tester.h", |
| ] + OPERATOR_TEST_PARAMS_HDRS, |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "depth_to_space_nhwc_test", |
| srcs = [ |
| "test/depth-to-space-nhwc.cc", |
| "test/depth-to-space-operator-tester.h", |
| ] + OPERATOR_TEST_PARAMS_HDRS, |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "divide_nd_test", |
| srcs = [ |
| "test/binary-elementwise-operator-tester.h", |
| "test/divide-nd.cc", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "elu_nc_test", |
| srcs = [ |
| "test/elu-nc.cc", |
| "test/elu-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "fully_connected_nc_test", |
| srcs = [ |
| "test/fully-connected-nc.cc", |
| "test/fully-connected-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "floor_nc_test", |
| srcs = [ |
| "test/floor-nc.cc", |
| "test/floor-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "global_average_pooling_nwc_test", |
| srcs = [ |
| "test/global-average-pooling-nwc.cc", |
| "test/global-average-pooling-operator-tester.h", |
| ] + OPERATOR_TEST_PARAMS_HDRS, |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "global_average_pooling_ncw_test", |
| srcs = [ |
| "test/global-average-pooling-ncw.cc", |
| "test/global-average-pooling-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "hardswish_nc_test", |
| srcs = [ |
| "test/hardswish-nc.cc", |
| "test/hardswish-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "leaky_relu_nc_test", |
| srcs = [ |
| "test/leaky-relu-nc.cc", |
| "test/leaky-relu-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "max_pooling_nhwc_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/max-pooling-nhwc.cc", |
| "test/max-pooling-operator-tester.h", |
| ] + OPERATOR_TEST_PARAMS_HDRS, |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "maximum_nd_test", |
| srcs = [ |
| "test/binary-elementwise-operator-tester.h", |
| "test/maximum-nd.cc", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "minimum_nd_test", |
| srcs = [ |
| "test/binary-elementwise-operator-tester.h", |
| "test/minimum-nd.cc", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "multiply_nd_test", |
| timeout = "moderate", |
| srcs = [ |
| "test/binary-elementwise-operator-tester.h", |
| "test/multiply-nd.cc", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "negate_nc_test", |
| srcs = [ |
| "test/negate-nc.cc", |
| "test/negate-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "prelu_nc_test", |
| srcs = [ |
| "test/prelu-nc.cc", |
| "test/prelu-operator-tester.h", |
| ] + OPERATOR_TEST_PARAMS_HDRS, |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "resize_bilinear_nhwc_test", |
| srcs = [ |
| "test/resize-bilinear-nhwc.cc", |
| "test/resize-bilinear-operator-tester.h", |
| ] + OPERATOR_TEST_PARAMS_HDRS, |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "resize_bilinear_nchw_test", |
| srcs = [ |
| "test/resize-bilinear-nchw.cc", |
| "test/resize-bilinear-operator-tester.h", |
| ] + OPERATOR_TEST_PARAMS_HDRS, |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "sigmoid_nc_test", |
| srcs = [ |
| "test/sigmoid-nc.cc", |
| "test/sigmoid-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "softmax_nc_test", |
| srcs = [ |
| "test/softmax-nc.cc", |
| "test/softmax-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "square_nc_test", |
| srcs = [ |
| "test/square-nc.cc", |
| "test/square-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "square_root_nc_test", |
| srcs = [ |
| "test/square-root-nc.cc", |
| "test/square-root-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "squared_difference_nd_test", |
| srcs = [ |
| "test/binary-elementwise-operator-tester.h", |
| "test/squared-difference-nd.cc", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "subtract_nd_test", |
| srcs = [ |
| "test/binary-elementwise-operator-tester.h", |
| "test/subtract-nd.cc", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "tanh_nc_test", |
| srcs = [ |
| "test/tanh-nc.cc", |
| "test/tanh-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "truncation_nc_test", |
| srcs = [ |
| "test/truncation-nc.cc", |
| "test/truncation-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| xnnpack_unit_test( |
| name = "unpooling_nhwc_test", |
| srcs = [ |
| "test/unpooling-nhwc.cc", |
| "test/unpooling-operator-tester.h", |
| ], |
| deps = OPERATOR_TEST_DEPS, |
| ) |
| |
| ############################### Misc unit tests ############################### |
| |
| xnnpack_unit_test( |
| name = "memory_planner_test", |
| srcs = [ |
| "test/memory-planner-test.cc", |
| ], |
| deps = [ |
| ":XNNPACK", |
| ":memory_planner", |
| ], |
| ) |
| |
| xnnpack_unit_test( |
| name = "subgraph_nchw_test", |
| srcs = [ |
| "src/xnnpack/subgraph.h", |
| "test/subgraph-nchw.cc", |
| "test/subgraph-tester.h", |
| ], |
| deps = [ |
| ":XNNPACK", |
| ], |
| ) |
| |
| xnnpack_unit_test( |
| name = "aarch32_assembler_test", |
| srcs = [ |
| "test/aarch32-assembler.cc", |
| ], |
| deps = [ |
| ":XNNPACK", |
| ":jit_test_mode", |
| ], |
| ) |
| |
| ############################# Build configurations ############################# |
| |
| # Enables usage of assembly kernels. |
| config_setting( |
| name = "xnn_enable_assembly_explicit_true", |
| define_values = {"xnn_enable_assembly": "true"}, |
| ) |
| |
| # Disables usage of assembly kernels. |
| config_setting( |
| name = "xnn_enable_assembly_explicit_false", |
| define_values = {"xnn_enable_assembly": "false"}, |
| ) |
| |
| # Enables usage of sparse inference. |
| config_setting( |
| name = "xnn_enable_sparse_explicit_true", |
| define_values = {"xnn_enable_sparse": "true"}, |
| ) |
| |
| # Disables usage of sparse inference. |
| config_setting( |
| name = "xnn_enable_sparse_explicit_false", |
| define_values = {"xnn_enable_sparse": "false"}, |
| ) |
| |
| # Disables usage of HMP-aware optimizations. |
| config_setting( |
| name = "xnn_enable_hmp_explicit_false", |
| define_values = {"xnn_enable_hmp": "false"}, |
| ) |
| |
| # Enable usage of optimized memory allocation |
| config_setting( |
| name = "xnn_enable_memopt_explicit_true", |
| define_values = {"xnn_enable_memopt": "true"}, |
| ) |
| |
| # Disable usage of optimized memory allocation |
| config_setting( |
| name = "xnn_enable_memopt_explicit_false", |
| define_values = {"xnn_enable_memopt": "false"}, |
| ) |
| |
| # Enable QS8 inference in TFLite-specific version |
| config_setting( |
| name = "xnn_enable_qs8_explicit_true", |
| define_values = {"xnn_enable_qs8": "true"}, |
| ) |
| |
| # Disable QS8 inference in TFLite-specific version |
| config_setting( |
| name = "xnn_enable_qs8_explicit_false", |
| define_values = {"xnn_enable_qs8": "false"}, |
| ) |
| |
| # Enable QU8 inference in TFLite-specific version |
| config_setting( |
| name = "xnn_enable_qu8_explicit_true", |
| define_values = {"xnn_enable_qu8": "true"}, |
| ) |
| |
| # Disable QU8 inference in TFLite-specific version |
| config_setting( |
| name = "xnn_enable_qu8_explicit_false", |
| define_values = {"xnn_enable_qu8": "false"}, |
| ) |
| |
| # Target Chrome M87 instructions in WAsm SIMD build |
| config_setting( |
| name = "xnn_wasmsimd_version_m87", |
| define_values = {"xnn_wasmsimd_version": "m87"}, |
| ) |
| |
| # Target Chrome M88 instructions in WAsm SIMD build |
| config_setting( |
| name = "xnn_wasmsimd_version_m88", |
| define_values = {"xnn_wasmsimd_version": "m88"}, |
| ) |
| |
| # Target Chrome M91 instructions in WAsm SIMD build |
| config_setting( |
| name = "xnn_wasmsimd_version_m91", |
| define_values = {"xnn_wasmsimd_version": "m91"}, |
| ) |
| |
| # Builds with -c dbg |
| config_setting( |
| name = "debug_build", |
| values = { |
| "compilation_mode": "dbg", |
| }, |
| ) |
| |
| # Builds with -c opt |
| config_setting( |
| name = "optimized_build", |
| values = { |
| "compilation_mode": "opt", |
| }, |
| ) |
| |
| config_setting( |
| name = "linux_arm64", |
| values = {"cpu": "aarch64"}, |
| ) |
| |
| config_setting( |
| name = "linux_k8", |
| values = {"cpu": "k8"}, |
| ) |
| |
| config_setting( |
| name = "linux_arm", |
| values = {"cpu": "arm"}, |
| ) |
| |
| config_setting( |
| name = "linux_armeabi", |
| values = {"cpu": "armeabi"}, |
| ) |
| |
| config_setting( |
| name = "linux_armhf", |
| values = {"cpu": "armhf"}, |
| ) |
| |
| config_setting( |
| name = "linux_armv7a", |
| values = {"cpu": "armv7a"}, |
| ) |
| |
| config_setting( |
| name = "android", |
| values = {"crosstool_top": "//external:android/crosstool"}, |
| ) |
| |
| config_setting( |
| name = "android_armv7", |
| values = { |
| "crosstool_top": "//external:android/crosstool", |
| "cpu": "armeabi-v7a", |
| }, |
| ) |
| |
| config_setting( |
| name = "android_arm64", |
| values = { |
| "crosstool_top": "//external:android/crosstool", |
| "cpu": "arm64-v8a", |
| }, |
| ) |
| |
| config_setting( |
| name = "android_x86", |
| values = { |
| "crosstool_top": "//external:android/crosstool", |
| "cpu": "x86", |
| }, |
| ) |
| |
| config_setting( |
| name = "android_x86_64", |
| values = { |
| "crosstool_top": "//external:android/crosstool", |
| "cpu": "x86_64", |
| }, |
| ) |
| |
| config_setting( |
| name = "windows_x86_64", |
| values = {"cpu": "x64_windows"}, |
| ) |
| |
| config_setting( |
| name = "windows_x86_64_clang", |
| values = { |
| "compiler": "clang-cl", |
| "cpu": "x64_windows", |
| }, |
| ) |
| |
| config_setting( |
| name = "windows_x86_64_mingw", |
| values = { |
| "compiler": "mingw-gcc", |
| "cpu": "x64_windows", |
| }, |
| ) |
| |
| config_setting( |
| name = "windows_x86_64_msys", |
| values = { |
| "compiler": "msys-gcc", |
| "cpu": "x64_windows", |
| }, |
| ) |
| |
| config_setting( |
| name = "macos_x86_64", |
| values = { |
| "apple_platform_type": "macos", |
| "cpu": "darwin", |
| }, |
| ) |
| |
| config_setting( |
| name = "macos_arm64", |
| values = { |
| "apple_platform_type": "macos", |
| "cpu": "darwin_arm64", |
| }, |
| ) |
| |
| config_setting( |
| name = "emscripten", |
| values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"}, |
| ) |
| |
| config_setting( |
| name = "emscripten_wasm", |
| values = { |
| "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| "cpu": "wasm", |
| }, |
| ) |
| |
| config_setting( |
| name = "emscripten_wasmsimd", |
| values = { |
| "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| "cpu": "wasm", |
| "features": "wasm_simd", |
| }, |
| ) |
| |
| config_setting( |
| name = "emscripten_wasmrelaxedsimd", |
| values = { |
| "crosstool_top": "@emsdk//emscripten_toolchain:everything", |
| "cpu": "wasm", |
| "features": "wasm_simd", |
| "copt": "-mrelaxed-simd", |
| "linkopt": "-mrelaxed-simd", |
| }, |
| ) |
| |
| config_setting( |
| name = "ios_armv7", |
| values = { |
| "apple_platform_type": "ios", |
| "cpu": "ios_armv7", |
| }, |
| ) |
| |
| config_setting( |
| name = "ios_arm64", |
| values = { |
| "apple_platform_type": "ios", |
| "cpu": "ios_arm64", |
| }, |
| ) |
| |
| config_setting( |
| name = "ios_arm64e", |
| values = { |
| "apple_platform_type": "ios", |
| "cpu": "ios_arm64e", |
| }, |
| ) |
| |
| config_setting( |
| name = "ios_x86", |
| values = { |
| "apple_platform_type": "ios", |
| "cpu": "ios_i386", |
| }, |
| ) |
| |
| config_setting( |
| name = "ios_x86_64", |
| values = { |
| "apple_platform_type": "ios", |
| "cpu": "ios_x86_64", |
| }, |
| ) |
| |
| config_setting( |
| name = "watchos_armv7k", |
| values = { |
| "apple_platform_type": "watchos", |
| "cpu": "watchos_armv7k", |
| }, |
| ) |
| |
| config_setting( |
| name = "watchos_arm64_32", |
| values = { |
| "apple_platform_type": "watchos", |
| "cpu": "watchos_arm64_32", |
| }, |
| ) |
| |
| config_setting( |
| name = "watchos_x86", |
| values = { |
| "apple_platform_type": "watchos", |
| "cpu": "watchos_i386", |
| }, |
| ) |
| |
| config_setting( |
| name = "watchos_x86_64", |
| values = { |
| "apple_platform_type": "watchos", |
| "cpu": "watchos_x86_64", |
| }, |
| ) |
| |
| config_setting( |
| name = "tvos_arm64", |
| values = { |
| "apple_platform_type": "tvos", |
| "cpu": "tvos_arm64", |
| }, |
| ) |
| |
| config_setting( |
| name = "tvos_x86_64", |
| values = { |
| "apple_platform_type": "tvos", |
| "cpu": "tvos_x86_64", |
| }, |
| ) |