DWCONV microkernels with alternative activations in WAsm SIMD
PiperOrigin-RevId: 316735709
diff --git a/test/f32-dwconv.cc b/test/f32-dwconv.cc
index 5ce4cf0..7ad4e77 100644
--- a/test/f32-dwconv.cc
+++ b/test/f32-dwconv.cc
@@ -20,6 +20,624 @@
#include "dwconv-microkernel-tester.h"
+#if XNN_ARCH_WASMSIMD
+ TEST(F32_DWCONV_UP4X25__WASMSIMD, c_eq_4) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(25)
+ .channels(4)
+ .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
+ }
+
+ TEST(F32_DWCONV_UP4X25__WASMSIMD, c_div_4) {
+ for (uint32_t channels = 8; channels < 64; channels += 12) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(25)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X25__WASMSIMD, c_lt_4) {
+ for (uint32_t channels = 1; channels < 4; channels++) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(25)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X25__WASMSIMD, c_gt_4) {
+ for (uint32_t channels = 5; channels < 8; channels++) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(25)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X25__WASMSIMD, multipixel) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(25)
+ .channels(channels)
+ .width(3)
+ .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X25__WASMSIMD, multipixel_with_step) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ for (size_t step = 2; step <= 25; step++) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(25)
+ .channels(channels)
+ .width(3)
+ .step(step)
+ .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
+ }
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X25__WASMSIMD, multipixel_with_output_stride) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(25)
+ .channels(4)
+ .width(5)
+ .output_stride(23)
+ .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X25__WASMSIMD, input_offset) {
+ for (uint32_t channels = 8; channels < 64; channels += 12) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(25)
+ .channels(channels)
+ .input_offset(112)
+ .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X25__WASMSIMD, zero) {
+ for (uint32_t mz = 0; mz < 25; mz++) {
+ for (uint32_t channels = 8; channels < 64; channels += 12) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(25)
+ .channels(channels)
+ .input_offset(112)
+ .zero_index(mz)
+ .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
+ }
+ }
+ }
+#endif // XNN_ARCH_WASMSIMD
+
+
+#if XNN_ARCH_WASMSIMD
+ TEST(F32_DWCONV_UP8X25__WASMSIMD, c_eq_8) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(25)
+ .channels(8)
+ .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
+ }
+
+ TEST(F32_DWCONV_UP8X25__WASMSIMD, c_div_8) {
+ for (uint32_t channels = 16; channels < 128; channels += 24) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(25)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X25__WASMSIMD, c_lt_8) {
+ for (uint32_t channels = 1; channels < 8; channels++) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(25)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X25__WASMSIMD, c_gt_8) {
+ for (uint32_t channels = 9; channels < 16; channels++) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(25)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X25__WASMSIMD, multipixel) {
+ for (size_t channels = 1; channels <= 40; channels += 7) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(25)
+ .channels(channels)
+ .width(3)
+ .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X25__WASMSIMD, multipixel_with_step) {
+ for (size_t channels = 1; channels <= 40; channels += 7) {
+ for (size_t step = 2; step <= 25; step++) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(25)
+ .channels(channels)
+ .width(3)
+ .step(step)
+ .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
+ }
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X25__WASMSIMD, multipixel_with_output_stride) {
+ for (size_t channels = 1; channels <= 40; channels += 7) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(25)
+ .channels(8)
+ .width(5)
+ .output_stride(43)
+ .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X25__WASMSIMD, input_offset) {
+ for (uint32_t channels = 16; channels < 128; channels += 24) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(25)
+ .channels(channels)
+ .input_offset(176)
+ .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X25__WASMSIMD, zero) {
+ for (uint32_t mz = 0; mz < 25; mz++) {
+ for (uint32_t channels = 16; channels < 128; channels += 24) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(25)
+ .channels(channels)
+ .input_offset(176)
+ .zero_index(mz)
+ .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
+ }
+ }
+ }
+#endif // XNN_ARCH_WASMSIMD
+
+
+#if XNN_ARCH_WASMSIMD
+ TEST(F32_DWCONV_UP4X9__WASMSIMD, c_eq_4) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(9)
+ .channels(4)
+ .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
+ }
+
+ TEST(F32_DWCONV_UP4X9__WASMSIMD, c_div_4) {
+ for (uint32_t channels = 8; channels < 64; channels += 12) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(9)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X9__WASMSIMD, c_lt_4) {
+ for (uint32_t channels = 1; channels < 4; channels++) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(9)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X9__WASMSIMD, c_gt_4) {
+ for (uint32_t channels = 5; channels < 8; channels++) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(9)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X9__WASMSIMD, multipixel) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(9)
+ .channels(channels)
+ .width(3)
+ .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X9__WASMSIMD, multipixel_with_step) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ for (size_t step = 2; step <= 9; step++) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(9)
+ .channels(channels)
+ .width(3)
+ .step(step)
+ .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
+ }
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X9__WASMSIMD, multipixel_with_output_stride) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(9)
+ .channels(4)
+ .width(5)
+ .output_stride(23)
+ .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X9__WASMSIMD, input_offset) {
+ for (uint32_t channels = 8; channels < 64; channels += 12) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(9)
+ .channels(channels)
+ .input_offset(112)
+ .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X9__WASMSIMD, zero) {
+ for (uint32_t mz = 0; mz < 9; mz++) {
+ for (uint32_t channels = 8; channels < 64; channels += 12) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(9)
+ .channels(channels)
+ .input_offset(112)
+ .zero_index(mz)
+ .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
+ }
+ }
+ }
+#endif // XNN_ARCH_WASMSIMD
+
+
+#if XNN_ARCH_WASMSIMD
+ TEST(F32_DWCONV_UP8X9__WASMSIMD, c_eq_8) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(9)
+ .channels(8)
+ .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
+ }
+
+ TEST(F32_DWCONV_UP8X9__WASMSIMD, c_div_8) {
+ for (uint32_t channels = 16; channels < 128; channels += 24) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(9)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X9__WASMSIMD, c_lt_8) {
+ for (uint32_t channels = 1; channels < 8; channels++) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(9)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X9__WASMSIMD, c_gt_8) {
+ for (uint32_t channels = 9; channels < 16; channels++) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(9)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X9__WASMSIMD, multipixel) {
+ for (size_t channels = 1; channels <= 40; channels += 7) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(9)
+ .channels(channels)
+ .width(3)
+ .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X9__WASMSIMD, multipixel_with_step) {
+ for (size_t channels = 1; channels <= 40; channels += 7) {
+ for (size_t step = 2; step <= 9; step++) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(9)
+ .channels(channels)
+ .width(3)
+ .step(step)
+ .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
+ }
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X9__WASMSIMD, multipixel_with_output_stride) {
+ for (size_t channels = 1; channels <= 40; channels += 7) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(9)
+ .channels(8)
+ .width(5)
+ .output_stride(43)
+ .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X9__WASMSIMD, input_offset) {
+ for (uint32_t channels = 16; channels < 128; channels += 24) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(9)
+ .channels(channels)
+ .input_offset(176)
+ .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X9__WASMSIMD, zero) {
+ for (uint32_t mz = 0; mz < 9; mz++) {
+ for (uint32_t channels = 16; channels < 128; channels += 24) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(9)
+ .channels(channels)
+ .input_offset(176)
+ .zero_index(mz)
+ .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
+ }
+ }
+ }
+#endif // XNN_ARCH_WASMSIMD
+
+
+#if XNN_ARCH_WASMSIMD
+ TEST(F32_DWCONV_UP4X4__WASMSIMD, c_eq_4) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(4)
+ .channels(4)
+ .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
+ }
+
+ TEST(F32_DWCONV_UP4X4__WASMSIMD, c_div_4) {
+ for (uint32_t channels = 8; channels < 64; channels += 12) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(4)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X4__WASMSIMD, c_lt_4) {
+ for (uint32_t channels = 1; channels < 4; channels++) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(4)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X4__WASMSIMD, c_gt_4) {
+ for (uint32_t channels = 5; channels < 8; channels++) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(4)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X4__WASMSIMD, multipixel) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(4)
+ .channels(channels)
+ .width(3)
+ .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X4__WASMSIMD, multipixel_with_step) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ for (size_t step = 2; step <= 4; step++) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(4)
+ .channels(channels)
+ .width(3)
+ .step(step)
+ .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
+ }
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X4__WASMSIMD, multipixel_with_output_stride) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(4)
+ .channels(4)
+ .width(5)
+ .output_stride(23)
+ .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X4__WASMSIMD, input_offset) {
+ for (uint32_t channels = 8; channels < 64; channels += 12) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(4)
+ .channels(channels)
+ .input_offset(112)
+ .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP4X4__WASMSIMD, zero) {
+ for (uint32_t mz = 0; mz < 4; mz++) {
+ for (uint32_t channels = 8; channels < 64; channels += 12) {
+ DWConvMicrokernelTester()
+ .cr(4)
+ .kr(4)
+ .channels(channels)
+ .input_offset(112)
+ .zero_index(mz)
+ .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
+ }
+ }
+ }
+#endif // XNN_ARCH_WASMSIMD
+
+
+#if XNN_ARCH_WASMSIMD
+ TEST(F32_DWCONV_UP8X4__WASMSIMD, c_eq_8) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(4)
+ .channels(8)
+ .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
+ }
+
+ TEST(F32_DWCONV_UP8X4__WASMSIMD, c_div_8) {
+ for (uint32_t channels = 16; channels < 128; channels += 24) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(4)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X4__WASMSIMD, c_lt_8) {
+ for (uint32_t channels = 1; channels < 8; channels++) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(4)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X4__WASMSIMD, c_gt_8) {
+ for (uint32_t channels = 9; channels < 16; channels++) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(4)
+ .channels(channels)
+ .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X4__WASMSIMD, multipixel) {
+ for (size_t channels = 1; channels <= 40; channels += 7) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(4)
+ .channels(channels)
+ .width(3)
+ .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X4__WASMSIMD, multipixel_with_step) {
+ for (size_t channels = 1; channels <= 40; channels += 7) {
+ for (size_t step = 2; step <= 4; step++) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(4)
+ .channels(channels)
+ .width(3)
+ .step(step)
+ .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
+ }
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X4__WASMSIMD, multipixel_with_output_stride) {
+ for (size_t channels = 1; channels <= 40; channels += 7) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(4)
+ .channels(8)
+ .width(5)
+ .output_stride(43)
+ .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X4__WASMSIMD, input_offset) {
+ for (uint32_t channels = 16; channels < 128; channels += 24) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(4)
+ .channels(channels)
+ .input_offset(176)
+ .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
+ }
+ }
+
+ TEST(F32_DWCONV_UP8X4__WASMSIMD, zero) {
+ for (uint32_t mz = 0; mz < 4; mz++) {
+ for (uint32_t channels = 16; channels < 128; channels += 24) {
+ DWConvMicrokernelTester()
+ .cr(8)
+ .kr(4)
+ .channels(channels)
+ .input_offset(176)
+ .zero_index(mz)
+ .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
+ }
+ }
+ }
+#endif // XNN_ARCH_WASMSIMD
+
+
#if XNN_ARCH_WASM
TEST(F32_DWCONV_UP1X4__WASM, c_eq_1) {
DWConvMicrokernelTester()