commit c5aa242a08b18dca7e14f665cea0a6a1680dd8e4
author Marat Dukhan <maratek@google.com> Wed Dec 01 00:15:19 2021 -0800
committer XNNPACK Team <xnnpack-github-robot@google.com> Wed Dec 01 00:16:11 2021 -0800
tree fdcd6650c8cb38eade26a1ebc2cf024718641c3f
parent 0d6a1194ff36f59c79089336d7a3b446c3c6a39d

F32->QS8 and F32->QU8 microkernels for SSE

PiperOrigin-RevId: 413337694

BUILD.bazel

diff --git a/BUILD.bazel b/BUILD.bazel
index 969ea35..5cdc678 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -4273,6 +4273,14 @@
     "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
     "src/f32-prelu/gen/sse2-2x4.c",
     "src/f32-prelu/gen/sse2-2x8.c",
+    "src/f32-qs8-vcvt/gen/vcvt-sse2-x8.c",
+    "src/f32-qs8-vcvt/gen/vcvt-sse2-x16.c",
+    "src/f32-qs8-vcvt/gen/vcvt-sse2-x24.c",
+    "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c",
+    "src/f32-qu8-vcvt/gen/vcvt-sse2-x8.c",
+    "src/f32-qu8-vcvt/gen/vcvt-sse2-x16.c",
+    "src/f32-qu8-vcvt/gen/vcvt-sse2-x24.c",
+    "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c",
     "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
     "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
     "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
@@ -4643,6 +4651,10 @@
     "src/f32-f16-vcvt/gen/vcvt-sse41-x32.c",
     "src/f32-prelu/gen/sse41-2x4.c",
     "src/f32-prelu/gen/sse41-2x8.c",
+    "src/f32-qs8-vcvt/gen/vcvt-sse41-x8.c",
+    "src/f32-qs8-vcvt/gen/vcvt-sse41-x16.c",
+    "src/f32-qs8-vcvt/gen/vcvt-sse41-x24.c",
+    "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c",
     "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
     "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
     "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
@@ -9729,6 +9741,24 @@
 )
 
 xnnpack_unit_test(
+    name = "f32_qs8_vcvt_test",
+    srcs = [
+        "test/f32-qs8-vcvt.cc",
+        "test/vcvt-microkernel-tester.h",
+    ] + MICROKERNEL_TEST_HDRS,
+    deps = MICROKERNEL_TEST_DEPS,
+)
+
+xnnpack_unit_test(
+    name = "f32_qu8_vcvt_test",
+    srcs = [
+        "test/f32-qu8-vcvt.cc",
+        "test/vcvt-microkernel-tester.h",
+    ] + MICROKERNEL_TEST_HDRS,
+    deps = MICROKERNEL_TEST_DEPS,
+)
+
+xnnpack_unit_test(
     name = "f32_gavgpool_minmax_test",
     srcs = [
         "test/f32-gavgpool-minmax.cc",