commit ca4c68ef3f28d7c067bd6bd94b498cb97933cc6b
author Frank Barchard <fbarchard@google.com> Wed Aug 25 19:06:40 2021 -0700
committer XNNPACK Team <xnnpack-github-robot@google.com> Wed Aug 25 19:07:41 2021 -0700
tree b6b92dcd88fad5e268a21ab7e03285cdcf2df915
parent 2d33a9b1d10ed3b55bb384812c6789499aa5dc62

QU8 C4 NEON Dot Product GEMM/IGEMM microkernels for Cortex A55r1

- adapted from QS8 4x16 microkernel to QU8 4x8
- 2 dot products per vector.  A * W and A * zero_point.
- unsigned dot products with 2 sets of accumulators.
- subtract zero point accumulators from accumulators outside loop.
- 4x8 GEMM and IGEMM.
- RNDNU, FP32 and GEMMLOWP support but only RNDNU used

PiperOrigin-RevId: 393028276

BUILD.bazel

diff --git a/BUILD.bazel b/BUILD.bazel
index 715c655..0ba70ba 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -5647,12 +5647,14 @@
     "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
     "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S",
     "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
+    "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
     "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld64.S",
     "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
     "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S",
     "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
     "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S",
     "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S",
+    "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S",
     "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld64.S",
     "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S",
     "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S",