Add prefix to QC8/QS8/QU8 WAsm SIMD GEMM/IGEMM microkernels
Specify computation type (MUL16/MUL32) in the name of a microkernel. This is
necessary in preparation for a new set of microkernels using 16x2->32 dot
product instructions from Chrome M87 WAsm SIMD specification.
PiperOrigin-RevId: 389550897
diff --git a/test/qu8-igemm-minmax-fp32.cc b/test/qu8-igemm-minmax-fp32.cc
index 6609fcb..ec0c8b5 100644
--- a/test/qu8-igemm-minmax-fp32.cc
+++ b/test/qu8-igemm-minmax-fp32.cc
@@ -34662,7 +34662,7 @@
#if XNN_ARCH_WASMSIMD
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, k_eq_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, k_eq_8) {
GemmMicrokernelTester()
.mr(1)
.nr(4)
@@ -34671,10 +34671,10 @@
.m(1)
.n(4)
.k(8)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, strided_cn) {
GemmMicrokernelTester()
.mr(1)
.nr(4)
@@ -34684,10 +34684,10 @@
.n(4)
.k(8)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, k_eq_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, k_eq_8_subtile) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
@@ -34699,12 +34699,12 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, k_eq_8_subtile_m) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, k_eq_8_subtile_m) {
for (uint32_t m = 1; m <= 1; m++) {
GemmMicrokernelTester()
.mr(1)
@@ -34715,11 +34715,11 @@
.n(4)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, k_eq_8_subtile_n) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, k_eq_8_subtile_n) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
.mr(1)
@@ -34730,11 +34730,11 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, k_lt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, k_lt_8) {
for (size_t k = 1; k < 8; k++) {
GemmMicrokernelTester()
.mr(1)
@@ -34744,11 +34744,11 @@
.m(1)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, k_lt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, k_lt_8_subtile) {
for (size_t k = 1; k < 8; k++) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -34761,13 +34761,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, k_gt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, k_gt_8) {
for (size_t k = 9; k < 16; k++) {
GemmMicrokernelTester()
.mr(1)
@@ -34777,11 +34777,11 @@
.m(1)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, k_gt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, k_gt_8_subtile) {
for (size_t k = 9; k < 16; k++) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -34794,13 +34794,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, k_div_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, k_div_8) {
for (size_t k = 16; k <= 80; k += 8) {
GemmMicrokernelTester()
.mr(1)
@@ -34810,11 +34810,11 @@
.m(1)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, k_div_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, k_div_8_subtile) {
for (size_t k = 16; k <= 80; k += 8) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -34827,13 +34827,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, n_gt_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, n_gt_4) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -34844,12 +34844,12 @@
.m(1)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, n_gt_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, n_gt_4_strided_cn) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -34861,12 +34861,12 @@
.n(4)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, n_gt_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, n_gt_4_subtile) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 1; m++) {
@@ -34879,13 +34879,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, n_div_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, n_div_4) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -34896,12 +34896,12 @@
.m(1)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, n_div_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, n_div_4_strided_cn) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -34913,12 +34913,12 @@
.n(n)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, n_div_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, n_div_4_subtile) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 1; m++) {
@@ -34931,13 +34931,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, small_kernel) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(1)
@@ -34948,11 +34948,11 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, small_kernel_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, small_kernel_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -34966,13 +34966,13 @@
.k(k)
.ks(3)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, n_gt_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, n_gt_4_small_kernel) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -34984,12 +34984,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, n_div_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, n_div_4_small_kernel) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35001,12 +35001,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, strided_cm_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, strided_cm_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35020,13 +35020,13 @@
.k(k)
.cm_stride(7)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, a_offset) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, a_offset) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(1)
@@ -35038,11 +35038,11 @@
.k(k)
.ks(3)
.a_offset(43)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, zero) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, zero) {
for (uint32_t mz = 0; mz < 1; mz++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35056,12 +35056,12 @@
.ks(3)
.a_offset(43)
.zero_index(mz)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, qmin) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, qmin) {
GemmMicrokernelTester()
.mr(1)
.nr(4)
@@ -35071,10 +35071,10 @@
.n(4)
.k(8)
.qmin(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, qmax) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, qmax) {
GemmMicrokernelTester()
.mr(1)
.nr(4)
@@ -35084,10 +35084,10 @@
.n(4)
.k(8)
.qmax(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, strided_cm) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, strided_cm) {
GemmMicrokernelTester()
.mr(1)
.nr(4)
@@ -35097,10 +35097,10 @@
.n(4)
.k(8)
.cm_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, no_a_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, no_a_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(1)
@@ -35111,11 +35111,11 @@
.n(4)
.k(k)
.a_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, no_b_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, no_b_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(1)
@@ -35126,11 +35126,11 @@
.n(4)
.k(k)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD64, no_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD64, no_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(1)
@@ -35142,14 +35142,14 @@
.k(k)
.a_zero_point(0)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
#endif // XNN_ARCH_WASMSIMD
#if XNN_ARCH_WASMSIMD
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, k_eq_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, k_eq_8) {
GemmMicrokernelTester()
.mr(2)
.nr(4)
@@ -35158,10 +35158,10 @@
.m(2)
.n(4)
.k(8)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, strided_cn) {
GemmMicrokernelTester()
.mr(2)
.nr(4)
@@ -35171,10 +35171,10 @@
.n(4)
.k(8)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, k_eq_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, k_eq_8_subtile) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
@@ -35186,12 +35186,12 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, k_eq_8_subtile_m) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, k_eq_8_subtile_m) {
for (uint32_t m = 1; m <= 2; m++) {
GemmMicrokernelTester()
.mr(2)
@@ -35202,11 +35202,11 @@
.n(4)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, k_eq_8_subtile_n) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, k_eq_8_subtile_n) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
.mr(2)
@@ -35217,11 +35217,11 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, k_lt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, k_lt_8) {
for (size_t k = 1; k < 8; k++) {
GemmMicrokernelTester()
.mr(2)
@@ -35231,11 +35231,11 @@
.m(2)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, k_lt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, k_lt_8_subtile) {
for (size_t k = 1; k < 8; k++) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35248,13 +35248,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, k_gt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, k_gt_8) {
for (size_t k = 9; k < 16; k++) {
GemmMicrokernelTester()
.mr(2)
@@ -35264,11 +35264,11 @@
.m(2)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, k_gt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, k_gt_8_subtile) {
for (size_t k = 9; k < 16; k++) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35281,13 +35281,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, k_div_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, k_div_8) {
for (size_t k = 16; k <= 80; k += 8) {
GemmMicrokernelTester()
.mr(2)
@@ -35297,11 +35297,11 @@
.m(2)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, k_div_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, k_div_8_subtile) {
for (size_t k = 16; k <= 80; k += 8) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35314,13 +35314,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, n_gt_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, n_gt_4) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35331,12 +35331,12 @@
.m(2)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, n_gt_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, n_gt_4_strided_cn) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35348,12 +35348,12 @@
.n(4)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, n_gt_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, n_gt_4_subtile) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 2; m++) {
@@ -35366,13 +35366,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, n_div_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, n_div_4) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35383,12 +35383,12 @@
.m(2)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, n_div_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, n_div_4_strided_cn) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35400,12 +35400,12 @@
.n(n)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, n_div_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, n_div_4_subtile) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 2; m++) {
@@ -35418,13 +35418,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, small_kernel) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(2)
@@ -35435,11 +35435,11 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, small_kernel_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, small_kernel_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35453,13 +35453,13 @@
.k(k)
.ks(3)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, n_gt_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, n_gt_4_small_kernel) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35471,12 +35471,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, n_div_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, n_div_4_small_kernel) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35488,12 +35488,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, strided_cm_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, strided_cm_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35507,13 +35507,13 @@
.k(k)
.cm_stride(7)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, a_offset) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, a_offset) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(2)
@@ -35525,11 +35525,11 @@
.k(k)
.ks(3)
.a_offset(83)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, zero) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, zero) {
for (uint32_t mz = 0; mz < 2; mz++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35543,12 +35543,12 @@
.ks(3)
.a_offset(83)
.zero_index(mz)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, qmin) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, qmin) {
GemmMicrokernelTester()
.mr(2)
.nr(4)
@@ -35558,10 +35558,10 @@
.n(4)
.k(8)
.qmin(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, qmax) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, qmax) {
GemmMicrokernelTester()
.mr(2)
.nr(4)
@@ -35571,10 +35571,10 @@
.n(4)
.k(8)
.qmax(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, strided_cm) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, strided_cm) {
GemmMicrokernelTester()
.mr(2)
.nr(4)
@@ -35584,10 +35584,10 @@
.n(4)
.k(8)
.cm_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, no_a_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, no_a_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(2)
@@ -35598,11 +35598,11 @@
.n(4)
.k(k)
.a_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, no_b_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, no_b_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(2)
@@ -35613,11 +35613,11 @@
.n(4)
.k(k)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD64, no_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD64, no_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(2)
@@ -35629,14 +35629,14 @@
.k(k)
.a_zero_point(0)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
#endif // XNN_ARCH_WASMSIMD
#if XNN_ARCH_WASMSIMD
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, k_eq_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, k_eq_8) {
GemmMicrokernelTester()
.mr(3)
.nr(4)
@@ -35645,10 +35645,10 @@
.m(3)
.n(4)
.k(8)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, strided_cn) {
GemmMicrokernelTester()
.mr(3)
.nr(4)
@@ -35658,10 +35658,10 @@
.n(4)
.k(8)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, k_eq_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, k_eq_8_subtile) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
@@ -35673,12 +35673,12 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, k_eq_8_subtile_m) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, k_eq_8_subtile_m) {
for (uint32_t m = 1; m <= 3; m++) {
GemmMicrokernelTester()
.mr(3)
@@ -35689,11 +35689,11 @@
.n(4)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, k_eq_8_subtile_n) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, k_eq_8_subtile_n) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
.mr(3)
@@ -35704,11 +35704,11 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, k_lt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, k_lt_8) {
for (size_t k = 1; k < 8; k++) {
GemmMicrokernelTester()
.mr(3)
@@ -35718,11 +35718,11 @@
.m(3)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, k_lt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, k_lt_8_subtile) {
for (size_t k = 1; k < 8; k++) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35735,13 +35735,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, k_gt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, k_gt_8) {
for (size_t k = 9; k < 16; k++) {
GemmMicrokernelTester()
.mr(3)
@@ -35751,11 +35751,11 @@
.m(3)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, k_gt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, k_gt_8_subtile) {
for (size_t k = 9; k < 16; k++) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35768,13 +35768,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, k_div_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, k_div_8) {
for (size_t k = 16; k <= 80; k += 8) {
GemmMicrokernelTester()
.mr(3)
@@ -35784,11 +35784,11 @@
.m(3)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, k_div_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, k_div_8_subtile) {
for (size_t k = 16; k <= 80; k += 8) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35801,13 +35801,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, n_gt_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, n_gt_4) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35818,12 +35818,12 @@
.m(3)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, n_gt_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, n_gt_4_strided_cn) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35835,12 +35835,12 @@
.n(4)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, n_gt_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, n_gt_4_subtile) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 3; m++) {
@@ -35853,13 +35853,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, n_div_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, n_div_4) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35870,12 +35870,12 @@
.m(3)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, n_div_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, n_div_4_strided_cn) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35887,12 +35887,12 @@
.n(n)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, n_div_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, n_div_4_subtile) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 3; m++) {
@@ -35905,13 +35905,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, small_kernel) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(3)
@@ -35922,11 +35922,11 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, small_kernel_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, small_kernel_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35940,13 +35940,13 @@
.k(k)
.ks(3)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, n_gt_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, n_gt_4_small_kernel) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35958,12 +35958,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, n_div_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, n_div_4_small_kernel) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -35975,12 +35975,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, strided_cm_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, strided_cm_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -35994,13 +35994,13 @@
.k(k)
.cm_stride(7)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, a_offset) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, a_offset) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(3)
@@ -36012,11 +36012,11 @@
.k(k)
.ks(3)
.a_offset(127)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, zero) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, zero) {
for (uint32_t mz = 0; mz < 3; mz++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36030,12 +36030,12 @@
.ks(3)
.a_offset(127)
.zero_index(mz)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, qmin) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, qmin) {
GemmMicrokernelTester()
.mr(3)
.nr(4)
@@ -36045,10 +36045,10 @@
.n(4)
.k(8)
.qmin(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, qmax) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, qmax) {
GemmMicrokernelTester()
.mr(3)
.nr(4)
@@ -36058,10 +36058,10 @@
.n(4)
.k(8)
.qmax(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, strided_cm) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, strided_cm) {
GemmMicrokernelTester()
.mr(3)
.nr(4)
@@ -36071,10 +36071,10 @@
.n(4)
.k(8)
.cm_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, no_a_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, no_a_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(3)
@@ -36085,11 +36085,11 @@
.n(4)
.k(k)
.a_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, no_b_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, no_b_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(3)
@@ -36100,11 +36100,11 @@
.n(4)
.k(k)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD64, no_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD64, no_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(3)
@@ -36116,14 +36116,14 @@
.k(k)
.a_zero_point(0)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld64, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
#endif // XNN_ARCH_WASMSIMD
#if XNN_ARCH_WASMSIMD
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, k_eq_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, k_eq_8) {
GemmMicrokernelTester()
.mr(1)
.nr(4)
@@ -36132,10 +36132,10 @@
.m(1)
.n(4)
.k(8)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, strided_cn) {
GemmMicrokernelTester()
.mr(1)
.nr(4)
@@ -36145,10 +36145,10 @@
.n(4)
.k(8)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, k_eq_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, k_eq_8_subtile) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
@@ -36160,12 +36160,12 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, k_eq_8_subtile_m) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, k_eq_8_subtile_m) {
for (uint32_t m = 1; m <= 1; m++) {
GemmMicrokernelTester()
.mr(1)
@@ -36176,11 +36176,11 @@
.n(4)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, k_eq_8_subtile_n) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, k_eq_8_subtile_n) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
.mr(1)
@@ -36191,11 +36191,11 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, k_lt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, k_lt_8) {
for (size_t k = 1; k < 8; k++) {
GemmMicrokernelTester()
.mr(1)
@@ -36205,11 +36205,11 @@
.m(1)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, k_lt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, k_lt_8_subtile) {
for (size_t k = 1; k < 8; k++) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -36222,13 +36222,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, k_gt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, k_gt_8) {
for (size_t k = 9; k < 16; k++) {
GemmMicrokernelTester()
.mr(1)
@@ -36238,11 +36238,11 @@
.m(1)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, k_gt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, k_gt_8_subtile) {
for (size_t k = 9; k < 16; k++) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -36255,13 +36255,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, k_div_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, k_div_8) {
for (size_t k = 16; k <= 80; k += 8) {
GemmMicrokernelTester()
.mr(1)
@@ -36271,11 +36271,11 @@
.m(1)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, k_div_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, k_div_8_subtile) {
for (size_t k = 16; k <= 80; k += 8) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -36288,13 +36288,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, n_gt_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, n_gt_4) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36305,12 +36305,12 @@
.m(1)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, n_gt_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, n_gt_4_strided_cn) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36322,12 +36322,12 @@
.n(4)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, n_gt_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, n_gt_4_subtile) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 1; m++) {
@@ -36340,13 +36340,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, n_div_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, n_div_4) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36357,12 +36357,12 @@
.m(1)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, n_div_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, n_div_4_strided_cn) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36374,12 +36374,12 @@
.n(n)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, n_div_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, n_div_4_subtile) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 1; m++) {
@@ -36392,13 +36392,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, small_kernel) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(1)
@@ -36409,11 +36409,11 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, small_kernel_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, small_kernel_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -36427,13 +36427,13 @@
.k(k)
.ks(3)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, n_gt_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, n_gt_4_small_kernel) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36445,12 +36445,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, n_div_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, n_div_4_small_kernel) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36462,12 +36462,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, strided_cm_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, strided_cm_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 1; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -36481,13 +36481,13 @@
.k(k)
.cm_stride(7)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, a_offset) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, a_offset) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(1)
@@ -36499,11 +36499,11 @@
.k(k)
.ks(3)
.a_offset(43)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, zero) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, zero) {
for (uint32_t mz = 0; mz < 1; mz++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36517,12 +36517,12 @@
.ks(3)
.a_offset(43)
.zero_index(mz)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, qmin) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, qmin) {
GemmMicrokernelTester()
.mr(1)
.nr(4)
@@ -36532,10 +36532,10 @@
.n(4)
.k(8)
.qmin(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, qmax) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, qmax) {
GemmMicrokernelTester()
.mr(1)
.nr(4)
@@ -36545,10 +36545,10 @@
.n(4)
.k(8)
.qmax(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, strided_cm) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, strided_cm) {
GemmMicrokernelTester()
.mr(1)
.nr(4)
@@ -36558,10 +36558,10 @@
.n(4)
.k(8)
.cm_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, no_a_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, no_a_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(1)
@@ -36572,11 +36572,11 @@
.n(4)
.k(k)
.a_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, no_b_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, no_b_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(1)
@@ -36587,11 +36587,11 @@
.n(4)
.k(k)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_LD128, no_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__WASMSIMD_MUL32_LD128, no_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(1)
@@ -36603,14 +36603,14 @@
.k(k)
.a_zero_point(0)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_1x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
#endif // XNN_ARCH_WASMSIMD
#if XNN_ARCH_WASMSIMD
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, k_eq_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, k_eq_8) {
GemmMicrokernelTester()
.mr(2)
.nr(4)
@@ -36619,10 +36619,10 @@
.m(2)
.n(4)
.k(8)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, strided_cn) {
GemmMicrokernelTester()
.mr(2)
.nr(4)
@@ -36632,10 +36632,10 @@
.n(4)
.k(8)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, k_eq_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, k_eq_8_subtile) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
@@ -36647,12 +36647,12 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, k_eq_8_subtile_m) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, k_eq_8_subtile_m) {
for (uint32_t m = 1; m <= 2; m++) {
GemmMicrokernelTester()
.mr(2)
@@ -36663,11 +36663,11 @@
.n(4)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, k_eq_8_subtile_n) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, k_eq_8_subtile_n) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
.mr(2)
@@ -36678,11 +36678,11 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, k_lt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, k_lt_8) {
for (size_t k = 1; k < 8; k++) {
GemmMicrokernelTester()
.mr(2)
@@ -36692,11 +36692,11 @@
.m(2)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, k_lt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, k_lt_8_subtile) {
for (size_t k = 1; k < 8; k++) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -36709,13 +36709,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, k_gt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, k_gt_8) {
for (size_t k = 9; k < 16; k++) {
GemmMicrokernelTester()
.mr(2)
@@ -36725,11 +36725,11 @@
.m(2)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, k_gt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, k_gt_8_subtile) {
for (size_t k = 9; k < 16; k++) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -36742,13 +36742,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, k_div_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, k_div_8) {
for (size_t k = 16; k <= 80; k += 8) {
GemmMicrokernelTester()
.mr(2)
@@ -36758,11 +36758,11 @@
.m(2)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, k_div_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, k_div_8_subtile) {
for (size_t k = 16; k <= 80; k += 8) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -36775,13 +36775,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, n_gt_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, n_gt_4) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36792,12 +36792,12 @@
.m(2)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, n_gt_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, n_gt_4_strided_cn) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36809,12 +36809,12 @@
.n(4)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, n_gt_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, n_gt_4_subtile) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 2; m++) {
@@ -36827,13 +36827,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, n_div_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, n_div_4) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36844,12 +36844,12 @@
.m(2)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, n_div_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, n_div_4_strided_cn) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36861,12 +36861,12 @@
.n(n)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, n_div_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, n_div_4_subtile) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 2; m++) {
@@ -36879,13 +36879,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, small_kernel) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(2)
@@ -36896,11 +36896,11 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, small_kernel_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, small_kernel_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -36914,13 +36914,13 @@
.k(k)
.ks(3)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, n_gt_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, n_gt_4_small_kernel) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36932,12 +36932,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, n_div_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, n_div_4_small_kernel) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -36949,12 +36949,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, strided_cm_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, strided_cm_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 2; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -36968,13 +36968,13 @@
.k(k)
.cm_stride(7)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, a_offset) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, a_offset) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(2)
@@ -36986,11 +36986,11 @@
.k(k)
.ks(3)
.a_offset(83)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, zero) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, zero) {
for (uint32_t mz = 0; mz < 2; mz++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -37004,12 +37004,12 @@
.ks(3)
.a_offset(83)
.zero_index(mz)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, qmin) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, qmin) {
GemmMicrokernelTester()
.mr(2)
.nr(4)
@@ -37019,10 +37019,10 @@
.n(4)
.k(8)
.qmin(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, qmax) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, qmax) {
GemmMicrokernelTester()
.mr(2)
.nr(4)
@@ -37032,10 +37032,10 @@
.n(4)
.k(8)
.qmax(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, strided_cm) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, strided_cm) {
GemmMicrokernelTester()
.mr(2)
.nr(4)
@@ -37045,10 +37045,10 @@
.n(4)
.k(8)
.cm_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, no_a_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, no_a_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(2)
@@ -37059,11 +37059,11 @@
.n(4)
.k(k)
.a_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, no_b_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, no_b_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(2)
@@ -37074,11 +37074,11 @@
.n(4)
.k(k)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_LD128, no_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_MUL32_LD128, no_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(2)
@@ -37090,14 +37090,14 @@
.k(k)
.a_zero_point(0)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_2x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
#endif // XNN_ARCH_WASMSIMD
#if XNN_ARCH_WASMSIMD
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, k_eq_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, k_eq_8) {
GemmMicrokernelTester()
.mr(3)
.nr(4)
@@ -37106,10 +37106,10 @@
.m(3)
.n(4)
.k(8)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, strided_cn) {
GemmMicrokernelTester()
.mr(3)
.nr(4)
@@ -37119,10 +37119,10 @@
.n(4)
.k(8)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, k_eq_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, k_eq_8_subtile) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
@@ -37134,12 +37134,12 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, k_eq_8_subtile_m) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, k_eq_8_subtile_m) {
for (uint32_t m = 1; m <= 3; m++) {
GemmMicrokernelTester()
.mr(3)
@@ -37150,11 +37150,11 @@
.n(4)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, k_eq_8_subtile_n) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, k_eq_8_subtile_n) {
for (uint32_t n = 1; n <= 4; n++) {
GemmMicrokernelTester()
.mr(3)
@@ -37165,11 +37165,11 @@
.n(n)
.k(8)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, k_lt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, k_lt_8) {
for (size_t k = 1; k < 8; k++) {
GemmMicrokernelTester()
.mr(3)
@@ -37179,11 +37179,11 @@
.m(3)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, k_lt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, k_lt_8_subtile) {
for (size_t k = 1; k < 8; k++) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -37196,13 +37196,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, k_gt_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, k_gt_8) {
for (size_t k = 9; k < 16; k++) {
GemmMicrokernelTester()
.mr(3)
@@ -37212,11 +37212,11 @@
.m(3)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, k_gt_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, k_gt_8_subtile) {
for (size_t k = 9; k < 16; k++) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -37229,13 +37229,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, k_div_8) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, k_div_8) {
for (size_t k = 16; k <= 80; k += 8) {
GemmMicrokernelTester()
.mr(3)
@@ -37245,11 +37245,11 @@
.m(3)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, k_div_8_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, k_div_8_subtile) {
for (size_t k = 16; k <= 80; k += 8) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -37262,13 +37262,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, n_gt_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, n_gt_4) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -37279,12 +37279,12 @@
.m(3)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, n_gt_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, n_gt_4_strided_cn) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -37296,12 +37296,12 @@
.n(4)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, n_gt_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, n_gt_4_subtile) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 3; m++) {
@@ -37314,13 +37314,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, n_div_4) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, n_div_4) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -37331,12 +37331,12 @@
.m(3)
.n(4)
.k(k)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, n_div_4_strided_cn) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, n_div_4_strided_cn) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -37348,12 +37348,12 @@
.n(n)
.k(k)
.cn_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, n_div_4_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, n_div_4_subtile) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 3; m++) {
@@ -37366,13 +37366,13 @@
.n(n)
.k(k)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, small_kernel) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(3)
@@ -37383,11 +37383,11 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, small_kernel_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, small_kernel_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -37401,13 +37401,13 @@
.k(k)
.ks(3)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, n_gt_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, n_gt_4_small_kernel) {
for (uint32_t n = 5; n < 8; n++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -37419,12 +37419,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, n_div_4_small_kernel) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, n_div_4_small_kernel) {
for (uint32_t n = 8; n <= 12; n += 4) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -37436,12 +37436,12 @@
.n(4)
.k(k)
.ks(3)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, strided_cm_subtile) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, strided_cm_subtile) {
for (size_t k = 1; k <= 40; k += 9) {
for (uint32_t m = 1; m <= 3; m++) {
for (uint32_t n = 1; n <= 4; n++) {
@@ -37455,13 +37455,13 @@
.k(k)
.cm_stride(7)
.iterations(1)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, a_offset) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, a_offset) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(3)
@@ -37473,11 +37473,11 @@
.k(k)
.ks(3)
.a_offset(127)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, zero) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, zero) {
for (uint32_t mz = 0; mz < 3; mz++) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
@@ -37491,12 +37491,12 @@
.ks(3)
.a_offset(127)
.zero_index(mz)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, qmin) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, qmin) {
GemmMicrokernelTester()
.mr(3)
.nr(4)
@@ -37506,10 +37506,10 @@
.n(4)
.k(8)
.qmin(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, qmax) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, qmax) {
GemmMicrokernelTester()
.mr(3)
.nr(4)
@@ -37519,10 +37519,10 @@
.n(4)
.k(8)
.qmax(128)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, strided_cm) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, strided_cm) {
GemmMicrokernelTester()
.mr(3)
.nr(4)
@@ -37532,10 +37532,10 @@
.n(4)
.k(8)
.cm_stride(7)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, no_a_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, no_a_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(3)
@@ -37546,11 +37546,11 @@
.n(4)
.k(k)
.a_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, no_b_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, no_b_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(3)
@@ -37561,11 +37561,11 @@
.n(4)
.k(k)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
- TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_LD128, no_zero_point) {
+ TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__WASMSIMD_MUL32_LD128, no_zero_point) {
for (size_t k = 1; k <= 40; k += 9) {
GemmMicrokernelTester()
.mr(3)
@@ -37577,7 +37577,7 @@
.k(k)
.a_zero_point(0)
.b_zero_point(0)
- .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
+ .Test(xnn_qu8_igemm_minmax_fp32_ukernel_3x4c8__wasmsimd_mul32_ld128, xnn_init_qu8_conv_minmax_fp32_wasmsimd_params, xnn_init_qu8_requantization_fp32_params, xnn_qu8_requantize_fp32);
}
}
#endif // XNN_ARCH_WASMSIMD