// Copyright 2020 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.

$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
$assert NR % 8 == 0
$assert 8 <= NR <= 16
$assert REQUANTIZATION in ["FP32", "GEMMLOWP", "RNDNU"]
$assert not CHANNELWISE or REQUANTIZATION == "FP32"
#include <assert.h>

#include <arm_neon.h>

#include <xnnpack/gemm.h>
$if REQUANTIZATION == "FP32":
  #include <xnnpack/intrinsics-polyfill.h>
#include <xnnpack/math.h>


$DATATYPE = "qc8" if CHANNELWISE else "qs8"
$PARAMS_UNION = "xnn_qs8_minmax_params" if CHANNELWISE else "xnn_qs8_conv_minmax_params"
$PARAMS_STRUCT = "neon" if CHANNELWISE else "fp32_neonv8" if REQUANTIZATION == "FP32" else REQUANTIZATION.lower() + "_neon"
void xnn_${DATATYPE}_gemm_minmax_${REQUANTIZATION.lower()}_ukernel_${MR}x${NR}c4__neondot(
    size_t mr,
    size_t nc,
    size_t kc,
    const int8_t* restrict a,
    size_t a_stride,
    const void* restrict w,
    int8_t* restrict c,
    size_t cm_stride,
    size_t cn_stride,
    const union ${PARAMS_UNION} params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN
{
  assert(mr != 0);
  assert(mr <= ${MR});
  assert(nc != 0);
  assert(kc != 0);
  assert(kc % sizeof(int8_t) == 0);
  assert(a != NULL);
  assert(w != NULL);
  assert(c != NULL);

  kc = round_up_po2(kc, 4 * sizeof(int8_t));
  const int8_t* a0 = a;
  int8_t* c0 = c;
  $for M in range(1, MR):
    const int8_t* a${M} = (const int8_t*) ((uintptr_t) a${M-1} + a_stride);
    int8_t* c${M} = (int8_t*) ((uintptr_t) c${M-1} + cm_stride);
    $if M % 2 == 0:
      if XNN_UNPREDICTABLE(mr <= ${M}) {
        a${M} = a${M-1};
        c${M} = c${M-1};
      }
    $elif M + 1 == MR:
      if XNN_UNPREDICTABLE(mr != ${M+1}) {
        a${M} = a${M-1};
        c${M} = c${M-1};
      }
    $else:
      if XNN_UNPREDICTABLE(mr < ${M+1}) {
        a${M} = a${M-1};
        c${M} = c${M-1};
      }

  // Loop over groups of ${NR} columns.
  do {
    // Initialize accumulators with bias. ${NR} bias values are loaded from the
    // weight matrix, at the start of the group of ${NR} columns.
    $for N in range(0, NR, 4):
      int32x4_t vacc0x${ABC[N:N+4]} = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
    $for M in range(1, MR):
      $for N in range(0, NR, 4):
        int32x4_t vacc${M}x${ABC[N:N+4]} = vacc0x${ABC[N:N+4]};

    // Inner accumulation loop along the ${NR} columns.
    size_t k = kc;
    // 2x partial unrolled loop to load 8 bytes at a time.
    while (k >= 8 * sizeof(int8_t)) {
      // Load a ${MR}x8 block of activations.
      $for M in range(MR):
        const int8x8_t va${M}x01234567 = vld1_s8(a${M}); a${M} += 8;

      // Load a 8x${NR} block of weights.
      $for K in range(0, 8, 4):
        $for N in range(0, NR, 4):
          const int8x16_t vb${ABC[K:K+4]}x${ABC[N:N+4]} = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);

      // Multiply-accumulate: ${MR}x8 * 8x${NR} --> ${MR}x${NR}.
      $for K in range(0, 8, 4):
        $for M in range(MR):
          $for N in range(0, NR, 4):
            vacc${M}x${ABC[N:N+4]} = vdotq_lane_s32(vacc${M}x${ABC[N:N+4]}, vb${ABC[K:K+4]}x${ABC[N:N+4]}, va${M}x01234567, ${K//4});

      k -= 8 * sizeof(int8_t);
    }
    // Handle up to 4 final positions of `k`
    if XNN_UNLIKELY(k != 0) {
      // Load a ${MR}x4 block of activations.
      $for M in range(MR):
        const int8x8_t va${M}x01234567 = vld1_s8(a${M}); a${M} += 4;

      // Load a 4x${NR} block of weights.
      $for N in range(0, NR, 4):
        const int8x16_t vb0123x${ABC[N:N+4]} = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);

      // Multiply-accumulate: ${MR}x4 * 4x${NR} --> ${MR}x${NR}.
      $for M in range(MR):
        $for N in range(0, NR, 4):
            vacc${M}x${ABC[N:N+4]} = vdotq_lane_s32(vacc${M}x${ABC[N:N+4]}, vb0123x${ABC[N:N+4]}, va${M}x01234567, 0);
    }

    // Post-accumulation work
    $if REQUANTIZATION == "GEMMLOWP":
      const int32x4_t vmultiplier = vld1q_dup_s32(&params->${PARAMS_STRUCT}.multiplier);
      const int32x4_t vright_shift = vld1q_dup_s32(&params->${PARAMS_STRUCT}.right_shift);
      const int32x4_t vzero_shift_mask = vreinterpretq_s32_u32(vceqq_s32(vright_shift, vmovq_n_s32(0)));

      $for M in range(MR):
        $for N in range(0, NR, 4):
          const int32x4_t vproduct${M}x${ABC[N:N+4]} = vqrdmulhq_s32(vacc${M}x${ABC[N:N+4]}, vmultiplier);

      $for M in range(MR):
        $for N in range(0, NR, 4):
          vacc${M}x${ABC[N:N+4]} = vsraq_n_s32(vproduct${M}x${ABC[N:N+4]}, vbicq_s32(vacc${M}x${ABC[N:N+4]}, vzero_shift_mask), 31);

      $for M in range(MR):
        $for N in range(0, NR, 4):
          vacc${M}x${ABC[N:N+4]} = vrshlq_s32(vacc${M}x${ABC[N:N+4]}, vright_shift);
    $elif REQUANTIZATION == "RNDNU":
      const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->${PARAMS_STRUCT}.right_pre_shift);
      const int32x4_t vmultiplier = vld1q_dup_s32(&params->${PARAMS_STRUCT}.multiplier);
      const int32x4_t vright_post_shift = vld1q_dup_s32(&params->${PARAMS_STRUCT}.right_post_shift);

      $for M in range(MR):
        $for N in range(0, NR, 4):
          vacc${M}x${ABC[N:N+4]} = vshlq_s32(vacc${M}x${ABC[N:N+4]}, vright_pre_shift);

      $for M in range(MR):
        $for N in range(0, NR, 4):
          vacc${M}x${ABC[N:N+4]} = vqdmulhq_s32(vacc${M}x${ABC[N:N+4]}, vmultiplier);

      $for M in range(MR):
        $for N in range(0, NR, 4):
          vacc${M}x${ABC[N:N+4]} = vrshlq_s32(vacc${M}x${ABC[N:N+4]}, vright_post_shift);
    $elif REQUANTIZATION == "FP32":
      $for M in range(MR):
        $for N in range(0, NR, 4):
          float32x4_t vfpacc${M}x${ABC[N:N+4]} = vcvtq_f32_s32(vacc${M}x${ABC[N:N+4]});

      $if CHANNELWISE:
        $for N in range(0, NR, 4):
          const float32x4_t vscale${ABC[N:N+4]} = vld1q_f32((const float*) w); w = (const void*) ((const float*) w + 4);
          $for M in range(MR):
            vfpacc${M}x${ABC[N:N+4]} = vmulq_f32(vfpacc${M}x${ABC[N:N+4]}, vscale${ABC[N:N+4]});
      $else:
        const float32x4_t vscale = vld1q_dup_f32(&params->${PARAMS_STRUCT}.scale);
        $for M in range(MR):
          $for N in range(0, NR, 4):
            vfpacc${M}x${ABC[N:N+4]} = vmulq_f32(vfpacc${M}x${ABC[N:N+4]}, vscale);

      $for M in range(MR):
        $for N in range(0, NR, 4):
          vacc${M}x${ABC[N:N+4]} = vcvtnq_s32_f32(vfpacc${M}x${ABC[N:N+4]});

    const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->${PARAMS_STRUCT}.output_zero_point);
#if XNN_ARCH_ARM64
    $for M in range(MR):
      $for N in range(0, NR, 8):
        const int16x8_t vacc${M}x${ABC[N:N+8]} = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc${M}x${ABC[N:N+4]}), vacc${M}x${ABC[N+4:N+8]}), voutput_zero_point);

    $for M in range(MR):
      $for N in range(0, NR, 16):
        $if N + 8 < NR:
          int8x16_t vout${M}x${ABC[N:N+16]} = vqmovn_high_s16(vqmovn_s16(vacc${M}x${ABC[N:N+8]}), vacc${M}x${ABC[N+8:N+16]});
        $elif M % 2 == 1:
          int8x16_t vout${M-1}x${ABC[N:N+8]}_${M}x${ABC[N:N+8]} = vqmovn_high_s16(vqmovn_s16(vacc${M-1}x${ABC[N:N+8]}), vacc${M}x${ABC[N:N+8]});
        $elif M + 1 == MR:
          int8x8_t vout${M}x${ABC[N:N+8]} = vqmovn_s16(vacc${M}x${ABC[N:N+8]});
#else
    $for M in range(MR):
      $for N in range(0, NR, 8):
        const int16x8_t vacc${M}x${ABC[N:N+8]} = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc${M}x${ABC[N:N+4]}), vqmovn_s32(vacc${M}x${ABC[N+4:N+8]})), voutput_zero_point);

    $for M in range(MR):
      $for N in range(0, NR, 16):
        $if N + 8 < NR:
          int8x16_t vout${M}x${ABC[N:N+16]} = vcombine_s8(vqmovn_s16(vacc${M}x${ABC[N:N+8]}), vqmovn_s16(vacc${M}x${ABC[N+8:N+16]}));
        $elif M % 2 == 1:
          int8x16_t vout${M-1}x${ABC[N:N+8]}_${M}x${ABC[N:N+8]} = vcombine_s8(vqmovn_s16(vacc${M-1}x${ABC[N:N+8]}), vqmovn_s16(vacc${M}x${ABC[N:N+8]}));
        $elif M + 1 == MR:
          int8x8_t vout${M}x${ABC[N:N+8]} = vqmovn_s16(vacc${M}x${ABC[N:N+8]});
#endif
    $if NR == 8 and MR == 1:
      const int8x8_t voutput_min = vld1_dup_s8(&params->${PARAMS_STRUCT}.output_min);
      const int8x8_t voutput_max = vld1_dup_s8(&params->${PARAMS_STRUCT}.output_max);
    $else:
      const int8x16_t voutput_min = vld1q_dup_s8(&params->${PARAMS_STRUCT}.output_min);
      const int8x16_t voutput_max = vld1q_dup_s8(&params->${PARAMS_STRUCT}.output_max);

    $for M in range(MR):
      $for N in range(0, NR, 16):
        $if N + 8 < NR:
          vout${M}x${ABC[N:N+16]} = vmaxq_s8(vout${M}x${ABC[N:N+16]}, voutput_min);
        $elif M % 2 == 1:
          vout${M-1}x${ABC[N:N+8]}_${M}x${ABC[N:N+8]} = vmaxq_s8(vout${M-1}x${ABC[N:N+8]}_${M}x${ABC[N:N+8]}, voutput_min);
        $elif M + 1 == MR:
          $if NR == 8 and MR == 1:
            vout${M}x${ABC[N:N+8]} = vmax_s8(vout${M}x${ABC[N:N+8]}, voutput_min);
          $else:
            vout${M}x${ABC[N:N+8]} = vmax_s8(vout${M}x${ABC[N:N+8]}, vget_low_s8(voutput_min));

    $for M in range(MR):
      $for N in range(0, NR, 16):
        $if N + 8 < NR:
          vout${M}x${ABC[N:N+16]} = vminq_s8(vout${M}x${ABC[N:N+16]}, voutput_max);
        $elif M % 2 == 1:
          vout${M-1}x${ABC[N:N+8]}_${M}x${ABC[N:N+8]} = vminq_s8(vout${M-1}x${ABC[N:N+8]}_${M}x${ABC[N:N+8]}, voutput_max);
        $elif M + 1 == MR:
          $if NR == 8 and MR == 1:
            vout${M}x${ABC[N:N+8]} = vmin_s8(vout${M}x${ABC[N:N+8]}, voutput_max);
          $else:
            vout${M}x${ABC[N:N+8]} = vmin_s8(vout${M}x${ABC[N:N+8]}, vget_low_s8(voutput_max));

    if (nc >= ${NR}) {
      // Main case where there the ${NR} columns fit in the destination.
      $for M in range(MR):
        $for N in range(0, NR, 16):
          $if N + 8 < NR:
            vst1q_s8(c${M} + ${N}, vout${M}x${ABC[N:N+16]});
          $elif M % 2 == 1:
            vst1_s8(c${M-1} + ${N}, vget_low_s8(vout${M-1}x${ABC[N:N+8]}_${M}x${ABC[N:N+8]}));
            vst1_s8(c${M} + ${N}, vget_high_s8(vout${M-1}x${ABC[N:N+8]}_${M}x${ABC[N:N+8]}));
          $elif M + 1 == MR:
            vst1_s8(c${M} + ${N}, vout${M}x${ABC[N:N+8]});

      // Advance to the next ${NR} columns.
      $for M in range(MR):
        c${M} = (int8_t*) ((uintptr_t) c${M} + cn_stride);

      $for M in range(MR):
        a${M} = (const int8_t*) ((uintptr_t) a${M} - kc);

      nc -= ${NR};
    } else {
      // Final case where not all of the ${NR} columns fit in the destination.
      $if NR == 16:
        $for M in range(MR):
          $if M % 2 == 1:
            int8x16_t vout${M-1}x01234567_${M}x01234567 = vcombine_s8(vget_low_s8(vout${M-1}x0123456789ABCDEF), vget_low_s8(vout${M}x0123456789ABCDEF));
          $elif M + 1 == MR:
            int8x8_t vout${M}x01234567 = vget_low_s8(vout${M}x0123456789ABCDEF);
        if (nc & 8) {
          $for M in range(MR):
            $if M % 2 == 1:
              vst1_s8(c${M-1}, vget_low_s8(vout${M-1}x${ABC[N:N+8]}_${M}x${ABC[N:N+8]})); c${M-1} += 8;
              vst1_s8(c${M}, vget_high_s8(vout${M-1}x${ABC[N:N+8]}_${M}x${ABC[N:N+8]})); c${M} += 8;
            $elif M + 1 == MR:
              vst1_s8(c${M}, vout${M}x${ABC[N:N+8]}); c${M} += 8;
          $for M in range(MR):
            $if M % 2 == 1:
              vout${M-1}x01234567_${M}x01234567 = vcombine_s8(vget_high_s8(vout${M-1}x0123456789ABCDEF), vget_high_s8(vout${M}x0123456789ABCDEF));
            $elif M + 1 == MR:
              vout${M}x01234567 = vget_high_s8(vout${M}x0123456789ABCDEF);
        }
      if (nc & 4) {
        $for M in range(MR):
          $if M % 2 == 1:
            vst1q_lane_u32(__builtin_assume_aligned(c${M-1}, 1), vreinterpretq_u32_s8(vout${M-1}x01234567_${M}x01234567), 0); c${M-1} += 4;
            vst1q_lane_u32(__builtin_assume_aligned(c${M}, 1), vreinterpretq_u32_s8(vout${M-1}x01234567_${M}x01234567), 2); c${M} += 4;
          $elif M + 1 == MR:
            vst1_lane_u32(__builtin_assume_aligned(c${M}, 1), vreinterpret_u32_s8(vout${M}x01234567), 0); c${M} += 4;
        $for M in range(MR):
          $if M % 2 == 1:
            vout${M-1}x01234567_${M}x01234567 = vextq_s8(vout${M-1}x01234567_${M}x01234567, vout${M-1}x01234567_${M}x01234567, 4);
          $elif M + 1 == MR:
            vout${M}x01234567 = vext_s8(vout${M}x01234567, vout${M}x01234567, 4);
      }
      if (nc & 2) {
        $for M in range(MR):
          $if M % 2 == 1:
            vst1q_lane_u16(__builtin_assume_aligned(c${M-1}, 1), vreinterpretq_u16_s8(vout${M-1}x01234567_${M}x01234567), 0); c${M-1} += 2;
            vst1q_lane_u16(__builtin_assume_aligned(c${M}, 1), vreinterpretq_u16_s8(vout${M-1}x01234567_${M}x01234567), 4); c${M} += 2;
          $elif M + 1 == MR:
            vst1_lane_u16(__builtin_assume_aligned(c${M}, 1), vreinterpret_u16_s8(vout${M}x01234567), 0); c${M} += 2;
        $for M in range(MR):
          $if M % 2 == 1:
            vout${M-1}x01234567_${M}x01234567 = vextq_s8(vout${M-1}x01234567_${M}x01234567, vout${M-1}x01234567_${M}x01234567, 2);
          $elif M + 1 == MR:
            vout${M}x01234567 = vext_s8(vout${M}x01234567, vout${M}x01234567, 2);
      }
      if (nc & 1) {
        $for M in range(MR):
          $if M % 2 == 1:
            vst1q_lane_s8(c${M-1}, vout${M-1}x01234567_${M}x01234567, 0);
            vst1q_lane_s8(c${M}, vout${M-1}x01234567_${M}x01234567, 8);
          $elif M + 1 == MR:
            vst1_lane_s8(c${M}, vout${M}x01234567, 0);
      }

      nc = 0;
    }
  } while (nc != 0);
}