NEON versions of ARGMAXPOOL microkernels
PiperOrigin-RevId: 322952272
diff --git a/BUILD.bazel b/BUILD.bazel
index d4230ac..f284547 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -882,6 +882,9 @@
# ISA-specific micro-kernels
NEON_UKERNELS = [
+ "src/f32-argmaxpool/4x-neon-c4.c",
+ "src/f32-argmaxpool/9p8x-neon-c4.c",
+ "src/f32-argmaxpool/9x-neon-c4.c",
"src/f32-avgpool/9p8x-minmax-neon-c4.c",
"src/f32-avgpool/9x-minmax-neon-c4.c",
"src/f32-clamp/gen/neon-x4.c",
diff --git a/CMakeLists.txt b/CMakeLists.txt
index c350ffb..c9e35f9 100755
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -536,6 +536,9 @@
src/requantization/fp32-psimd.c)
SET(XNNPACK_NEON_MICROKERNEL_SRCS
+ src/f32-argmaxpool/4x-neon-c4.c
+ src/f32-argmaxpool/9p8x-neon-c4.c
+ src/f32-argmaxpool/9x-neon-c4.c
src/f32-avgpool/9p8x-minmax-neon-c4.c
src/f32-avgpool/9x-minmax-neon-c4.c
src/f32-clamp/gen/neon-x4.c
diff --git a/src/f32-argmaxpool/4x-neon-c4.c b/src/f32-argmaxpool/4x-neon-c4.c
new file mode 100644
index 0000000..d74d94c
--- /dev/null
+++ b/src/f32-argmaxpool/4x-neon-c4.c
@@ -0,0 +1,110 @@
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/argmaxpool.h>
+
+
+void xnn_f32_argmaxpool_ukernel_4x__neon_c4(
+ size_t output_pixels,
+ size_t pooling_elements,
+ size_t channels,
+ const float** input,
+ size_t input_offset,
+ float* output,
+ uint32_t* index,
+ size_t input_increment,
+ size_t output_increment) XNN_DISABLE_TSAN
+{
+ assert(output_pixels != 0);
+ assert(pooling_elements != 0);
+ assert(pooling_elements <= 4);
+ assert(channels != 0);
+
+ do {
+ const float* i0 = input[0];
+ const float* i1 = input[1];
+ const float* i2 = input[2];
+ const float* i3 = input[3];
+ i0 = (const float*) ((uintptr_t) i0 + input_offset);
+ i1 = (const float*) ((uintptr_t) i1 + input_offset);
+ i2 = (const float*) ((uintptr_t) i2 + input_offset);
+ i3 = (const float*) ((uintptr_t) i3 + input_offset);
+ if (pooling_elements < 2) {
+ i1 = i0;
+ }
+ if (pooling_elements <= 2) {
+ i2 = i0;
+ }
+ if (pooling_elements != 4) {
+ i3 = i0;
+ }
+
+ size_t c = channels;
+ for (; c >= 4; c -= 4) {
+ const float32x4_t vi0 = vld1q_f32(i0); i0 += 4;
+ const float32x4_t vi1 = vld1q_f32(i1); i1 += 4;
+ const float32x4_t vi2 = vld1q_f32(i2); i2 += 4;
+ const float32x4_t vi3 = vld1q_f32(i3); i3 += 4;
+
+ float32x4_t vmax = vi0;
+ uint32x4_t vidx = vmovq_n_u32(0);
+
+ const uint32x4_t vm1 = vcgtq_f32(vi1, vmax);
+ vmax = vbslq_f32(vm1, vi1, vmax);
+ vidx = vbslq_u32(vm1, vmovq_n_u32(1), vidx);
+
+ const uint32x4_t vm2 = vcgtq_f32(vi2, vmax);
+ vmax = vbslq_f32(vm2, vi2, vmax);
+ vidx = vbslq_u32(vm2, vmovq_n_u32(2), vidx);
+
+ const uint32x4_t vm3 = vcgtq_f32(vi3, vmax);
+ vmax = vbslq_f32(vm3, vi3, vmax);
+ vidx = vbslq_u32(vm3, vmovq_n_u32(3), vidx);
+
+ vst1q_f32(output, vmax); output += 4;
+ vst1q_u32(index, vidx); index += 4;
+ }
+ if (c != 0) {
+ const float32x4_t vi0 = vld1q_f32(i0);
+ const float32x4_t vi1 = vld1q_f32(i1);
+ const float32x4_t vi2 = vld1q_f32(i2);
+ const float32x4_t vi3 = vld1q_f32(i3);
+
+ float32x4_t vmax = vi0;
+ uint32x4_t vidx = vmovq_n_u32(0);
+
+ const uint32x4_t vm1 = vcgtq_f32(vi1, vmax);
+ vmax = vbslq_f32(vm1, vi1, vmax);
+ vidx = vbslq_u32(vm1, vmovq_n_u32(1), vidx);
+
+ const uint32x4_t vm2 = vcgtq_f32(vi2, vmax);
+ vmax = vbslq_f32(vm2, vi2, vmax);
+ vidx = vbslq_u32(vm2, vmovq_n_u32(2), vidx);
+
+ const uint32x4_t vm3 = vcgtq_f32(vi3, vmax);
+ vmax = vbslq_f32(vm3, vi3, vmax);
+ vidx = vbslq_u32(vm3, vmovq_n_u32(3), vidx);
+
+ float32x2_t vmax_lo = vget_low_f32(vmax);
+ uint32x2_t vidx_lo = vget_low_u32(vidx);
+ if (c & 2) {
+ vst1_f32(output, vmax_lo); output += 2;
+ vst1_u32(index, vidx_lo); index += 2;
+ vmax_lo = vget_high_f32(vmax);
+ vidx_lo = vget_high_u32(vidx);
+ }
+ if (c & 1) {
+ vst1_lane_f32(output, vmax_lo, 0); output += 1;
+ vst1_lane_u32(index, vidx_lo, 0); index += 1;
+ }
+ }
+ input = (const float**) ((uintptr_t) input + input_increment);
+ output = (float*) ((uintptr_t) output + output_increment);
+ } while (--output_pixels != 0);
+}
diff --git a/src/f32-argmaxpool/9p8x-neon-c4.c b/src/f32-argmaxpool/9p8x-neon-c4.c
new file mode 100644
index 0000000..7cf1ff1
--- /dev/null
+++ b/src/f32-argmaxpool/9p8x-neon-c4.c
@@ -0,0 +1,359 @@
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/argmaxpool.h>
+
+
+void xnn_f32_argmaxpool_ukernel_9p8x__neon_c4(
+ size_t output_pixels,
+ size_t pooling_elements,
+ size_t channels,
+ const float** input,
+ size_t input_offset,
+ float* accumulation_buffer,
+ uint32_t* index_buffer,
+ float* output,
+ uint32_t* index,
+ size_t input_increment,
+ size_t output_increment) XNN_DISABLE_TSAN
+{
+ assert(output_pixels != 0);
+ assert(pooling_elements != 0);
+ assert(pooling_elements > 9);
+ assert(channels != 0);
+
+ do {
+ {
+ float* ab = accumulation_buffer;
+ uint32_t* ib = index_buffer;
+
+ const float* i0 = *input++;
+ const float* i1 = *input++;
+ const float* i2 = *input++;
+ const float* i3 = *input++;
+ const float* i4 = *input++;
+ const float* i5 = *input++;
+ const float* i6 = *input++;
+ const float* i7 = *input++;
+ const float* i8 = *input++;
+ i0 = (const float*) ((uintptr_t) i0 + input_offset);
+ i1 = (const float*) ((uintptr_t) i1 + input_offset);
+ i2 = (const float*) ((uintptr_t) i2 + input_offset);
+ i3 = (const float*) ((uintptr_t) i3 + input_offset);
+ i4 = (const float*) ((uintptr_t) i4 + input_offset);
+ i5 = (const float*) ((uintptr_t) i5 + input_offset);
+ i6 = (const float*) ((uintptr_t) i6 + input_offset);
+ i7 = (const float*) ((uintptr_t) i7 + input_offset);
+ i8 = (const float*) ((uintptr_t) i8 + input_offset);
+
+ for (size_t c = 0; c < channels; c += 4) {
+ const float32x4_t vi0 = vld1q_f32(i0); i0 += 4;
+ const float32x4_t vi1 = vld1q_f32(i1); i1 += 4;
+ const float32x4_t vi2 = vld1q_f32(i2); i2 += 4;
+ const float32x4_t vi3 = vld1q_f32(i3); i3 += 4;
+ const float32x4_t vi4 = vld1q_f32(i4); i4 += 4;
+ const float32x4_t vi5 = vld1q_f32(i5); i5 += 4;
+ const float32x4_t vi6 = vld1q_f32(i6); i6 += 4;
+ const float32x4_t vi7 = vld1q_f32(i7); i7 += 4;
+ const float32x4_t vi8 = vld1q_f32(i8); i8 += 4;
+
+ float32x4_t vmax = vi0;
+ uint32x4_t vidx = vmovq_n_u32(0);
+
+ const uint32x4_t vm1 = vcgtq_f32(vi1, vmax);
+ vmax = vbslq_f32(vm1, vi1, vmax);
+ vidx = vbslq_u32(vm1, vmovq_n_u32(1), vidx);
+
+ const uint32x4_t vm2 = vcgtq_f32(vi2, vmax);
+ vmax = vbslq_f32(vm2, vi2, vmax);
+ vidx = vbslq_u32(vm2, vmovq_n_u32(2), vidx);
+
+ const uint32x4_t vm3 = vcgtq_f32(vi3, vmax);
+ vmax = vbslq_f32(vm3, vi3, vmax);
+ vidx = vbslq_u32(vm3, vmovq_n_u32(3), vidx);
+
+ const uint32x4_t vm4 = vcgtq_f32(vi4, vmax);
+ vmax = vbslq_f32(vm4, vi4, vmax);
+ vidx = vbslq_u32(vm4, vmovq_n_u32(4), vidx);
+
+ const uint32x4_t vm5 = vcgtq_f32(vi5, vmax);
+ vmax = vbslq_f32(vm5, vi5, vmax);
+ vidx = vbslq_u32(vm5, vmovq_n_u32(5), vidx);
+
+ const uint32x4_t vm6 = vcgtq_f32(vi6, vmax);
+ vmax = vbslq_f32(vm6, vi6, vmax);
+ vidx = vbslq_u32(vm6, vmovq_n_u32(6), vidx);
+
+ const uint32x4_t vm7 = vcgtq_f32(vi7, vmax);
+ vmax = vbslq_f32(vm7, vi7, vmax);
+ vidx = vbslq_u32(vm7, vmovq_n_u32(7), vidx);
+
+ const uint32x4_t vm8 = vcgtq_f32(vi8, vmax);
+ vmax = vbslq_f32(vm8, vi8, vmax);
+ vidx = vbslq_u32(vm8, vmovq_n_u32(8), vidx);
+
+ vst1q_f32(ab, vmax); ab += 4;
+ vst1q_u32(ib, vidx); ib += 4;
+ }
+ }
+ const uint32x4_t v1 = vmovq_n_u32(1);
+ const uint32x4_t v8 = vmovq_n_u32(8);
+ uint32x4_t vidx0 = vaddq_u32(v1, v8);
+
+ size_t k = pooling_elements;
+ for (k -= 9; k > 8; k -= 8) {
+ const float* i0 = *input++;
+ const float* i1 = *input++;
+ const float* i2 = *input++;
+ const float* i3 = *input++;
+ const float* i4 = *input++;
+ const float* i5 = *input++;
+ const float* i6 = *input++;
+ const float* i7 = *input++;
+ i0 = (const float*) ((uintptr_t) i0 + input_offset);
+ i1 = (const float*) ((uintptr_t) i1 + input_offset);
+ i2 = (const float*) ((uintptr_t) i2 + input_offset);
+ i3 = (const float*) ((uintptr_t) i3 + input_offset);
+ i4 = (const float*) ((uintptr_t) i4 + input_offset);
+ i5 = (const float*) ((uintptr_t) i5 + input_offset);
+ i6 = (const float*) ((uintptr_t) i6 + input_offset);
+ i7 = (const float*) ((uintptr_t) i7 + input_offset);
+
+ float* ab = accumulation_buffer;
+ uint32_t* ib = index_buffer;
+
+ for (size_t c = 0; c < channels; c += 4) {
+ const float32x4_t vi0 = vld1q_f32(i0); i0 += 4;
+ const float32x4_t vi1 = vld1q_f32(i1); i1 += 4;
+ const float32x4_t vi2 = vld1q_f32(i2); i2 += 4;
+ const float32x4_t vi3 = vld1q_f32(i3); i3 += 4;
+ const float32x4_t vi4 = vld1q_f32(i4); i4 += 4;
+ const float32x4_t vi5 = vld1q_f32(i5); i5 += 4;
+ const float32x4_t vi6 = vld1q_f32(i6); i6 += 4;
+ const float32x4_t vi7 = vld1q_f32(i7); i7 += 4;
+
+ float32x4_t vmax = vld1q_f32(ab);
+ uint32x4_t vidx = vld1q_u32(ib);
+
+ const uint32x4_t vm0 = vcgtq_f32(vi0, vmax);
+ vmax = vbslq_f32(vm0, vi0, vmax);
+ vidx = vbslq_u32(vm0, vidx0, vidx);
+
+ const uint32x4_t vm1 = vcgtq_f32(vi1, vmax);
+ const uint32x4_t vidx1 = vaddq_u32(vidx0, v1);
+ vmax = vbslq_f32(vm1, vi1, vmax);
+ vidx = vbslq_u32(vm1, vidx1, vidx);
+
+ const uint32x4_t vm2 = vcgtq_f32(vi2, vmax);
+ const uint32x4_t vidx2 = vaddq_u32(vidx1, v1);
+ vmax = vbslq_f32(vm2, vi2, vmax);
+ vidx = vbslq_u32(vm2, vidx2, vidx);
+
+ const uint32x4_t vm3 = vcgtq_f32(vi3, vmax);
+ const uint32x4_t vidx3 = vaddq_u32(vidx2, v1);
+ vmax = vbslq_f32(vm3, vi3, vmax);
+ vidx = vbslq_u32(vm3, vidx3, vidx);
+
+ const uint32x4_t vm4 = vcgtq_f32(vi4, vmax);
+ const uint32x4_t vidx4 = vaddq_u32(vidx3, v1);
+ vmax = vbslq_f32(vm4, vi4, vmax);
+ vidx = vbslq_u32(vm4, vidx4, vidx);
+
+ const uint32x4_t vm5 = vcgtq_f32(vi5, vmax);
+ const uint32x4_t vidx5 = vaddq_u32(vidx4, v1);
+ vmax = vbslq_f32(vm5, vi5, vmax);
+ vidx = vbslq_u32(vm5, vidx5, vidx);
+
+ const uint32x4_t vm6 = vcgtq_f32(vi6, vmax);
+ const uint32x4_t vidx6 = vaddq_u32(vidx5, v1);
+ vmax = vbslq_f32(vm6, vi6, vmax);
+ vidx = vbslq_u32(vm6, vidx6, vidx);
+
+ const uint32x4_t vm7 = vcgtq_f32(vi7, vmax);
+ const uint32x4_t vidx7 = vaddq_u32(vidx6, v1);
+ vmax = vbslq_f32(vm7, vi7, vmax);
+ vidx = vbslq_u32(vm7, vidx7, vidx);
+
+ vst1q_f32(ab, vmax); ab += 4;
+ vst1q_u32(ib, vidx); ib += 4;
+ }
+ vidx0 = vaddq_u32(vidx0, v8);
+ }
+
+ float* o = output;
+ uint32_t* i = index;
+ {
+ const float* i0 = input[0];
+ const float* i1 = input[1];
+ const float* i2 = input[2];
+ const float* i3 = input[3];
+ const float* i4 = input[4];
+ const float* i5 = input[5];
+ const float* i6 = input[6];
+ const float* i7 = input[7];
+ i0 = (const float*) ((uintptr_t) i0 + input_offset);
+ i1 = (const float*) ((uintptr_t) i1 + input_offset);
+ i2 = (const float*) ((uintptr_t) i2 + input_offset);
+ i3 = (const float*) ((uintptr_t) i3 + input_offset);
+ i4 = (const float*) ((uintptr_t) i4 + input_offset);
+ i5 = (const float*) ((uintptr_t) i5 + input_offset);
+ i6 = (const float*) ((uintptr_t) i6 + input_offset);
+ i7 = (const float*) ((uintptr_t) i7 + input_offset);
+ input = (const float**) ((uintptr_t) input + input_increment);
+ if (k < 2) {
+ i1 = i0;
+ }
+ if (k <= 2) {
+ i2 = i0;
+ }
+ if (k < 4) {
+ i3 = i0;
+ }
+ if (k <= 4) {
+ i4 = i0;
+ }
+ if (k < 6) {
+ i5 = i0;
+ }
+ if (k <= 6) {
+ i6 = i0;
+ }
+ if (k != 8) {
+ i7 = i0;
+ }
+
+ size_t c = channels;
+ float* ab = accumulation_buffer;
+ uint32_t* ib = index_buffer;
+ for (; c >= 4; c -= 4) {
+ const float32x4_t vi0 = vld1q_f32(i0); i0 += 4;
+ const float32x4_t vi1 = vld1q_f32(i1); i1 += 4;
+ const float32x4_t vi2 = vld1q_f32(i2); i2 += 4;
+ const float32x4_t vi3 = vld1q_f32(i3); i3 += 4;
+ const float32x4_t vi4 = vld1q_f32(i4); i4 += 4;
+ const float32x4_t vi5 = vld1q_f32(i5); i5 += 4;
+ const float32x4_t vi6 = vld1q_f32(i6); i6 += 4;
+ const float32x4_t vi7 = vld1q_f32(i7); i7 += 4;
+
+ float32x4_t vmax = vld1q_f32(ab); ab += 4;
+ uint32x4_t vidx = vld1q_u32(ib); ib += 4;
+
+ const uint32x4_t vm0 = vcgtq_f32(vi0, vmax);
+ vmax = vbslq_f32(vm0, vi0, vmax);
+ vidx = vbslq_u32(vm0, vidx0, vidx);
+
+ const uint32x4_t vm1 = vcgtq_f32(vi1, vmax);
+ const uint32x4_t vidx1 = vaddq_u32(vidx0, v1);
+ vmax = vbslq_f32(vm1, vi1, vmax);
+ vidx = vbslq_u32(vm1, vidx1, vidx);
+
+ const uint32x4_t vm2 = vcgtq_f32(vi2, vmax);
+ const uint32x4_t vidx2 = vaddq_u32(vidx1, v1);
+ vmax = vbslq_f32(vm2, vi2, vmax);
+ vidx = vbslq_u32(vm2, vidx2, vidx);
+
+ const uint32x4_t vm3 = vcgtq_f32(vi3, vmax);
+ const uint32x4_t vidx3 = vaddq_u32(vidx2, v1);
+ vmax = vbslq_f32(vm3, vi3, vmax);
+ vidx = vbslq_u32(vm3, vidx3, vidx);
+
+ const uint32x4_t vm4 = vcgtq_f32(vi4, vmax);
+ const uint32x4_t vidx4 = vaddq_u32(vidx3, v1);
+ vmax = vbslq_f32(vm4, vi4, vmax);
+ vidx = vbslq_u32(vm4, vidx4, vidx);
+
+ const uint32x4_t vm5 = vcgtq_f32(vi5, vmax);
+ const uint32x4_t vidx5 = vaddq_u32(vidx4, v1);
+ vmax = vbslq_f32(vm5, vi5, vmax);
+ vidx = vbslq_u32(vm5, vidx5, vidx);
+
+ const uint32x4_t vm6 = vcgtq_f32(vi6, vmax);
+ const uint32x4_t vidx6 = vaddq_u32(vidx5, v1);
+ vmax = vbslq_f32(vm6, vi6, vmax);
+ vidx = vbslq_u32(vm6, vidx6, vidx);
+
+ const uint32x4_t vm7 = vcgtq_f32(vi7, vmax);
+ const uint32x4_t vidx7 = vaddq_u32(vidx6, v1);
+ vmax = vbslq_f32(vm7, vi7, vmax);
+ vidx = vbslq_u32(vm7, vidx7, vidx);
+
+ vst1q_f32(o, vmax); o += 4;
+ vst1q_u32(i, vidx); i += 4;
+ }
+ if (c != 0) {
+ const float32x4_t vi0 = vld1q_f32(i0);
+ const float32x4_t vi1 = vld1q_f32(i1);
+ const float32x4_t vi2 = vld1q_f32(i2);
+ const float32x4_t vi3 = vld1q_f32(i3);
+ const float32x4_t vi4 = vld1q_f32(i4);
+ const float32x4_t vi5 = vld1q_f32(i5);
+ const float32x4_t vi6 = vld1q_f32(i6);
+ const float32x4_t vi7 = vld1q_f32(i7);
+
+ float32x4_t vmax = vld1q_f32(ab);
+ uint32x4_t vidx = vld1q_u32(ib);
+
+ const uint32x4_t vm0 = vcgtq_f32(vi0, vmax);
+ vmax = vbslq_f32(vm0, vi0, vmax);
+ vidx = vbslq_u32(vm0, vidx0, vidx);
+
+ const uint32x4_t vm1 = vcgtq_f32(vi1, vmax);
+ const uint32x4_t vidx1 = vaddq_u32(vidx0, v1);
+ vmax = vbslq_f32(vm1, vi1, vmax);
+ vidx = vbslq_u32(vm1, vidx1, vidx);
+
+ const uint32x4_t vm2 = vcgtq_f32(vi2, vmax);
+ const uint32x4_t vidx2 = vaddq_u32(vidx1, v1);
+ vmax = vbslq_f32(vm2, vi2, vmax);
+ vidx = vbslq_u32(vm2, vidx2, vidx);
+
+ const uint32x4_t vm3 = vcgtq_f32(vi3, vmax);
+ const uint32x4_t vidx3 = vaddq_u32(vidx2, v1);
+ vmax = vbslq_f32(vm3, vi3, vmax);
+ vidx = vbslq_u32(vm3, vidx3, vidx);
+
+ const uint32x4_t vm4 = vcgtq_f32(vi4, vmax);
+ const uint32x4_t vidx4 = vaddq_u32(vidx3, v1);
+ vmax = vbslq_f32(vm4, vi4, vmax);
+ vidx = vbslq_u32(vm4, vidx4, vidx);
+
+ const uint32x4_t vm5 = vcgtq_f32(vi5, vmax);
+ const uint32x4_t vidx5 = vaddq_u32(vidx4, v1);
+ vmax = vbslq_f32(vm5, vi5, vmax);
+ vidx = vbslq_u32(vm5, vidx5, vidx);
+
+ const uint32x4_t vm6 = vcgtq_f32(vi6, vmax);
+ const uint32x4_t vidx6 = vaddq_u32(vidx5, v1);
+ vmax = vbslq_f32(vm6, vi6, vmax);
+ vidx = vbslq_u32(vm6, vidx6, vidx);
+
+ const uint32x4_t vm7 = vcgtq_f32(vi7, vmax);
+ const uint32x4_t vidx7 = vaddq_u32(vidx6, v1);
+ vmax = vbslq_f32(vm7, vi7, vmax);
+ vidx = vbslq_u32(vm7, vidx7, vidx);
+
+ float32x2_t vmax_lo = vget_low_f32(vmax);
+ uint32x2_t vidx_lo = vget_low_u32(vidx);
+ if (c & 2) {
+ vst1_f32(o, vmax_lo); o += 2;
+ vst1_u32(i, vidx_lo); i += 2;
+ vmax_lo = vget_high_f32(vmax);
+ vidx_lo = vget_high_u32(vidx);
+ }
+ if (c & 1) {
+ vst1_lane_f32(o, vmax_lo, 0); o += 1;
+ vst1_lane_u32(i, vidx_lo, 0); i += 1;
+ }
+ }
+ }
+
+ output = (float*) ((uintptr_t) o + output_increment);
+ index = (uint32_t*) i;
+ } while (--output_pixels != 0);
+}
diff --git a/src/f32-argmaxpool/9x-neon-c4.c b/src/f32-argmaxpool/9x-neon-c4.c
new file mode 100644
index 0000000..ec3f263
--- /dev/null
+++ b/src/f32-argmaxpool/9x-neon-c4.c
@@ -0,0 +1,185 @@
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/argmaxpool.h>
+
+
+void xnn_f32_argmaxpool_ukernel_9x__neon_c4(
+ size_t output_pixels,
+ size_t pooling_elements,
+ size_t channels,
+ const float** input,
+ size_t input_offset,
+ float* output,
+ uint32_t* index,
+ size_t input_increment,
+ size_t output_increment) XNN_DISABLE_TSAN
+{
+ assert(output_pixels != 0);
+ assert(pooling_elements != 0);
+ assert(pooling_elements <= 9);
+ assert(channels != 0);
+
+ do {
+ const float* i0 = input[0];
+ const float* i1 = input[1];
+ const float* i2 = input[2];
+ const float* i3 = input[3];
+ const float* i4 = input[4];
+ const float* i5 = input[5];
+ const float* i6 = input[6];
+ const float* i7 = input[7];
+ const float* i8 = input[8];
+ i0 = (const float*) ((uintptr_t) i0 + input_offset);
+ i1 = (const float*) ((uintptr_t) i1 + input_offset);
+ i2 = (const float*) ((uintptr_t) i2 + input_offset);
+ i3 = (const float*) ((uintptr_t) i3 + input_offset);
+ i4 = (const float*) ((uintptr_t) i4 + input_offset);
+ i5 = (const float*) ((uintptr_t) i5 + input_offset);
+ i6 = (const float*) ((uintptr_t) i6 + input_offset);
+ i7 = (const float*) ((uintptr_t) i7 + input_offset);
+ i8 = (const float*) ((uintptr_t) i8 + input_offset);
+ if (pooling_elements < 2) {
+ i1 = i0;
+ }
+ if (pooling_elements <= 2) {
+ i2 = i0;
+ }
+ if (pooling_elements < 4) {
+ i3 = i0;
+ }
+ if (pooling_elements <= 4) {
+ i4 = i0;
+ }
+ if (pooling_elements < 6) {
+ i5 = i0;
+ }
+ if (pooling_elements <= 6) {
+ i6 = i0;
+ }
+ if (pooling_elements < 8) {
+ i7 = i0;
+ }
+ if (pooling_elements <= 8) {
+ i8 = i0;
+ }
+
+ size_t c = channels;
+ for (; c >= 4; c -= 4) {
+ const float32x4_t vi0 = vld1q_f32(i0); i0 += 4;
+ const float32x4_t vi1 = vld1q_f32(i1); i1 += 4;
+ const float32x4_t vi2 = vld1q_f32(i2); i2 += 4;
+ const float32x4_t vi3 = vld1q_f32(i3); i3 += 4;
+ const float32x4_t vi4 = vld1q_f32(i4); i4 += 4;
+ const float32x4_t vi5 = vld1q_f32(i5); i5 += 4;
+ const float32x4_t vi6 = vld1q_f32(i6); i6 += 4;
+ const float32x4_t vi7 = vld1q_f32(i7); i7 += 4;
+ const float32x4_t vi8 = vld1q_f32(i8); i8 += 4;
+
+ float32x4_t vmax = vi0;
+ uint32x4_t vidx = vmovq_n_u32(0);
+
+ const uint32x4_t vm1 = vcgtq_f32(vi1, vmax);
+ vmax = vbslq_f32(vm1, vi1, vmax);
+ vidx = vbslq_u32(vm1, vmovq_n_u32(1), vidx);
+
+ const uint32x4_t vm2 = vcgtq_f32(vi2, vmax);
+ vmax = vbslq_f32(vm2, vi2, vmax);
+ vidx = vbslq_u32(vm2, vmovq_n_u32(2), vidx);
+
+ const uint32x4_t vm3 = vcgtq_f32(vi3, vmax);
+ vmax = vbslq_f32(vm3, vi3, vmax);
+ vidx = vbslq_u32(vm3, vmovq_n_u32(3), vidx);
+
+ const uint32x4_t vm4 = vcgtq_f32(vi4, vmax);
+ vmax = vbslq_f32(vm4, vi4, vmax);
+ vidx = vbslq_u32(vm4, vmovq_n_u32(4), vidx);
+
+ const uint32x4_t vm5 = vcgtq_f32(vi5, vmax);
+ vmax = vbslq_f32(vm5, vi5, vmax);
+ vidx = vbslq_u32(vm5, vmovq_n_u32(5), vidx);
+
+ const uint32x4_t vm6 = vcgtq_f32(vi6, vmax);
+ vmax = vbslq_f32(vm6, vi6, vmax);
+ vidx = vbslq_u32(vm6, vmovq_n_u32(6), vidx);
+
+ const uint32x4_t vm7 = vcgtq_f32(vi7, vmax);
+ vmax = vbslq_f32(vm7, vi7, vmax);
+ vidx = vbslq_u32(vm7, vmovq_n_u32(7), vidx);
+
+ const uint32x4_t vm8 = vcgtq_f32(vi8, vmax);
+ vmax = vbslq_f32(vm8, vi8, vmax);
+ vidx = vbslq_u32(vm8, vmovq_n_u32(8), vidx);
+
+ vst1q_f32(output, vmax); output += 4;
+ vst1q_u32(index, vidx); index += 4;
+ }
+ if (c != 0) {
+ const float32x4_t vi0 = vld1q_f32(i0);
+ const float32x4_t vi1 = vld1q_f32(i1);
+ const float32x4_t vi2 = vld1q_f32(i2);
+ const float32x4_t vi3 = vld1q_f32(i3);
+ const float32x4_t vi4 = vld1q_f32(i4);
+ const float32x4_t vi5 = vld1q_f32(i5);
+ const float32x4_t vi6 = vld1q_f32(i6);
+ const float32x4_t vi7 = vld1q_f32(i7);
+ const float32x4_t vi8 = vld1q_f32(i8);
+
+ float32x4_t vmax = vi0;
+ uint32x4_t vidx = vmovq_n_u32(0);
+
+ const uint32x4_t vm1 = vcgtq_f32(vi1, vmax);
+ vmax = vbslq_f32(vm1, vi1, vmax);
+ vidx = vbslq_u32(vm1, vmovq_n_u32(1), vidx);
+
+ const uint32x4_t vm2 = vcgtq_f32(vi2, vmax);
+ vmax = vbslq_f32(vm2, vi2, vmax);
+ vidx = vbslq_u32(vm2, vmovq_n_u32(2), vidx);
+
+ const uint32x4_t vm3 = vcgtq_f32(vi3, vmax);
+ vmax = vbslq_f32(vm3, vi3, vmax);
+ vidx = vbslq_u32(vm3, vmovq_n_u32(3), vidx);
+
+ const uint32x4_t vm4 = vcgtq_f32(vi4, vmax);
+ vmax = vbslq_f32(vm4, vi4, vmax);
+ vidx = vbslq_u32(vm4, vmovq_n_u32(4), vidx);
+
+ const uint32x4_t vm5 = vcgtq_f32(vi5, vmax);
+ vmax = vbslq_f32(vm5, vi5, vmax);
+ vidx = vbslq_u32(vm5, vmovq_n_u32(5), vidx);
+
+ const uint32x4_t vm6 = vcgtq_f32(vi6, vmax);
+ vmax = vbslq_f32(vm6, vi6, vmax);
+ vidx = vbslq_u32(vm6, vmovq_n_u32(6), vidx);
+
+ const uint32x4_t vm7 = vcgtq_f32(vi7, vmax);
+ vmax = vbslq_f32(vm7, vi7, vmax);
+ vidx = vbslq_u32(vm7, vmovq_n_u32(7), vidx);
+
+ const uint32x4_t vm8 = vcgtq_f32(vi8, vmax);
+ vmax = vbslq_f32(vm8, vi8, vmax);
+ vidx = vbslq_u32(vm8, vmovq_n_u32(8), vidx);
+
+ float32x2_t vmax_lo = vget_low_f32(vmax);
+ uint32x2_t vidx_lo = vget_low_u32(vidx);
+ if (c & 2) {
+ vst1_f32(output, vmax_lo); output += 2;
+ vst1_u32(index, vidx_lo); index += 2;
+ vmax_lo = vget_high_f32(vmax);
+ vidx_lo = vget_high_u32(vidx);
+ }
+ if (c & 1) {
+ vst1_lane_f32(output, vmax_lo, 0); output += 1;
+ vst1_lane_u32(index, vidx_lo, 0); index += 1;
+ }
+ }
+ input = (const float**) ((uintptr_t) input + input_increment);
+ output = (float*) ((uintptr_t) output + output_increment);
+ } while (--output_pixels != 0);
+}
diff --git a/src/init.c b/src/init.c
index 1f26e7b..77bb8da 100644
--- a/src/init.c
+++ b/src/init.c
@@ -286,15 +286,15 @@
.qr = 8,
};
xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) {
- .up = (xnn_argmaxpool_unipass_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4,
+ .up = (xnn_argmaxpool_unipass_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__neon_c4,
.mr = 4,
};
xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) {
- .up = (xnn_argmaxpool_unipass_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4,
+ .up = (xnn_argmaxpool_unipass_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__neon_c4,
.mr = 9,
};
xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) {
- .mp = (xnn_argmaxpool_multipass_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4,
+ .mp = (xnn_argmaxpool_multipass_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__neon_c4,
.mr = 9,
.qr = 8,
};
@@ -997,15 +997,15 @@
.qr = 8,
};
xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) {
- .up = (xnn_argmaxpool_unipass_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4,
+ .up = (xnn_argmaxpool_unipass_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__neon_c4,
.mr = 4,
};
xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) {
- .up = (xnn_argmaxpool_unipass_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4,
+ .up = (xnn_argmaxpool_unipass_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__neon_c4,
.mr = 9,
};
xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) {
- .mp = (xnn_argmaxpool_multipass_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4,
+ .mp = (xnn_argmaxpool_multipass_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__neon_c4,
.mr = 9,
.qr = 8,
};
diff --git a/src/xnnpack/argmaxpool.h b/src/xnnpack/argmaxpool.h
index 86d646a..cce9f08 100644
--- a/src/xnnpack/argmaxpool.h
+++ b/src/xnnpack/argmaxpool.h
@@ -28,11 +28,13 @@
size_t input_increment, \
size_t output_increment);
+DECLARE_F32_ARGMAXPOOL_UNIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_4x__neon_c4)
DECLARE_F32_ARGMAXPOOL_UNIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_4x__sse2_c4)
DECLARE_F32_ARGMAXPOOL_UNIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_4x__psimd_c4)
DECLARE_F32_ARGMAXPOOL_UNIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_4x__wasmsimd_c4)
DECLARE_F32_ARGMAXPOOL_UNIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_4x__scalar_c1)
+DECLARE_F32_ARGMAXPOOL_UNIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_9x__neon_c4)
DECLARE_F32_ARGMAXPOOL_UNIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_9x__sse2_c4)
DECLARE_F32_ARGMAXPOOL_UNIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_9x__psimd_c4)
DECLARE_F32_ARGMAXPOOL_UNIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_9x__wasmsimd_c4)
@@ -53,6 +55,7 @@
size_t input_increment, \
size_t output_increment);
+DECLARE_F32_ARGMAXPOOL_MULTIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4)
DECLARE_F32_ARGMAXPOOL_MULTIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_9p8x__sse2_c4)
DECLARE_F32_ARGMAXPOOL_MULTIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4)
DECLARE_F32_ARGMAXPOOL_MULTIPASS_UKERNEL_FUNCTION(xnn_f32_argmaxpool_ukernel_9p8x__wasmsimd_c4)
diff --git a/test/f32-argmaxpool.cc b/test/f32-argmaxpool.cc
index 6094364..93dc16b 100644
--- a/test/f32-argmaxpool.cc
+++ b/test/f32-argmaxpool.cc
@@ -17,6 +17,271 @@
#include "argmaxpool-microkernel-tester.h"
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_eq_4_unipass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(4)
+ .pooling_tile(4)
+ .channels(4)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_eq_4_unipass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(4)
+ .pooling_tile(4)
+ .channels(4)
+ .input_offset(7)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_eq_4_unipass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 4; pooling_elements++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(4)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_eq_4_unipass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 4; pooling_elements++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(4)
+ .input_offset(7)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_div_4_unipass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(4)
+ .pooling_tile(4)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_div_4_unipass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(4)
+ .pooling_tile(4)
+ .channels(channels)
+ .input_offset(37)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_div_4_unipass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 4; pooling_elements++) {
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_div_4_unipass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 4; pooling_elements++) {
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(channels)
+ .input_offset(37)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_lt_4_unipass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(4)
+ .pooling_tile(4)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_lt_4_unipass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(4)
+ .pooling_tile(4)
+ .channels(channels)
+ .input_offset(5)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_lt_4_unipass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 4; pooling_elements++) {
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_lt_4_unipass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 4; pooling_elements++) {
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(channels)
+ .input_offset(5)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_gt_4_unipass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(4)
+ .pooling_tile(4)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_gt_4_unipass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(4)
+ .pooling_tile(4)
+ .channels(channels)
+ .input_offset(11)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_gt_4_unipass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 4; pooling_elements++) {
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, channels_gt_4_unipass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 4; pooling_elements++) {
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(channels)
+ .input_offset(11)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, few_output_pixels) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 2; pooling_elements <= 4; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, few_output_pixels_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 2; pooling_elements <= 4; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(channels)
+ .input_offset(23)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, few_output_pixels_with_output_stride) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 2; pooling_elements <= 4; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .channels(channels)
+ .output_stride(23)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_4X__NEON_C4, few_output_pixels_with_step) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 2; pooling_elements <= 4; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ for (size_t step = 2; step <= pooling_elements; step++) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(4)
+ .step(step)
+ .channels(channels)
+ .output_stride(23)
+ .Test(xnn_f32_argmaxpool_ukernel_4x__neon_c4);
+ }
+ }
+ }
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
#if XNN_ARCH_X86 || XNN_ARCH_X86_64
TEST(F32_ARGMAXPOOL_4X__SSE2_C4, channels_eq_4_unipass_fulltile) {
TEST_REQUIRES_X86_SSE2;
@@ -942,6 +1207,271 @@
}
}
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_eq_4_unipass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(9)
+ .pooling_tile(9)
+ .channels(4)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_eq_4_unipass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(9)
+ .pooling_tile(9)
+ .channels(4)
+ .input_offset(7)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_eq_4_unipass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(4)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_eq_4_unipass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(4)
+ .input_offset(7)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_div_4_unipass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(9)
+ .pooling_tile(9)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_div_4_unipass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(9)
+ .pooling_tile(9)
+ .channels(channels)
+ .input_offset(37)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_div_4_unipass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_div_4_unipass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(channels)
+ .input_offset(37)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_lt_4_unipass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(9)
+ .pooling_tile(9)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_lt_4_unipass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(9)
+ .pooling_tile(9)
+ .channels(channels)
+ .input_offset(5)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_lt_4_unipass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_lt_4_unipass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(channels)
+ .input_offset(5)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_gt_4_unipass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(9)
+ .pooling_tile(9)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_gt_4_unipass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(9)
+ .pooling_tile(9)
+ .channels(channels)
+ .input_offset(11)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_gt_4_unipass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, channels_gt_4_unipass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(channels)
+ .input_offset(11)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, few_output_pixels) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 2; pooling_elements <= 9; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, few_output_pixels_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 2; pooling_elements <= 9; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(channels)
+ .input_offset(23)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, few_output_pixels_with_output_stride) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 2; pooling_elements <= 9; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .channels(channels)
+ .output_stride(23)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9X__NEON_C4, few_output_pixels_with_step) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 2; pooling_elements <= 9; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ for (size_t step = 2; step <= pooling_elements; step++) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9)
+ .step(step)
+ .channels(channels)
+ .output_stride(23)
+ .Test(xnn_f32_argmaxpool_ukernel_9x__neon_c4);
+ }
+ }
+ }
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
#if XNN_ARCH_X86 || XNN_ARCH_X86_64
TEST(F32_ARGMAXPOOL_9X__SSE2_C4, channels_eq_4_unipass_fulltile) {
TEST_REQUIRES_X86_SSE2;
@@ -1867,6 +2397,376 @@
}
}
+#if XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_eq_4_twopass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(4)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_eq_4_twopass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(4)
+ .input_offset(7)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_eq_4_twopass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9, 8)
+ .channels(4)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_eq_4_twopass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9, 8)
+ .channels(4)
+ .input_offset(7)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_div_4_twopass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_div_4_twopass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .input_offset(23)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_div_4_twopass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_div_4_twopass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .input_offset(37)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_lt_4_twopass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_lt_4_twopass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .input_offset(5)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_lt_4_twopass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_lt_4_twopass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .input_offset(5)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_gt_4_twopass_fulltile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_gt_4_twopass_fulltile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .input_offset(11)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_gt_4_twopass_subtile) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_gt_4_twopass_subtile_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .input_offset(11)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_eq_4_multipass) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(4)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_eq_4_multipass_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(4)
+ .input_offset(7)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_div_4_multipass) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_div_4_multipass_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+ for (size_t channels = 8; channels < 32; channels += 4) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .input_offset(37)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_lt_4_multipass) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_lt_4_multipass_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+ for (size_t channels = 1; channels < 4; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .input_offset(4)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_gt_4_multipass) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, channels_gt_4_multipass_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+ for (size_t channels = 5; channels < 8; channels++) {
+ ArgMaxPoolMicrokernelTester()
+ .pooling_elements(17)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .input_offset(11)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, few_output_pixels) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 10; pooling_elements <= 17; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, few_output_pixels_with_input_offset) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 10; pooling_elements <= 17; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .input_offset(23)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, few_output_pixels_with_output_stride) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 10; pooling_elements <= 17; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9, 8)
+ .channels(channels)
+ .output_stride(23)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+ }
+
+ TEST(F32_ARGMAXPOOL_9P8X__NEON_C4, few_output_pixels_with_step) {
+ TEST_REQUIRES_ARM_NEON;
+ for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+ for (size_t pooling_elements = 10; pooling_elements <= 17; pooling_elements++) {
+ for (size_t channels = 1; channels <= 20; channels += 3) {
+ for (size_t step = 2; step <= pooling_elements; step++) {
+ ArgMaxPoolMicrokernelTester()
+ .output_pixels(output_pixels)
+ .pooling_elements(pooling_elements)
+ .pooling_tile(9, 8)
+ .step(step)
+ .channels(channels)
+ .output_stride(23)
+ .Test(xnn_f32_argmaxpool_ukernel_9p8x__neon_c4);
+ }
+ }
+ }
+ }
+ }
+#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
+
+
#if XNN_ARCH_X86 || XNN_ARCH_X86_64
TEST(F32_ARGMAXPOOL_9P8X__SSE2_C4, channels_eq_4_twopass_fulltile) {
diff --git a/test/f32-argmaxpool.yaml b/test/f32-argmaxpool.yaml
index cda0faa..101ed03 100644
--- a/test/f32-argmaxpool.yaml
+++ b/test/f32-argmaxpool.yaml
@@ -2,14 +2,17 @@
#
# This source code is licensed under the BSD-style license found in the
# LICENSE file in the root directory of this source tree.
+- name: xnn_f32_argmaxpool_ukernel_4x__neon_c4
- name: xnn_f32_argmaxpool_ukernel_4x__sse2_c4
- name: xnn_f32_argmaxpool_ukernel_4x__psimd_c4
- name: xnn_f32_argmaxpool_ukernel_4x__wasmsimd_c4
- name: xnn_f32_argmaxpool_ukernel_4x__scalar_c1
+- name: xnn_f32_argmaxpool_ukernel_9x__neon_c4
- name: xnn_f32_argmaxpool_ukernel_9x__sse2_c4
- name: xnn_f32_argmaxpool_ukernel_9x__psimd_c4
- name: xnn_f32_argmaxpool_ukernel_9x__wasmsimd_c4
- name: xnn_f32_argmaxpool_ukernel_9x__scalar_c1
+- name: xnn_f32_argmaxpool_ukernel_9p8x__neon_c4
- name: xnn_f32_argmaxpool_ukernel_9p8x__sse2_c4
- name: xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4
- name: xnn_f32_argmaxpool_ukernel_9p8x__wasmsimd_c4