Additional NEON/NEONFMA DWCONV microkernels
Faster 2x2 and 5x5 depthwise convolution
PiperOrigin-RevId: 308216337
diff --git a/src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c b/src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c
new file mode 100644
index 0000000..42b53b0
--- /dev/null
+++ b/src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c
@@ -0,0 +1,156 @@
+// Auto-generated file. Do not edit!
+// Template: src/f32-dwconv/up-neon.c.in
+// Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_minmax_ukernel_up8x4__neon_acc2(
+ size_t channels,
+ size_t output_width,
+ const float** input,
+ const float* weights,
+ float* output,
+ size_t input_stride,
+ size_t output_increment,
+ const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)])
+{
+ assert(channels != 0);
+ assert(output_width != 0);
+
+ const float32x4_t vmax = vld1q_dup_f32(¶ms->scalar.max);
+ const float32x4_t vmin = vld1q_dup_f32(¶ms->scalar.min);
+ do {
+ const float* i0 = input[0];
+ assert(i0 != NULL);
+ const float* i1 = input[1];
+ assert(i1 != NULL);
+ const float* i2 = input[2];
+ assert(i2 != NULL);
+ const float* i3 = input[3];
+ assert(i3 != NULL);
+ input = (const float**) ((uintptr_t) input + input_stride);
+
+ size_t c = channels;
+ const float* w = weights;
+ for (; c >= 8; c -= 8) {
+ float32x4_t vacc0123p0 = vld1q_f32(w); w += 4;
+ float32x4_t vacc4567p0 = vld1q_f32(w); w += 4;
+
+
+ const float32x4_t vi0x0123 = vld1q_f32(i0); i0 += 4;
+ const float32x4_t vi0x4567 = vld1q_f32(i0); i0 += 4;
+ const float32x4_t vk0x0123 = vld1q_f32(w); w += 4;
+ const float32x4_t vk0x4567 = vld1q_f32(w); w += 4;
+ vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
+ vacc4567p0 = vmlaq_f32(vacc4567p0, vi0x4567, vk0x4567);
+
+ const float32x4_t vi1x0123 = vld1q_f32(i1); i1 += 4;
+ const float32x4_t vi1x4567 = vld1q_f32(i1); i1 += 4;
+ const float32x4_t vk1x0123 = vld1q_f32(w); w += 4;
+ const float32x4_t vk1x4567 = vld1q_f32(w); w += 4;
+ float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
+ float32x4_t vacc4567p1 = vmulq_f32(vi1x4567, vk1x4567);
+
+ const float32x4_t vi2x0123 = vld1q_f32(i2); i2 += 4;
+ const float32x4_t vi2x4567 = vld1q_f32(i2); i2 += 4;
+ const float32x4_t vk2x0123 = vld1q_f32(w); w += 4;
+ const float32x4_t vk2x4567 = vld1q_f32(w); w += 4;
+ vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
+ vacc4567p0 = vmlaq_f32(vacc4567p0, vi2x4567, vk2x4567);
+
+ const float32x4_t vi3x0123 = vld1q_f32(i3); i3 += 4;
+ const float32x4_t vi3x4567 = vld1q_f32(i3); i3 += 4;
+ const float32x4_t vk3x0123 = vld1q_f32(w); w += 4;
+ const float32x4_t vk3x4567 = vld1q_f32(w); w += 4;
+ vacc0123p1 = vmlaq_f32(vacc0123p1, vi3x0123, vk3x0123);
+ vacc4567p1 = vmlaq_f32(vacc4567p1, vi3x4567, vk3x4567);
+
+ // Add up all accumulators to vacc01234567p0
+ vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
+ vacc4567p0 = vaddq_f32(vacc4567p0, vacc4567p1);
+
+ float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
+ float32x4_t vacc4567 = vmaxq_f32(vacc4567p0, vmin);
+ vacc0123 = vminq_f32(vacc0123, vmax);
+ vacc4567 = vminq_f32(vacc4567, vmax);
+
+ vst1q_f32(output, vacc0123); output += 4;
+ vst1q_f32(output, vacc4567); output += 4;
+ }
+ for (; c >= 4; c -= 4) {
+ float32x4_t vacc0123p0 = vld1q_f32(w); w += 4;
+
+
+ const float32x4_t vi0x0123 = vld1q_f32(i0); i0 += 4;
+ const float32x4_t vk0x0123 = vld1q_f32(w + 4);
+ vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
+
+ const float32x4_t vi1x0123 = vld1q_f32(i1); i1 += 4;
+ const float32x4_t vk1x0123 = vld1q_f32(w + 12);
+ float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
+
+ const float32x4_t vi2x0123 = vld1q_f32(i2); i2 += 4;
+ const float32x4_t vk2x0123 = vld1q_f32(w + 20);
+ vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
+
+ const float32x4_t vi3x0123 = vld1q_f32(i3); i3 += 4;
+ const float32x4_t vk3x0123 = vld1q_f32(w + 28);
+ vacc0123p1 = vmlaq_f32(vacc0123p1, vi3x0123, vk3x0123);
+
+ // Add up all accumulators to vacc0123p0
+ vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
+
+ float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
+ vacc0123 = vminq_f32(vacc0123, vmax);
+
+ vst1q_f32(output, vacc0123); output += 4;
+ }
+ if XNN_UNLIKELY(c != 0) {
+ float32x4_t vacc0123p0 = vld1q_f32(w);
+
+
+ const float32x4_t vi0x0123 = vld1q_f32(i0);
+ const float32x4_t vk0x0123 = vld1q_f32(w + 8);
+ vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
+
+ const float32x4_t vi1x0123 = vld1q_f32(i1);
+ const float32x4_t vk1x0123 = vld1q_f32(w + 16);
+ float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
+
+ const float32x4_t vi2x0123 = vld1q_f32(i2);
+ const float32x4_t vk2x0123 = vld1q_f32(w + 24);
+ vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
+
+ const float32x4_t vi3x0123 = vld1q_f32(i3);
+ const float32x4_t vk3x0123 = vld1q_f32(w + 32);
+ vacc0123p1 = vmlaq_f32(vacc0123p1, vi3x0123, vk3x0123);
+
+ // Add up all accumulators to vacc0123p0
+ vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
+
+ float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
+ vacc0123 = vminq_f32(vacc0123, vmax);
+
+ float32x2_t vacc01 = vget_low_f32(vacc0123);
+ if (c & 2) {
+ vst1_f32(output, vacc01); output += 2;
+ vacc01 = vget_high_f32(vacc0123);
+ }
+ if (c & 1) {
+ vst1_lane_f32(output, vacc01, 0); output += 1;
+ }
+ }
+
+ output = (float*) ((uintptr_t) output + output_increment);
+ } while (--output_width != 0);
+}