commit f92206b9d2747443c2305af258b8089005a9a5a5
author Marat Dukhan <maratek@google.com> Fri Dec 10 17:02:07 2021 -0800
committer XNNPACK Team <xnnpack-github-robot@google.com> Fri Dec 10 17:03:19 2021 -0800
tree d83959c7a35ad9b060a1a318dcbdadd31af8def1
parent 0db15d382529e9a84aa9bbf56aae72b1f85a78ae

QS8->F32 and QU8->F32 Convert NC operators

PiperOrigin-RevId: 415641139

CMakeLists.txt

diff --git a/CMakeLists.txt b/CMakeLists.txt
index b67e38a..9baf826 100755
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -378,6 +378,8 @@
   src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
   src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
   src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
+  src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c
+  src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c
   src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c
   src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c
   src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c
@@ -406,6 +408,8 @@
   src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
   src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
   src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
+  src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c
+  src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c
   src/qu8-gavgpool/7p7x-minmax-scalar-c1.c
   src/qu8-gavgpool/7x-minmax-scalar-c1.c
   src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
@@ -1166,6 +1170,7 @@
   src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c
   src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c
   src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c
+  src/qs8-f32-vcvt/gen/vcvt-neon-x32.c
   src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c
   src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c
   src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c
@@ -1184,6 +1189,7 @@
   src/qu8-avgpool/9x-minmax-neon-c8.c
   src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c
   src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c
+  src/qu8-f32-vcvt/gen/vcvt-neon-x32.c
   src/qu8-gavgpool/7p7x-minmax-neon-c8.c
   src/qu8-gavgpool/7x-minmax-neon-c8.c
   src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
@@ -3219,6 +3225,7 @@
   src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
   src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
   src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
+  src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c
   src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c
   src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c
   src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
@@ -3233,6 +3240,7 @@
   src/qu8-avgpool/9x-minmax-sse2-c8.c
   src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
   src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
+  src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c
   src/qu8-gavgpool/7p7x-minmax-sse2-c8.c
   src/qu8-gavgpool/7x-minmax-sse2-c8.c
   src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
@@ -3607,6 +3615,7 @@
   src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
   src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
   src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
+  src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c
   src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c
   src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c
   src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
@@ -3619,6 +3628,7 @@
   src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
   src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
   src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
+  src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c
   src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
   src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
   src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c