# Copyright 2022 Google LLC
#
# This source code is licensed under the BSD-style license found in the
# LICENSE file in the root directory of this source tree.

- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8
  init: xnn_init_qu8_avgpool_minmax_fp32_neon_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16
  init: xnn_init_qu8_avgpool_minmax_fp32_neon_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24
  init: xnn_init_qu8_avgpool_minmax_fp32_neon_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32
  init: xnn_init_qu8_avgpool_minmax_fp32_neon_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__neon_c8
  init: xnn_init_qu8_avgpool_minmax_fp32_neon_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__neon_c16
  init: xnn_init_qu8_avgpool_minmax_fp32_neon_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__neon_c24
  init: xnn_init_qu8_avgpool_minmax_fp32_neon_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__neon_c32
  init: xnn_init_qu8_avgpool_minmax_fp32_neon_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8
  init: xnn_init_qu8_avgpool_minmax_fp32_neonv8_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16
  init: xnn_init_qu8_avgpool_minmax_fp32_neonv8_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24
  init: xnn_init_qu8_avgpool_minmax_fp32_neonv8_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32
  init: xnn_init_qu8_avgpool_minmax_fp32_neonv8_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8
  init: xnn_init_qu8_avgpool_minmax_fp32_neonv8_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16
  init: xnn_init_qu8_avgpool_minmax_fp32_neonv8_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24
  init: xnn_init_qu8_avgpool_minmax_fp32_neonv8_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32
  init: xnn_init_qu8_avgpool_minmax_fp32_neonv8_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8
  init: xnn_init_qu8_avgpool_minmax_fp32_sse2_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16
  init: xnn_init_qu8_avgpool_minmax_fp32_sse2_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24
  init: xnn_init_qu8_avgpool_minmax_fp32_sse2_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8
  init: xnn_init_qu8_avgpool_minmax_fp32_sse2_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16
  init: xnn_init_qu8_avgpool_minmax_fp32_sse2_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24
  init: xnn_init_qu8_avgpool_minmax_fp32_sse2_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8
  init: xnn_init_qu8_avgpool_minmax_fp32_sse4_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16
  init: xnn_init_qu8_avgpool_minmax_fp32_sse4_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24
  init: xnn_init_qu8_avgpool_minmax_fp32_sse4_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8
  init: xnn_init_qu8_avgpool_minmax_fp32_sse4_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16
  init: xnn_init_qu8_avgpool_minmax_fp32_sse4_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24
  init: xnn_init_qu8_avgpool_minmax_fp32_sse4_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8
  init: xnn_init_qu8_avgpool_minmax_fp32_wasmsimd_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16
  init: xnn_init_qu8_avgpool_minmax_fp32_wasmsimd_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24
  init: xnn_init_qu8_avgpool_minmax_fp32_wasmsimd_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32
  init: xnn_init_qu8_avgpool_minmax_fp32_wasmsimd_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8
  init: xnn_init_qu8_avgpool_minmax_fp32_wasmsimd_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16
  init: xnn_init_qu8_avgpool_minmax_fp32_wasmsimd_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24
  init: xnn_init_qu8_avgpool_minmax_fp32_wasmsimd_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32
  init: xnn_init_qu8_avgpool_minmax_fp32_wasmsimd_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c1
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_imagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_imagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_imagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_imagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_imagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_imagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c1
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_fmagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_fmagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_fmagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_fmagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_fmagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_fmagic_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c1
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_lrintf_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_lrintf_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_lrintf_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_lrintf_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_lrintf_params
- name: xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4
  init: xnn_init_qu8_avgpool_minmax_fp32_scalar_lrintf_params