| // Auto-generated file. Do not edit! |
| // Template: src/f32-velu/avx-rr2-lut4-p4-perm.c.in |
| // Generator: tools/xngen |
| // |
| // Copyright 2020 Google LLC |
| // |
| // This source code is licensed under the BSD-style license found in the |
| // LICENSE file in the root directory of this source tree. |
| |
| #include <assert.h> |
| |
| #include <immintrin.h> |
| |
| #include <xnnpack/common.h> |
| #include <xnnpack/vunary.h> |
| |
| |
| void xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48( |
| size_t n, |
| const float* x, |
| float* y, |
| const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) |
| { |
| assert(n % sizeof(float) == 0); |
| |
| const __m256 vprescale = _mm256_load_ps(params->avx_rr2_lut4_p4.prescale); |
| const __m256 valpha = _mm256_load_ps(params->avx_rr2_lut4_p4.alpha); |
| const __m256 vbeta = _mm256_load_ps(params->avx_rr2_lut4_p4.beta); |
| const __m256 vsat_cutoff = _mm256_load_ps(params->avx_rr2_lut4_p4.sat_cutoff); |
| const __m256 vmagic_bias = _mm256_load_ps(params->avx_rr2_lut4_p4.magic_bias); |
| const __m256 vlog2e = _mm256_load_ps(params->avx_rr2_lut4_p4.log2e); |
| const __m256 vindex_mask = _mm256_load_ps((const float*) params->avx_rr2_lut4_p4.index_mask); |
| const __m256 vtable = _mm256_load_ps(params->avx_rr2_lut4_p4.table); |
| const __m256 vminus_ln2_hi = _mm256_load_ps(params->avx_rr2_lut4_p4.minus_ln2_hi); |
| const __m256 vminus_ln2_lo = _mm256_load_ps(params->avx_rr2_lut4_p4.minus_ln2_lo); |
| const __m256 vc4 = _mm256_load_ps(params->avx_rr2_lut4_p4.c4); |
| const __m256 vc3 = _mm256_load_ps(params->avx_rr2_lut4_p4.c3); |
| const __m256 vc2 = _mm256_load_ps(params->avx_rr2_lut4_p4.c2); |
| const __m256 vone = _mm256_load_ps(params->avx_rr2_lut4_p4.one); |
| |
| for (; n >= 48 * sizeof(float); n -= 48 * sizeof(float)) { |
| __m256 vx0 = _mm256_loadu_ps(x); |
| __m256 vx1 = _mm256_loadu_ps(x + 8); |
| __m256 vx2 = _mm256_loadu_ps(x + 16); |
| __m256 vx3 = _mm256_loadu_ps(x + 24); |
| __m256 vx4 = _mm256_loadu_ps(x + 32); |
| __m256 vx5 = _mm256_loadu_ps(x + 40); |
| x += 48; |
| |
| const __m256 vz0 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx0, vprescale)); |
| const __m256 vz1 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx1, vprescale)); |
| const __m256 vz2 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx2, vprescale)); |
| const __m256 vz3 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx3, vprescale)); |
| const __m256 vz4 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx4, vprescale)); |
| const __m256 vz5 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx5, vprescale)); |
| |
| __m256 vn0 = _mm256_add_ps(_mm256_mul_ps(vz0, vlog2e), vmagic_bias); |
| __m256 vn1 = _mm256_add_ps(_mm256_mul_ps(vz1, vlog2e), vmagic_bias); |
| __m256 vn2 = _mm256_add_ps(_mm256_mul_ps(vz2, vlog2e), vmagic_bias); |
| __m256 vn3 = _mm256_add_ps(_mm256_mul_ps(vz3, vlog2e), vmagic_bias); |
| __m256 vn4 = _mm256_add_ps(_mm256_mul_ps(vz4, vlog2e), vmagic_bias); |
| __m256 vn5 = _mm256_add_ps(_mm256_mul_ps(vz5, vlog2e), vmagic_bias); |
| |
| __m256 ven0 = _mm256_andnot_ps(vindex_mask, vn0); |
| const __m256 vl0 = _mm256_permutevar_ps(vtable, _mm256_castps_si256(vn0)); |
| const __m128 ven0_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(ven0)), 21)); |
| __m256 ven1 = _mm256_andnot_ps(vindex_mask, vn1); |
| const __m256 vl1 = _mm256_permutevar_ps(vtable, _mm256_castps_si256(vn1)); |
| const __m128 ven1_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(ven1)), 21)); |
| __m256 ven2 = _mm256_andnot_ps(vindex_mask, vn2); |
| const __m256 vl2 = _mm256_permutevar_ps(vtable, _mm256_castps_si256(vn2)); |
| const __m128 ven2_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(ven2)), 21)); |
| __m256 ven3 = _mm256_andnot_ps(vindex_mask, vn3); |
| const __m256 vl3 = _mm256_permutevar_ps(vtable, _mm256_castps_si256(vn3)); |
| const __m128 ven3_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(ven3)), 21)); |
| __m256 ven4 = _mm256_andnot_ps(vindex_mask, vn4); |
| const __m256 vl4 = _mm256_permutevar_ps(vtable, _mm256_castps_si256(vn4)); |
| const __m128 ven4_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(ven4)), 21)); |
| __m256 ven5 = _mm256_andnot_ps(vindex_mask, vn5); |
| const __m256 vl5 = _mm256_permutevar_ps(vtable, _mm256_castps_si256(vn5)); |
| const __m128 ven5_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(ven5)), 21)); |
| |
| vn0 = _mm256_sub_ps(vn0, vmagic_bias); |
| const __m128 ven0_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(ven0, 1)), 21)); |
| vn1 = _mm256_sub_ps(vn1, vmagic_bias); |
| const __m128 ven1_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(ven1, 1)), 21)); |
| vn2 = _mm256_sub_ps(vn2, vmagic_bias); |
| const __m128 ven2_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(ven2, 1)), 21)); |
| vn3 = _mm256_sub_ps(vn3, vmagic_bias); |
| const __m128 ven3_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(ven3, 1)), 21)); |
| vn4 = _mm256_sub_ps(vn4, vmagic_bias); |
| const __m128 ven4_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(ven4, 1)), 21)); |
| vn5 = _mm256_sub_ps(vn5, vmagic_bias); |
| const __m128 ven5_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(ven5, 1)), 21)); |
| |
| __m256 vt0 = _mm256_add_ps(_mm256_mul_ps(vn0, vminus_ln2_hi), vz0); |
| ven0 = _mm256_insertf128_ps(_mm256_castps128_ps256(ven0_lo), ven0_hi, 1); |
| __m256 vt1 = _mm256_add_ps(_mm256_mul_ps(vn1, vminus_ln2_hi), vz1); |
| ven1 = _mm256_insertf128_ps(_mm256_castps128_ps256(ven1_lo), ven1_hi, 1); |
| __m256 vt2 = _mm256_add_ps(_mm256_mul_ps(vn2, vminus_ln2_hi), vz2); |
| ven2 = _mm256_insertf128_ps(_mm256_castps128_ps256(ven2_lo), ven2_hi, 1); |
| __m256 vt3 = _mm256_add_ps(_mm256_mul_ps(vn3, vminus_ln2_hi), vz3); |
| ven3 = _mm256_insertf128_ps(_mm256_castps128_ps256(ven3_lo), ven3_hi, 1); |
| __m256 vt4 = _mm256_add_ps(_mm256_mul_ps(vn4, vminus_ln2_hi), vz4); |
| ven4 = _mm256_insertf128_ps(_mm256_castps128_ps256(ven4_lo), ven4_hi, 1); |
| __m256 vt5 = _mm256_add_ps(_mm256_mul_ps(vn5, vminus_ln2_hi), vz5); |
| ven5 = _mm256_insertf128_ps(_mm256_castps128_ps256(ven5_lo), ven5_hi, 1); |
| |
| vt0 = _mm256_add_ps(_mm256_mul_ps(vn0, vminus_ln2_lo), vt0); |
| __m256 vs0 = _mm256_mul_ps(vl0, ven0); |
| vt1 = _mm256_add_ps(_mm256_mul_ps(vn1, vminus_ln2_lo), vt1); |
| __m256 vs1 = _mm256_mul_ps(vl1, ven1); |
| vt2 = _mm256_add_ps(_mm256_mul_ps(vn2, vminus_ln2_lo), vt2); |
| __m256 vs2 = _mm256_mul_ps(vl2, ven2); |
| vt3 = _mm256_add_ps(_mm256_mul_ps(vn3, vminus_ln2_lo), vt3); |
| __m256 vs3 = _mm256_mul_ps(vl3, ven3); |
| vt4 = _mm256_add_ps(_mm256_mul_ps(vn4, vminus_ln2_lo), vt4); |
| __m256 vs4 = _mm256_mul_ps(vl4, ven4); |
| vt5 = _mm256_add_ps(_mm256_mul_ps(vn5, vminus_ln2_lo), vt5); |
| __m256 vs5 = _mm256_mul_ps(vl5, ven5); |
| |
| __m256 vp0 = _mm256_add_ps(_mm256_mul_ps(vc4, vt0), vc3); |
| __m256 vp1 = _mm256_add_ps(_mm256_mul_ps(vc4, vt1), vc3); |
| __m256 vp2 = _mm256_add_ps(_mm256_mul_ps(vc4, vt2), vc3); |
| __m256 vp3 = _mm256_add_ps(_mm256_mul_ps(vc4, vt3), vc3); |
| __m256 vp4 = _mm256_add_ps(_mm256_mul_ps(vc4, vt4), vc3); |
| __m256 vp5 = _mm256_add_ps(_mm256_mul_ps(vc4, vt5), vc3); |
| |
| vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vc2); |
| vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vc2); |
| vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vc2); |
| vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vc2); |
| vp4 = _mm256_add_ps(_mm256_mul_ps(vp4, vt4), vc2); |
| vp5 = _mm256_add_ps(_mm256_mul_ps(vp5, vt5), vc2); |
| |
| vp0 = _mm256_mul_ps(vp0, vt0); |
| vp1 = _mm256_mul_ps(vp1, vt1); |
| vp2 = _mm256_mul_ps(vp2, vt2); |
| vp3 = _mm256_mul_ps(vp3, vt3); |
| vp4 = _mm256_mul_ps(vp4, vt4); |
| vp5 = _mm256_mul_ps(vp5, vt5); |
| |
| vt0 = _mm256_mul_ps(vt0, vs0); |
| vs0 = _mm256_sub_ps(vs0, vone); |
| vt1 = _mm256_mul_ps(vt1, vs1); |
| vs1 = _mm256_sub_ps(vs1, vone); |
| vt2 = _mm256_mul_ps(vt2, vs2); |
| vs2 = _mm256_sub_ps(vs2, vone); |
| vt3 = _mm256_mul_ps(vt3, vs3); |
| vs3 = _mm256_sub_ps(vs3, vone); |
| vt4 = _mm256_mul_ps(vt4, vs4); |
| vs4 = _mm256_sub_ps(vs4, vone); |
| vt5 = _mm256_mul_ps(vt5, vs5); |
| vs5 = _mm256_sub_ps(vs5, vone); |
| |
| vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vt0); |
| vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vt1); |
| vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vt2); |
| vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vt3); |
| vp4 = _mm256_add_ps(_mm256_mul_ps(vp4, vt4), vt4); |
| vp5 = _mm256_add_ps(_mm256_mul_ps(vp5, vt5), vt5); |
| |
| const __m256 ve0 = _mm256_mul_ps(_mm256_add_ps(vp0, vs0), valpha); |
| vx0 = _mm256_mul_ps(vx0, vbeta); |
| const __m256 ve1 = _mm256_mul_ps(_mm256_add_ps(vp1, vs1), valpha); |
| vx1 = _mm256_mul_ps(vx1, vbeta); |
| const __m256 ve2 = _mm256_mul_ps(_mm256_add_ps(vp2, vs2), valpha); |
| vx2 = _mm256_mul_ps(vx2, vbeta); |
| const __m256 ve3 = _mm256_mul_ps(_mm256_add_ps(vp3, vs3), valpha); |
| vx3 = _mm256_mul_ps(vx3, vbeta); |
| const __m256 ve4 = _mm256_mul_ps(_mm256_add_ps(vp4, vs4), valpha); |
| vx4 = _mm256_mul_ps(vx4, vbeta); |
| const __m256 ve5 = _mm256_mul_ps(_mm256_add_ps(vp5, vs5), valpha); |
| vx5 = _mm256_mul_ps(vx5, vbeta); |
| |
| const __m256 vy0 = _mm256_blendv_ps(vx0, ve0, vx0); |
| const __m256 vy1 = _mm256_blendv_ps(vx1, ve1, vx1); |
| const __m256 vy2 = _mm256_blendv_ps(vx2, ve2, vx2); |
| const __m256 vy3 = _mm256_blendv_ps(vx3, ve3, vx3); |
| const __m256 vy4 = _mm256_blendv_ps(vx4, ve4, vx4); |
| const __m256 vy5 = _mm256_blendv_ps(vx5, ve5, vx5); |
| |
| _mm256_storeu_ps(y, vy0); |
| _mm256_storeu_ps(y + 8, vy1); |
| _mm256_storeu_ps(y + 16, vy2); |
| _mm256_storeu_ps(y + 24, vy3); |
| _mm256_storeu_ps(y + 32, vy4); |
| _mm256_storeu_ps(y + 40, vy5); |
| y += 48; |
| } |
| for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) { |
| __m256 vx = _mm256_loadu_ps(x); |
| x += 8; |
| |
| const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale)); |
| |
| __m256 vn = _mm256_add_ps(_mm256_mul_ps(vz, vlog2e), vmagic_bias); |
| __m256 ven = _mm256_andnot_ps(vindex_mask, vn); |
| const __m256 vl = _mm256_permutevar_ps(vtable, _mm256_castps_si256(vn)); |
| const __m128 ven_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(ven)), 21)); |
| vn = _mm256_sub_ps(vn, vmagic_bias); |
| const __m128 ven_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(ven, 1)), 21)); |
| |
| __m256 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_hi), vz); |
| ven = _mm256_insertf128_ps(_mm256_castps128_ps256(ven_lo), ven_hi, 1); |
| vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_lo), vt); |
| __m256 vs = _mm256_mul_ps(vl, ven); |
| |
| __m256 vp = _mm256_add_ps(_mm256_mul_ps(vc4, vt), vc3); |
| vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc2); |
| vp = _mm256_mul_ps(vp, vt); |
| |
| vt = _mm256_mul_ps(vt, vs); |
| vs = _mm256_sub_ps(vs, vone); |
| vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vt); |
| |
| const __m256 ve = _mm256_mul_ps(_mm256_add_ps(vp, vs), valpha); |
| vx = _mm256_mul_ps(vx, vbeta); |
| const __m256 vy = _mm256_blendv_ps(vx, ve, vx); |
| |
| _mm256_storeu_ps(y, vy); |
| y += 8; |
| } |
| if XNN_UNLIKELY(n != 0) { |
| assert(n >= 1 * sizeof(float)); |
| assert(n <= 7 * sizeof(float)); |
| const __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) ¶ms->avx_rr2_p6.mask_table[7] - n)); |
| |
| __m256 vx = _mm256_maskload_ps(x, vmask); |
| |
| const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale)); |
| |
| __m256 vn = _mm256_add_ps(_mm256_mul_ps(vz, vlog2e), vmagic_bias); |
| __m256 ven = _mm256_andnot_ps(vindex_mask, vn); |
| const __m256 vl = _mm256_permutevar_ps(vtable, _mm256_castps_si256(vn)); |
| const __m128 ven_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(ven)), 21)); |
| vn = _mm256_sub_ps(vn, vmagic_bias); |
| const __m128 ven_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(ven, 1)), 21)); |
| |
| __m256 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_hi), vz); |
| ven = _mm256_insertf128_ps(_mm256_castps128_ps256(ven_lo), ven_hi, 1); |
| vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_lo), vt); |
| __m256 vs = _mm256_mul_ps(vl, ven); |
| |
| __m256 vp = _mm256_add_ps(_mm256_mul_ps(vc4, vt), vc3); |
| vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc2); |
| vp = _mm256_mul_ps(vp, vt); |
| |
| vt = _mm256_mul_ps(vt, vs); |
| vs = _mm256_sub_ps(vs, vone); |
| vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vt); |
| |
| const __m256 ve = _mm256_mul_ps(_mm256_add_ps(vp, vs), valpha); |
| vx = _mm256_mul_ps(vx, vbeta); |
| const __m256 vy = _mm256_blendv_ps(vx, ve, vx); |
| |
| __m128 vy_lo = _mm256_castps256_ps128(vy); |
| if (n & (4 * sizeof(float))) { |
| _mm_storeu_ps(y, vy_lo); |
| vy_lo = _mm256_extractf128_ps(vy, 1); |
| y += 4; |
| } |
| if (n & (2 * sizeof(float))) { |
| _mm_storel_pi((__m64*) y, vy_lo); |
| vy_lo = _mm_movehl_ps(vy_lo, vy_lo); |
| y += 2; |
| } |
| if (n & (1 * sizeof(float))) { |
| _mm_store_ss(y, vy_lo); |
| } |
| } |
| } |