# Copyright 2019 Google LLC
#
# This source code is licensed under the BSD-style license found in the
# LICENSE file in the root directory of this source tree.
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x4
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x8
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x8_acc2
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x12
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x12_acc2
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x12_acc3
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x16
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x16_acc2
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x16_acc4
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x20
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x20_acc2
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x20_acc5
  init: xnn_init_f32_expminus_neon_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x4
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x8
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x8_acc2
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x12
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x12_acc2
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x12_acc3
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x16
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x16_acc2
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x16_acc4
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x20
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x20_acc2
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x20_acc5
  init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x4
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x8
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x8_acc2
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x12
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x12_acc2
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x12_acc3
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x16
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x16_acc2
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x16_acc4
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x20
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x20_acc2
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x20_acc5
  init: xnn_init_f32_expminus_neonfma_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x4
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x8
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x8_acc2
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x12
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x12_acc2
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x12_acc3
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x16
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x16_acc2
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x16_acc4
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x20
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x20_acc2
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x20_acc5
  init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x4
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x8
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x8_acc2
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x12
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x12_acc2
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x12_acc3
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x16
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x16_acc2
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x16_acc4
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x20
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x20_acc2
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x20_acc5
  init: xnn_init_f32_expminus_sse2_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x64
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x64_acc2
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x64_acc4
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x72
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x72_acc3
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x80
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x80_acc2
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x80_acc5
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x96
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x96_acc2
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x96_acc3
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x96_acc6
  init: xnn_init_f32_expminus_avx2_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x128
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x128_acc2
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x128_acc4
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x144
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x144_acc3
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x160
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x160_acc2
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x160_acc5
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x192
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x192_acc2
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x192_acc3
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x192_acc6
  init: xnn_init_f32_expminus_avx512_rr1_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x4
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x8
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x8_acc2
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x12
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x12_acc2
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x12_acc3
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x16
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x16_acc2
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x16_acc4
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x20
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x20_acc2
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x20_acc5
  init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x1
  init: xnn_init_f32_expminus_scalar_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x2
  init: xnn_init_f32_expminus_scalar_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x2_acc2
  init: xnn_init_f32_expminus_scalar_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x4
  init: xnn_init_f32_expminus_scalar_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x4_acc2
  init: xnn_init_f32_expminus_scalar_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x4_acc4
  init: xnn_init_f32_expminus_scalar_rr2_p5_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x1
  init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x2
  init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x2_acc2
  init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x4
  init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x4_acc2
  init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x4_acc4
  init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params