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gerrit-public.fairphone.software / platform / external / XNNPACK / 0d3f4670b3862e9a9a2f6127205b1becfac25eac / . / BUILD.bazel
blob: 37fd5d26b75dc04313249d30fbe01058be18b6d0 [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]19 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]20 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]23MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]26 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]27 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]32ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]39MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]40 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]41 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]42 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]47OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]48 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]49 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]53OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]54 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]57 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]58 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]59 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
62 "src/operators/fully-connected-nc.c",
63 "src/operators/global-average-pooling-ncw.c",
64 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]65 "src/operators/leaky-relu-nc.c",
66 "src/operators/max-pooling-nhwc.c",
67 "src/operators/prelu-nc.c",
68 "src/operators/resize-bilinear-nhwc.c",
69 "src/operators/sigmoid-nc.c",
70 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]71 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]72 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]73]
74
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]75SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]76 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]77 "src/subgraph/add2.c",
78 "src/subgraph/argmax-pooling-2d.c",
79 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]80 "src/subgraph/bankers-rounding.c",
81 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]82 "src/subgraph/clamp.c",
83 "src/subgraph/convolution-2d.c",
84 "src/subgraph/deconvolution-2d.c",
85 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]86 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]87 "src/subgraph/fully-connected.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]88 "src/subgraph/floor.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]89 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]90 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]91 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]92 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]93 "src/subgraph/maximum2.c",
94 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]95 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]96 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]97 "src/subgraph/prelu.c",
98 "src/subgraph/sigmoid.c",
99 "src/subgraph/softmax.c",
100 "src/subgraph/static-constant-pad.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]101 "src/subgraph/square.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]102 "src/subgraph/squared-difference.c",
103 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]104 "src/subgraph/unpooling-2d.c",
105]
106
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]107TABLE_SRCS = [
108 "src/tables/exp2-k-over-64.c",
109 "src/tables/exp2-k-over-2048.c",
110]
111
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]112SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]113 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]114 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]115 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]116 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
117 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]118 "src/f32-clamp/gen/scalar-x1.c",
119 "src/f32-clamp/gen/scalar-x2.c",
120 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]121 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]122 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]123 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
124 "src/f32-dwconv-chw/3x3p1-scalar.c",
125 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
126 "src/f32-dwconv-chw/5x5p2-scalar.c",
127 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]128 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
129 "src/f32-dwconv/gen/up1x4-scalar.c",
130 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
131 "src/f32-dwconv/gen/up1x9-scalar.c",
132 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
133 "src/f32-dwconv/gen/up1x25-scalar.c",
134 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
135 "src/f32-dwconv/gen/up2x4-scalar.c",
136 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
137 "src/f32-dwconv/gen/up2x9-scalar.c",
138 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
139 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]140 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
142 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
143 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]144 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]150 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
151 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]152 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]153 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
154 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]155 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
156 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
157 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]158 "src/f32-gemm/gen/1x4-scalar.c",
159 "src/f32-gemm/gen/2x4-scalar.c",
160 "src/f32-gemm/gen/4x2-scalar.c",
161 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]162 "src/f32-gemm/gen/1x4-relu-scalar.c",
163 "src/f32-gemm/gen/2x4-relu-scalar.c",
164 "src/f32-gemm/gen/4x2-relu-scalar.c",
165 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]166 "src/f32-gemm/gen/1x4-minmax-scalar.c",
167 "src/f32-gemm/gen/2x4-minmax-scalar.c",
168 "src/f32-gemm/gen/4x2-minmax-scalar.c",
169 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]170 "src/f32-hswish/gen/scalar-x1.c",
171 "src/f32-hswish/gen/scalar-x2.c",
172 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]173 "src/f32-ibilinear/gen/scalar-c1.c",
174 "src/f32-ibilinear/gen/scalar-c2.c",
175 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]176 "src/f32-igemm/gen/1x4-scalar.c",
177 "src/f32-igemm/gen/2x4-scalar.c",
178 "src/f32-igemm/gen/4x2-scalar.c",
179 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]180 "src/f32-igemm/gen/1x4-relu-scalar.c",
181 "src/f32-igemm/gen/2x4-relu-scalar.c",
182 "src/f32-igemm/gen/4x2-relu-scalar.c",
183 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]184 "src/f32-igemm/gen/1x4-minmax-scalar.c",
185 "src/f32-igemm/gen/2x4-minmax-scalar.c",
186 "src/f32-igemm/gen/4x2-minmax-scalar.c",
187 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]188 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
189 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
190 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]191 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
192 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
193 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
194 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]195 "src/f32-prelu/gen/scalar-2x1.c",
196 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]197 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
200 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
201 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
202 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
203 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
204 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
205 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
206 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
207 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
208 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]209 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]210 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
211 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
212 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
213 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
214 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
215 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
216 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
217 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
218 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]219 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
220 "src/f32-spmm/gen/1x1-minmax-scalar.c",
221 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
222 "src/f32-spmm/gen/2x1-minmax-scalar.c",
223 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
224 "src/f32-spmm/gen/4x1-minmax-scalar.c",
225 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
226 "src/f32-spmm/gen/8x1-minmax-scalar.c",
227 "src/f32-spmm/gen/8x2-minmax-scalar.c",
228 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]229 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
236 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
237 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
238 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
239 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
240 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]241 "src/f32-vbinary/gen/vmax-scalar-x1.c",
242 "src/f32-vbinary/gen/vmax-scalar-x2.c",
243 "src/f32-vbinary/gen/vmax-scalar-x4.c",
244 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
245 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
246 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
247 "src/f32-vbinary/gen/vmin-scalar-x1.c",
248 "src/f32-vbinary/gen/vmin-scalar-x2.c",
249 "src/f32-vbinary/gen/vmin-scalar-x4.c",
250 "src/f32-vbinary/gen/vminc-scalar-x1.c",
251 "src/f32-vbinary/gen/vminc-scalar-x2.c",
252 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]253 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
259 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
260 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
261 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]262 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x1.c",
263 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x2.c",
264 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]265 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
266 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
267 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]268 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
269 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
270 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
271 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
272 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
273 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]274 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
275 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
276 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
277 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
278 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
279 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]280 "src/f32-vlrelu/gen/scalar-x1.c",
281 "src/f32-vlrelu/gen/scalar-x2.c",
282 "src/f32-vlrelu/gen/scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]283 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
284 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
285 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]286 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
287 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
288 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
289 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
290 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
291 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
292 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
293 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
294 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
295 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
296 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
297 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]298 "src/f32-vunary/gen/vabs-scalar-x1.c",
299 "src/f32-vunary/gen/vabs-scalar-x2.c",
300 "src/f32-vunary/gen/vabs-scalar-x4.c",
301 "src/f32-vunary/gen/vneg-scalar-x1.c",
302 "src/f32-vunary/gen/vneg-scalar-x2.c",
303 "src/f32-vunary/gen/vneg-scalar-x4.c",
304 "src/f32-vunary/gen/vsqr-scalar-x1.c",
305 "src/f32-vunary/gen/vsqr-scalar-x2.c",
306 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]307 "src/math/expminus-scalar-lut2048-p1.c",
308 "src/math/expminus-scalar-lut64-p2.c",
309 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]310 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]311 "src/math/roundne-scalar-nearbyint.c",
312 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]313 "src/math/roundd-scalar-addsub.c",
314 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]315 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]316 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]317 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]318 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]319 "src/math/roundz-scalar-addsub.c",
320 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]321 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]322 "src/math/sigmoid-scalar-lut2048-p1-div.c",
323 "src/math/sigmoid-scalar-lut64-p2-div.c",
324 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]325 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
326 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]327 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]328 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
329 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]330 "src/q8-gemm/2x2-minmax-scalar.c",
331 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]332 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]333 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]334 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]335 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]336 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]337 "src/x32-fill/scalar-float.c",
338 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]339 "src/x32-packx/x2-scalar.c",
340 "src/x32-packx/x3-scalar.c",
341 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]342 "src/x32-pad/scalar-int.c",
343 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]344 "src/x32-unpool/scalar.c",
345 "src/x32-zip/x2-scalar.c",
346 "src/x32-zip/x3-scalar.c",
347 "src/x32-zip/x4-scalar.c",
348 "src/x32-zip/xm-scalar.c",
349 "src/x8-lut/scalar.c",
350 "src/x8-zip/x2-scalar.c",
351 "src/x8-zip/x3-scalar.c",
352 "src/x8-zip/x4-scalar.c",
353 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]354 "src/requantization/precise-scalar.c",
355 "src/requantization/fp32-scalar.c",
356 "src/requantization/q31-scalar.c",
357 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]358]
359
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]360WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]361 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
362 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]363 "src/f32-clamp/gen/wasm-x1.c",
364 "src/f32-clamp/gen/wasm-x2.c",
365 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]366 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
367 "src/f32-dwconv/gen/up1x4-wasm.c",
368 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
369 "src/f32-dwconv/gen/up1x9-wasm.c",
370 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
371 "src/f32-dwconv/gen/up1x25-wasm.c",
372 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
373 "src/f32-dwconv/gen/up2x4-wasm.c",
374 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
375 "src/f32-dwconv/gen/up2x9-wasm.c",
376 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
377 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]378 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
379 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
380 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
381 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]382 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
383 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]384 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
385 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
386 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
387 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]388 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
389 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]390 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
391 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]392 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
393 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
394 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]395 "src/f32-gemm/gen/1x4-wasm.c",
396 "src/f32-gemm/gen/2x4-wasm.c",
397 "src/f32-gemm/gen/4x2-wasm.c",
398 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]399 "src/f32-gemm/gen/1x4-relu-wasm.c",
400 "src/f32-gemm/gen/2x4-relu-wasm.c",
401 "src/f32-gemm/gen/4x2-relu-wasm.c",
402 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]403 "src/f32-gemm/gen/1x4-minmax-wasm.c",
404 "src/f32-gemm/gen/2x4-minmax-wasm.c",
405 "src/f32-gemm/gen/4x2-minmax-wasm.c",
406 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]407 "src/f32-hswish/gen/wasm-x1.c",
408 "src/f32-hswish/gen/wasm-x2.c",
409 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]410 "src/f32-igemm/gen/1x4-wasm.c",
411 "src/f32-igemm/gen/2x4-wasm.c",
412 "src/f32-igemm/gen/4x2-wasm.c",
413 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]414 "src/f32-igemm/gen/1x4-relu-wasm.c",
415 "src/f32-igemm/gen/2x4-relu-wasm.c",
416 "src/f32-igemm/gen/4x2-relu-wasm.c",
417 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]418 "src/f32-igemm/gen/1x4-minmax-wasm.c",
419 "src/f32-igemm/gen/2x4-minmax-wasm.c",
420 "src/f32-igemm/gen/4x2-minmax-wasm.c",
421 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]422 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
423 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
424 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700[diff] [blame]425 "src/f32-prelu/gen/wasm-2x1.c",
426 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]427 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
428 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
429 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
430 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
431 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
432 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
433 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
434 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
435 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
436 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
437 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
438 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]439 "src/f32-vbinary/gen/vmax-wasm-x1.c",
440 "src/f32-vbinary/gen/vmax-wasm-x2.c",
441 "src/f32-vbinary/gen/vmax-wasm-x4.c",
442 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
443 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
444 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
445 "src/f32-vbinary/gen/vmin-wasm-x1.c",
446 "src/f32-vbinary/gen/vmin-wasm-x2.c",
447 "src/f32-vbinary/gen/vmin-wasm-x4.c",
448 "src/f32-vbinary/gen/vminc-wasm-x1.c",
449 "src/f32-vbinary/gen/vminc-wasm-x2.c",
450 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]451 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
452 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
453 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
454 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
455 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
456 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
457 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
458 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
459 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
460 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
461 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
462 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
463 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
464 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
465 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
466 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
467 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
468 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]469 "src/f32-vlrelu/gen/wasm-x1.c",
470 "src/f32-vlrelu/gen/wasm-x2.c",
471 "src/f32-vlrelu/gen/wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]472 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
473 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
474 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]475]
476
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]477WASMSIMD_UKERNELS = [
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]478 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
479 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
480 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
481 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
482 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
483 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700[diff] [blame]484 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-arm.c",
485 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
486 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-arm.c",
487 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
488 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-arm.c",
489 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
490 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-arm.c",
491 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
492 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-arm.c",
493 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
494 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-arm.c",
495 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
496 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-x86.c",
497 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
498 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-x86.c",
499 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
500 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-x86.c",
501 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
502 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-x86.c",
503 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
504 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-x86.c",
505 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
506 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-x86.c",
507 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]508 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
509 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
510 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
511 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-arm.c",
512 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat-arm.c",
513 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-x86.c",
514 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]515 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
516 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
517 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
518 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
519 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
520 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
521 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
522 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
523 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
524 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
525 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
526 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
527 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
528 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
529 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
530 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
531 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
532 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
533 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
534 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
535 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
536 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
537 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
538 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
539 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
540 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
541 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
542 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
543 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
544 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
545 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-arm.c",
546 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-arm.c",
547 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
548 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-arm.c",
549 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-arm.c",
550 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
551 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-arm.c",
552 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-arm.c",
553 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
554 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-arm.c",
555 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-arm.c",
556 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
557 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-arm.c",
558 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-arm.c",
559 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
560 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-x86.c",
561 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-x86.c",
562 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
563 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-x86.c",
564 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-x86.c",
565 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
566 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-x86.c",
567 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-x86.c",
568 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
569 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-x86.c",
570 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-x86.c",
571 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
572 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-x86.c",
573 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-x86.c",
574 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]575 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
576 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
577 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
578 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-arm.c",
579 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat-arm.c",
580 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-x86.c",
581 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]582 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
583 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
584 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
585 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
586 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
587 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
588 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
589 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
590 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
591 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
592 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
593 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
594 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
595 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
596 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
597 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
598 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
599 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
600 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
601 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
602 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
603 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
604 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
605 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
606 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
607 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
608 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
609 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
610 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
611 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -0700[diff] [blame]612 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
613 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
614 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
615 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Marat Dukhand3f3d872020-06-24 13:08:25 -0700[diff] [blame]616 "src/math/roundne-wasmsimd-addsub.c",
617 "src/math/roundd-wasmsimd-addsub.c",
618 "src/math/roundu-wasmsimd-addsub.c",
619 "src/math/roundz-wasmsimd-addsub.c",
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]620 "src/requantization/fp32-wasmsimd.c",
621]
622
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]623PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]624 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]625 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]626 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]627 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
628 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]629 "src/f32-clamp/gen/psimd-x4.c",
630 "src/f32-clamp/gen/psimd-x8.c",
Erich Elsen0a1970e2020-06-10 09:24:59 -0700[diff] [blame]631 "src/f32-conv-hwc2chw/3x3s2p1c3x4-psimd-2x2.c",
Erich Elsene6214af2020-06-10 22:17:22 -0700[diff] [blame]632 "src/f32-dwconv-chw/3x3p1-psimd.c",
Erich Elsenfd7a6e32020-06-11 12:04:44 -0700[diff] [blame]633 "src/f32-dwconv-chw/3x3s2p1-psimd.c",
Erich Elsen28928892020-06-12 08:08:19 -0700[diff] [blame]634 "src/f32-dwconv-chw/5x5p2-psimd.c",
Erich Elsen7465a892020-06-13 14:02:04 -0700[diff] [blame]635 "src/f32-dwconv-chw/5x5s2p2-psimd.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]636 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
637 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
638 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
639 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
640 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
641 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
642 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
643 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
644 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
645 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
646 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
647 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Erich Elsen6f278b52020-06-10 16:13:11 -0700[diff] [blame]648 "src/f32-gavgpool-cw/psimd-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]649 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
650 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]651 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
652 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
653 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
654 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
655 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
656 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
657 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
658 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
659 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
660 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
661 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
662 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
663 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
664 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
665 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
666 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
667 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
668 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
669 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]670 "src/f32-hswish/gen/psimd-x4.c",
671 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]672 "src/f32-ibilinear/gen/psimd-c4.c",
673 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]674 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
675 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
676 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
677 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
678 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
679 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
680 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
681 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
682 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
683 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]684 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]685 "src/f32-spmm/gen/4x1-minmax-psimd.c",
686 "src/f32-spmm/gen/8x1-minmax-psimd.c",
687 "src/f32-spmm/gen/16x1-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]688 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
689 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]690 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]691 "src/f32-prelu/gen/psimd-2x4.c",
692 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]693 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]694 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
695 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
696 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
697 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
698 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
699 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
700 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
701 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]702 "src/f32-vbinary/gen/vmax-psimd-x4.c",
703 "src/f32-vbinary/gen/vmax-psimd-x8.c",
704 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
705 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
706 "src/f32-vbinary/gen/vmin-psimd-x4.c",
707 "src/f32-vbinary/gen/vmin-psimd-x8.c",
708 "src/f32-vbinary/gen/vminc-psimd-x4.c",
709 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]710 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
711 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
712 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
713 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
714 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
715 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]716 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x4.c",
717 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]718 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
719 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]720 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
721 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
722 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
723 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]724 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
725 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
726 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
727 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]728 "src/f32-vlrelu/gen/psimd-x4.c",
729 "src/f32-vlrelu/gen/psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]730 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
731 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]732 "src/f32-vunary/gen/vabs-psimd-x4.c",
733 "src/f32-vunary/gen/vabs-psimd-x8.c",
734 "src/f32-vunary/gen/vneg-psimd-x4.c",
735 "src/f32-vunary/gen/vneg-psimd-x8.c",
736 "src/f32-vunary/gen/vsqr-psimd-x4.c",
737 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]738 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]739 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]740 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]741 "src/x32-unpool/psimd.c",
742 "src/x32-zip/x2-psimd.c",
743 "src/x32-zip/x3-psimd.c",
744 "src/x32-zip/x4-psimd.c",
745 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]746 "src/requantization/precise-psimd.c",
747 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]748]
749
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]750PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]751 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
752 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
753 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
754 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
755 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
756 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
757 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
758 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
759 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
760 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
761 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
762 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]763 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
764 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
765 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
766 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
767 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
768 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]769 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
770 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
771 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
772 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
773 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
774 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
775 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
776 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]777 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]778 "src/math/roundd-psimd-addsub.c",
779 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]780 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]781 "src/math/sigmoid-psimd-p5-div.c",
782]
783
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]784# ISA-specific micro-kernels
785NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]786 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
787 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]788 "src/f32-clamp/gen/neon-x4.c",
789 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]790 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
791 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]792 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
793 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]794 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
795 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]796 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
797 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]798 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
799 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
800 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
801 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]802 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
803 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
804 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
805 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]806 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
807 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
808 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
809 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]810 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]811 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
812 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]813 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
814 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
815 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
816 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
817 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
818 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
819 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
820 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
821 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
822 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
823 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
824 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
825 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
826 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
827 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
828 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
829 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
830 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
831 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
832 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
833 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
834 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
835 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
836 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
837 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
838 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
839 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
840 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
841 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
842 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
843 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]844 "src/f32-hswish/gen/neon-x4.c",
845 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]846 "src/f32-ibilinear/gen/neon-c4.c",
847 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]848 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
849 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
850 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
851 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
852 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
853 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
854 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
855 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
856 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
857 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
858 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
859 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
860 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
861 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
862 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
863 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]864 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
865 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
866 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]867 "src/f32-ppmm/gen/4x8-minmax-neon.c",
868 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]869 "src/f32-prelu/gen/neon-2x4.c",
870 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]871 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
872 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
873 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
874 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
875 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
876 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
877 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
878 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
879 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
880 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
881 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
882 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
883 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
884 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
885 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
886 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
887 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
888 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
889 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
890 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
891 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
892 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
893 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
894 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]895 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]896 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]897 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
898 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
899 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
900 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
901 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
902 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
903 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
904 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
905 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
906 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
907 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
908 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
909 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
910 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
911 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
912 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
913 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
914 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]915 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
916 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
917 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
918 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]919 "src/f32-vbinary/gen/vmax-neon-x4.c",
920 "src/f32-vbinary/gen/vmax-neon-x8.c",
921 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
922 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
923 "src/f32-vbinary/gen/vmin-neon-x4.c",
924 "src/f32-vbinary/gen/vmin-neon-x8.c",
925 "src/f32-vbinary/gen/vminc-neon-x4.c",
926 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]927 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
928 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
929 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
930 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]931 "src/f32-vbinary/gen/vrsqrdiffc-neon-x4.c",
932 "src/f32-vbinary/gen/vrsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]933 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
934 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]935 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
936 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
937 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
938 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]939 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
940 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
941 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
942 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]943 "src/f32-vlrelu/gen/neon-x4.c",
944 "src/f32-vlrelu/gen/neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]945 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
946 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]947 "src/f32-vrnd/gen/vrndne-neon-x4.c",
948 "src/f32-vrnd/gen/vrndne-neon-x8.c",
949 "src/f32-vrnd/gen/vrndz-neon-x4.c",
950 "src/f32-vrnd/gen/vrndz-neon-x8.c",
951 "src/f32-vrnd/gen/vrndu-neon-x4.c",
952 "src/f32-vrnd/gen/vrndu-neon-x8.c",
953 "src/f32-vrnd/gen/vrndd-neon-x4.c",
954 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]955 "src/f32-vunary/gen/vabs-neon-x4.c",
956 "src/f32-vunary/gen/vabs-neon-x8.c",
957 "src/f32-vunary/gen/vneg-neon-x4.c",
958 "src/f32-vunary/gen/vneg-neon-x8.c",
959 "src/f32-vunary/gen/vsqr-neon-x4.c",
960 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]961 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
962 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]963 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]964 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
965 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]966 "src/q8-gemm/4x8-minmax-neon.c",
967 "src/q8-gemm/8x8-minmax-neon.c",
968 "src/q8-igemm/4x8-minmax-neon.c",
969 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]970 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]971 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]972 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]973 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]974 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]975 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]976 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]977 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]978 "src/x32-zip/x2-neon.c",
979 "src/x32-zip/x3-neon.c",
980 "src/x32-zip/x4-neon.c",
981 "src/x32-zip/xm-neon.c",
982 "src/x8-zip/x2-neon.c",
983 "src/x8-zip/x3-neon.c",
984 "src/x8-zip/x4-neon.c",
985 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]986 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]987 "src/math/roundd-neon-addsub.c",
988 "src/math/roundd-neon-cvt.c",
989 "src/math/roundu-neon-addsub.c",
990 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]991 "src/math/roundz-neon-addsub.c",
992 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]993 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]994 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
995 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
996 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
997 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
998 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
999 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1000 "src/requantization/precise-neon.c",
1001 "src/requantization/fp32-neon.c",
1002 "src/requantization/q31-neon.c",
1003 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1004]
1005
1006NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1007 "src/f32-ibilinear/gen/neonfma-c4.c",
1008 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1009 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1010 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1011 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1012 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1013 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1014 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
1015 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
1016 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1017 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1018 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1019 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1020 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1021 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1022 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1023 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1024 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1025 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1026 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1027 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1028 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1029 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1030 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1031 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1032 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1033 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1034 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1035 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1036 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1037 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1038 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
1039 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1040 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1041 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1042 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1043 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1044 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1045 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1046 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1047 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1048 "src/f32-hswish/gen/neonfma-x4.c",
1049 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1050 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1051 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1052 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1053 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1054 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1055 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1056 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1057 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1058 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1059 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1060 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1061 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
1062 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1063 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1064 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
1065 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
1066 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
1067 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
1068 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1069 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
1070 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
1071 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1072 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
1073 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1074 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1075 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1076 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
1077 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
1078 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
1079 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
1080 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
1081 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
1082 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
1083 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
1084 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
1085 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
1086 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
1087 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
1088 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
1089 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
1090 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
1091 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
1092 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
1093 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
1094 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
1095 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
1096 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
1097 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
1098 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
1099 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
1100 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
1101 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
1102 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
1103 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
1104 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
1105 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
1106 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
1107 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
1108 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
1109 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
1110 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
1111 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
1112 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
1113 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
1114 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
1115 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
1116 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
1117 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
1118 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
1119 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
1120 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
1121 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
1122 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
1123 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
1124 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
1125 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
1126 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
1127 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
1128 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
1129 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1130 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
1131 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]1132 "src/math/exp-neonfma-lut64-p2.c",
1133 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]1134 "src/math/expminus-neonfma-lut2048-p1.c",
1135 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]1136 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1137 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
1138 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
1139 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
1140 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
1141 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
1142 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
1143 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
1144 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
1145 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
1146 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
1147 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
1148 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
1149 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
1150 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
1151 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
1152 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
1153 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
1154 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1155]
1156
1157AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1158 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
1159 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
1160 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
1161 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
1162 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
1163 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1164 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1165 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1166 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1167 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1168 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
1169 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1170 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
1171 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
1172 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
1173 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
1174 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
1175 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1176 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1177 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1178 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1179 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1180 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1181 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1182 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1183 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1184 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1185 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1186 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1187 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1188 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1189 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1190 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1191 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1192 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1193 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1194 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1195 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1196 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1197 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1198 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1199 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
1200 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
1201 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
1202 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
1203 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
1204 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
1205 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1206 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1207 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1208 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1209 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1210 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1211 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1212 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1213 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1214 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1215 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1216 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1217 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1218 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1219 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1220 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1221 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1222 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1223 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1224 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1225 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1226 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1227 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1228 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1229 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1230 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1231 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1232 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1233 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1234 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1235 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1236 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1237 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1238 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1239]
1240
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1241NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1242 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1243 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1244 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1245 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1246 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1247 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1248 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1249 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1250 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1251 "src/math/roundd-neonv8.c",
1252 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1253 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1254]
1255
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1256AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1257 "src/f16-clamp/gen/neonfp16arith-x16.c",
1258 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1259 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1260 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1261 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1262 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1263 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1264 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1265 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1266 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1267 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1268 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1269 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1270 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1271 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1272 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1273 "src/f16-hswish/gen/neonfp16arith-x16.c",
1274 "src/f16-hswish/gen/neonfp16arith-x8.c",
1275 "src/f16-prelu/gen/neonfp16arith-2x16.c",
1276 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1277 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
1278 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
1279 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1280 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1281 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1282 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1283 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
1284 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
1285 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
1286 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
1287 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1288 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1289 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
1290 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
1291 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1292 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1293 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1294 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1295 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1296 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1297 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1298 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1299 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1300 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1301 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1302 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1303 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1304 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1305 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1306 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1307 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1308 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1309 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1310 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1311 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1312 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1313 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1314 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1315 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1316 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1317 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1318 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1319 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1320 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1321 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1322 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1323 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1324 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1325 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1326 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1327 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1328 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1329 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1330 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1331 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1332 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1333 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1334 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1335 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1336 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1337 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1338 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1339]
1340
1341SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1342 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1343 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1344 "src/f32-clamp/gen/sse-x4.c",
1345 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1346 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1347 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1348 "src/f32-dwconv-chw/3x3p1-sse.c",
1349 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1350 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1351 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1352 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1353 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1354 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1355 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1356 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1357 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1358 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1359 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1360 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1361 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1362 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1363 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1364 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1365 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1366 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1367 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1368 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1369 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1370 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1371 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1372 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1373 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1374 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1375 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1376 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1377 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1378 "src/f32-hswish/gen/sse-x4.c",
1379 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1380 "src/f32-ibilinear/gen/sse-c4.c",
1381 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1382 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1383 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1384 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1385 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1386 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1387 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1388 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1389 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1390 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1391 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1392 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -0700[diff] [blame]1393 "src/f32-prelu/gen/sse-2x4.c",
1394 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1395 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1396 "src/f32-spmm/gen/4x1-minmax-sse.c",
1397 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]1398 "src/f32-spmm/gen/16x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1399 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1400 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1401 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1402 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1403 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1404 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1405 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1406 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1407 "src/f32-vbinary/gen/vmax-sse-x4.c",
1408 "src/f32-vbinary/gen/vmax-sse-x8.c",
1409 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1410 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1411 "src/f32-vbinary/gen/vmin-sse-x4.c",
1412 "src/f32-vbinary/gen/vmin-sse-x8.c",
1413 "src/f32-vbinary/gen/vminc-sse-x4.c",
1414 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1415 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1416 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1417 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1418 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1419 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1420 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1421 "src/f32-vbinary/gen/vrsqrdiffc-sse-x4.c",
1422 "src/f32-vbinary/gen/vrsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1423 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1424 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1425 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1426 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1427 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1428 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1429 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1430 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1431 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1432 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1433 "src/f32-vlrelu/gen/sse-x4.c",
1434 "src/f32-vlrelu/gen/sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1435 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1436 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1437 "src/f32-vunary/gen/vabs-sse-x4.c",
1438 "src/f32-vunary/gen/vabs-sse-x8.c",
1439 "src/f32-vunary/gen/vneg-sse-x4.c",
1440 "src/f32-vunary/gen/vneg-sse-x8.c",
1441 "src/f32-vunary/gen/vsqr-sse-x4.c",
1442 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1443 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1444 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1445 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1446 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1447 "src/math/roundd-sse-addsub.c",
1448 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1449 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1450]
1451
1452SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1453 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1454 "src/f32-argmaxpool/4x-sse2-c4.c",
1455 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1456 "src/f32-prelu/gen/sse2-2x4.c",
1457 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1458 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1459 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1460 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1461 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1462 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1463 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1464 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1465 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1466 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1467 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1468 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1469 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1470 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1471 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1472 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1473 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1474 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1475 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhan0d3f4672020-06-25 16:42:58 -0700[diff] [blame^]1476 "src/f32-vlrelu/gen/sse2-x4.c",
1477 "src/f32-vlrelu/gen/sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1478 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1479 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1480 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1481 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1482 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1483 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1484 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1485 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1486 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1487 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1488 "src/q8-igemm/4x4c2-minmax-sse2.c",
1489 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1490 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1491 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1492 "src/q8-gemm/2x4c8-minmax-sse2.c",
1493 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1494 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1495 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1496 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1497 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1498 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1499 "src/x32-zip/x2-sse2.c",
1500 "src/x32-zip/x3-sse2.c",
1501 "src/x32-zip/x4-sse2.c",
1502 "src/x32-zip/xm-sse2.c",
1503 "src/x8-zip/x2-sse2.c",
1504 "src/x8-zip/x3-sse2.c",
1505 "src/x8-zip/x4-sse2.c",
1506 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1507 "src/math/exp-sse2-p5.c",
1508 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1509 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1510 "src/math/roundd-sse2-cvt.c",
1511 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1512 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1513 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1514 "src/requantization/precise-sse2.c",
1515 "src/requantization/fp32-sse2.c",
1516 "src/requantization/q31-sse2.c",
1517 "src/requantization/gemmlowp-sse2.c",
1518]
1519
1520SSSE3_UKERNELS = [
1521 "src/requantization/precise-ssse3.c",
1522 "src/requantization/q31-ssse3.c",
1523 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1524]
1525
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1526SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1527 "src/f32-prelu/gen/sse41-2x4.c",
1528 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1529 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1530 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1531 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1532 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1533 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1534 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhan0d3f4672020-06-25 16:42:58 -0700[diff] [blame^]1535 "src/f32-vlrelu/gen/sse41-x4.c",
1536 "src/f32-vlrelu/gen/sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1537 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1538 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1539 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1540 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1541 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1542 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1543 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1544 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1545 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1546 "src/math/roundd-sse41.c",
1547 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1548 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1549 "src/requantization/precise-sse4.c",
1550 "src/requantization/q31-sse4.c",
1551 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1552]
1553
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1554AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1555 "src/f32-clamp/gen/avx-x8.c",
1556 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1557 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1558 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1559 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1560 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1561 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1562 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1563 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1564 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1565 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1566 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1567 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1568 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1569 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1570 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1571 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1572 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1573 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1574 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1575 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1576 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1577 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1578 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1579 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1580 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1581 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1582 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1583 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1584 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1585 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1586 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1587 "src/f32-hswish/gen/avx-x8.c",
1588 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1589 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1590 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1591 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1592 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1593 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1594 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1595 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1596 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1597 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1598 "src/f32-prelu/gen/avx-2x8.c",
1599 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1600 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1601 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1602 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1603 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1604 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1605 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1606 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1607 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1608 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1609 "src/f32-vbinary/gen/vmax-avx-x8.c",
1610 "src/f32-vbinary/gen/vmax-avx-x16.c",
1611 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1612 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1613 "src/f32-vbinary/gen/vmin-avx-x8.c",
1614 "src/f32-vbinary/gen/vmin-avx-x16.c",
1615 "src/f32-vbinary/gen/vminc-avx-x8.c",
1616 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1617 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1618 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1619 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1620 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1621 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1622 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1623 "src/f32-vbinary/gen/vrsqrdiffc-avx-x8.c",
1624 "src/f32-vbinary/gen/vrsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1625 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1626 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1627 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1628 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1629 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
1630 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1631 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1632 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1633 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1634 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1635 "src/f32-vlrelu/gen/avx-x8.c",
1636 "src/f32-vlrelu/gen/avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1637 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1638 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1639 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1640 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1641 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1642 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1643 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1644 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1645 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1646 "src/f32-vunary/gen/vabs-avx-x8.c",
1647 "src/f32-vunary/gen/vabs-avx-x16.c",
1648 "src/f32-vunary/gen/vneg-avx-x8.c",
1649 "src/f32-vunary/gen/vneg-avx-x16.c",
1650 "src/f32-vunary/gen/vsqr-avx-x8.c",
1651 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1652]
1653
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1654FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1655 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
1656 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
1657 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
1658 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
1659 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
1660 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
1661 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
1662 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
1663 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
1664 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
1665 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
1666 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
1667 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1668 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1669 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
1670 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
1671 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
1672 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
1673 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
1674 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
1675 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
1676 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
1677 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
1678 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
1679 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
1680 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
1681 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
1682 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
1683 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
1684 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
1685 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
1686 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1687 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1688 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1689 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1690 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1691 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1692 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1693 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
1694 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1695 "src/f32-hswish/gen/fma3-x8.c",
1696 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1697 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1698 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1699 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1700 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1701 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1702 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
1703 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
1704 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1705 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1706 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1707 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1708 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1709 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1710 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1711]
1712
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1713AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1714 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
1715 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
1716 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
1717 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
1718 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
1719 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
1720 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
1721 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
1722 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
1723 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
1724 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
1725 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
1726 "src/f32-raddextexp/gen/avx2-p5-x64.c",
1727 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
1728 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
1729 "src/f32-raddextexp/gen/avx2-p5-x72.c",
1730 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
1731 "src/f32-raddextexp/gen/avx2-p5-x80.c",
1732 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
1733 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
1734 "src/f32-raddextexp/gen/avx2-p5-x96.c",
1735 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
1736 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
1737 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
1738 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
1739 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1740 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1741 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1742 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1743 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1744 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1745 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1746 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1747 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1748 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1749 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1750 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1751 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1752 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1753 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1754 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1755 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1756 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1757 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1758 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1759 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1760 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1761 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1762 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1763 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1764 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1765 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1766 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1767 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1768 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1769 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1770 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1771 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1772 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1773 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1774 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1775 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1776 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1777 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1778 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1779 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1780 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1781 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1782 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1783 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1784 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1785 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1786 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1787 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1788 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1789 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1790 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1791 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1792 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1793 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1794 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1795 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1796 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1797 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1798 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1799 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1800 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1801 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1802 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1803 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1804 "src/math/exp-avx2-p5.c",
1805 "src/math/exp-avx2-perm-p3.c",
1806 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1807 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1808 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1809 "src/math/sigmoid-avx2-rr2-p5-div.c",
1810 "src/math/sigmoid-avx2-rr1-p5-div.c",
1811 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1812 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1813 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1814 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1815]
1816
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1817AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1818 "src/f32-clamp/gen/avx512f-x16.c",
1819 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1820 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1821 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1822 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1823 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1824 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1825 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1826 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1827 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1828 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1829 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1830 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1831 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1832 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1833 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1834 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1835 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1836 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1837 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1838 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1839 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1840 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1841 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1842 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1843 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1844 "src/f32-hswish/gen/avx512f-x16.c",
1845 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1846 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1847 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1848 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1849 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1850 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1851 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1852 "src/f32-prelu/gen/avx512f-2x16.c",
1853 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1854 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1855 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1856 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1857 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1858 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1859 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1860 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1861 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1862 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1863 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1864 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1865 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1866 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1867 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1868 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1869 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1870 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1871 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1872 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1873 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1874 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1875 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1876 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1877 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1878 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1879 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1880 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1881 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1882 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1883 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1884 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1885 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1886 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1887 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1888 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1889 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1890 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1891 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1892 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1893 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1894 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1895 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1896 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1897 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1898 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1899 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1900 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1901 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1902 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1903 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1904 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1905 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1906 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1907 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1908 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1909 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1910 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1911 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1912 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1913 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x16.c",
1914 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1915 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1916 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1917 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
1918 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
1919 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
1920 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1921 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1922 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1923 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1924 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1925 "src/f32-vlrelu/gen/avx512f-x16.c",
1926 "src/f32-vlrelu/gen/avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1927 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1928 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1929 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1930 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1931 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1932 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
1933 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
1934 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
1935 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
1936 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
1937 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
1938 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
1939 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
1940 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
1941 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
1942 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
1943 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
1944 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
1945 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
1946 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
1947 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
1948 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
1949 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
1950 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
1951 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1952 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
1953 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
1954 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
1955 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
1956 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
1957 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
1958 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
1959 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1960 "src/f32-vunary/gen/vabs-avx512f-x16.c",
1961 "src/f32-vunary/gen/vabs-avx512f-x32.c",
1962 "src/f32-vunary/gen/vneg-avx512f-x16.c",
1963 "src/f32-vunary/gen/vneg-avx512f-x32.c",
1964 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
1965 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1966 "src/math/exp-avx512f-p5-scalef.c",
1967 "src/math/exp-avx512f-p5.c",
1968 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]1969 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1970 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1971]
1972
1973AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]1974 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]1975 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1976 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1977 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
1978 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1979 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]1980 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
1981 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
1982 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
1983 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1984 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1985 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1986 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1987 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1988]
1989
1990AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1991 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1992 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
1993 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1994 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1995 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
1996 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1997 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
1998 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
1999 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]2000 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]2001 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
2002 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
2003 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]2004 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2005 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
2006 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]2007 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2008 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2009 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2010 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2011 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2012 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2013 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2014 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2015 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2016 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2017 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
2018 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
2019 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2020 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2021 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2022 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2023 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2024 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2025 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2026 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
2027 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]2028 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2029 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2030 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2031 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2032 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2033 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2034 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2035 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2036 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2037 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2038 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
2039 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
2040 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2041 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2042 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2043 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2044 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
2045 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2046 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2047 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
2048 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
2049 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2050 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2051 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2052 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2053 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2054 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2055 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2056 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2057 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2058 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2059 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2060 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2061 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2062 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2063 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2064 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2065]
2066
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2067INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2068 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2069 "src/xnnpack/argmaxpool.h",
2070 "src/xnnpack/avgpool.h",
2071 "src/xnnpack/clamp.h",
2072 "src/xnnpack/common.h",
2073 "src/xnnpack/conv.h",
2074 "src/xnnpack/dwconv.h",
2075 "src/xnnpack/gavgpool.h",
2076 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]2077 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2078 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]2079 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2080 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]2081 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2082 "src/xnnpack/lut.h",
2083 "src/xnnpack/math.h",
2084 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2085 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2086 "src/xnnpack/packx.h",
2087 "src/xnnpack/pad.h",
2088 "src/xnnpack/params.h",
2089 "src/xnnpack/pavgpool.h",
2090 "src/xnnpack/ppmm.h",
2091 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2092 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2093 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2094 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2095 "src/xnnpack/rmax.h",
2096 "src/xnnpack/scalar-utils.h",
2097 "src/xnnpack/spmm.h",
2098 "src/xnnpack/unpool.h",
2099 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2100 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2101 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]2102 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2103 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2104 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2105 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2106 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2107]
2108
2109INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2110 "include/xnnpack.h",
2111 "src/xnnpack/allocator.h",
2112 "src/xnnpack/compute.h",
2113 "src/xnnpack/im2col.h",
2114 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2115 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2116 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2117 "src/xnnpack/operator.h",
2118 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2119 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2120 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2121 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]2122 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2123]
2124
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2125ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2126 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2127]
2128
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2129MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2130 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2131 "include/xnnpack.h",
2132]
2133
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2134MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2135 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2136 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2137 "src/xnnpack/requantization.h",
2138 "include/xnnpack.h",
2139]
2140
2141OPERATOR_TEST_PARAMS_HDRS = [
2142 "src/xnnpack/params.h",
2143 "src/xnnpack/common.h",
2144]
2145
2146WEIGHTS_PACK_HDRS = [
2147 "src/xnnpack/pack.h",
2148 "src/xnnpack/operator.h",
2149 "src/xnnpack/compute.h",
2150]
2151
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2152LOGGING_COPTS = select({
2153 # No logging in optimized mode
2154 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
2155 # Full logging in debug mode
2156 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
2157 # Error-only logging in default (fastbuild) mode
2158 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
2159})
2160
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2161LOGGING_SRCS = select({
2162 # No logging in optimized mode
2163 ":optimized_build": [],
2164 "//conditions:default": [
2165 "src/operator-strings.c",
2166 "src/subgraph-strings.c",
2167 ],
2168})
2169
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2170LOGGING_HDRS = [
2171 "src/xnnpack/log.h",
2172]
2173
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2174xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2175 name = "tables",
2176 srcs = TABLE_SRCS,
2177 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2178 gcc_copts = xnnpack_gcc_std_copts(),
2179 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2180)
2181
2182xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2183 name = "scalar_ukernels",
2184 srcs = SCALAR_UKERNELS,
2185 hdrs = INTERNAL_HDRS,
2186 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2187 gcc_copts = xnnpack_gcc_std_copts(),
2188 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2189 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2190 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2191 "@FP16",
2192 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2193 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2194 ],
2195)
2196
2197xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2198 name = "scalar_ukernels_test_mode",
2199 srcs = SCALAR_UKERNELS,
2200 hdrs = INTERNAL_HDRS,
2201 aarch32_copts = ["-marm"],
2202 copts = [
2203 "-UNDEBUG",
2204 "-DXNN_TEST_MODE=1",
2205 ],
2206 gcc_copts = xnnpack_gcc_std_copts(),
2207 msvc_copts = xnnpack_msvc_std_copts(),
2208 deps = [
2209 ":tables",
2210 "@FP16",
2211 "@FXdiv",
2212 "@pthreadpool",
2213 ],
2214)
2215
2216xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2217 name = "wasm_ukernels",
2218 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2219 gcc_copts = xnnpack_gcc_std_copts(),
2220 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2221 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2222 wasmsimd_copts = [
2223 "-msimd128",
2224 "-munimplemented-simd128",
2225 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2226 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2227 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2228 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2229 "@FP16",
2230 "@FXdiv",
2231 "@pthreadpool",
2232 ],
2233)
2234
2235xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2236 name = "wasm_ukernels_test_mode",
2237 hdrs = INTERNAL_HDRS,
2238 copts = [
2239 "-UNDEBUG",
2240 "-DXNN_TEST_MODE=1",
2241 ],
2242 gcc_copts = xnnpack_gcc_std_copts(),
2243 msvc_copts = xnnpack_msvc_std_copts(),
2244 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2245 wasmsimd_copts = [
2246 "-msimd128",
2247 "-munimplemented-simd128",
2248 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2249 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2250 deps = [
2251 ":tables",
2252 "@FP16",
2253 "@FXdiv",
2254 "@pthreadpool",
2255 ],
2256)
2257
2258xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2259 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2260 hdrs = INTERNAL_HDRS,
2261 aarch32_copts = [
2262 "-marm",
2263 "-mfpu=neon",
2264 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2265 gcc_copts = xnnpack_gcc_std_copts(),
2266 gcc_x86_copts = ["-msse2"],
2267 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2268 optimized_copts = [
2269 "-O3",
2270 "-ffast-math",
2271 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2272 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2273 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2274 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2275 "@FP16",
2276 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2277 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2278 ],
2279)
2280
2281xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2282 name = "psimd_fastmath_ukernels_test_mode",
2283 hdrs = INTERNAL_HDRS,
2284 aarch32_copts = [
2285 "-marm",
2286 "-mfpu=neon",
2287 ],
2288 copts = [
2289 "-UNDEBUG",
2290 "-DXNN_TEST_MODE=1",
2291 ],
2292 gcc_copts = xnnpack_gcc_std_copts(),
2293 gcc_x86_copts = ["-msse2"],
2294 msvc_copts = xnnpack_msvc_std_copts(),
2295 optimized_copts = [
2296 "-O3",
2297 "-ffast-math",
2298 ],
2299 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2300 deps = [
2301 ":tables",
2302 "@FP16",
2303 "@psimd",
2304 "@pthreadpool",
2305 ],
2306)
2307
2308xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2309 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2310 hdrs = INTERNAL_HDRS,
2311 aarch32_copts = [
2312 "-marm",
2313 "-mfpu=neon",
2314 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2315 gcc_copts = xnnpack_gcc_std_copts(),
2316 gcc_x86_copts = ["-msse2"],
2317 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2318 optimized_copts = [
2319 "-O3",
2320 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2321 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2322 deps = [
2323 ":tables",
2324 "@FP16",
2325 "@psimd",
2326 "@pthreadpool",
2327 ],
2328)
2329
2330xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2331 name = "psimd_accmath_ukernels_test_mode",
2332 hdrs = INTERNAL_HDRS,
2333 aarch32_copts = [
2334 "-marm",
2335 "-mfpu=neon",
2336 ],
2337 copts = [
2338 "-UNDEBUG",
2339 "-DXNN_TEST_MODE=1",
2340 ],
2341 gcc_copts = xnnpack_gcc_std_copts(),
2342 gcc_x86_copts = ["-msse2"],
2343 msvc_copts = xnnpack_msvc_std_copts(),
2344 optimized_copts = [
2345 "-O3",
2346 ],
2347 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2348 deps = [
2349 ":tables",
2350 "@FP16",
2351 "@psimd",
2352 "@pthreadpool",
2353 ],
2354)
2355
2356xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2357 name = "neon_ukernels",
2358 hdrs = INTERNAL_HDRS,
2359 aarch32_copts = [
2360 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2361 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2362 "-mfpu=neon",
2363 ],
2364 aarch32_srcs = NEON_UKERNELS,
2365 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2366 gcc_copts = xnnpack_gcc_std_copts(),
2367 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2368 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2369 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2370 "@FP16",
2371 "@pthreadpool",
2372 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2373)
2374
2375xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2376 name = "neon_ukernels_test_mode",
2377 hdrs = INTERNAL_HDRS,
2378 aarch32_copts = [
2379 "-marm",
2380 "-march=armv7-a",
2381 "-mfpu=neon",
2382 ],
2383 aarch32_srcs = NEON_UKERNELS,
2384 aarch64_srcs = NEON_UKERNELS,
2385 copts = [
2386 "-UNDEBUG",
2387 "-DXNN_TEST_MODE=1",
2388 ],
2389 gcc_copts = xnnpack_gcc_std_copts(),
2390 msvc_copts = xnnpack_msvc_std_copts(),
2391 deps = [
2392 ":tables",
2393 "@FP16",
2394 "@pthreadpool",
2395 ],
2396)
2397
2398xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2399 name = "neonfma_ukernels",
2400 hdrs = INTERNAL_HDRS,
2401 aarch32_copts = [
2402 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2403 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2404 "-mfpu=neon-vfpv4",
2405 ],
2406 aarch32_srcs = NEONFMA_UKERNELS,
2407 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2408 apple_aarch32_copts = [
2409 "-mcpu=swift",
2410 "-mtune=generic",
2411 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2412 gcc_copts = xnnpack_gcc_std_copts(),
2413 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2414 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2415 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2416 "@FP16",
2417 "@pthreadpool",
2418 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2419)
2420
2421xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2422 name = "neonfma_ukernels_test_mode",
2423 hdrs = INTERNAL_HDRS,
2424 aarch32_copts = [
2425 "-marm",
2426 "-march=armv7-a",
2427 "-mfpu=neon-vfpv4",
2428 ],
2429 aarch32_srcs = NEONFMA_UKERNELS,
2430 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2431 apple_aarch32_copts = [
2432 "-mcpu=swift",
2433 "-mtune=generic",
2434 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2435 copts = [
2436 "-UNDEBUG",
2437 "-DXNN_TEST_MODE=1",
2438 ],
2439 gcc_copts = xnnpack_gcc_std_copts(),
2440 msvc_copts = xnnpack_msvc_std_copts(),
2441 deps = [
2442 ":tables",
2443 "@FP16",
2444 "@pthreadpool",
2445 ],
2446)
2447
2448xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2449 name = "neonv8_ukernels",
2450 hdrs = INTERNAL_HDRS,
2451 aarch32_copts = [
2452 "-marm",
2453 "-march=armv8-a",
2454 "-mfpu=neon-fp-armv8",
2455 ],
2456 aarch32_srcs = NEONV8_UKERNELS,
2457 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2458 apple_aarch32_copts = [
2459 "-mcpu=cyclone",
2460 "-mtune=generic",
2461 ],
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2462 gcc_copts = xnnpack_gcc_std_copts(),
2463 msvc_copts = xnnpack_msvc_std_copts(),
2464 deps = [
2465 ":tables",
2466 "@FP16",
2467 "@pthreadpool",
2468 ],
2469)
2470
2471xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2472 name = "neonv8_ukernels_test_mode",
2473 hdrs = INTERNAL_HDRS,
2474 aarch32_copts = [
2475 "-marm",
2476 "-march=armv8-a",
2477 "-mfpu=neon-fp-armv8",
2478 ],
2479 aarch32_srcs = NEONV8_UKERNELS,
2480 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2481 apple_aarch32_copts = [
2482 "-mcpu=cyclone",
2483 "-mtune=generic",
2484 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2485 copts = [
2486 "-UNDEBUG",
2487 "-DXNN_TEST_MODE=1",
2488 ],
2489 gcc_copts = xnnpack_gcc_std_copts(),
2490 msvc_copts = xnnpack_msvc_std_copts(),
2491 deps = [
2492 ":tables",
2493 "@FP16",
2494 "@pthreadpool",
2495 ],
2496)
2497
2498xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2499 name = "neonfp16arith_ukernels",
2500 hdrs = INTERNAL_HDRS,
2501 aarch64_copts = ["-march=armv8.2-a+fp16"],
2502 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2503 gcc_copts = xnnpack_gcc_std_copts(),
2504 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2505 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2506 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2507 "@FP16",
2508 "@pthreadpool",
2509 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2510)
2511
2512xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2513 name = "neonfp16arith_ukernels_test_mode",
2514 hdrs = INTERNAL_HDRS,
2515 aarch64_copts = ["-march=armv8.2-a+fp16"],
2516 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2517 copts = [
2518 "-UNDEBUG",
2519 "-DXNN_TEST_MODE=1",
2520 ],
2521 gcc_copts = xnnpack_gcc_std_copts(),
2522 msvc_copts = xnnpack_msvc_std_copts(),
2523 deps = [
2524 ":tables",
2525 "@FP16",
2526 "@pthreadpool",
2527 ],
2528)
2529
2530xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2531 name = "sse2_ukernels",
2532 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2533 gcc_copts = xnnpack_gcc_std_copts(),
2534 gcc_x86_copts = ["-msse2"],
2535 msvc_copts = xnnpack_msvc_std_copts(),
2536 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2537 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2538 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2539 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2540 "@FP16",
2541 "@pthreadpool",
2542 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2543)
2544
2545xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2546 name = "sse2_ukernels_test_mode",
2547 hdrs = INTERNAL_HDRS,
2548 copts = [
2549 "-UNDEBUG",
2550 "-DXNN_TEST_MODE=1",
2551 ],
2552 gcc_copts = xnnpack_gcc_std_copts(),
2553 gcc_x86_copts = ["-msse2"],
2554 msvc_copts = xnnpack_msvc_std_copts(),
2555 msvc_x86_32_copts = ["/arch:SSE2"],
2556 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2557 deps = [
2558 ":tables",
2559 "@FP16",
2560 "@pthreadpool",
2561 ],
2562)
2563
2564xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2565 name = "ssse3_ukernels",
2566 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2567 gcc_copts = xnnpack_gcc_std_copts(),
2568 gcc_x86_copts = ["-mssse3"],
2569 msvc_copts = xnnpack_msvc_std_copts(),
2570 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2571 x86_srcs = SSSE3_UKERNELS,
2572 deps = [
2573 ":tables",
2574 "@FP16",
2575 "@pthreadpool",
2576 ],
2577)
2578
2579xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2580 name = "ssse3_ukernels_test_mode",
2581 hdrs = INTERNAL_HDRS,
2582 copts = [
2583 "-UNDEBUG",
2584 "-DXNN_TEST_MODE=1",
2585 ],
2586 gcc_copts = xnnpack_gcc_std_copts(),
2587 gcc_x86_copts = ["-mssse3"],
2588 msvc_copts = xnnpack_msvc_std_copts(),
2589 msvc_x86_32_copts = ["/arch:SSE2"],
2590 x86_srcs = SSSE3_UKERNELS,
2591 deps = [
2592 ":tables",
2593 "@FP16",
2594 "@pthreadpool",
2595 ],
2596)
2597
2598xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2599 name = "sse41_ukernels",
2600 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2601 gcc_copts = xnnpack_gcc_std_copts(),
2602 gcc_x86_copts = ["-msse4.1"],
2603 msvc_copts = xnnpack_msvc_std_copts(),
2604 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2605 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2606 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2607 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2608 "@FP16",
2609 "@pthreadpool",
2610 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2611)
2612
2613xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2614 name = "sse41_ukernels_test_mode",
2615 hdrs = INTERNAL_HDRS,
2616 copts = [
2617 "-UNDEBUG",
2618 "-DXNN_TEST_MODE=1",
2619 ],
2620 gcc_copts = xnnpack_gcc_std_copts(),
2621 gcc_x86_copts = ["-msse4.1"],
2622 msvc_copts = xnnpack_msvc_std_copts(),
2623 msvc_x86_32_copts = ["/arch:SSE2"],
2624 x86_srcs = SSE41_UKERNELS,
2625 deps = [
2626 ":tables",
2627 "@FP16",
2628 "@pthreadpool",
2629 ],
2630)
2631
2632xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2633 name = "avx_ukernels",
2634 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2635 gcc_copts = xnnpack_gcc_std_copts(),
2636 gcc_x86_copts = ["-mavx"],
2637 msvc_copts = xnnpack_msvc_std_copts(),
2638 msvc_x86_32_copts = ["/arch:AVX"],
2639 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2640 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2641 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2642 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2643 "@FP16",
2644 "@pthreadpool",
2645 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2646)
2647
2648xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2649 name = "avx_ukernels_test_mode",
2650 hdrs = INTERNAL_HDRS,
2651 copts = [
2652 "-UNDEBUG",
2653 "-DXNN_TEST_MODE=1",
2654 ],
2655 gcc_copts = xnnpack_gcc_std_copts(),
2656 gcc_x86_copts = ["-mavx"],
2657 msvc_copts = xnnpack_msvc_std_copts(),
2658 msvc_x86_32_copts = ["/arch:AVX"],
2659 msvc_x86_64_copts = ["/arch:AVX"],
2660 x86_srcs = AVX_UKERNELS,
2661 deps = [
2662 ":tables",
2663 "@FP16",
2664 "@pthreadpool",
2665 ],
2666)
2667
2668xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2669 name = "fma3_ukernels",
2670 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2671 gcc_copts = xnnpack_gcc_std_copts(),
2672 gcc_x86_copts = ["-mfma"],
2673 msvc_copts = xnnpack_msvc_std_copts(),
2674 msvc_x86_32_copts = ["/arch:AVX"],
2675 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2676 x86_srcs = FMA3_UKERNELS,
2677 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2678 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2679 "@FP16",
2680 "@pthreadpool",
2681 ],
2682)
2683
2684xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2685 name = "fma3_ukernels_test_mode",
2686 hdrs = INTERNAL_HDRS,
2687 copts = [
2688 "-UNDEBUG",
2689 "-DXNN_TEST_MODE=1",
2690 ],
2691 gcc_copts = xnnpack_gcc_std_copts(),
2692 gcc_x86_copts = ["-mfma"],
2693 msvc_copts = xnnpack_msvc_std_copts(),
2694 msvc_x86_32_copts = ["/arch:AVX"],
2695 msvc_x86_64_copts = ["/arch:AVX"],
2696 x86_srcs = FMA3_UKERNELS,
2697 deps = [
2698 ":tables",
2699 "@FP16",
2700 "@pthreadpool",
2701 ],
2702)
2703
2704xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2705 name = "avx2_ukernels",
2706 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2707 gcc_copts = xnnpack_gcc_std_copts(),
2708 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2709 "-mfma",
2710 "-mavx2",
2711 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2712 msvc_copts = xnnpack_msvc_std_copts(),
2713 msvc_x86_32_copts = ["/arch:AVX2"],
2714 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2715 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2716 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2717 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2718 "@FP16",
2719 "@pthreadpool",
2720 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2721)
2722
2723xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2724 name = "avx2_ukernels_test_mode",
2725 hdrs = INTERNAL_HDRS,
2726 copts = [
2727 "-UNDEBUG",
2728 "-DXNN_TEST_MODE=1",
2729 ],
2730 gcc_copts = xnnpack_gcc_std_copts(),
2731 gcc_x86_copts = [
2732 "-mfma",
2733 "-mavx2",
2734 ],
2735 msvc_copts = xnnpack_msvc_std_copts(),
2736 msvc_x86_32_copts = ["/arch:AVX2"],
2737 msvc_x86_64_copts = ["/arch:AVX2"],
2738 x86_srcs = AVX2_UKERNELS,
2739 deps = [
2740 ":tables",
2741 "@FP16",
2742 "@pthreadpool",
2743 ],
2744)
2745
2746xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2747 name = "avx512f_ukernels",
2748 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2749 gcc_copts = xnnpack_gcc_std_copts(),
2750 gcc_x86_copts = ["-mavx512f"],
2751 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2752 msvc_copts = xnnpack_msvc_std_copts(),
2753 msvc_x86_32_copts = ["/arch:AVX512"],
2754 msvc_x86_64_copts = ["/arch:AVX512"],
2755 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2756 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2757 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2758 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2759 "@FP16",
2760 "@pthreadpool",
2761 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2762)
2763
2764xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2765 name = "avx512f_ukernels_test_mode",
2766 hdrs = INTERNAL_HDRS,
2767 copts = [
2768 "-UNDEBUG",
2769 "-DXNN_TEST_MODE=1",
2770 ],
2771 gcc_copts = xnnpack_gcc_std_copts(),
2772 gcc_x86_copts = ["-mavx512f"],
2773 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2774 msvc_copts = xnnpack_msvc_std_copts(),
2775 msvc_x86_32_copts = ["/arch:AVX512"],
2776 msvc_x86_64_copts = ["/arch:AVX512"],
2777 msys_copts = ["-fno-asynchronous-unwind-tables"],
2778 x86_srcs = AVX512F_UKERNELS,
2779 deps = [
2780 ":tables",
2781 "@FP16",
2782 "@pthreadpool",
2783 ],
2784)
2785
2786xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2787 name = "asm_ukernels",
2788 hdrs = ["src/xnnpack/assembly.h"],
2789 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2790 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2791 aarch64_srcs = AARCH64_ASM_UKERNELS,
2792)
2793
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2794xnnpack_cc_library(
2795 name = "logging_utils",
2796 srcs = LOGGING_SRCS,
2797 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2798 copts = LOGGING_COPTS + [
2799 "-Isrc",
2800 "-Iinclude",
2801 ] + select({
2802 ":debug_build": [],
2803 "//conditions:default": xnnpack_min_size_copts(),
2804 }),
2805 gcc_copts = xnnpack_gcc_std_copts(),
2806 msvc_copts = xnnpack_msvc_std_copts(),
2807 visibility = xnnpack_visibility(),
2808 deps = [
2809 "@FP16",
2810 "@clog",
2811 "@pthreadpool",
2812 ],
2813)
2814
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2815xnnpack_aggregate_library(
2816 name = "ukernels",
2817 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2818 ":neon_ukernels",
2819 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2820 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2821 ":asm_ukernels",
2822 ],
2823 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2824 ":neon_ukernels",
2825 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2826 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2827 ":neonfp16arith_ukernels",
2828 ":asm_ukernels",
2829 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2830 generic_deps = [
2831 ":scalar_ukernels",
2832 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2833 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2834 ":psimd_fastmath_ukernels",
2835 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2836 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2837 wasm_deps = [
2838 ":wasm_ukernels",
2839 ],
2840 wasmsimd_deps = [
2841 ":wasm_ukernels",
2842 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2843 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2844 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2845 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2846 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2847 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2848 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2849 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2850 ":avx512f_ukernels",
2851 ],
2852)
2853
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2854xnnpack_aggregate_library(
2855 name = "ukernels_test_mode",
2856 aarch32_deps = [
2857 ":neon_ukernels_test_mode",
2858 ":neonfma_ukernels_test_mode",
2859 ":neonv8_ukernels_test_mode",
2860 ":asm_ukernels",
2861 ],
2862 aarch64_deps = [
2863 ":neon_ukernels_test_mode",
2864 ":neonfma_ukernels_test_mode",
2865 ":neonv8_ukernels_test_mode",
2866 ":neonfp16arith_ukernels_test_mode",
2867 ":asm_ukernels",
2868 ],
2869 generic_deps = [
2870 ":scalar_ukernels_test_mode",
2871 ],
2872 psimd_deps = [
2873 ":psimd_fastmath_ukernels_test_mode",
2874 ":psimd_accmath_ukernels_test_mode",
2875 ],
2876 wasm_deps = [
2877 ":wasm_ukernels_test_mode",
2878 ],
2879 wasmsimd_deps = [
2880 ":wasm_ukernels_test_mode",
2881 ],
2882 x86_deps = [
2883 ":sse2_ukernels_test_mode",
2884 ":ssse3_ukernels_test_mode",
2885 ":sse41_ukernels_test_mode",
2886 ":avx_ukernels_test_mode",
2887 ":fma3_ukernels_test_mode",
2888 ":avx2_ukernels_test_mode",
2889 ":avx512f_ukernels_test_mode",
2890 ],
2891)
2892
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2893# This target must be compatible with Android NDK r17 and compile with Clang 6.
2894# It is similar to :ukernels target, but excludes microkernels which require
2895# NEON FP16 arithmetics, NEON Dot Product, and newer intrinsics.
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2896xnnpack_aggregate_library(
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2897 name = "ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2898 aarch32_deps = [
2899 ":neon_ukernels",
2900 ":neonfma_ukernels",
2901 ":neonv8_ukernels",
2902 ":asm_ukernels",
2903 ],
2904 aarch64_deps = [
2905 ":neon_ukernels",
2906 ":neonfma_ukernels",
2907 ":neonv8_ukernels",
2908 ":asm_ukernels",
2909 ],
2910 generic_deps = [
2911 ":scalar_ukernels",
2912 ],
2913 psimd_deps = [
2914 ":psimd_fastmath_ukernels",
2915 ":psimd_accmath_ukernels",
2916 ],
2917 wasm_deps = [
2918 ":wasm_ukernels",
2919 ],
2920 wasmsimd_deps = [
2921 ":wasm_ukernels",
2922 ],
2923 x86_deps = [
2924 ":sse2_ukernels",
2925 ":ssse3_ukernels",
2926 ":sse41_ukernels",
2927 ":avx_ukernels",
2928 ":fma3_ukernels",
2929 ":avx2_ukernels",
2930 ":avx512f_ukernels",
2931 ],
2932)
2933
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2934xnnpack_cc_library(
2935 name = "im2col",
2936 srcs = ["src/im2col.c"],
2937 hdrs = [
2938 "src/xnnpack/common.h",
2939 "src/xnnpack/im2col.h",
2940 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2941 gcc_copts = xnnpack_gcc_std_copts(),
2942 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2943)
2944
2945xnnpack_cc_library(
2946 name = "indirection",
2947 srcs = ["src/indirection.c"],
2948 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2949 gcc_copts = xnnpack_gcc_std_copts(),
2950 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2951 deps = [
2952 "@FP16",
2953 "@FXdiv",
2954 "@pthreadpool",
2955 ],
2956)
2957
2958xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2959 name = "indirection_test_mode",
2960 srcs = ["src/indirection.c"],
2961 hdrs = INTERNAL_HDRS,
2962 copts = [
2963 "-UNDEBUG",
2964 "-DXNN_TEST_MODE=1",
2965 ],
2966 gcc_copts = xnnpack_gcc_std_copts(),
2967 msvc_copts = xnnpack_msvc_std_copts(),
2968 deps = [
2969 "@FP16",
2970 "@FXdiv",
2971 "@pthreadpool",
2972 ],
2973)
2974
2975xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2976 name = "operator_run",
2977 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2978 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2979 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2980 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2981 "//conditions:default": [],
2982 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2983 gcc_copts = xnnpack_gcc_std_copts(),
2984 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2985 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2986 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2987 "@FP16",
2988 "@FXdiv",
2989 "@clog",
2990 "@pthreadpool",
2991 ],
2992)
2993
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2994xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2995 name = "operator_run_test_mode",
2996 srcs = ["src/operator-run.c"],
2997 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2998 copts = LOGGING_COPTS + [
2999 "-UNDEBUG",
3000 "-DXNN_TEST_MODE=1",
3001 ] + select({
3002 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3003 "//conditions:default": [],
3004 }),
3005 gcc_copts = xnnpack_gcc_std_copts(),
3006 msvc_copts = xnnpack_msvc_std_copts(),
3007 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3008 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3009 "@FP16",
3010 "@FXdiv",
3011 "@clog",
3012 "@pthreadpool",
3013 ],
3014)
3015
3016xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3017 name = "memory_planner",
3018 srcs = ["src/memory-planner.c"],
3019 hdrs = INTERNAL_HDRS,
3020 defines = select({
3021 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3022 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3023 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3024 }),
3025 gcc_copts = xnnpack_gcc_std_copts(),
3026 msvc_copts = xnnpack_msvc_std_copts(),
3027 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3028 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3029 "@pthreadpool",
3030 ],
3031)
3032
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3033xnnpack_cc_library(
3034 name = "memory_planner_test_mode",
3035 srcs = ["src/memory-planner.c"],
3036 hdrs = INTERNAL_HDRS,
3037 copts = [
3038 "-UNDEBUG",
3039 "-DXNN_TEST_MODE=1",
3040 ],
3041 defines = select({
3042 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3043 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3044 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3045 }),
3046 gcc_copts = xnnpack_gcc_std_copts(),
3047 msvc_copts = xnnpack_msvc_std_copts(),
3048 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3049 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3050 "@pthreadpool",
3051 ],
3052)
3053
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3054cc_library(
3055 name = "enable_assembly",
3056 defines = select({
3057 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
3058 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]3059 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3060 }),
3061)
3062
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3063cc_library(
3064 name = "enable_sparse",
3065 defines = select({
3066 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
3067 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan8b283aa2020-06-18 16:48:57 -0700[diff] [blame]3068 "//conditions:default": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3069 }),
3070)
3071
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3072xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3073 name = "operators",
3074 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]3075 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3076 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3077 ],
3078 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3079 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3080 "-Isrc",
3081 "-Iinclude",
3082 ] + select({
3083 ":debug_build": [],
3084 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3085 }) + select({
3086 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3087 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3088 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3089 gcc_copts = xnnpack_gcc_std_copts(),
3090 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3091 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3092 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3093 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3094 "@FP16",
3095 "@FXdiv",
3096 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3097 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3098 ],
3099)
3100
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3101xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3102 name = "operators_test_mode",
3103 srcs = OPERATOR_SRCS + [
3104 "src/memory.c",
3105 "src/operator-delete.c",
3106 ],
3107 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3108 copts = LOGGING_COPTS + [
3109 "-Isrc",
3110 "-Iinclude",
3111 "-UNDEBUG",
3112 "-DXNN_TEST_MODE=1",
3113 ] + select({
3114 ":debug_build": [],
3115 "//conditions:default": xnnpack_min_size_copts(),
3116 }) + select({
3117 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3118 "//conditions:default": [],
3119 }),
3120 gcc_copts = xnnpack_gcc_std_copts(),
3121 msvc_copts = xnnpack_msvc_std_copts(),
3122 deps = [
3123 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3124 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3125 "@FP16",
3126 "@FXdiv",
3127 "@clog",
3128 "@pthreadpool",
3129 ],
3130)
3131
3132xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3133 name = "XNNPACK",
3134 srcs = [
3135 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]3136 "src/runtime.c",
3137 "src/subgraph.c",
3138 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3139 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3140 hdrs = ["include/xnnpack.h"],
3141 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3142 "-Isrc",
3143 "-Iinclude",
3144 ] + select({
3145 ":debug_build": [],
3146 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3147 }) + select({
3148 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3149 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3150 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3151 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3152 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3153 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3154 visibility = xnnpack_visibility(),
3155 deps = [
3156 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3157 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3158 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3159 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3160 ":operator_run",
3161 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3162 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3163 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]3164 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3165 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]3166 ] + select({
3167 ":emscripten": [],
3168 "//conditions:default": ["@cpuinfo"],
3169 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3170)
3171
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3172xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3173 name = "XNNPACK_test_mode",
3174 srcs = [
3175 "src/init.c",
3176 "src/runtime.c",
3177 "src/subgraph.c",
3178 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3179 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3180 hdrs = ["include/xnnpack.h"],
3181 copts = LOGGING_COPTS + [
3182 "-Isrc",
3183 "-Iinclude",
3184 "-UNDEBUG",
3185 "-DXNN_TEST_MODE=1",
3186 ] + select({
3187 ":debug_build": [],
3188 "//conditions:default": xnnpack_min_size_copts(),
3189 }) + select({
3190 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3191 "//conditions:default": [],
3192 }),
3193 gcc_copts = xnnpack_gcc_std_copts(),
3194 includes = ["include"],
3195 msvc_copts = xnnpack_msvc_std_copts(),
3196 visibility = xnnpack_visibility(),
3197 deps = [
3198 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3199 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3200 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3201 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3202 ":operator_run_test_mode",
3203 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3204 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3205 "@clog",
3206 "@FP16",
3207 "@pthreadpool",
3208 ] + select({
3209 ":emscripten": [],
3210 "//conditions:default": ["@cpuinfo"],
3211 }),
3212)
3213
3214xnnpack_cc_library(
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3215 name = "xnnpack_f32",
3216 srcs = [
3217 "src/init.c",
3218 "src/runtime.c",
3219 "src/subgraph.c",
3220 "src/tensor.c",
3221 ] + SUBGRAPH_SRCS,
3222 hdrs = ["include/xnnpack.h"],
3223 copts = LOGGING_COPTS + [
3224 "-Isrc",
3225 "-Iinclude",
3226 ] + select({
3227 ":debug_build": [],
3228 "//conditions:default": xnnpack_min_size_copts(),
3229 }) + select({
3230 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3231 "//conditions:default": [],
3232 }),
3233 defines = [
3234 "XNN_NO_Q8_OPERATORS",
3235 "XNN_NO_U8_OPERATORS",
3236 "XNN_NO_X8_OPERATORS",
3237 "XNN_NO_F16_OPERATORS",
3238 "XNN_NO_X16_OPERATORS",
3239 ],
3240 gcc_copts = xnnpack_gcc_std_copts(),
3241 includes = ["include"],
3242 msvc_copts = xnnpack_msvc_std_copts(),
3243 visibility = xnnpack_visibility(),
3244 deps = [
3245 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3246 ":enable_sparse",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3247 ":logging_utils",
3248 ":memory_planner",
3249 ":operator_run",
3250 ":operators",
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]3251 ":ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3252 "@clog",
3253 "@FP16",
3254 "@pthreadpool",
3255 ] + select({
3256 ":emscripten": [],
3257 "//conditions:default": ["@cpuinfo"],
3258 }),
3259)
3260
3261xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3262 name = "xnnpack_operators_nhwc_f32",
3263 srcs = [
3264 "src/init.c",
3265 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3266 hdrs = ["include/xnnpack.h"],
3267 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3268 "-Isrc",
3269 "-Iinclude",
3270 ] + select({
3271 ":debug_build": [],
3272 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3273 }) + select({
3274 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3275 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3276 }),
3277 defines = [
3278 "XNN_NO_Q8_OPERATORS",
3279 "XNN_NO_U8_OPERATORS",
3280 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]3281 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3282 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3283 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3284 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3285 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3286 visibility = xnnpack_visibility(),
3287 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3288 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3289 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3290 ":operator_run",
3291 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3292 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3293 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3294 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3295 ] + select({
3296 ":emscripten": [],
3297 "//conditions:default": ["@cpuinfo"],
3298 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3299)
3300
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3301xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3302 name = "bench_utils",
3303 srcs = ["bench/utils.cc"],
3304 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]3305 deps = [
3306 "@com_google_benchmark//:benchmark",
3307 "@cpuinfo",
3308 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3309)
3310
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3311######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3312
3313xnnpack_benchmark(
3314 name = "q8_gemm_bench",
3315 srcs = [
3316 "bench/gemm.h",
3317 "bench/q8-gemm.cc",
3318 "src/xnnpack/AlignedAllocator.h",
3319 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3320 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3321 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3322)
3323
3324xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3325 name = "f16_igemm_bench",
3326 srcs = [
3327 "bench/f16-igemm.cc",
3328 "bench/conv.h",
3329 "bench/google/conv.h",
3330 "src/xnnpack/AlignedAllocator.h",
3331 ] + MICROKERNEL_BENCHMARK_HDRS,
3332 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3333)
3334
3335xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3336 name = "f16_gemm_bench",
3337 srcs = [
3338 "bench/f16-gemm.cc",
3339 "bench/gemm.h",
3340 "src/xnnpack/AlignedAllocator.h",
3341 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3342 deps = MICROKERNEL_BENCHMARK_DEPS,
3343)
3344
3345xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3346 name = "f16_spmm_bench",
3347 srcs = [
3348 "bench/f16-spmm.cc",
3349 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3350 "src/xnnpack/AlignedAllocator.h",
3351 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3352 deps = MICROKERNEL_BENCHMARK_DEPS,
3353)
3354
3355xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3356 name = "f32_igemm_bench",
3357 srcs = [
3358 "bench/f32-igemm.cc",
3359 "bench/conv.h",
3360 "src/xnnpack/AlignedAllocator.h",
3361 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3362 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3363)
3364
3365xnnpack_benchmark(
3366 name = "f32_conv_hwc_bench",
3367 srcs = [
3368 "bench/f32-conv-hwc.cc",
3369 "bench/dconv.h",
3370 "src/xnnpack/AlignedAllocator.h",
3371 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3372 deps = MICROKERNEL_BENCHMARK_DEPS,
3373)
3374
3375xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3376 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3377 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3378 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3379 "bench/dconv.h",
3380 "src/xnnpack/AlignedAllocator.h",
3381 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3382 deps = MICROKERNEL_BENCHMARK_DEPS,
3383)
3384
3385xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3386 name = "f16_dwconv_bench",
3387 srcs = [
3388 "bench/f16-dwconv.cc",
3389 "bench/dwconv.h",
3390 "bench/google/dwconv.h",
3391 "src/xnnpack/AlignedAllocator.h",
3392 ] + MICROKERNEL_BENCHMARK_HDRS,
3393 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3394)
3395
3396xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3397 name = "f32_dwconv_bench",
3398 srcs = [
3399 "bench/f32-dwconv.cc",
3400 "bench/dwconv.h",
3401 "src/xnnpack/AlignedAllocator.h",
3402 ] + MICROKERNEL_BENCHMARK_HDRS,
3403 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3404)
3405
3406xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3407 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3408 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3409 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3410 "bench/dwconv.h",
3411 "src/xnnpack/AlignedAllocator.h",
3412 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3413 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3414)
3415
3416xnnpack_benchmark(
3417 name = "f32_gemm_bench",
3418 srcs = [
3419 "bench/f32-gemm.cc",
3420 "bench/gemm.h",
3421 "src/xnnpack/AlignedAllocator.h",
3422 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3423 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3424 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3425)
3426
3427xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3428 name = "f32_raddexpminusmax_bench",
3429 srcs = [
3430 "bench/f32-raddexpminusmax.cc",
3431 "src/xnnpack/AlignedAllocator.h",
3432 ] + MICROKERNEL_BENCHMARK_HDRS,
3433 deps = MICROKERNEL_BENCHMARK_DEPS,
3434)
3435
3436xnnpack_benchmark(
3437 name = "f32_raddextexp_bench",
3438 srcs = [
3439 "bench/f32-raddextexp.cc",
3440 "src/xnnpack/AlignedAllocator.h",
3441 ] + MICROKERNEL_BENCHMARK_HDRS,
3442 deps = MICROKERNEL_BENCHMARK_DEPS,
3443)
3444
3445xnnpack_benchmark(
3446 name = "f32_raddstoreexpminusmax_bench",
3447 srcs = [
3448 "bench/f32-raddstoreexpminusmax.cc",
3449 "src/xnnpack/AlignedAllocator.h",
3450 ] + MICROKERNEL_BENCHMARK_HDRS,
3451 deps = MICROKERNEL_BENCHMARK_DEPS,
3452)
3453
3454xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3455 name = "f32_rmax_bench",
3456 srcs = [
3457 "bench/f32-rmax.cc",
3458 "src/xnnpack/AlignedAllocator.h",
3459 ] + MICROKERNEL_BENCHMARK_HDRS,
3460 deps = MICROKERNEL_BENCHMARK_DEPS,
3461)
3462
3463xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3464 name = "f32_sigmoid_bench",
3465 srcs = [
3466 "bench/f32-sigmoid.cc",
3467 "src/xnnpack/AlignedAllocator.h",
3468 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3469 deps = MICROKERNEL_BENCHMARK_DEPS,
3470)
3471
3472xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3473 name = "f32_spmm_bench",
3474 srcs = [
3475 "bench/f32-spmm.cc",
3476 "bench/gemm.h",
3477 "src/xnnpack/AlignedAllocator.h",
3478 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3479 deps = MICROKERNEL_BENCHMARK_DEPS,
3480)
3481
3482xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3483 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3484 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3485 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3486 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3487 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3488 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3489)
3490
3491xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3492 name = "f32_vscaleexpminusmax_bench",
3493 srcs = [
3494 "bench/f32-vscaleexpminusmax.cc",
3495 "src/xnnpack/AlignedAllocator.h",
3496 ] + MICROKERNEL_BENCHMARK_HDRS,
3497 deps = MICROKERNEL_BENCHMARK_DEPS,
3498)
3499
3500xnnpack_benchmark(
3501 name = "f32_vscaleextexp_bench",
3502 srcs = [
3503 "bench/f32-vscaleextexp.cc",
3504 "src/xnnpack/AlignedAllocator.h",
3505 ] + MICROKERNEL_BENCHMARK_HDRS,
3506 deps = MICROKERNEL_BENCHMARK_DEPS,
3507)
3508
3509xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3510 name = "f32_im2col_gemm_bench",
3511 srcs = [
3512 "bench/f32-im2col-gemm.cc",
3513 "bench/conv.h",
3514 "src/xnnpack/AlignedAllocator.h",
3515 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3516 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3517)
3518
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3519xnnpack_benchmark(
3520 name = "requantization_bench",
3521 srcs = [
3522 "bench/requantization.cc",
3523 "src/xnnpack/requantization-stubs.h",
3524 "src/xnnpack/AlignedAllocator.h",
3525 ] + MICROKERNEL_BENCHMARK_HDRS,
3526 deps = MICROKERNEL_BENCHMARK_DEPS,
3527)
3528
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3529xnnpack_benchmark(
3530 name = "rounding_bench",
3531 srcs = [
3532 "bench/rounding.cc",
3533 "src/xnnpack/math-stubs.h",
3534 "src/xnnpack/AlignedAllocator.h",
3535 ] + MICROKERNEL_BENCHMARK_HDRS,
3536 deps = MICROKERNEL_BENCHMARK_DEPS,
3537)
3538
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3539########################### Benchmarks for operators ###########################
3540
3541xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3542 name = "average_pooling_bench",
3543 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3544 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3545 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3546 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3547)
3548
3549xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3550 name = "bankers_rounding_bench",
3551 srcs = ["bench/bankers-rounding.cc"],
3552 copts = xnnpack_optional_tflite_copts(),
3553 tags = ["nowin32"],
3554 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3555)
3556
3557xnnpack_benchmark(
3558 name = "ceiling_bench",
3559 srcs = ["bench/ceiling.cc"],
3560 copts = xnnpack_optional_tflite_copts(),
3561 tags = ["nowin32"],
3562 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3563)
3564
3565xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3566 name = "channel_shuffle_bench",
3567 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3568 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3569)
3570
3571xnnpack_benchmark(
3572 name = "convolution_bench",
3573 srcs = ["bench/convolution.cc"],
3574 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3575 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3576 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3577)
3578
3579xnnpack_benchmark(
3580 name = "deconvolution_bench",
3581 srcs = ["bench/deconvolution.cc"],
3582 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3583 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3584 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3585)
3586
3587xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3588 name = "floor_bench",
3589 srcs = ["bench/floor.cc"],
3590 copts = xnnpack_optional_tflite_copts(),
3591 tags = ["nowin32"],
3592 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3593)
3594
3595xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3596 name = "global_average_pooling_bench",
3597 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3598 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3599)
3600
3601xnnpack_benchmark(
3602 name = "max_pooling_bench",
3603 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3604 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3605)
3606
3607xnnpack_benchmark(
3608 name = "sigmoid_bench",
3609 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3610 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3611 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3612 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3613)
3614
3615xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3616 name = "prelu_bench",
3617 srcs = ["bench/prelu.cc"],
3618 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3619 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3620 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3621)
3622
3623xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3624 name = "softmax_bench",
3625 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3626 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3627 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3628 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3629)
3630
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3631xnnpack_benchmark(
3632 name = "truncation_bench",
3633 srcs = ["bench/truncation.cc"],
3634 deps = OPERATOR_BENCHMARK_DEPS,
3635)
3636
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3637############################# End-to-end benchmarks ############################
3638
3639cc_library(
3640 name = "mobilenet_v1",
3641 srcs = ["models/mobilenet-v1.cc"],
3642 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3643 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3644 linkstatic = True,
3645 deps = [
3646 ":XNNPACK",
3647 "@pthreadpool",
3648 ],
3649)
3650
3651cc_library(
3652 name = "mobilenet_v2",
3653 srcs = ["models/mobilenet-v2.cc"],
3654 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3655 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3656 linkstatic = True,
3657 deps = [
3658 ":XNNPACK",
3659 "@pthreadpool",
3660 ],
3661)
3662
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3663cc_library(
3664 name = "mobilenet_v3_large",
3665 srcs = ["models/mobilenet-v3-large.cc"],
3666 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3667 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3668 linkstatic = True,
3669 deps = [
3670 ":XNNPACK",
3671 "@pthreadpool",
3672 ],
3673)
3674
3675cc_library(
3676 name = "mobilenet_v3_small",
3677 srcs = ["models/mobilenet-v3-small.cc"],
3678 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3679 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3680 linkstatic = True,
3681 deps = [
3682 ":XNNPACK",
3683 "@pthreadpool",
3684 ],
3685)
3686
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3687xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3688 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3689 srcs = [
3690 "bench/f32-dwconv-e2e.cc",
3691 "bench/end2end.h",
3692 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3693 deps = MICROKERNEL_BENCHMARK_DEPS + [
3694 ":XNNPACK",
3695 ":mobilenet_v1",
3696 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3697 ":mobilenet_v3_large",
3698 ":mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3699 ],
3700)
3701
3702xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3703 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3704 srcs = [
3705 "bench/f32-gemm-e2e.cc",
3706 "bench/end2end.h",
3707 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3708 deps = MICROKERNEL_BENCHMARK_DEPS + [
3709 ":XNNPACK",
3710 ":mobilenet_v1",
3711 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3712 ":mobilenet_v3_large",
3713 ":mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3714 ],
3715)
3716
3717xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3718 name = "end2end_bench",
3719 srcs = ["bench/end2end.cc"],
3720 deps = [
3721 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3722 ":bench_utils",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3723 ":mobilenet_v1",
3724 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3725 ":mobilenet_v3_large",
3726 ":mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3727 "@pthreadpool",
3728 ],
3729)
3730
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3731#################### Accuracy evaluation for math functions ####################
3732
3733xnnpack_benchmark(
3734 name = "f32_exp_eval",
3735 srcs = [
3736 "eval/f32-exp.cc",
3737 "src/xnnpack/AlignedAllocator.h",
3738 ] + ACCURACY_EVAL_HDRS,
3739 deps = ACCURACY_EVAL_DEPS,
3740)
3741
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3742xnnpack_benchmark(
3743 name = "f32_expminus_eval",
3744 srcs = [
3745 "eval/f32-expminus.cc",
3746 "src/xnnpack/AlignedAllocator.h",
3747 ] + ACCURACY_EVAL_HDRS,
3748 deps = ACCURACY_EVAL_DEPS,
3749)
3750
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3751xnnpack_benchmark(
3752 name = "f32_extexp_eval",
3753 srcs = [
3754 "eval/f32-extexp.cc",
3755 "src/xnnpack/AlignedAllocator.h",
3756 ] + ACCURACY_EVAL_HDRS,
3757 deps = ACCURACY_EVAL_DEPS,
3758)
3759
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3760xnnpack_unit_test(
3761 name = "f32_roundne_eval",
3762 srcs = [
3763 "eval/f32-roundne.cc",
3764 "src/xnnpack/AlignedAllocator.h",
3765 "src/xnnpack/math-stubs.h",
3766 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3767 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3768 deps = MICROKERNEL_TEST_DEPS,
3769)
3770
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3771xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3772 name = "f32_roundd_eval",
3773 srcs = [
3774 "eval/f32-roundd.cc",
3775 "src/xnnpack/AlignedAllocator.h",
3776 "src/xnnpack/math-stubs.h",
3777 ] + MICROKERNEL_TEST_HDRS,
3778 automatic = False,
3779 deps = MICROKERNEL_TEST_DEPS,
3780)
3781
3782xnnpack_unit_test(
3783 name = "f32_roundu_eval",
3784 srcs = [
3785 "eval/f32-roundu.cc",
3786 "src/xnnpack/AlignedAllocator.h",
3787 "src/xnnpack/math-stubs.h",
3788 ] + MICROKERNEL_TEST_HDRS,
3789 automatic = False,
3790 deps = MICROKERNEL_TEST_DEPS,
3791)
3792
3793xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3794 name = "f32_roundz_eval",
3795 srcs = [
3796 "eval/f32-roundz.cc",
3797 "src/xnnpack/AlignedAllocator.h",
3798 "src/xnnpack/math-stubs.h",
3799 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3800 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3801 deps = MICROKERNEL_TEST_DEPS,
3802)
3803
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3804xnnpack_benchmark(
3805 name = "f32_sigmoid_eval",
3806 srcs = [
3807 "eval/f32-sigmoid.cc",
3808 "src/xnnpack/AlignedAllocator.h",
3809 ] + ACCURACY_EVAL_HDRS,
3810 deps = ACCURACY_EVAL_DEPS,
3811)
3812
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3813######################### Unit tests for micro-kernels #########################
3814
3815xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3816 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3817 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3818 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3819 "test/gemm-microkernel-tester.h",
3820 "src/xnnpack/AlignedAllocator.h",
3821 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3822 deps = MICROKERNEL_TEST_DEPS,
3823)
3824
3825xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3826 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3827 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3828 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3829 "test/spmm-microkernel-tester.h",
3830 "src/xnnpack/AlignedAllocator.h",
3831 ] + MICROKERNEL_TEST_HDRS,
3832 deps = MICROKERNEL_TEST_DEPS,
3833)
3834
3835xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3836 name = "f32_argmaxpool_test",
3837 srcs = [
3838 "test/f32-argmaxpool.cc",
3839 "test/argmaxpool-microkernel-tester.h",
3840 "src/xnnpack/AlignedAllocator.h",
3841 ] + MICROKERNEL_TEST_HDRS,
3842 deps = MICROKERNEL_TEST_DEPS,
3843)
3844
3845xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3846 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3847 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3848 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3849 "test/avgpool-microkernel-tester.h",
3850 "src/xnnpack/AlignedAllocator.h",
3851 ] + MICROKERNEL_TEST_HDRS,
3852 deps = MICROKERNEL_TEST_DEPS,
3853)
3854
3855xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3856 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3857 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3858 "test/f32-ibilinear.cc",
3859 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3860 "src/xnnpack/AlignedAllocator.h",
3861 ] + MICROKERNEL_TEST_HDRS,
3862 deps = MICROKERNEL_TEST_DEPS,
3863)
3864
3865xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3866 name = "f16_clamp_test",
3867 srcs = [
3868 "test/f16-clamp.cc",
3869 "test/clamp-microkernel-tester.h",
3870 ] + MICROKERNEL_TEST_HDRS,
3871 deps = MICROKERNEL_TEST_DEPS,
3872)
3873
3874xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3875 name = "f32_clamp_test",
3876 srcs = [
3877 "test/f32-clamp.cc",
3878 "test/clamp-microkernel-tester.h",
3879 ] + MICROKERNEL_TEST_HDRS,
3880 deps = MICROKERNEL_TEST_DEPS,
3881)
3882
3883xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3884 name = "f32_igemm_test",
3885 srcs = [
3886 "test/f32-igemm.cc",
3887 "test/gemm-microkernel-tester.h",
3888 "src/xnnpack/AlignedAllocator.h",
3889 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3890 deps = MICROKERNEL_TEST_DEPS,
3891)
3892
3893xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3894 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3895 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3896 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3897 "test/gemm-microkernel-tester.h",
3898 "src/xnnpack/AlignedAllocator.h",
3899 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3900 deps = MICROKERNEL_TEST_DEPS,
3901)
3902
3903xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]3904 name = "f32_igemm_minmax_test",
3905 srcs = [
3906 "test/f32-igemm-minmax.cc",
3907 "test/gemm-microkernel-tester.h",
3908 "src/xnnpack/AlignedAllocator.h",
3909 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3910 deps = MICROKERNEL_TEST_DEPS,
3911)
3912
3913xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]3914 name = "f16_igemm_minmax_test",
3915 srcs = [
3916 "test/f16-igemm-minmax.cc",
3917 "test/gemm-microkernel-tester.h",
3918 "src/xnnpack/AlignedAllocator.h",
3919 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3920 deps = MICROKERNEL_TEST_DEPS,
3921)
3922
3923xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3924 name = "f32_conv_hwc_test",
3925 srcs = [
3926 "test/f32-conv-hwc.cc",
3927 "test/conv-hwc-microkernel-tester.h",
3928 "src/xnnpack/AlignedAllocator.h",
3929 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3930 deps = MICROKERNEL_TEST_DEPS,
3931)
3932
3933xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3934 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3935 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3936 "test/f32-conv-hwc2chw.cc",
3937 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3938 "src/xnnpack/AlignedAllocator.h",
3939 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3940 deps = MICROKERNEL_TEST_DEPS,
3941)
3942
3943xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3944 name = "f32_dwconv_test",
3945 srcs = [
3946 "test/f32-dwconv.cc",
3947 "test/dwconv-microkernel-tester.h",
3948 "src/xnnpack/AlignedAllocator.h",
3949 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3950 deps = MICROKERNEL_TEST_DEPS,
3951)
3952
3953xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3954 name = "f16_dwconv_minmax_test",
3955 srcs = [
3956 "test/f16-dwconv-minmax.cc",
3957 "test/dwconv-microkernel-tester.h",
3958 "src/xnnpack/AlignedAllocator.h",
3959 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3960 deps = MICROKERNEL_TEST_DEPS,
3961)
3962
3963xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3964 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3965 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3966 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3967 "test/dwconv-microkernel-tester.h",
3968 "src/xnnpack/AlignedAllocator.h",
3969 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3970 deps = MICROKERNEL_TEST_DEPS,
3971)
3972
3973xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3974 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3975 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3976 "test/f32-dwconv-chw.cc",
3977 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3978 "src/xnnpack/AlignedAllocator.h",
3979 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3980 deps = MICROKERNEL_TEST_DEPS,
3981)
3982
3983xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]3984 name = "f16_gavgpool_minmax_test",
3985 srcs = [
3986 "test/f16-gavgpool-minmax.cc",
3987 "test/gavgpool-microkernel-tester.h",
3988 "src/xnnpack/AlignedAllocator.h",
3989 ] + MICROKERNEL_TEST_HDRS,
3990 deps = MICROKERNEL_TEST_DEPS,
3991)
3992
3993xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3994 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3995 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3996 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3997 "test/gavgpool-microkernel-tester.h",
3998 "src/xnnpack/AlignedAllocator.h",
3999 ] + MICROKERNEL_TEST_HDRS,
4000 deps = MICROKERNEL_TEST_DEPS,
4001)
4002
4003xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4004 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4005 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4006 "test/f32-gavgpool-cw.cc",
4007 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4008 "src/xnnpack/AlignedAllocator.h",
4009 ] + MICROKERNEL_TEST_HDRS,
4010 deps = MICROKERNEL_TEST_DEPS,
4011)
4012
4013xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]4014 name = "f32_gemm_test",
4015 srcs = [
4016 "test/f32-gemm.cc",
4017 "test/gemm-microkernel-tester.h",
4018 "src/xnnpack/AlignedAllocator.h",
4019 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4020 deps = MICROKERNEL_TEST_DEPS,
4021)
4022
4023xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]4024 name = "f32_gemm_relu_test",
4025 srcs = [
4026 "test/f32-gemm-relu.cc",
4027 "test/gemm-microkernel-tester.h",
4028 "src/xnnpack/AlignedAllocator.h",
4029 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4030 deps = MICROKERNEL_TEST_DEPS,
4031)
4032
4033xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4034 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4035 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4036 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4037 "test/gemm-microkernel-tester.h",
4038 "src/xnnpack/AlignedAllocator.h",
4039 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4040 deps = MICROKERNEL_TEST_DEPS,
4041)
4042
4043xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4044 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4045 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4046 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4047 "test/gemm-microkernel-tester.h",
4048 "src/xnnpack/AlignedAllocator.h",
4049 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4050 deps = MICROKERNEL_TEST_DEPS,
4051)
4052
4053xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4054 name = "f16_hswish_test",
4055 srcs = [
4056 "test/f16-hswish.cc",
4057 "test/hswish-microkernel-tester.h",
4058 ] + MICROKERNEL_TEST_HDRS,
4059 deps = MICROKERNEL_TEST_DEPS,
4060)
4061
4062xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4063 name = "f32_hswish_test",
4064 srcs = [
4065 "test/f32-hswish.cc",
4066 "test/hswish-microkernel-tester.h",
4067 ] + MICROKERNEL_TEST_HDRS,
4068 deps = MICROKERNEL_TEST_DEPS,
4069)
4070
4071xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4072 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4073 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4074 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4075 "test/maxpool-microkernel-tester.h",
4076 ] + MICROKERNEL_TEST_HDRS,
4077 deps = MICROKERNEL_TEST_DEPS,
4078)
4079
4080xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4081 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4082 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4083 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4084 "test/avgpool-microkernel-tester.h",
4085 "src/xnnpack/AlignedAllocator.h",
4086 ] + MICROKERNEL_TEST_HDRS,
4087 deps = MICROKERNEL_TEST_DEPS,
4088)
4089
4090xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4091 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4092 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4093 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4094 "test/gemm-microkernel-tester.h",
4095 "src/xnnpack/AlignedAllocator.h",
4096 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4097 deps = MICROKERNEL_TEST_DEPS,
4098)
4099
4100xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4101 name = "f16_prelu_test",
4102 srcs = [
4103 "test/f16-prelu.cc",
4104 "test/prelu-microkernel-tester.h",
4105 "src/xnnpack/AlignedAllocator.h",
4106 ] + MICROKERNEL_TEST_HDRS,
4107 deps = MICROKERNEL_TEST_DEPS,
4108)
4109
4110xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4111 name = "f32_prelu_test",
4112 srcs = [
4113 "test/f32-prelu.cc",
4114 "test/prelu-microkernel-tester.h",
4115 "src/xnnpack/AlignedAllocator.h",
4116 ] + MICROKERNEL_TEST_HDRS,
4117 deps = MICROKERNEL_TEST_DEPS,
4118)
4119
4120xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4121 name = "f32_raddexpminusmax_test",
4122 srcs = [
4123 "test/f32-raddexpminusmax.cc",
4124 "test/raddexpminusmax-microkernel-tester.h",
4125 ] + MICROKERNEL_TEST_HDRS,
4126 deps = MICROKERNEL_TEST_DEPS,
4127)
4128
4129xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4130 name = "f32_raddextexp_test",
4131 srcs = [
4132 "test/f32-raddextexp.cc",
4133 "test/raddextexp-microkernel-tester.h",
4134 ] + MICROKERNEL_TEST_HDRS,
4135 deps = MICROKERNEL_TEST_DEPS,
4136)
4137
4138xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4139 name = "f32_raddstoreexpminusmax_test",
4140 srcs = [
4141 "test/f32-raddstoreexpminusmax.cc",
4142 "test/raddstoreexpminusmax-microkernel-tester.h",
4143 ] + MICROKERNEL_TEST_HDRS,
4144 deps = MICROKERNEL_TEST_DEPS,
4145)
4146
4147xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4148 name = "f32_rmax_test",
4149 srcs = [
4150 "test/f32-rmax.cc",
4151 "test/rmax-microkernel-tester.h",
4152 ] + MICROKERNEL_TEST_HDRS,
4153 deps = MICROKERNEL_TEST_DEPS,
4154)
4155
4156xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4157 name = "f32_sigmoid_test",
4158 srcs = [
4159 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4160 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4161 ] + MICROKERNEL_TEST_HDRS,
4162 deps = MICROKERNEL_TEST_DEPS,
4163)
4164
4165xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4166 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4167 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4168 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4169 "test/spmm-microkernel-tester.h",
4170 "src/xnnpack/AlignedAllocator.h",
4171 ] + MICROKERNEL_TEST_HDRS,
4172 deps = MICROKERNEL_TEST_DEPS,
4173)
4174
4175xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]4176 name = "f16_vadd_minmax_test",
4177 srcs = [
4178 "test/f16-vadd-minmax.cc",
4179 "test/vbinary-microkernel-tester.h",
4180 ] + MICROKERNEL_TEST_HDRS,
4181 deps = MICROKERNEL_TEST_DEPS,
4182)
4183
4184xnnpack_unit_test(
4185 name = "f16_vaddc_minmax_test",
4186 srcs = [
4187 "test/f16-vaddc-minmax.cc",
4188 "test/vbinaryc-microkernel-tester.h",
4189 ] + MICROKERNEL_TEST_HDRS,
4190 deps = MICROKERNEL_TEST_DEPS,
4191)
4192
4193xnnpack_unit_test(
4194 name = "f16_vdiv_minmax_test",
4195 srcs = [
4196 "test/f16-vdiv-minmax.cc",
4197 "test/vbinary-microkernel-tester.h",
4198 ] + MICROKERNEL_TEST_HDRS,
4199 deps = MICROKERNEL_TEST_DEPS,
4200)
4201
4202xnnpack_unit_test(
4203 name = "f16_vdivc_minmax_test",
4204 srcs = [
4205 "test/f16-vdivc-minmax.cc",
4206 "test/vbinaryc-microkernel-tester.h",
4207 ] + MICROKERNEL_TEST_HDRS,
4208 deps = MICROKERNEL_TEST_DEPS,
4209)
4210
4211xnnpack_unit_test(
4212 name = "f16_vrdivc_minmax_test",
4213 srcs = [
4214 "test/f16-vrdivc-minmax.cc",
4215 "test/vbinaryc-microkernel-tester.h",
4216 ] + MICROKERNEL_TEST_HDRS,
4217 deps = MICROKERNEL_TEST_DEPS,
4218)
4219
4220xnnpack_unit_test(
4221 name = "f16_vmax_test",
4222 srcs = [
4223 "test/f16-vmax.cc",
4224 "test/vbinary-microkernel-tester.h",
4225 ] + MICROKERNEL_TEST_HDRS,
4226 deps = MICROKERNEL_TEST_DEPS,
4227)
4228
4229xnnpack_unit_test(
4230 name = "f16_vmaxc_test",
4231 srcs = [
4232 "test/f16-vmaxc.cc",
4233 "test/vbinaryc-microkernel-tester.h",
4234 ] + MICROKERNEL_TEST_HDRS,
4235 deps = MICROKERNEL_TEST_DEPS,
4236)
4237
4238xnnpack_unit_test(
4239 name = "f16_vmin_test",
4240 srcs = [
4241 "test/f16-vmin.cc",
4242 "test/vbinary-microkernel-tester.h",
4243 ] + MICROKERNEL_TEST_HDRS,
4244 deps = MICROKERNEL_TEST_DEPS,
4245)
4246
4247xnnpack_unit_test(
4248 name = "f16_vminc_test",
4249 srcs = [
4250 "test/f16-vminc.cc",
4251 "test/vbinaryc-microkernel-tester.h",
4252 ] + MICROKERNEL_TEST_HDRS,
4253 deps = MICROKERNEL_TEST_DEPS,
4254)
4255
4256xnnpack_unit_test(
4257 name = "f16_vmul_minmax_test",
4258 srcs = [
4259 "test/f16-vmul-minmax.cc",
4260 "test/vbinary-microkernel-tester.h",
4261 ] + MICROKERNEL_TEST_HDRS,
4262 deps = MICROKERNEL_TEST_DEPS,
4263)
4264
4265xnnpack_unit_test(
4266 name = "f16_vmulc_minmax_test",
4267 srcs = [
4268 "test/f16-vmulc-minmax.cc",
4269 "test/vbinaryc-microkernel-tester.h",
4270 ] + MICROKERNEL_TEST_HDRS,
4271 deps = MICROKERNEL_TEST_DEPS,
4272)
4273
4274xnnpack_unit_test(
4275 name = "f16_vsub_minmax_test",
4276 srcs = [
4277 "test/f16-vsub-minmax.cc",
4278 "test/vbinary-microkernel-tester.h",
4279 ] + MICROKERNEL_TEST_HDRS,
4280 deps = MICROKERNEL_TEST_DEPS,
4281)
4282
4283xnnpack_unit_test(
4284 name = "f16_vsubc_minmax_test",
4285 srcs = [
4286 "test/f16-vsubc-minmax.cc",
4287 "test/vbinaryc-microkernel-tester.h",
4288 ] + MICROKERNEL_TEST_HDRS,
4289 deps = MICROKERNEL_TEST_DEPS,
4290)
4291
4292xnnpack_unit_test(
4293 name = "f16_vrsubc_minmax_test",
4294 srcs = [
4295 "test/f16-vrsubc-minmax.cc",
4296 "test/vbinaryc-microkernel-tester.h",
4297 ] + MICROKERNEL_TEST_HDRS,
4298 deps = MICROKERNEL_TEST_DEPS,
4299)
4300
4301xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4302 name = "f32_vabs_test",
4303 srcs = [
4304 "test/f32-vabs.cc",
4305 "test/vunary-microkernel-tester.h",
4306 ] + MICROKERNEL_TEST_HDRS,
4307 deps = MICROKERNEL_TEST_DEPS,
4308)
4309
4310xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4311 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4312 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4313 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4314 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4315 ] + MICROKERNEL_TEST_HDRS,
4316 deps = MICROKERNEL_TEST_DEPS,
4317)
4318
4319xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4320 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4321 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4322 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4323 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4324 ] + MICROKERNEL_TEST_HDRS,
4325 deps = MICROKERNEL_TEST_DEPS,
4326)
4327
4328xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4329 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4330 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4331 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4332 "test/vbinary-microkernel-tester.h",
4333 ] + MICROKERNEL_TEST_HDRS,
4334 deps = MICROKERNEL_TEST_DEPS,
4335)
4336
4337xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4338 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4339 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4340 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4341 "test/vbinaryc-microkernel-tester.h",
4342 ] + MICROKERNEL_TEST_HDRS,
4343 deps = MICROKERNEL_TEST_DEPS,
4344)
4345
4346xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4347 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4348 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4349 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4350 "test/vbinaryc-microkernel-tester.h",
4351 ] + MICROKERNEL_TEST_HDRS,
4352 deps = MICROKERNEL_TEST_DEPS,
4353)
4354
4355xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4356 name = "f32_vmax_test",
4357 srcs = [
4358 "test/f32-vmax.cc",
4359 "test/vbinary-microkernel-tester.h",
4360 ] + MICROKERNEL_TEST_HDRS,
4361 deps = MICROKERNEL_TEST_DEPS,
4362)
4363
4364xnnpack_unit_test(
4365 name = "f32_vmaxc_test",
4366 srcs = [
4367 "test/f32-vmaxc.cc",
4368 "test/vbinaryc-microkernel-tester.h",
4369 ] + MICROKERNEL_TEST_HDRS,
4370 deps = MICROKERNEL_TEST_DEPS,
4371)
4372
4373xnnpack_unit_test(
4374 name = "f32_vmin_test",
4375 srcs = [
4376 "test/f32-vmin.cc",
4377 "test/vbinary-microkernel-tester.h",
4378 ] + MICROKERNEL_TEST_HDRS,
4379 deps = MICROKERNEL_TEST_DEPS,
4380)
4381
4382xnnpack_unit_test(
4383 name = "f32_vminc_test",
4384 srcs = [
4385 "test/f32-vminc.cc",
4386 "test/vbinaryc-microkernel-tester.h",
4387 ] + MICROKERNEL_TEST_HDRS,
4388 deps = MICROKERNEL_TEST_DEPS,
4389)
4390
4391xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4392 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4393 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4394 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4395 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4396 ] + MICROKERNEL_TEST_HDRS,
4397 deps = MICROKERNEL_TEST_DEPS,
4398)
4399
4400xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4401 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4402 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4403 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4404 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4405 ] + MICROKERNEL_TEST_HDRS,
4406 deps = MICROKERNEL_TEST_DEPS,
4407)
4408
4409xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4410 name = "f16_vmulcaddc_minmax_test",
4411 srcs = [
4412 "test/f16-vmulcaddc-minmax.cc",
4413 "test/vmulcaddc-microkernel-tester.h",
4414 "src/xnnpack/AlignedAllocator.h",
4415 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4416 deps = MICROKERNEL_TEST_DEPS,
4417)
4418
4419xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4420 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4421 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4422 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4423 "test/vmulcaddc-microkernel-tester.h",
4424 "src/xnnpack/AlignedAllocator.h",
4425 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4426 deps = MICROKERNEL_TEST_DEPS,
4427)
4428
4429xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]4430 name = "f32_vlrelu_test",
4431 srcs = [
4432 "test/f32-vlrelu.cc",
4433 "test/vunary-microkernel-tester.h",
4434 ] + MICROKERNEL_TEST_HDRS,
4435 deps = MICROKERNEL_TEST_DEPS,
4436)
4437
4438xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4439 name = "f32_vneg_test",
4440 srcs = [
4441 "test/f32-vneg.cc",
4442 "test/vunary-microkernel-tester.h",
4443 ] + MICROKERNEL_TEST_HDRS,
4444 deps = MICROKERNEL_TEST_DEPS,
4445)
4446
4447xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4448 name = "f32_vrndne_test",
4449 srcs = [
4450 "test/f32-vrndne.cc",
4451 "test/vunary-microkernel-tester.h",
4452 ] + MICROKERNEL_TEST_HDRS,
4453 deps = MICROKERNEL_TEST_DEPS,
4454)
4455
4456xnnpack_unit_test(
4457 name = "f32_vrndz_test",
4458 srcs = [
4459 "test/f32-vrndz.cc",
4460 "test/vunary-microkernel-tester.h",
4461 ] + MICROKERNEL_TEST_HDRS,
4462 deps = MICROKERNEL_TEST_DEPS,
4463)
4464
4465xnnpack_unit_test(
4466 name = "f32_vrndu_test",
4467 srcs = [
4468 "test/f32-vrndu.cc",
4469 "test/vunary-microkernel-tester.h",
4470 ] + MICROKERNEL_TEST_HDRS,
4471 deps = MICROKERNEL_TEST_DEPS,
4472)
4473
4474xnnpack_unit_test(
4475 name = "f32_vrndd_test",
4476 srcs = [
4477 "test/f32-vrndd.cc",
4478 "test/vunary-microkernel-tester.h",
4479 ] + MICROKERNEL_TEST_HDRS,
4480 deps = MICROKERNEL_TEST_DEPS,
4481)
4482
4483xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4484 name = "f32_vscale_test",
4485 srcs = [
4486 "test/f32-vscale.cc",
4487 "test/vscale-microkernel-tester.h",
4488 ] + MICROKERNEL_TEST_HDRS,
4489 deps = MICROKERNEL_TEST_DEPS,
4490)
4491
4492xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4493 name = "f32_vscaleexpminusmax_test",
4494 srcs = [
4495 "test/f32-vscaleexpminusmax.cc",
4496 "test/vscaleexpminusmax-microkernel-tester.h",
4497 ] + MICROKERNEL_TEST_HDRS,
4498 deps = MICROKERNEL_TEST_DEPS,
4499)
4500
4501xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4502 name = "f32_vscaleextexp_test",
4503 srcs = [
4504 "test/f32-vscaleextexp.cc",
4505 "test/vscaleextexp-microkernel-tester.h",
4506 ] + MICROKERNEL_TEST_HDRS,
4507 deps = MICROKERNEL_TEST_DEPS,
4508)
4509
4510xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4511 name = "f32_vsqr_test",
4512 srcs = [
4513 "test/f32-vsqr.cc",
4514 "test/vunary-microkernel-tester.h",
4515 ] + MICROKERNEL_TEST_HDRS,
4516 deps = MICROKERNEL_TEST_DEPS,
4517)
4518
4519xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4520 name = "f32_vsqrdiff_test",
4521 srcs = [
4522 "test/f32-vsqrdiff.cc",
4523 "test/vbinary-microkernel-tester.h",
4524 ] + MICROKERNEL_TEST_HDRS,
4525 deps = MICROKERNEL_TEST_DEPS,
4526)
4527
4528xnnpack_unit_test(
4529 name = "f32_vsqrdiffc_test",
4530 srcs = [
4531 "test/f32-vsqrdiffc.cc",
4532 "test/vbinaryc-microkernel-tester.h",
4533 ] + MICROKERNEL_TEST_HDRS,
4534 deps = MICROKERNEL_TEST_DEPS,
4535)
4536
4537xnnpack_unit_test(
4538 name = "f32_vrsqrdiffc_test",
4539 srcs = [
4540 "test/f32-vrsqrdiffc.cc",
4541 "test/vbinaryc-microkernel-tester.h",
4542 ] + MICROKERNEL_TEST_HDRS,
4543 deps = MICROKERNEL_TEST_DEPS,
4544)
4545
4546xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4547 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4548 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4549 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4550 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4551 ] + MICROKERNEL_TEST_HDRS,
4552 deps = MICROKERNEL_TEST_DEPS,
4553)
4554
4555xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4556 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4557 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4558 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4559 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4560 ] + MICROKERNEL_TEST_HDRS,
4561 deps = MICROKERNEL_TEST_DEPS,
4562)
4563
4564xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4565 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4566 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4567 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4568 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4569 ] + MICROKERNEL_TEST_HDRS,
4570 deps = MICROKERNEL_TEST_DEPS,
4571)
4572
4573xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4574 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4575 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4576 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4577 "test/avgpool-microkernel-tester.h",
4578 "src/xnnpack/AlignedAllocator.h",
4579 ] + MICROKERNEL_TEST_HDRS,
4580 deps = MICROKERNEL_TEST_DEPS,
4581)
4582
4583xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4584 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4585 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4586 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4587 "test/gemm-microkernel-tester.h",
4588 "src/xnnpack/AlignedAllocator.h",
4589 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4590 deps = MICROKERNEL_TEST_DEPS,
4591)
4592
4593xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4594 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4595 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4596 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4597 "test/dwconv-microkernel-tester.h",
4598 "src/xnnpack/AlignedAllocator.h",
4599 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4600 deps = MICROKERNEL_TEST_DEPS,
4601)
4602
4603xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4604 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4605 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4606 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4607 "test/gavgpool-microkernel-tester.h",
4608 "src/xnnpack/AlignedAllocator.h",
4609 ] + MICROKERNEL_TEST_HDRS,
4610 deps = MICROKERNEL_TEST_DEPS,
4611)
4612
4613xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4614 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4615 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4616 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4617 "test/gemm-microkernel-tester.h",
4618 "src/xnnpack/AlignedAllocator.h",
4619 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4620 deps = MICROKERNEL_TEST_DEPS,
4621)
4622
4623xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4624 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4625 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4626 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4627 "test/vadd-microkernel-tester.h",
4628 ] + MICROKERNEL_TEST_HDRS,
4629 deps = MICROKERNEL_TEST_DEPS,
4630)
4631
4632xnnpack_unit_test(
4633 name = "u8_clamp_test",
4634 srcs = [
4635 "test/u8-clamp.cc",
4636 "test/clamp-microkernel-tester.h",
4637 ] + MICROKERNEL_TEST_HDRS,
4638 deps = MICROKERNEL_TEST_DEPS,
4639)
4640
4641xnnpack_unit_test(
4642 name = "u8_lut32norm_test",
4643 srcs = [
4644 "test/u8-lut32norm.cc",
4645 "test/lut-norm-microkernel-tester.h",
4646 ] + MICROKERNEL_TEST_HDRS,
4647 deps = MICROKERNEL_TEST_DEPS,
4648)
4649
4650xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4651 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4652 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4653 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4654 "test/maxpool-microkernel-tester.h",
4655 ] + MICROKERNEL_TEST_HDRS,
4656 deps = MICROKERNEL_TEST_DEPS,
4657)
4658
4659xnnpack_unit_test(
4660 name = "u8_rmax_test",
4661 srcs = [
4662 "test/u8-rmax.cc",
4663 "test/rmax-microkernel-tester.h",
4664 ] + MICROKERNEL_TEST_HDRS,
4665 deps = MICROKERNEL_TEST_DEPS,
4666)
4667
4668xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4669 name = "x32_fill_test",
4670 srcs = [
4671 "test/x32-fill.cc",
4672 "test/fill-microkernel-tester.h",
4673 ] + MICROKERNEL_TEST_HDRS,
4674 deps = MICROKERNEL_TEST_DEPS,
4675)
4676
4677xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4678 name = "x32_packx_test",
4679 srcs = [
4680 "test/x32-packx.cc",
4681 "test/pack-microkernel-tester.h",
4682 "src/xnnpack/AlignedAllocator.h",
4683 ] + MICROKERNEL_TEST_HDRS,
4684 deps = MICROKERNEL_TEST_DEPS,
4685)
4686
4687xnnpack_unit_test(
4688 name = "x32_pad_test",
4689 srcs = [
4690 "test/x32-pad.cc",
4691 "test/pad-microkernel-tester.h",
4692 ] + MICROKERNEL_TEST_HDRS,
4693 deps = MICROKERNEL_TEST_DEPS,
4694)
4695
4696xnnpack_unit_test(
4697 name = "x32_unpool_test",
4698 srcs = [
4699 "test/x32-unpool.cc",
4700 "test/unpool-microkernel-tester.h",
4701 ] + MICROKERNEL_TEST_HDRS,
4702 deps = MICROKERNEL_TEST_DEPS,
4703)
4704
4705xnnpack_unit_test(
4706 name = "x32_zip_test",
4707 srcs = [
4708 "test/x32-zip.cc",
4709 "test/zip-microkernel-tester.h",
4710 ] + MICROKERNEL_TEST_HDRS,
4711 deps = MICROKERNEL_TEST_DEPS,
4712)
4713
4714xnnpack_unit_test(
4715 name = "x8_lut_test",
4716 srcs = [
4717 "test/x8-lut.cc",
4718 "test/lut-microkernel-tester.h",
4719 ] + MICROKERNEL_TEST_HDRS,
4720 deps = MICROKERNEL_TEST_DEPS,
4721)
4722
4723xnnpack_unit_test(
4724 name = "x8_zip_test",
4725 srcs = [
4726 "test/x8-zip.cc",
4727 "test/zip-microkernel-tester.h",
4728 ] + MICROKERNEL_TEST_HDRS,
4729 deps = MICROKERNEL_TEST_DEPS,
4730)
4731
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4732xnnpack_unit_test(
4733 name = "requantization_test",
4734 srcs = [
4735 "src/xnnpack/requantization-stubs.h",
4736 "test/requantization.cc",
4737 "test/requantization-tester.h",
4738 ] + MICROKERNEL_TEST_HDRS,
4739 deps = MICROKERNEL_TEST_DEPS,
4740)
4741
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4742########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4743
4744xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4745 name = "operator_size_test",
4746 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4747 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4748)
4749
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4750xnnpack_binary(
4751 name = "subgraph_size_test",
4752 srcs = ["test/subgraph-size.c"],
4753 deps = [":XNNPACK"],
4754)
4755
4756########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4757
4758xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4759 name = "abs_nc_test",
4760 srcs = [
4761 "test/abs-nc.cc",
4762 "test/abs-operator-tester.h",
4763 ],
4764 deps = OPERATOR_TEST_DEPS,
4765)
4766
4767xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4768 name = "add_nd_test",
4769 srcs = [
4770 "test/add-nd.cc",
4771 "test/binary-elementwise-operator-tester.h",
4772 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4773 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4774)
4775
4776xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4777 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4778 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4779 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4780 "test/argmax-pooling-operator-tester.h",
4781 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4782 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4783)
4784
4785xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4786 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4787 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4788 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4789 "test/average-pooling-operator-tester.h",
4790 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4791 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4792)
4793
4794xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4795 name = "bankers_rounding_nc_test",
4796 srcs = [
4797 "test/bankers-rounding-nc.cc",
4798 "test/bankers-rounding-operator-tester.h",
4799 ],
4800 deps = OPERATOR_TEST_DEPS,
4801)
4802
4803xnnpack_unit_test(
4804 name = "ceiling_nc_test",
4805 srcs = [
4806 "test/ceiling-nc.cc",
4807 "test/ceiling-operator-tester.h",
4808 ],
4809 deps = OPERATOR_TEST_DEPS,
4810)
4811
4812xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4813 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4814 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4815 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4816 "test/channel-shuffle-operator-tester.h",
4817 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4818 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4819)
4820
4821xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4822 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4823 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4824 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4825 "test/clamp-operator-tester.h",
4826 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4827 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4828)
4829
4830xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4831 name = "constant_pad_nd_test",
4832 srcs = [
4833 "test/constant-pad-nd.cc",
4834 "test/constant-pad-operator-tester.h",
4835 ],
4836 deps = OPERATOR_TEST_DEPS,
4837)
4838
4839xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4840 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4841 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4842 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4843 "test/convolution-operator-tester.h",
4844 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4845 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4846)
4847
4848xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4849 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4850 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4851 "test/convolution-nchw.cc",
4852 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4853 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4854 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4855)
4856
4857xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]4858 name = "copy_nc_test",
4859 srcs = [
4860 "test/copy-nc.cc",
4861 "test/copy-operator-tester.h",
4862 ],
4863 deps = OPERATOR_TEST_DEPS,
4864)
4865
4866xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4867 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4868 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4869 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4870 "test/deconvolution-operator-tester.h",
4871 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4872 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4873)
4874
4875xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4876 name = "divide_nd_test",
4877 srcs = [
4878 "test/binary-elementwise-operator-tester.h",
4879 "test/divide-nd.cc",
4880 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4881 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4882)
4883
4884xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4885 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4886 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4887 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4888 "test/fully-connected-operator-tester.h",
4889 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4890 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4891)
4892
4893xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4894 name = "floor_nc_test",
4895 srcs = [
4896 "test/floor-nc.cc",
4897 "test/floor-operator-tester.h",
4898 ],
4899 deps = OPERATOR_TEST_DEPS,
4900)
4901
4902xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4903 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4904 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4905 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4906 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -0700[diff] [blame]4907 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4908 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4909)
4910
4911xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4912 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4913 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4914 "test/global-average-pooling-ncw.cc",
4915 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4916 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4917 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4918)
4919
4920xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4921 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4922 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4923 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4924 "test/hardswish-operator-tester.h",
4925 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4926 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4927)
4928
4929xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4930 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4931 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4932 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4933 "test/leaky-relu-operator-tester.h",
4934 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4935 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4936)
4937
4938xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4939 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4940 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4941 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4942 "test/max-pooling-operator-tester.h",
4943 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4944 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4945)
4946
4947xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4948 name = "maximum_nd_test",
4949 srcs = [
4950 "test/binary-elementwise-operator-tester.h",
4951 "test/maximum-nd.cc",
4952 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4953 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4954)
4955
4956xnnpack_unit_test(
4957 name = "minimum_nd_test",
4958 srcs = [
4959 "test/binary-elementwise-operator-tester.h",
4960 "test/minimum-nd.cc",
4961 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4962 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4963)
4964
4965xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4966 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4967 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4968 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4969 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4970 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4971 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4972)
4973
4974xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4975 name = "negate_nc_test",
4976 srcs = [
4977 "test/negate-nc.cc",
4978 "test/negate-operator-tester.h",
4979 ],
4980 deps = OPERATOR_TEST_DEPS,
4981)
4982
4983xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4984 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4985 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4986 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4987 "test/prelu-operator-tester.h",
4988 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4989 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4990)
4991
4992xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4993 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4994 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4995 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4996 "test/resize-bilinear-operator-tester.h",
4997 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4998 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4999)
5000
5001xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5002 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5003 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5004 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5005 "test/sigmoid-operator-tester.h",
5006 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5007 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5008)
5009
5010xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5011 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5012 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5013 "test/softmax-nc.cc",
5014 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5015 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5016 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5017)
5018
5019xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]5020 name = "square_nc_test",
5021 srcs = [
5022 "test/square-nc.cc",
5023 "test/square-operator-tester.h",
5024 ],
5025 deps = OPERATOR_TEST_DEPS,
5026)
5027
5028xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]5029 name = "squared_difference_nd_test",
5030 srcs = [
5031 "test/binary-elementwise-operator-tester.h",
5032 "test/squared-difference-nd.cc",
5033 ],
5034 deps = OPERATOR_TEST_DEPS,
5035)
5036
5037xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5038 name = "subtract_nd_test",
5039 srcs = [
5040 "test/binary-elementwise-operator-tester.h",
5041 "test/subtract-nd.cc",
5042 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5043 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5044)
5045
5046xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5047 name = "truncation_nc_test",
5048 srcs = [
5049 "test/truncation-nc.cc",
5050 "test/truncation-operator-tester.h",
5051 ],
5052 deps = OPERATOR_TEST_DEPS,
5053)
5054
5055xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5056 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5057 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5058 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5059 "test/unpooling-operator-tester.h",
5060 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5061 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5062)
5063
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5064############################### Misc unit tests ###############################
5065
5066xnnpack_unit_test(
5067 name = "memory_planner_test",
5068 srcs = [
5069 "test/memory-planner-test.cc",
5070 ],
5071 deps = [
5072 ":XNNPACK",
5073 ":memory_planner",
5074 ],
5075)
5076
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5077############################# Build configurations #############################
5078
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5079# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5080config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5081 name = "xnn_enable_assembly_explicit_true",
5082 define_values = {"xnn_enable_assembly": "true"},
5083)
5084
5085# Disables usage of assembly kernels.
5086config_setting(
5087 name = "xnn_enable_assembly_explicit_false",
5088 define_values = {"xnn_enable_assembly": "false"},
5089)
5090
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]5091# Enables usage of sparse inference.
5092config_setting(
5093 name = "xnn_enable_sparse_explicit_true",
5094 define_values = {"xnn_enable_sparse": "true"},
5095)
5096
5097# Disables usage of sparse inference.
5098config_setting(
5099 name = "xnn_enable_sparse_explicit_false",
5100 define_values = {"xnn_enable_sparse": "false"},
5101)
5102
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]5103# Disables usage of HMP-aware optimizations.
5104config_setting(
5105 name = "xnn_enable_hmp_explicit_false",
5106 define_values = {"xnn_enable_hmp": "false"},
5107)
5108
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5109# Enable usage of optimized memory allocation
5110config_setting(
5111 name = "xnn_enable_memopt_explicit_true",
5112 define_values = {"xnnpack_enable_memopt": "true"},
5113)
5114
5115# Disable usage of optimized memory allocation
5116config_setting(
5117 name = "xnn_enable_memopt_explicit_false",
5118 define_values = {"xnnpack_enable_memopt": "false"},
5119)
5120
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5121# Builds with -c dbg
5122config_setting(
5123 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5124 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5125 "compilation_mode": "dbg",
5126 },
5127)
5128
5129# Builds with -c opt
5130config_setting(
5131 name = "optimized_build",
5132 values = {
5133 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5134 },
5135)
5136
5137config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5138 name = "linux_k8",
5139 values = {"cpu": "k8"},
5140)
5141
5142config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5143 name = "linux_arm",
5144 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]5145)
5146
5147config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -0700[diff] [blame]5148 name = "linux_armeabi",
5149 values = {"cpu": "armeabi"},
5150)
5151
5152config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]5153 name = "linux_armhf",
5154 values = {"cpu": "armhf"},
5155)
5156
5157config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -0700[diff] [blame]5158 name = "linux_armv7a",
5159 values = {"cpu": "armv7a"},
5160)
5161
5162config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5163 name = "linux_aarch64",
5164 values = {"cpu": "aarch64"},
5165)
5166
5167config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5168 name = "android",
5169 values = {"crosstool_top": "//external:android/crosstool"},
5170)
5171
5172config_setting(
5173 name = "android_armv7",
5174 values = {
5175 "crosstool_top": "//external:android/crosstool",
5176 "cpu": "armeabi-v7a",
5177 },
5178)
5179
5180config_setting(
5181 name = "android_arm64",
5182 values = {
5183 "crosstool_top": "//external:android/crosstool",
5184 "cpu": "arm64-v8a",
5185 },
5186)
5187
5188config_setting(
5189 name = "android_x86",
5190 values = {
5191 "crosstool_top": "//external:android/crosstool",
5192 "cpu": "x86",
5193 },
5194)
5195
5196config_setting(
5197 name = "android_x86_64",
5198 values = {
5199 "crosstool_top": "//external:android/crosstool",
5200 "cpu": "x86_64",
5201 },
5202)
5203
5204config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5205 name = "windows_x86_64",
5206 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5207)
5208
5209config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5210 name = "windows_x86_64_clang",
5211 values = {
5212 "compiler": "clang-cl",
5213 "cpu": "x64_windows",
5214 },
5215)
5216
5217config_setting(
5218 name = "windows_x86_64_mingw",
5219 values = {
5220 "compiler": "mingw-gcc",
5221 "cpu": "x64_windows",
5222 },
5223)
5224
5225config_setting(
5226 name = "windows_x86_64_msys",
5227 values = {
5228 "compiler": "msys-gcc",
5229 "cpu": "x64_windows",
5230 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5231)
5232
5233config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]5234 name = "macos_x86_64",
5235 values = {
5236 "apple_platform_type": "macos",
5237 "cpu": "darwin",
5238 },
5239)
5240
5241config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5242 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5243 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5244)
5245
5246config_setting(
5247 name = "emscripten_wasm",
5248 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5249 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5250 "cpu": "wasm",
5251 },
5252)
5253
5254config_setting(
5255 name = "emscripten_wasmsimd",
5256 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5257 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5258 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]5259 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5260 },
5261)
5262
5263config_setting(
5264 name = "emscripten_asmjs",
5265 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5266 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5267 "cpu": "asmjs",
5268 },
5269)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5270
5271config_setting(
5272 name = "ios_armv7",
5273 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5274 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5275 "cpu": "ios_armv7",
5276 },
5277)
5278
5279config_setting(
5280 name = "ios_arm64",
5281 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5282 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5283 "cpu": "ios_arm64",
5284 },
5285)
5286
5287config_setting(
5288 name = "ios_arm64e",
5289 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5290 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5291 "cpu": "ios_arm64e",
5292 },
5293)
5294
5295config_setting(
5296 name = "ios_x86",
5297 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5298 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5299 "cpu": "ios_i386",
5300 },
5301)
5302
5303config_setting(
5304 name = "ios_x86_64",
5305 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5306 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5307 "cpu": "ios_x86_64",
5308 },
5309)
5310
5311config_setting(
5312 name = "watchos_armv7k",
5313 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5314 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5315 "cpu": "watchos_armv7k",
5316 },
5317)
5318
5319config_setting(
5320 name = "watchos_arm64_32",
5321 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5322 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5323 "cpu": "watchos_arm64_32",
5324 },
5325)
5326
5327config_setting(
5328 name = "watchos_x86",
5329 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5330 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5331 "cpu": "watchos_i386",
5332 },
5333)
5334
5335config_setting(
5336 name = "watchos_x86_64",
5337 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5338 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5339 "cpu": "watchos_x86_64",
5340 },
5341)
5342
5343config_setting(
5344 name = "tvos_arm64",
5345 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5346 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5347 "cpu": "tvos_arm64",
5348 },
5349)
5350
5351config_setting(
5352 name = "tvos_x86_64",
5353 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5354 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5355 "cpu": "tvos_x86_64",
5356 },
5357)