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gerrit-public.fairphone.software / platform / external / XNNPACK / 13b57dd9a03460cba0ff7b3c997cabb078ac6f49 / . / CMakeLists.txt
blob: 44b02b674a006e8e337ed14915d3162da701cce4 [file] [log] [blame]
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]1
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2# Copyright (c) Facebook, Inc. and its affiliates.
3# All rights reserved.
4#
5# Copyright 2019 Google LLC
6#
7# This source code is licensed under the BSD-style license found in the
8# LICENSE file in the root directory of this source tree.
9
10CMAKE_MINIMUM_REQUIRED(VERSION 3.5 FATAL_ERROR)
11
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]12# ---[ Project and semantic versioning.
13PROJECT(XNNPACK C CXX ASM)
14
15# ---[ Options.
16SET(XNNPACK_LIBRARY_TYPE "default" CACHE STRING "Type of library (shared, static, or default) to build")
17SET_PROPERTY(CACHE XNNPACK_LIBRARY_TYPE PROPERTY STRINGS default static shared)
Marat Dukhanefc184a2020-02-13 09:47:01 -0800[diff] [blame]18OPTION(XNNPACK_ENABLE_ASSEMBLY "Build XNNPACK with assembly micro-kernels" ON)
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]19OPTION(XNNPACK_ENABLE_MEMOPT "Build XNNPACK with optimized memory allocation scheme" ON)
Marat Dukhanb36582b2020-12-08 11:16:28 -0800[diff] [blame]20OPTION(XNNPACK_ENABLE_SPARSE "Build XNNPACK with graph rewriting for sparse inference" ON)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]21OPTION(XNNPACK_BUILD_TESTS "Build XNNPACK unit tests" ON)
22OPTION(XNNPACK_BUILD_BENCHMARKS "Build XNNPACK benchmarks" ON)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]23OPTION(XNNPACK_USE_SYSTEM_LIBS "Use system-provided dependency libraries" OFF)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]24
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]25# --- [ Determine target processor
26SET(XNNPACK_TARGET_PROCESSOR "${CMAKE_SYSTEM_PROCESSOR}")
Chester Liu25bab072020-12-24 17:07:10 +0800[diff] [blame]27IF(CMAKE_SYSTEM_NAME STREQUAL "Darwin" AND CMAKE_OSX_ARCHITECTURES MATCHES "^(x86_64|arm64|arm64e)$")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]28 SET(XNNPACK_TARGET_PROCESSOR "${CMAKE_OSX_ARCHITECTURES}")
29ENDIF()
30
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]31# ---[ CMake options
Marat Dukhanbcbae1e2020-04-13 10:54:18 -0700[diff] [blame]32INCLUDE(GNUInstallDirs)
33
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]34IF(XNNPACK_BUILD_TESTS)
35 ENABLE_TESTING()
36ENDIF()
37
Marat Dukhanefc184a2020-02-13 09:47:01 -0800[diff] [blame]38IF(XNNPACK_ENABLE_ASSEMBLY)
39 ADD_DEFINITIONS(-DXNN_ENABLE_ASSEMBLY=1)
40ELSE()
41 ADD_DEFINITIONS(-DXNN_ENABLE_ASSEMBLY=0)
42ENDIF()
43
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]44IF(XNNPACK_ENABLE_MEMOPT)
45 ADD_DEFINITIONS(-DXNN_ENABLE_MEMOPT=1)
46ELSE()
47 ADD_DEFINITIONS(-DXNN_ENABLE_MEMOPT=0)
48ENDIF()
49
Marat Dukhanb36582b2020-12-08 11:16:28 -0800[diff] [blame]50IF(XNNPACK_ENABLE_SPARSE)
51 ADD_DEFINITIONS(-DXNN_ENABLE_SPARSE=1)
52ELSE()
53 ADD_DEFINITIONS(-DXNN_ENABLE_SPARSE=0)
54ENDIF()
55
Marat Dukhan8a9be592020-05-09 21:49:19 -0700[diff] [blame]56IF(CMAKE_C_COMPILER_ID STREQUAL "MSVC")
Marat Dukhan1b555e02020-04-14 22:40:29 -0700[diff] [blame]57 # Disable "unary minus operator applied to unsigned type, result still unsigned" warning
58 ADD_COMPILE_OPTIONS("/wd4146")
59ENDIF()
60
Marat Dukhan8a9be592020-05-09 21:49:19 -0700[diff] [blame]61IF(CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
62 # Disable "note: parameter passing for argument of type ... changed/will change in ..."
63 ADD_COMPILE_OPTIONS("-Wno-psabi")
64ENDIF()
65
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]66# ---[ Build flags
67IF(NOT CMAKE_SYSTEM_PROCESSOR)
68 IF(IOS)
69 LIST(LENGTH IOS_ARCH IOS_ARCH_COUNT)
70 IF(IOS_ARCH_COUNT GREATER 1)
71 MESSAGE(FATAL_ERROR "Unsupported XNNPACK build with multiple iOS architectures (${IOS_ARCH}). "
72 "Specify a single architecture in IOS_ARCH and re-configure. ")
73 ENDIF()
Yasuhiro Matsumoto462be052020-02-29 13:41:14 +0900[diff] [blame]74 IF(NOT IOS_ARCH MATCHES "^(i386|x86_64|AMD64|armv7.*|arm64.*)$")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]75 MESSAGE(FATAL_ERROR "Unrecognized IOS_ARCH = ${IOS_ARCH}")
76 ENDIF()
77 ELSE()
78 MESSAGE(FATAL_ERROR "CMAKE_SYSTEM_PROCESSOR is not defined")
79 ENDIF()
Marat Dukhane3cb19b2021-05-07 03:38:49 -0700[diff] [blame]80ELSEIF(NOT XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86|x86_64|AMD64|armv[5-8].*|aarch64|arm64.*|riscv(32|64|128))$")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]81 MESSAGE(FATAL_ERROR "Unrecognized XNNPACK_TARGET_PROCESSOR = ${XNNPACK_TARGET_PROCESSOR}")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]82ENDIF()
83
84IF(NOT CMAKE_SYSTEM_NAME)
85 MESSAGE(FATAL_ERROR "CMAKE_SYSTEM_NAME not defined")
Marat Dukhan78583c72020-04-26 22:00:43 -0700[diff] [blame]86ELSEIF(NOT CMAKE_SYSTEM_NAME MATCHES "^(Darwin|Linux|Android|Windows|CYGWIN|MSYS)$")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]87 MESSAGE(FATAL_ERROR "Unrecognized CMAKE_SYSTEM_NAME = ${CMAKE_SYSTEM_NAME}")
88ENDIF()
89
90# ---[ Download deps
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]91IF(NOT XNNPACK_USE_SYSTEM_LIBS)
92 IF(NOT DEFINED CLOG_SOURCE_DIR)
93 MESSAGE(STATUS "Downloading clog to ${CMAKE_BINARY_DIR}/clog-source (define CLOG_SOURCE_DIR to avoid it)")
94 CONFIGURE_FILE(cmake/DownloadCLog.cmake "${CMAKE_BINARY_DIR}/clog-download/CMakeLists.txt")
95 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
96 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/clog-download")
97 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
98 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/clog-download")
99 SET(CLOG_SOURCE_DIR "${CMAKE_BINARY_DIR}/clog-source" CACHE STRING "clog source directory")
100 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]101
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]102 IF(NOT DEFINED CPUINFO_SOURCE_DIR)
103 MESSAGE(STATUS "Downloading cpuinfo to ${CMAKE_BINARY_DIR}/cpuinfo-source (define CPUINFO_SOURCE_DIR to avoid it)")
104 CONFIGURE_FILE(cmake/DownloadCpuinfo.cmake "${CMAKE_BINARY_DIR}/cpuinfo-download/CMakeLists.txt")
105 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
106 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/cpuinfo-download")
107 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
108 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/cpuinfo-download")
109 SET(CPUINFO_SOURCE_DIR "${CMAKE_BINARY_DIR}/cpuinfo-source" CACHE STRING "cpuinfo source directory")
110 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]111
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]112 IF(NOT DEFINED FP16_SOURCE_DIR)
113 MESSAGE(STATUS "Downloading FP16 to ${CMAKE_BINARY_DIR}/FP16-source (define FP16_SOURCE_DIR to avoid it)")
114 CONFIGURE_FILE(cmake/DownloadFP16.cmake "${CMAKE_BINARY_DIR}/FP16-download/CMakeLists.txt")
115 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
116 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FP16-download")
117 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
118 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FP16-download")
119 SET(FP16_SOURCE_DIR "${CMAKE_BINARY_DIR}/FP16-source" CACHE STRING "FP16 source directory")
120 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]121
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]122 IF(NOT DEFINED FXDIV_SOURCE_DIR)
123 MESSAGE(STATUS "Downloading FXdiv to ${CMAKE_BINARY_DIR}/FXdiv-source (define FXDIV_SOURCE_DIR to avoid it)")
124 CONFIGURE_FILE(cmake/DownloadFXdiv.cmake "${CMAKE_BINARY_DIR}/FXdiv-download/CMakeLists.txt")
125 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
126 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FXdiv-download")
127 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
128 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FXdiv-download")
129 SET(FXDIV_SOURCE_DIR "${CMAKE_BINARY_DIR}/FXdiv-source" CACHE STRING "FXdiv source directory")
130 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]131
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]132 IF(NOT DEFINED PTHREADPOOL_SOURCE_DIR)
133 MESSAGE(STATUS "Downloading pthreadpool to ${CMAKE_BINARY_DIR}/pthreadpool-source (define PTHREADPOOL_SOURCE_DIR to avoid it)")
134 CONFIGURE_FILE(cmake/DownloadPThreadPool.cmake "${CMAKE_BINARY_DIR}/pthreadpool-download/CMakeLists.txt")
135 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
136 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/pthreadpool-download")
137 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
138 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/pthreadpool-download")
139 SET(PTHREADPOOL_SOURCE_DIR "${CMAKE_BINARY_DIR}/pthreadpool-source" CACHE STRING "pthreadpool source directory")
140 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]141
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]142 IF(XNNPACK_BUILD_TESTS AND NOT DEFINED GOOGLETEST_SOURCE_DIR)
143 MESSAGE(STATUS "Downloading Google Test to ${CMAKE_BINARY_DIR}/googletest-source (define GOOGLETEST_SOURCE_DIR to avoid it)")
144 CONFIGURE_FILE(cmake/DownloadGoogleTest.cmake "${CMAKE_BINARY_DIR}/googletest-download/CMakeLists.txt")
145 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
146 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googletest-download")
147 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
148 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googletest-download")
149 SET(GOOGLETEST_SOURCE_DIR "${CMAKE_BINARY_DIR}/googletest-source" CACHE STRING "Google Test source directory")
150 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]151
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]152 IF(XNNPACK_BUILD_BENCHMARKS AND NOT DEFINED GOOGLEBENCHMARK_SOURCE_DIR)
153 MESSAGE(STATUS "Downloading Google Benchmark to ${CMAKE_BINARY_DIR}/googlebenchmark-source (define GOOGLEBENCHMARK_SOURCE_DIR to avoid it)")
154 CONFIGURE_FILE(cmake/DownloadGoogleBenchmark.cmake "${CMAKE_BINARY_DIR}/googlebenchmark-download/CMakeLists.txt")
155 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
156 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googlebenchmark-download")
157 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
158 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googlebenchmark-download")
159 SET(GOOGLEBENCHMARK_SOURCE_DIR "${CMAKE_BINARY_DIR}/googlebenchmark-source" CACHE STRING "Google Benchmark source directory")
160 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]161ENDIF()
162
163# ---[ XNNPACK library
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]164SET(OPERATOR_SRCS
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]165 src/operators/argmax-pooling-nhwc.c
166 src/operators/average-pooling-nhwc.c
167 src/operators/binary-elementwise-nd.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]168 src/operators/channel-shuffle-nc.c
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]169 src/operators/constant-pad-nd.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]170 src/operators/convolution-nchw.c
171 src/operators/convolution-nhwc.c
172 src/operators/deconvolution-nhwc.c
Marat Dukhan13b68f22020-11-12 11:55:19 -0800[diff] [blame]173 src/operators/depth-to-space-nchw2nhwc.c
Marat Dukhan0e521172020-11-25 13:10:04 -0800[diff] [blame]174 src/operators/depth-to-space-nhwc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]175 src/operators/fully-connected-nc.c
176 src/operators/global-average-pooling-ncw.c
177 src/operators/global-average-pooling-nwc.c
Marat Dukhanf6c991e2021-09-09 01:10:40 -0700[diff] [blame]178 src/operators/lut-elementwise-nc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]179 src/operators/max-pooling-nhwc.c
180 src/operators/prelu-nc.c
Artsiom Ablavatski97918102020-10-27 15:52:59 -0700[diff] [blame]181 src/operators/resize-bilinear-nchw.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]182 src/operators/resize-bilinear-nhwc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]183 src/operators/softmax-nc.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]184 src/operators/unary-elementwise-nc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]185 src/operators/unpooling-nhwc.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]186
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]187SET(SUBGRAPH_SRCS
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]188 src/subgraph/abs.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]189 src/subgraph/add2.c
190 src/subgraph/argmax-pooling-2d.c
191 src/subgraph/average-pooling-2d.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]192 src/subgraph/bankers-rounding.c
Im Sunghoonea2088b2020-06-15 03:17:07 +0900[diff] [blame]193 src/subgraph/ceiling.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]194 src/subgraph/clamp.c
Marat Dukhan20483c72021-12-05 09:56:40 -0800[diff] [blame]195 src/subgraph/convert.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]196 src/subgraph/convolution-2d.c
197 src/subgraph/deconvolution-2d.c
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -0800[diff] [blame]198 src/subgraph/depth-to-space.c
Frank Barchard9cef5ea2020-11-18 14:52:08 -0800[diff] [blame]199 src/subgraph/depthwise-convolution-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]200 src/subgraph/divide.c
Marat Dukhana1600202020-12-01 22:17:16 -0800[diff] [blame]201 src/subgraph/elu.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]202 src/subgraph/floor.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]203 src/subgraph/fully-connected.c
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]204 src/subgraph/global-average-pooling-2d.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]205 src/subgraph/hardswish.c
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]206 src/subgraph/leaky-relu.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]207 src/subgraph/max-pooling-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]208 src/subgraph/maximum2.c
209 src/subgraph/minimum2.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]210 src/subgraph/multiply2.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]211 src/subgraph/negate.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]212 src/subgraph/prelu.c
213 src/subgraph/sigmoid.c
214 src/subgraph/softmax.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]215 src/subgraph/square-root.c
216 src/subgraph/square.c
217 src/subgraph/squared-difference.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]218 src/subgraph/static-constant-pad.c
Marat Dukhand27202d2020-07-09 23:43:40 -0700[diff] [blame]219 src/subgraph/static-reshape.c
Marat Dukhanaff24e22020-07-23 01:43:58 -0700[diff] [blame]220 src/subgraph/static-resize-bilinear-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]221 src/subgraph/subtract.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]222 src/subgraph/unpooling-2d.c)
223
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]224SET(LOGGING_SRCS
Marat Dukhanccd3a1d2021-03-29 16:03:12 -0700[diff] [blame]225 src/datatype-strings.c
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]226 src/operator-strings.c
227 src/subgraph-strings.c)
228
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]229SET(COLD_SRCS ${OPERATOR_SRCS} ${SUBGRAPH_SRCS} ${LOGGING_SRCS})
230LIST(APPEND COLD_SRCS
Marat Dukhan496389f2021-04-07 15:47:12 -0700[diff] [blame]231 src/allocator.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]232 src/init.c
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]233 src/memory-planner.c
Marat Dukhan98ca6352020-02-03 12:53:02 -0800[diff] [blame]234 src/operator-delete.c
235 src/runtime.c
236 src/subgraph.c
237 src/tensor.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]238
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]239SET(HOT_SRCS
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]240 src/indirection.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]241 src/operator-run.c
242 src/packing.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]243
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]244SET(TABLE_SRCS
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]245 src/tables/exp2-k-over-64.c
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700[diff] [blame]246 src/tables/exp2-k-over-2048.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]247 src/tables/exp2minus-k-over-4.c
248 src/tables/exp2minus-k-over-8.c
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]249 src/tables/exp2minus-k-over-16.c
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700[diff] [blame]250 src/tables/exp2minus-k-over-64.c
251 src/tables/exp2minus-k-over-2048.c)
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]252
Marat Dukhane0f15ad2021-12-22 15:15:25 -0800[diff] [blame]253SET(JIT_SRCS
Zhi An Ng6883abb2021-12-14 10:13:18 -0800[diff] [blame]254 src/jit/aarch32-assembler.cc
255 src/jit/memory.c)
Zhi An Ngb559fe92021-12-06 09:25:38 -0800[diff] [blame]256
Zhi An Ng13b57dd2022-01-06 09:33:20 -0800[diff] [blame^]257SET(JIT_AARCH32_SRCS
258 src/f32-gemm/4x8-aarch32-neon-cortex-a53.cc
259 src/f32-gemm/4x8-aarch32-neon-cortex-a55.cc
260 src/f32-gemm/4x8-aarch32-neon-cortex-a7.cc
261 src/f32-gemm/4x8-aarch32-neon-cortex-a75.cc
262 src/f32-gemm/4x8-aarch32-neon-ld64.cc
263 src/f32-igemm/4x8-aarch32-neon-cortex-a53.cc
264 src/f32-igemm/4x8-aarch32-neon-cortex-a55.cc
265 src/f32-igemm/4x8-aarch32-neon-cortex-a7.cc
266 src/f32-igemm/4x8-aarch32-neon-cortex-a75.cc
267 src/f32-igemm/4x8-aarch32-neon-ld64.cc
268 src/qs8-gemm/4x8-rndnu-aarch32-neon-mlal-lane-ld64.cc
269 src/qs8-gemm/4x8c4-rndnu-aarch32-neondot-ld64.cc
270 src/qs8-igemm/4x8-rndnu-aarch32-neon-mlal-lane-ld64.cc
271 src/qs8-igemm/4x8c4-rndnu-aarch32-neondot-ld64.cc)
272
Marat Dukhane0f15ad2021-12-22 15:15:25 -0800[diff] [blame]273SET(PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS
274 src/params-init.c
275 src/u8-lut32norm/scalar.c
276 src/x8-lut/gen/lut-scalar-x4.c
277 src/x32-depthtospace2d-chw2hwc/scalar.c
278 src/xx-copy/memcpy.c)
279
280SET(PROD_SCALAR_AARCH32_MICROKERNEL_SRCS
Marat Dukhan134f9842021-12-29 19:57:31 -0800[diff] [blame]281 src/f16-f32-vcvt/gen/vcvt-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]282 src/f32-argmaxpool/4x-scalar-c1.c
283 src/f32-argmaxpool/9p8x-scalar-c1.c
284 src/f32-argmaxpool/9x-scalar-c1.c
285 src/f32-avgpool/9p8x-minmax-scalar-c1.c
286 src/f32-avgpool/9x-minmax-scalar-c1.c
287 src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c
288 src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c
289 src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]290 src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]291 src/f32-dwconv/gen/up1x3-scalar-acc2.c
Frank Barchard66ae2572021-11-02 17:36:21 -0700[diff] [blame]292 src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]293 src/f32-dwconv/gen/up1x4-scalar-acc2.c
294 src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c
295 src/f32-dwconv/gen/up1x9-scalar-acc2.c
296 src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c
297 src/f32-dwconv/gen/up1x25-scalar-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]298 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]299 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]300 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]301 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]302 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]303 src/f32-gavgpool-cw/scalar-x1.c
304 src/f32-gavgpool/7p7x-minmax-scalar-c1.c
305 src/f32-gavgpool/7x-minmax-scalar-c1.c
306 src/f32-gemm/gen/1x4-minmax-scalar.c
307 src/f32-gemm/gen/1x4-relu-scalar.c
308 src/f32-gemm/gen/1x4-scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]309 src/f32-gemm/gen/4x2-minmax-scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]310 src/f32-gemm/gen/4x2-scalar.c
311 src/f32-gemm/gen/4x4-minmax-scalar.c
312 src/f32-gemm/gen/4x4-relu-scalar.c
313 src/f32-gemm/gen/4x4-scalar.c
314 src/f32-ibilinear-chw/gen/scalar-p4.c
315 src/f32-ibilinear/gen/scalar-c2.c
316 src/f32-igemm/gen/1x4-minmax-scalar.c
317 src/f32-igemm/gen/1x4-relu-scalar.c
318 src/f32-igemm/gen/1x4-scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]319 src/f32-igemm/gen/4x2-minmax-scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]320 src/f32-igemm/gen/4x2-scalar.c
321 src/f32-igemm/gen/4x4-minmax-scalar.c
322 src/f32-igemm/gen/4x4-relu-scalar.c
323 src/f32-igemm/gen/4x4-scalar.c
324 src/f32-maxpool/9p8x-minmax-scalar-c1.c
325 src/f32-pavgpool/9p8x-minmax-scalar-c1.c
326 src/f32-pavgpool/9x-minmax-scalar-c1.c
327 src/f32-prelu/gen/scalar-2x4.c
Marat Dukhanbdf10992022-01-04 09:20:14 -0800[diff] [blame]328 src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x4.c
329 src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x4.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]330 src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]331 src/f32-rmax/scalar.c
332 src/f32-spmm/gen/8x1-minmax-scalar.c
333 src/f32-spmm/gen/8x2-minmax-scalar.c
334 src/f32-spmm/gen/8x4-minmax-scalar.c
335 src/f32-vbinary/gen/vadd-minmax-scalar-x8.c
336 src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c
337 src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]338 src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]339 src/f32-vbinary/gen/vmax-scalar-x8.c
340 src/f32-vbinary/gen/vmaxc-scalar-x8.c
341 src/f32-vbinary/gen/vmin-scalar-x8.c
342 src/f32-vbinary/gen/vminc-scalar-x8.c
343 src/f32-vbinary/gen/vmul-minmax-scalar-x8.c
344 src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c
345 src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]346 src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c
347 src/f32-vbinary/gen/vsqrdiff-scalar-x8.c
348 src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c
349 src/f32-vbinary/gen/vsub-minmax-scalar-x8.c
350 src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c
351 src/f32-vclamp/gen/vclamp-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]352 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c
353 src/f32-vhswish/gen/vhswish-scalar-x4.c
354 src/f32-vlrelu/gen/vlrelu-scalar-x4.c
355 src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c
356 src/f32-vrelu/gen/vrelu-scalar-x8.c
357 src/f32-vrnd/gen/vrndd-scalar-libm-x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]358 src/f32-vrnd/gen/vrndne-scalar-libm-x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]359 src/f32-vrnd/gen/vrndu-scalar-libm-x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]360 src/f32-vrnd/gen/vrndz-scalar-libm-x1.c
Marat Dukhance834ad2022-01-03 00:22:01 -0800[diff] [blame]361 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]362 src/f32-vsqrt/gen/scalar-sqrt-x1.c
363 src/f32-vunary/gen/vabs-scalar-x4.c
364 src/f32-vunary/gen/vneg-scalar-x4.c
365 src/f32-vunary/gen/vsqr-scalar-x4.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]366 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c
367 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c
368 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c
369 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c
370 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c
371 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c
372 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c
373 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c
Marat Dukhanf92206b2021-12-10 17:02:07 -0800[diff] [blame]374 src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]375 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]376 src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]377 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c
378 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c
379 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c
380 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]381 src/qs8-vadd/gen/minmax-scalar-x1.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]382 src/qs8-vaddc/gen/minmax-scalar-x1.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]383 src/qs8-vmul/gen/minmax-fp32-scalar-x4.c
384 src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]385 src/qu8-avgpool/9p8x-minmax-scalar-c1.c
386 src/qu8-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]387 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c
388 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c
Marat Dukhanf92206b2021-12-10 17:02:07 -0800[diff] [blame]389 src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]390 src/qu8-gavgpool/7p7x-minmax-scalar-c1.c
391 src/qu8-gavgpool/7x-minmax-scalar-c1.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]392 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c
393 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c
394 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c
395 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]396 src/qu8-vadd/gen/minmax-scalar-x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]397 src/qu8-vaddc/gen/minmax-scalar-x1.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]398 src/qu8-vmul/gen/minmax-fp32-scalar-x4.c
399 src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]400 src/s8-ibilinear/gen/scalar-c1.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]401 src/s8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]402 src/s8-vclamp/scalar-x4.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]403 src/u8-ibilinear/gen/scalar-c1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]404 src/u8-maxpool/9p8x-minmax-scalar-c1.c
405 src/u8-rmax/scalar.c
406 src/u8-vclamp/scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]407 src/x8-zip/x2-scalar.c
408 src/x8-zip/x3-scalar.c
409 src/x8-zip/x4-scalar.c
410 src/x8-zip/xm-scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]411 src/x32-packx/x2-scalar.c
412 src/x32-packx/x3-scalar.c
413 src/x32-packx/x4-scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]414 src/x32-unpool/scalar.c
415 src/x32-zip/x2-scalar.c
416 src/x32-zip/x3-scalar.c
417 src/x32-zip/x4-scalar.c
418 src/x32-zip/xm-scalar.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]419 src/xx-fill/scalar-x16.c
420 src/xx-pad/scalar.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]421
Marat Dukhand8a1dbe2022-01-04 22:51:23 -0800[diff] [blame]422SET(PROD_SCALAR_RISCV_MICROKERNEL_SRCS
423 src/f16-f32-vcvt/gen/vcvt-scalar-x4.c
424 src/f32-argmaxpool/4x-scalar-c1.c
425 src/f32-argmaxpool/9p8x-scalar-c1.c
426 src/f32-argmaxpool/9x-scalar-c1.c
427 src/f32-avgpool/9p8x-minmax-scalar-c1.c
428 src/f32-avgpool/9x-minmax-scalar-c1.c
429 src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c
430 src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c
431 src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c
432 src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c
433 src/f32-dwconv/gen/up1x3-scalar-acc2.c
434 src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c
435 src/f32-dwconv/gen/up1x4-scalar-acc2.c
436 src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c
437 src/f32-dwconv/gen/up1x9-scalar-acc2.c
438 src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c
439 src/f32-dwconv/gen/up1x25-scalar-acc2.c
440 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c
441 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c
442 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c
443 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c
444 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c
445 src/f32-gavgpool-cw/scalar-x1.c
446 src/f32-gavgpool/7p7x-minmax-scalar-c1.c
447 src/f32-gavgpool/7x-minmax-scalar-c1.c
448 src/f32-gemm/gen/1x4-minmax-scalar.c
449 src/f32-gemm/gen/1x4-relu-scalar.c
450 src/f32-gemm/gen/1x4-scalar.c
451 src/f32-gemm/gen/4x2-minmax-scalar.c
452 src/f32-gemm/gen/4x2-scalar.c
453 src/f32-gemm/gen/4x4-minmax-scalar.c
454 src/f32-gemm/gen/4x4-relu-scalar.c
455 src/f32-gemm/gen/4x4-scalar.c
456 src/f32-ibilinear-chw/gen/scalar-p4.c
457 src/f32-ibilinear/gen/scalar-c2.c
458 src/f32-igemm/gen/1x4-minmax-scalar.c
459 src/f32-igemm/gen/1x4-relu-scalar.c
460 src/f32-igemm/gen/1x4-scalar.c
461 src/f32-igemm/gen/4x2-minmax-scalar.c
462 src/f32-igemm/gen/4x2-scalar.c
463 src/f32-igemm/gen/4x4-minmax-scalar.c
464 src/f32-igemm/gen/4x4-relu-scalar.c
465 src/f32-igemm/gen/4x4-scalar.c
466 src/f32-maxpool/9p8x-minmax-scalar-c1.c
467 src/f32-pavgpool/9p8x-minmax-scalar-c1.c
468 src/f32-pavgpool/9x-minmax-scalar-c1.c
469 src/f32-prelu/gen/scalar-2x4.c
470 src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x4.c
471 src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x4.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]472 src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c
Marat Dukhand8a1dbe2022-01-04 22:51:23 -0800[diff] [blame]473 src/f32-rmax/scalar.c
474 src/f32-spmm/gen/8x1-minmax-scalar.c
475 src/f32-spmm/gen/8x2-minmax-scalar.c
476 src/f32-spmm/gen/8x4-minmax-scalar.c
477 src/f32-vbinary/gen/vadd-minmax-scalar-x8.c
478 src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c
479 src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c
480 src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c
481 src/f32-vbinary/gen/vmax-scalar-x8.c
482 src/f32-vbinary/gen/vmaxc-scalar-x8.c
483 src/f32-vbinary/gen/vmin-scalar-x8.c
484 src/f32-vbinary/gen/vminc-scalar-x8.c
485 src/f32-vbinary/gen/vmul-minmax-scalar-x8.c
486 src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c
487 src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c
488 src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c
489 src/f32-vbinary/gen/vsqrdiff-scalar-x8.c
490 src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c
491 src/f32-vbinary/gen/vsub-minmax-scalar-x8.c
492 src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c
493 src/f32-vclamp/gen/vclamp-scalar-x4.c
494 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c
495 src/f32-vhswish/gen/vhswish-scalar-x4.c
496 src/f32-vlrelu/gen/vlrelu-scalar-x4.c
497 src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c
498 src/f32-vrelu/gen/vrelu-scalar-x8.c
499 src/f32-vrnd/gen/vrndd-scalar-libm-x1.c
500 src/f32-vrnd/gen/vrndne-scalar-libm-x1.c
501 src/f32-vrnd/gen/vrndu-scalar-libm-x1.c
502 src/f32-vrnd/gen/vrndz-scalar-libm-x1.c
503 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c
504 src/f32-vsqrt/gen/scalar-sqrt-x1.c
505 src/f32-vunary/gen/vabs-scalar-x4.c
506 src/f32-vunary/gen/vneg-scalar-x4.c
507 src/f32-vunary/gen/vsqr-scalar-x4.c
508 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c
509 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c
510 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c
511 src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c
512 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c
513 src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c
514 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c
515 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c
516 src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c
517 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c
518 src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c
519 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c
520 src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c
521 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c
522 src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c
523 src/qs8-vadd/gen/minmax-scalar-x4.c
524 src/qs8-vaddc/gen/minmax-scalar-x4.c
525 src/qs8-vmul/gen/minmax-fp32-scalar-x4.c
526 src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c
527 src/qu8-avgpool/9p8x-minmax-scalar-c1.c
528 src/qu8-avgpool/9x-minmax-scalar-c1.c
529 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c
530 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c
531 src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c
532 src/qu8-gavgpool/7p7x-minmax-scalar-c1.c
533 src/qu8-gavgpool/7x-minmax-scalar-c1.c
534 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c
535 src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c
536 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c
537 src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c
538 src/qu8-vadd/gen/minmax-scalar-x4.c
539 src/qu8-vaddc/gen/minmax-scalar-x4.c
540 src/qu8-vmul/gen/minmax-fp32-scalar-x4.c
541 src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c
542 src/s8-ibilinear/gen/scalar-c1.c
543 src/s8-maxpool/9p8x-minmax-scalar-c1.c
544 src/s8-vclamp/scalar-x4.c
545 src/u8-ibilinear/gen/scalar-c1.c
546 src/u8-maxpool/9p8x-minmax-scalar-c1.c
547 src/u8-rmax/scalar.c
548 src/u8-vclamp/scalar-x4.c
549 src/x8-zip/x2-scalar.c
550 src/x8-zip/x3-scalar.c
551 src/x8-zip/x4-scalar.c
552 src/x8-zip/xm-scalar.c
553 src/x32-packx/x2-scalar.c
554 src/x32-packx/x3-scalar.c
555 src/x32-packx/x4-scalar.c
556 src/x32-unpool/scalar.c
557 src/x32-zip/x2-scalar.c
558 src/x32-zip/x3-scalar.c
559 src/x32-zip/x4-scalar.c
560 src/x32-zip/xm-scalar.c
561 src/xx-fill/scalar-x16.c
562 src/xx-pad/scalar.c)
563
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]564SET(ALL_SCALAR_MICROKERNEL_SRCS
Marat Dukhan134f9842021-12-29 19:57:31 -0800[diff] [blame]565 src/f16-f32-vcvt/gen/vcvt-scalar-x1.c
566 src/f16-f32-vcvt/gen/vcvt-scalar-x2.c
567 src/f16-f32-vcvt/gen/vcvt-scalar-x3.c
568 src/f16-f32-vcvt/gen/vcvt-scalar-x4.c
Ashkan Aliabadif866a452019-11-20 10:58:51 -0800[diff] [blame]569 src/f32-argmaxpool/4x-scalar-c1.c
570 src/f32-argmaxpool/9p8x-scalar-c1.c
571 src/f32-argmaxpool/9x-scalar-c1.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]572 src/f32-avgpool/9p8x-minmax-scalar-c1.c
573 src/f32-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]574 src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]575 src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]576 src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]577 src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c
578 src/f32-dwconv/gen/up1x3-minmax-scalar.c
579 src/f32-dwconv/gen/up1x3-scalar-acc2.c
580 src/f32-dwconv/gen/up1x3-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]581 src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]582 src/f32-dwconv/gen/up1x4-minmax-scalar.c
583 src/f32-dwconv/gen/up1x4-scalar-acc2.c
584 src/f32-dwconv/gen/up1x4-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]585 src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]586 src/f32-dwconv/gen/up1x9-minmax-scalar.c
587 src/f32-dwconv/gen/up1x9-scalar-acc2.c
588 src/f32-dwconv/gen/up1x9-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]589 src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]590 src/f32-dwconv/gen/up1x25-minmax-scalar.c
591 src/f32-dwconv/gen/up1x25-scalar-acc2.c
592 src/f32-dwconv/gen/up1x25-scalar.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]593 src/f32-dwconv/gen/up2x3-minmax-scalar-acc2.c
594 src/f32-dwconv/gen/up2x3-minmax-scalar.c
595 src/f32-dwconv/gen/up2x3-scalar-acc2.c
596 src/f32-dwconv/gen/up2x3-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]597 src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]598 src/f32-dwconv/gen/up2x4-minmax-scalar.c
599 src/f32-dwconv/gen/up2x4-scalar-acc2.c
600 src/f32-dwconv/gen/up2x4-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]601 src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]602 src/f32-dwconv/gen/up2x9-minmax-scalar.c
603 src/f32-dwconv/gen/up2x9-scalar-acc2.c
604 src/f32-dwconv/gen/up2x9-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]605 src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]606 src/f32-dwconv/gen/up2x25-minmax-scalar.c
607 src/f32-dwconv/gen/up2x25-scalar-acc2.c
608 src/f32-dwconv/gen/up2x25-scalar.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]609 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c
610 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c
611 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c
Marat Dukhan91249d22020-10-24 12:02:51 -0700[diff] [blame]612 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]613 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c
Marat Dukhan91249d22020-10-24 12:02:51 -0700[diff] [blame]614 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c
615 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c
616 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c
617 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c
618 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700[diff] [blame]619 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c
620 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c
621 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]622 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700[diff] [blame]623 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]624 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c
625 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c
626 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]627 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c
628 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c
629 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c
630 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]631 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]632 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c
633 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]634 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]635 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]636 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c
Marat Dukhan29c0c332020-10-28 22:11:00 -0700[diff] [blame]637 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c
638 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c
639 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c
640 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c
641 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c
642 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c
643 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c
644 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c
645 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c
646 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c
Marat Dukhan1fe89952021-11-10 01:27:15 -0800[diff] [blame]647 src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x1.c
648 src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x2.c
649 src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x3.c
650 src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c
651 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x1.c
652 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c
653 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x3.c
654 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x4.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]655 src/f32-gavgpool-cw/scalar-x1.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]656 src/f32-gavgpool/7p7x-minmax-scalar-c1.c
657 src/f32-gavgpool/7x-minmax-scalar-c1.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]658 src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c
659 src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c
660 src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]661 src/f32-gemm/gen/1x4-minmax-scalar.c
662 src/f32-gemm/gen/1x4-relu-scalar.c
663 src/f32-gemm/gen/1x4-scalar.c
664 src/f32-gemm/gen/2x4-minmax-scalar.c
665 src/f32-gemm/gen/2x4-relu-scalar.c
666 src/f32-gemm/gen/2x4-scalar.c
667 src/f32-gemm/gen/4x2-minmax-scalar.c
668 src/f32-gemm/gen/4x2-relu-scalar.c
669 src/f32-gemm/gen/4x2-scalar.c
670 src/f32-gemm/gen/4x4-minmax-scalar.c
671 src/f32-gemm/gen/4x4-relu-scalar.c
672 src/f32-gemm/gen/4x4-scalar.c
Marat Dukhan9f426b42020-10-21 11:18:35 -0700[diff] [blame]673 src/f32-ibilinear-chw/gen/scalar-p1.c
674 src/f32-ibilinear-chw/gen/scalar-p2.c
675 src/f32-ibilinear-chw/gen/scalar-p4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]676 src/f32-ibilinear/gen/scalar-c1.c
677 src/f32-ibilinear/gen/scalar-c2.c
678 src/f32-ibilinear/gen/scalar-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]679 src/f32-igemm/gen/1x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]680 src/f32-igemm/gen/1x4-relu-scalar.c
681 src/f32-igemm/gen/1x4-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]682 src/f32-igemm/gen/2x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]683 src/f32-igemm/gen/2x4-relu-scalar.c
684 src/f32-igemm/gen/2x4-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]685 src/f32-igemm/gen/4x2-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]686 src/f32-igemm/gen/4x2-relu-scalar.c
687 src/f32-igemm/gen/4x2-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]688 src/f32-igemm/gen/4x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]689 src/f32-igemm/gen/4x4-relu-scalar.c
690 src/f32-igemm/gen/4x4-scalar.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]691 src/f32-maxpool/9p8x-minmax-scalar-c1.c
692 src/f32-pavgpool/9p8x-minmax-scalar-c1.c
693 src/f32-pavgpool/9x-minmax-scalar-c1.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]694 src/f32-ppmm/gen/2x4-minmax-scalar.c
695 src/f32-ppmm/gen/3x3-minmax-scalar.c
696 src/f32-ppmm/gen/4x2-minmax-scalar.c
697 src/f32-ppmm/gen/4x4-minmax-scalar.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]698 src/f32-prelu/gen/scalar-2x1.c
699 src/f32-prelu/gen/scalar-2x4.c
Marat Dukhanbdf10992022-01-04 09:20:14 -0800[diff] [blame]700 src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x1.c
701 src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x2.c
702 src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x3.c
703 src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x4.c
704 src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x1.c
705 src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x2.c
706 src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x3.c
707 src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x4.c
Marat Dukhanf721e372022-01-04 10:41:12 -0800[diff] [blame]708 src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x1.c
709 src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x2.c
710 src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x3.c
711 src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x4.c
Marat Dukhanbdf10992022-01-04 09:20:14 -0800[diff] [blame]712 src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x1.c
713 src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x2.c
714 src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x3.c
715 src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x4.c
716 src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x1.c
717 src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x2.c
718 src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x3.c
719 src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x4.c
Marat Dukhanf721e372022-01-04 10:41:12 -0800[diff] [blame]720 src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x1.c
721 src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x2.c
722 src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x3.c
723 src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x4.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]724 src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x1.c
725 src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x2-acc2.c
726 src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x2.c
727 src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4-acc2.c
728 src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4-acc4.c
729 src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4.c
730 src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x1.c
731 src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x2-acc2.c
732 src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x2.c
733 src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c
734 src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc4.c
735 src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]736 src/f32-rmax/scalar.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]737 src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c
738 src/f32-spmm/gen/1x1-minmax-scalar.c
739 src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c
740 src/f32-spmm/gen/2x1-minmax-scalar.c
741 src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c
742 src/f32-spmm/gen/4x1-minmax-scalar.c
743 src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c
744 src/f32-spmm/gen/8x1-minmax-scalar.c
745 src/f32-spmm/gen/8x2-minmax-scalar.c
746 src/f32-spmm/gen/8x4-minmax-scalar.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]747 src/f32-vbinary/gen/vadd-minmax-scalar-x1.c
748 src/f32-vbinary/gen/vadd-minmax-scalar-x2.c
749 src/f32-vbinary/gen/vadd-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]750 src/f32-vbinary/gen/vadd-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]751 src/f32-vbinary/gen/vadd-relu-scalar-x1.c
752 src/f32-vbinary/gen/vadd-relu-scalar-x2.c
753 src/f32-vbinary/gen/vadd-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]754 src/f32-vbinary/gen/vadd-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]755 src/f32-vbinary/gen/vadd-scalar-x1.c
756 src/f32-vbinary/gen/vadd-scalar-x2.c
757 src/f32-vbinary/gen/vadd-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]758 src/f32-vbinary/gen/vadd-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]759 src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c
760 src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c
761 src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]762 src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]763 src/f32-vbinary/gen/vaddc-relu-scalar-x1.c
764 src/f32-vbinary/gen/vaddc-relu-scalar-x2.c
765 src/f32-vbinary/gen/vaddc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]766 src/f32-vbinary/gen/vaddc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]767 src/f32-vbinary/gen/vaddc-scalar-x1.c
768 src/f32-vbinary/gen/vaddc-scalar-x2.c
769 src/f32-vbinary/gen/vaddc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]770 src/f32-vbinary/gen/vaddc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]771 src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c
772 src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c
773 src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]774 src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]775 src/f32-vbinary/gen/vdiv-relu-scalar-x1.c
776 src/f32-vbinary/gen/vdiv-relu-scalar-x2.c
777 src/f32-vbinary/gen/vdiv-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]778 src/f32-vbinary/gen/vdiv-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]779 src/f32-vbinary/gen/vdiv-scalar-x1.c
780 src/f32-vbinary/gen/vdiv-scalar-x2.c
781 src/f32-vbinary/gen/vdiv-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]782 src/f32-vbinary/gen/vdiv-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]783 src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c
784 src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c
785 src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]786 src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]787 src/f32-vbinary/gen/vdivc-relu-scalar-x1.c
788 src/f32-vbinary/gen/vdivc-relu-scalar-x2.c
789 src/f32-vbinary/gen/vdivc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]790 src/f32-vbinary/gen/vdivc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]791 src/f32-vbinary/gen/vdivc-scalar-x1.c
792 src/f32-vbinary/gen/vdivc-scalar-x2.c
793 src/f32-vbinary/gen/vdivc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]794 src/f32-vbinary/gen/vdivc-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]795 src/f32-vbinary/gen/vmax-scalar-x1.c
796 src/f32-vbinary/gen/vmax-scalar-x2.c
797 src/f32-vbinary/gen/vmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]798 src/f32-vbinary/gen/vmax-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]799 src/f32-vbinary/gen/vmaxc-scalar-x1.c
800 src/f32-vbinary/gen/vmaxc-scalar-x2.c
801 src/f32-vbinary/gen/vmaxc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]802 src/f32-vbinary/gen/vmaxc-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]803 src/f32-vbinary/gen/vmin-scalar-x1.c
804 src/f32-vbinary/gen/vmin-scalar-x2.c
805 src/f32-vbinary/gen/vmin-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]806 src/f32-vbinary/gen/vmin-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]807 src/f32-vbinary/gen/vminc-scalar-x1.c
808 src/f32-vbinary/gen/vminc-scalar-x2.c
809 src/f32-vbinary/gen/vminc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]810 src/f32-vbinary/gen/vminc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]811 src/f32-vbinary/gen/vmul-minmax-scalar-x1.c
812 src/f32-vbinary/gen/vmul-minmax-scalar-x2.c
813 src/f32-vbinary/gen/vmul-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]814 src/f32-vbinary/gen/vmul-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]815 src/f32-vbinary/gen/vmul-relu-scalar-x1.c
816 src/f32-vbinary/gen/vmul-relu-scalar-x2.c
817 src/f32-vbinary/gen/vmul-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]818 src/f32-vbinary/gen/vmul-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]819 src/f32-vbinary/gen/vmul-scalar-x1.c
820 src/f32-vbinary/gen/vmul-scalar-x2.c
821 src/f32-vbinary/gen/vmul-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]822 src/f32-vbinary/gen/vmul-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]823 src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c
824 src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c
825 src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]826 src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]827 src/f32-vbinary/gen/vmulc-relu-scalar-x1.c
828 src/f32-vbinary/gen/vmulc-relu-scalar-x2.c
829 src/f32-vbinary/gen/vmulc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]830 src/f32-vbinary/gen/vmulc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]831 src/f32-vbinary/gen/vmulc-scalar-x1.c
832 src/f32-vbinary/gen/vmulc-scalar-x2.c
833 src/f32-vbinary/gen/vmulc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]834 src/f32-vbinary/gen/vmulc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]835 src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c
836 src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c
837 src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]838 src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]839 src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c
840 src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c
841 src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]842 src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]843 src/f32-vbinary/gen/vrdivc-scalar-x1.c
844 src/f32-vbinary/gen/vrdivc-scalar-x2.c
845 src/f32-vbinary/gen/vrdivc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]846 src/f32-vbinary/gen/vrdivc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]847 src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c
848 src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c
849 src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]850 src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]851 src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c
852 src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c
853 src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]854 src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]855 src/f32-vbinary/gen/vrsubc-scalar-x1.c
856 src/f32-vbinary/gen/vrsubc-scalar-x2.c
857 src/f32-vbinary/gen/vrsubc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]858 src/f32-vbinary/gen/vrsubc-scalar-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]859 src/f32-vbinary/gen/vsqrdiff-scalar-x1.c
860 src/f32-vbinary/gen/vsqrdiff-scalar-x2.c
861 src/f32-vbinary/gen/vsqrdiff-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]862 src/f32-vbinary/gen/vsqrdiff-scalar-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]863 src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c
864 src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c
865 src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]866 src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]867 src/f32-vbinary/gen/vsub-minmax-scalar-x1.c
868 src/f32-vbinary/gen/vsub-minmax-scalar-x2.c
869 src/f32-vbinary/gen/vsub-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]870 src/f32-vbinary/gen/vsub-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]871 src/f32-vbinary/gen/vsub-relu-scalar-x1.c
872 src/f32-vbinary/gen/vsub-relu-scalar-x2.c
873 src/f32-vbinary/gen/vsub-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]874 src/f32-vbinary/gen/vsub-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]875 src/f32-vbinary/gen/vsub-scalar-x1.c
876 src/f32-vbinary/gen/vsub-scalar-x2.c
877 src/f32-vbinary/gen/vsub-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]878 src/f32-vbinary/gen/vsub-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]879 src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c
880 src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c
881 src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]882 src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]883 src/f32-vbinary/gen/vsubc-relu-scalar-x1.c
884 src/f32-vbinary/gen/vsubc-relu-scalar-x2.c
885 src/f32-vbinary/gen/vsubc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]886 src/f32-vbinary/gen/vsubc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]887 src/f32-vbinary/gen/vsubc-scalar-x1.c
888 src/f32-vbinary/gen/vsubc-scalar-x2.c
889 src/f32-vbinary/gen/vsubc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]890 src/f32-vbinary/gen/vsubc-scalar-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]891 src/f32-vclamp/gen/vclamp-scalar-x1.c
892 src/f32-vclamp/gen/vclamp-scalar-x2.c
893 src/f32-vclamp/gen/vclamp-scalar-x4.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]894 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c
895 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c
896 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c
897 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c
898 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c
899 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c
900 src/f32-velu/gen/velu-scalar-rr2-p6-x1.c
901 src/f32-velu/gen/velu-scalar-rr2-p6-x2.c
902 src/f32-velu/gen/velu-scalar-rr2-p6-x3.c
903 src/f32-velu/gen/velu-scalar-rr2-p6-x4.c
904 src/f32-velu/gen/velu-scalar-rr2-p6-x5.c
905 src/f32-velu/gen/velu-scalar-rr2-p6-x6.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]906 src/f32-vhswish/gen/vhswish-scalar-x1.c
907 src/f32-vhswish/gen/vhswish-scalar-x2.c
908 src/f32-vhswish/gen/vhswish-scalar-x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]909 src/f32-vlrelu/gen/vlrelu-scalar-x1.c
910 src/f32-vlrelu/gen/vlrelu-scalar-x2.c
911 src/f32-vlrelu/gen/vlrelu-scalar-x4.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]912 src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c
913 src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c
914 src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]915 src/f32-vrelu/gen/vrelu-scalar-x1.c
916 src/f32-vrelu/gen/vrelu-scalar-x2.c
917 src/f32-vrelu/gen/vrelu-scalar-x4.c
918 src/f32-vrelu/gen/vrelu-scalar-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]919 src/f32-vrnd/gen/vrndd-scalar-libm-x1.c
920 src/f32-vrnd/gen/vrndd-scalar-libm-x2.c
921 src/f32-vrnd/gen/vrndd-scalar-libm-x4.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]922 src/f32-vrnd/gen/vrndne-scalar-libm-x1.c
923 src/f32-vrnd/gen/vrndne-scalar-libm-x2.c
924 src/f32-vrnd/gen/vrndne-scalar-libm-x4.c
925 src/f32-vrnd/gen/vrndu-scalar-libm-x1.c
926 src/f32-vrnd/gen/vrndu-scalar-libm-x2.c
927 src/f32-vrnd/gen/vrndu-scalar-libm-x4.c
928 src/f32-vrnd/gen/vrndz-scalar-libm-x1.c
929 src/f32-vrnd/gen/vrndz-scalar-libm-x2.c
930 src/f32-vrnd/gen/vrndz-scalar-libm-x4.c
Marat Dukhance834ad2022-01-03 00:22:01 -0800[diff] [blame]931 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x1.c
932 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c
933 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x4.c
934 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x1.c
935 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x2.c
936 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x4.c
937 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x1.c
938 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x2.c
939 src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x4.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]940 src/f32-vsqrt/gen/scalar-sqrt-x1.c
941 src/f32-vsqrt/gen/scalar-sqrt-x2.c
942 src/f32-vsqrt/gen/scalar-sqrt-x4.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]943 src/f32-vunary/gen/vabs-scalar-x1.c
944 src/f32-vunary/gen/vabs-scalar-x2.c
945 src/f32-vunary/gen/vabs-scalar-x4.c
946 src/f32-vunary/gen/vneg-scalar-x1.c
947 src/f32-vunary/gen/vneg-scalar-x2.c
948 src/f32-vunary/gen/vneg-scalar-x4.c
949 src/f32-vunary/gen/vsqr-scalar-x1.c
950 src/f32-vunary/gen/vsqr-scalar-x2.c
951 src/f32-vunary/gen/vsqr-scalar-x4.c
Marat Dukhan78f039d2021-11-09 16:42:27 -0800[diff] [blame]952 src/math/cvt-f32-f16-scalar-bitcast.c
953 src/math/cvt-f32-f16-scalar-fabsf.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]954 src/math/expm1minus-scalar-rr2-lut4-p4.c
955 src/math/expm1minus-scalar-rr2-lut8-p3.c
956 src/math/expm1minus-scalar-rr2-lut8-p4.c
Marat Dukhanc60742b2020-11-23 12:33:27 -0800[diff] [blame]957 src/math/expm1minus-scalar-rr2-lut16-p3.c
958 src/math/expm1minus-scalar-rr2-lut16-p4.c
959 src/math/expm1minus-scalar-rr2-p5.c
960 src/math/expm1minus-scalar-rr2-p6.c
Frank Barchard22136062020-11-24 18:44:46 -0800[diff] [blame]961 src/math/expminus-scalar-rr2-lut64-p2.c
962 src/math/expminus-scalar-rr2-lut2048-p1.c
963 src/math/expminus-scalar-rr2-p5.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]964 src/math/roundd-scalar-addsub.c
965 src/math/roundd-scalar-cvt.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]966 src/math/roundd-scalar-floor.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]967 src/math/roundne-scalar-addsub.c
968 src/math/roundne-scalar-nearbyint.c
969 src/math/roundne-scalar-rint.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]970 src/math/roundu-scalar-addsub.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]971 src/math/roundu-scalar-ceil.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]972 src/math/roundu-scalar-cvt.c
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]973 src/math/roundz-scalar-addsub.c
974 src/math/roundz-scalar-cvt.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]975 src/math/roundz-scalar-trunc.c
Marat Dukhanf8475d62020-09-17 15:01:43 -0700[diff] [blame]976 src/math/sigmoid-scalar-rr2-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]977 src/math/sigmoid-scalar-rr2-lut2048-p1-div.c
Marat Dukhanf8475d62020-09-17 15:01:43 -0700[diff] [blame]978 src/math/sigmoid-scalar-rr2-p5-div.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]979 src/params-init.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]980 src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]981 src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c
982 src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]983 src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]984 src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c
985 src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]986 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]987 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c
988 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]989 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]990 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c
991 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]992 src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]993 src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c
994 src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]995 src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]996 src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c
997 src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]998 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]999 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c
1000 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1001 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1002 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c
1003 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1004 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1005 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c
1006 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1007 src/qc8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1008 src/qc8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c
1009 src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1010 src/qc8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1011 src/qc8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c
1012 src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1013 src/qc8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1014 src/qc8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c
1015 src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1016 src/qc8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1017 src/qc8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c
1018 src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1019 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1020 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c
1021 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1022 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1023 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c
1024 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1025 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1026 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c
1027 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1028 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1029 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c
1030 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1031 src/qc8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1032 src/qc8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c
1033 src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1034 src/qc8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1035 src/qc8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c
1036 src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1037 src/qc8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1038 src/qc8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c
1039 src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1040 src/qc8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1041 src/qc8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c
1042 src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1043 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1044 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c
1045 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1046 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1047 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c
1048 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1049 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1050 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c
1051 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1052 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1053 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c
1054 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1055 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1056 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c
1057 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1058 src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1059 src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c
1060 src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1061 src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1062 src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c
1063 src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c
Marat Dukhan86bd2702021-12-10 02:19:56 -0800[diff] [blame]1064 src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c
1065 src/qs8-f32-vcvt/gen/vcvt-scalar-x2.c
1066 src/qs8-f32-vcvt/gen/vcvt-scalar-x3.c
1067 src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c
Marat Dukhan047b6202021-05-11 20:32:25 -0700[diff] [blame]1068 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c
1069 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c
1070 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c
1071 src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c
1072 src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c
1073 src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1074 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1075 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c
1076 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1077 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1078 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c
1079 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1080 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1081 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c
1082 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1083 src/qs8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1084 src/qs8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c
1085 src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1086 src/qs8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1087 src/qs8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c
1088 src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1089 src/qs8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1090 src/qs8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c
1091 src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1092 src/qs8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1093 src/qs8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c
1094 src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1095 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1096 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c
1097 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1098 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1099 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c
1100 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1101 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1102 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c
1103 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1104 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1105 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c
1106 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1107 src/qs8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1108 src/qs8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c
1109 src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1110 src/qs8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1111 src/qs8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c
1112 src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1113 src/qs8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1114 src/qs8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c
1115 src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1116 src/qs8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1117 src/qs8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c
1118 src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1119 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1120 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c
1121 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1122 src/qs8-requantization/fp32-scalar-fmagic.c
Frank Barchardcccb0122022-01-04 15:24:00 -0800[diff] [blame]1123 src/qs8-requantization/fp32-scalar-lrintf.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]1124 src/qs8-requantization/gemmlowp-scalar.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]1125 src/qs8-requantization/rndna-scalar-signed64.c
1126 src/qs8-requantization/rndna-scalar-unsigned32.c
1127 src/qs8-requantization/rndna-scalar-unsigned64.c
Marat Dukhan062bee32021-05-27 20:31:07 -0700[diff] [blame]1128 src/qs8-requantization/rndnu-scalar.c
Marat Dukhand481c282021-05-11 23:48:31 -0700[diff] [blame]1129 src/qs8-vadd/gen/minmax-scalar-x1.c
1130 src/qs8-vadd/gen/minmax-scalar-x2.c
1131 src/qs8-vadd/gen/minmax-scalar-x4.c
1132 src/qs8-vaddc/gen/minmax-scalar-x1.c
1133 src/qs8-vaddc/gen/minmax-scalar-x2.c
1134 src/qs8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan79993412021-08-02 15:02:57 -0700[diff] [blame]1135 src/qs8-vmul/gen/minmax-fp32-scalar-x1.c
1136 src/qs8-vmul/gen/minmax-fp32-scalar-x2.c
1137 src/qs8-vmul/gen/minmax-fp32-scalar-x4.c
1138 src/qs8-vmulc/gen/minmax-fp32-scalar-x1.c
1139 src/qs8-vmulc/gen/minmax-fp32-scalar-x2.c
1140 src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]1141 src/qu8-avgpool/9p8x-minmax-scalar-c1.c
1142 src/qu8-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1143 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1144 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c
1145 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1146 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1147 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c
1148 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1149 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1150 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c
1151 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1152 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1153 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c
1154 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1155 src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1156 src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c
1157 src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1158 src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1159 src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c
1160 src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c
Marat Dukhan86bd2702021-12-10 02:19:56 -0800[diff] [blame]1161 src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c
1162 src/qu8-f32-vcvt/gen/vcvt-scalar-x2.c
1163 src/qu8-f32-vcvt/gen/vcvt-scalar-x3.c
1164 src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]1165 src/qu8-gavgpool/7p7x-minmax-scalar-c1.c
1166 src/qu8-gavgpool/7x-minmax-scalar-c1.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1167 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1168 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c
1169 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1170 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1171 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c
1172 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1173 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1174 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c
1175 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1176 src/qu8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1177 src/qu8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c
1178 src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1179 src/qu8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1180 src/qu8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c
1181 src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1182 src/qu8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1183 src/qu8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c
1184 src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1185 src/qu8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1186 src/qu8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c
1187 src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1188 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1189 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c
1190 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1191 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1192 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c
1193 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1194 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1195 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c
1196 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1197 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1198 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c
1199 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1200 src/qu8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1201 src/qu8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c
1202 src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1203 src/qu8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1204 src/qu8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c
1205 src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1206 src/qu8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1207 src/qu8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c
1208 src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1209 src/qu8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1210 src/qu8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c
1211 src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1212 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c
Marat Dukhan272d4d92022-01-04 15:07:14 -0800[diff] [blame]1213 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c
1214 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c
Marat Dukhan2ac722e2022-01-04 01:54:20 -0800[diff] [blame]1215 src/qu8-requantization/fp32-scalar-fmagic.c
Frank Barchardcccb0122022-01-04 15:24:00 -0800[diff] [blame]1216 src/qu8-requantization/fp32-scalar-lrintf.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]1217 src/qu8-requantization/gemmlowp-scalar.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]1218 src/qu8-requantization/rndna-scalar-signed64.c
1219 src/qu8-requantization/rndna-scalar-unsigned32.c
1220 src/qu8-requantization/rndna-scalar-unsigned64.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]1221 src/qu8-vadd/gen/minmax-scalar-x1.c
1222 src/qu8-vadd/gen/minmax-scalar-x2.c
1223 src/qu8-vadd/gen/minmax-scalar-x4.c
1224 src/qu8-vaddc/gen/minmax-scalar-x1.c
1225 src/qu8-vaddc/gen/minmax-scalar-x2.c
1226 src/qu8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan79993412021-08-02 15:02:57 -0700[diff] [blame]1227 src/qu8-vmul/gen/minmax-fp32-scalar-x1.c
1228 src/qu8-vmul/gen/minmax-fp32-scalar-x2.c
1229 src/qu8-vmul/gen/minmax-fp32-scalar-x4.c
1230 src/qu8-vmulc/gen/minmax-fp32-scalar-x1.c
1231 src/qu8-vmulc/gen/minmax-fp32-scalar-x2.c
1232 src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan6a69c8e2021-11-24 15:00:59 -0800[diff] [blame]1233 src/s8-ibilinear/gen/scalar-c1.c
1234 src/s8-ibilinear/gen/scalar-c2.c
1235 src/s8-ibilinear/gen/scalar-c4.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]1236 src/s8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]1237 src/s8-vclamp/scalar-x4.c
Marat Dukhan6a69c8e2021-11-24 15:00:59 -0800[diff] [blame]1238 src/u8-ibilinear/gen/scalar-c1.c
1239 src/u8-ibilinear/gen/scalar-c2.c
1240 src/u8-ibilinear/gen/scalar-c4.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1241 src/u8-lut32norm/scalar.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1242 src/u8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1243 src/u8-rmax/scalar.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]1244 src/u8-vclamp/scalar-x4.c
Marat Dukhan548542c2021-09-09 14:15:51 -0700[diff] [blame]1245 src/x8-lut/gen/lut-scalar-x1.c
1246 src/x8-lut/gen/lut-scalar-x2.c
1247 src/x8-lut/gen/lut-scalar-x4.c
1248 src/x8-lut/gen/lut-scalar-x8.c
1249 src/x8-lut/gen/lut-scalar-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1250 src/x8-zip/x2-scalar.c
1251 src/x8-zip/x3-scalar.c
1252 src/x8-zip/x4-scalar.c
1253 src/x8-zip/xm-scalar.c
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800[diff] [blame]1254 src/x32-depthtospace2d-chw2hwc/scalar.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1255 src/x32-packx/x2-scalar.c
1256 src/x32-packx/x3-scalar.c
1257 src/x32-packx/x4-scalar.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1258 src/x32-unpool/scalar.c
1259 src/x32-zip/x2-scalar.c
1260 src/x32-zip/x3-scalar.c
1261 src/x32-zip/x4-scalar.c
Marat Dukhan048931b2020-11-24 20:53:54 -0800[diff] [blame]1262 src/x32-zip/xm-scalar.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]1263 src/xx-copy/memcpy.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]1264 src/xx-fill/scalar-x16.c
1265 src/xx-pad/scalar.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1266
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1267SET(PROD_NEON_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]1268 src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1269 src/f32-argmaxpool/4x-neon-c4.c
1270 src/f32-argmaxpool/9p8x-neon-c4.c
1271 src/f32-argmaxpool/9x-neon-c4.c
1272 src/f32-avgpool/9p8x-minmax-neon-c4.c
1273 src/f32-avgpool/9x-minmax-neon-c4.c
1274 src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1275 src/f32-dwconv/gen/up8x3-minmax-neon.c
Frank Barcharddbe781b2021-10-18 10:29:52 -0700[diff] [blame]1276 src/f32-dwconv/gen/up8x4-minmax-neon.c
1277 src/f32-dwconv/gen/up8x9-minmax-neon.c
1278 src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1279 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c
1280 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c
1281 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c
1282 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]1283 src/f32-f16-vcvt/gen/vcvt-neon-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1284 src/f32-gavgpool-cw/neon-x4.c
1285 src/f32-gavgpool/7p7x-minmax-neon-c4.c
1286 src/f32-gavgpool/7x-minmax-neon-c4.c
1287 src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c
1288 src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c
1289 src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c
1290 src/f32-ibilinear-chw/gen/neon-p8.c
1291 src/f32-ibilinear/gen/neon-c8.c
1292 src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c
1293 src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c
1294 src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c
1295 src/f32-maxpool/9p8x-minmax-neon-c4.c
1296 src/f32-pavgpool/9p8x-minmax-neon-c4.c
1297 src/f32-pavgpool/9x-minmax-neon-c4.c
1298 src/f32-prelu/gen/neon-2x8.c
Marat Dukhaned2d7762021-12-03 23:51:19 -0800[diff] [blame]1299 src/f32-qs8-vcvt/gen/vcvt-neon-x32.c
1300 src/f32-qu8-vcvt/gen/vcvt-neon-x32.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]1301 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1302 src/f32-rmax/neon.c
1303 src/f32-spmm/gen/32x1-minmax-neon.c
1304 src/f32-vbinary/gen/vadd-minmax-neon-x8.c
1305 src/f32-vbinary/gen/vaddc-minmax-neon-x8.c
1306 src/f32-vbinary/gen/vmax-neon-x8.c
1307 src/f32-vbinary/gen/vmaxc-neon-x8.c
1308 src/f32-vbinary/gen/vmin-neon-x8.c
1309 src/f32-vbinary/gen/vminc-neon-x8.c
1310 src/f32-vbinary/gen/vmul-minmax-neon-x8.c
1311 src/f32-vbinary/gen/vmulc-minmax-neon-x8.c
1312 src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c
1313 src/f32-vbinary/gen/vsqrdiff-neon-x8.c
1314 src/f32-vbinary/gen/vsqrdiffc-neon-x8.c
1315 src/f32-vbinary/gen/vsub-minmax-neon-x8.c
1316 src/f32-vbinary/gen/vsubc-minmax-neon-x8.c
1317 src/f32-vclamp/gen/vclamp-neon-x8.c
1318 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c
1319 src/f32-vhswish/gen/vhswish-neon-x16.c
1320 src/f32-vlrelu/gen/vlrelu-neon-x8.c
1321 src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c
1322 src/f32-vrnd/gen/vrndd-neon-x8.c
1323 src/f32-vrnd/gen/vrndne-neon-x8.c
1324 src/f32-vrnd/gen/vrndu-neon-x8.c
1325 src/f32-vrnd/gen/vrndz-neon-x8.c
1326 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c
1327 src/f32-vunary/gen/vabs-neon-x8.c
1328 src/f32-vunary/gen/vneg-neon-x8.c
1329 src/f32-vunary/gen/vsqr-neon-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1330 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]1331 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c
1332 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1333 src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1334 src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
1335 src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1336 src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1337 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]1338 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c
1339 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c
Marat Dukhanf92206b2021-12-10 17:02:07 -0800[diff] [blame]1340 src/qs8-f32-vcvt/gen/vcvt-neon-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1341 src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c
1342 src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c
Frank Barchard95198162021-12-21 17:29:10 -0800[diff] [blame]1343 src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1344 src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1345 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1346 src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c
Frank Barchard95198162021-12-21 17:29:10 -0800[diff] [blame]1347 src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1348 src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1349 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1350 src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c
Marat Dukhan01debd92021-07-29 18:14:21 -0700[diff] [blame]1351 src/qs8-vadd/gen/minmax-neon-ld64-x16.c
1352 src/qs8-vadd/gen/minmax-neon-ld64-x32.c
1353 src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
1354 src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]1355 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1356 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1357 src/qu8-avgpool/9p8x-minmax-neon-c8.c
1358 src/qu8-avgpool/9x-minmax-neon-c8.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1359 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c
1360 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c
Marat Dukhanf92206b2021-12-10 17:02:07 -0800[diff] [blame]1361 src/qu8-f32-vcvt/gen/vcvt-neon-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1362 src/qu8-gavgpool/7p7x-minmax-neon-c8.c
1363 src/qu8-gavgpool/7x-minmax-neon-c8.c
1364 src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
1365 src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1366 src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
1367 src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
1368 src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
1369 src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1370 src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
1371 src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]1372 src/qu8-vadd/gen/minmax-neon-ld64-x16.c
1373 src/qu8-vadd/gen/minmax-neon-ld64-x32.c
1374 src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
1375 src/qu8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]1376 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1377 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]1378 src/s8-ibilinear/gen/neon-c8.c
1379 src/s8-ibilinear/gen/neon-c16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]1380 src/s8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]1381 src/s8-vclamp/neon-x64.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]1382 src/u8-ibilinear/gen/neon-c8.c
1383 src/u8-ibilinear/gen/neon-c16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1384 src/u8-maxpool/9p8x-minmax-neon-c16.c
1385 src/u8-rmax/neon.c
1386 src/u8-vclamp/neon-x64.c
1387 src/x8-zip/x2-neon.c
1388 src/x8-zip/x3-neon.c
1389 src/x8-zip/x4-neon.c
1390 src/x8-zip/xm-neon.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1391 src/x32-packx/x4-neon-st4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1392 src/x32-unpool/neon.c
1393 src/x32-zip/x2-neon.c
1394 src/x32-zip/x3-neon.c
1395 src/x32-zip/x4-neon.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]1396 src/x32-zip/xm-neon.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]1397 src/xx-fill/neon-x64.c
1398 src/xx-pad/neon.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1399
1400SET(ALL_NEON_MICROKERNEL_SRCS
Marat Dukhan322ed6f2021-10-16 17:44:16 -0700[diff] [blame]1401 src/f16-f32-vcvt/gen/vcvt-neon-int16-x8.c
1402 src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c
1403 src/f16-f32-vcvt/gen/vcvt-neon-int16-x24.c
1404 src/f16-f32-vcvt/gen/vcvt-neon-int16-x32.c
1405 src/f16-f32-vcvt/gen/vcvt-neon-int32-x8.c
1406 src/f16-f32-vcvt/gen/vcvt-neon-int32-x16.c
1407 src/f16-f32-vcvt/gen/vcvt-neon-int32-x24.c
1408 src/f16-f32-vcvt/gen/vcvt-neon-int32-x32.c
Marat Dukhanef25c6d2020-07-24 00:59:40 -0700[diff] [blame]1409 src/f32-argmaxpool/4x-neon-c4.c
1410 src/f32-argmaxpool/9p8x-neon-c4.c
1411 src/f32-argmaxpool/9x-neon-c4.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1412 src/f32-avgpool/9p8x-minmax-neon-c4.c
1413 src/f32-avgpool/9x-minmax-neon-c4.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]1414 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1415 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1416 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1417 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]1418 src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1419 src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1420 src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1421 src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c
Marat Dukhanc7634882020-12-07 15:11:12 -0800[diff] [blame]1422 src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1423 src/f32-dwconv/gen/up4x3-minmax-neon-acc2.c
1424 src/f32-dwconv/gen/up4x3-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1425 src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1426 src/f32-dwconv/gen/up4x4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1427 src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1428 src/f32-dwconv/gen/up4x9-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1429 src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1430 src/f32-dwconv/gen/up4x25-minmax-neon.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1431 src/f32-dwconv/gen/up8x3-minmax-neon-acc2.c
1432 src/f32-dwconv/gen/up8x3-minmax-neon.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1433 src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c
1434 src/f32-dwconv/gen/up8x4-minmax-neon.c
1435 src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c
1436 src/f32-dwconv/gen/up8x9-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1437 src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1438 src/f32-dwconv/gen/up8x25-minmax-neon.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1439 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c
1440 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c
1441 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c
Marat Dukhanc581e482020-10-24 01:28:11 -0700[diff] [blame]1442 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1443 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c
Marat Dukhanc581e482020-10-24 01:28:11 -0700[diff] [blame]1444 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c
1445 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c
1446 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c
1447 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c
1448 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]1449 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c
1450 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c
1451 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1452 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]1453 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1454 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c
1455 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c
1456 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1457 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c
1458 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c
1459 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c
1460 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1461 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1462 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c
1463 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1464 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1465 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1466 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1467 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1468 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c
1469 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]1470 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c
1471 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c
1472 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c
1473 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c
1474 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c
1475 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c
1476 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c
1477 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]1478 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]1479 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c
Marat Dukhan4edfdbf2021-11-09 13:47:11 -0800[diff] [blame]1480 src/f32-f16-vcvt/gen/vcvt-neon-x8.c
1481 src/f32-f16-vcvt/gen/vcvt-neon-x16.c
1482 src/f32-f16-vcvt/gen/vcvt-neon-x24.c
1483 src/f32-f16-vcvt/gen/vcvt-neon-x32.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1484 src/f32-gavgpool-cw/neon-x4.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]1485 src/f32-gavgpool/7p7x-minmax-neon-c4.c
1486 src/f32-gavgpool/7x-minmax-neon-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1487 src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1488 src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c
1489 src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1490 src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1491 src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c
1492 src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c
1493 src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c
1494 src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c
1495 src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1496 src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c
1497 src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1498 src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c
1499 src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1500 src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c
1501 src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1502 src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c
1503 src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c
1504 src/f32-gemm/gen/1x8s4-minmax-neon.c
1505 src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c
1506 src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c
1507 src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c
1508 src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c
1509 src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c
1510 src/f32-gemm/gen/4x8s4-minmax-neon.c
1511 src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c
1512 src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c
1513 src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c
1514 src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c
1515 src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c
1516 src/f32-gemm/gen/6x8s4-minmax-neon.c
1517 src/f32-gemm/gen/8x8s4-minmax-neon.c
Artsiom Ablavatski2202c812021-01-22 14:16:43 -0800[diff] [blame]1518 src/f32-ibilinear-chw/gen/neon-p4.c
1519 src/f32-ibilinear-chw/gen/neon-p8.c
Frank Barchard8247e212021-02-03 18:12:33 -0800[diff] [blame]1520 src/f32-ibilinear/gen/neon-c4.c
1521 src/f32-ibilinear/gen/neon-c8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1522 src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1523 src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1524 src/f32-igemm/gen/1x8s4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1525 src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c
1526 src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1527 src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1528 src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c
1529 src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c
1530 src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c
1531 src/f32-igemm/gen/4x8s4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1532 src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c
1533 src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1534 src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c
1535 src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1536 src/f32-igemm/gen/6x8s4-minmax-neon.c
1537 src/f32-igemm/gen/8x8s4-minmax-neon.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1538 src/f32-maxpool/9p8x-minmax-neon-c4.c
1539 src/f32-pavgpool/9p8x-minmax-neon-c4.c
1540 src/f32-pavgpool/9x-minmax-neon-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1541 src/f32-ppmm/gen/4x8-minmax-neon.c
1542 src/f32-ppmm/gen/8x8-minmax-neon.c
Frank Barcharda5316982020-07-23 13:19:28 -0700[diff] [blame]1543 src/f32-prelu/gen/neon-1x4.c
1544 src/f32-prelu/gen/neon-1x8.c
1545 src/f32-prelu/gen/neon-1x16.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1546 src/f32-prelu/gen/neon-2x4.c
1547 src/f32-prelu/gen/neon-2x8.c
Frank Barcharda5316982020-07-23 13:19:28 -0700[diff] [blame]1548 src/f32-prelu/gen/neon-2x16.c
1549 src/f32-prelu/gen/neon-4x4.c
1550 src/f32-prelu/gen/neon-4x8.c
1551 src/f32-prelu/gen/neon-4x16.c
Marat Dukhanb2d0a2a2021-12-02 09:04:57 -0800[diff] [blame]1552 src/f32-qs8-vcvt/gen/vcvt-neon-x8.c
1553 src/f32-qs8-vcvt/gen/vcvt-neon-x16.c
1554 src/f32-qs8-vcvt/gen/vcvt-neon-x24.c
1555 src/f32-qs8-vcvt/gen/vcvt-neon-x32.c
1556 src/f32-qu8-vcvt/gen/vcvt-neon-x8.c
1557 src/f32-qu8-vcvt/gen/vcvt-neon-x16.c
1558 src/f32-qu8-vcvt/gen/vcvt-neon-x24.c
1559 src/f32-qu8-vcvt/gen/vcvt-neon-x32.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]1560 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x4.c
1561 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8-acc2.c
1562 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8.c
1563 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12-acc2.c
1564 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12-acc3.c
1565 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12.c
1566 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16-acc2.c
1567 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16-acc4.c
1568 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16.c
1569 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20-acc2.c
1570 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20-acc5.c
1571 src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20.c
1572 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x4.c
1573 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x8-acc2.c
1574 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x8.c
1575 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12-acc2.c
1576 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12-acc3.c
1577 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12.c
1578 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16-acc2.c
1579 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16-acc4.c
1580 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16.c
1581 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20-acc2.c
1582 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20-acc5.c
1583 src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1584 src/f32-rmax/neon.c
Marat Dukhan5b86c432020-12-06 19:15:03 -0800[diff] [blame]1585 src/f32-spmm/gen/4x1-minmax-neon-pipelined.c
1586 src/f32-spmm/gen/4x1-minmax-neon-x2.c
1587 src/f32-spmm/gen/4x1-minmax-neon.c
1588 src/f32-spmm/gen/8x1-minmax-neon-pipelined.c
1589 src/f32-spmm/gen/8x1-minmax-neon-x2.c
1590 src/f32-spmm/gen/8x1-minmax-neon.c
1591 src/f32-spmm/gen/12x1-minmax-neon.c
1592 src/f32-spmm/gen/16x1-minmax-neon-pipelined.c
1593 src/f32-spmm/gen/16x1-minmax-neon-x2.c
1594 src/f32-spmm/gen/16x1-minmax-neon.c
1595 src/f32-spmm/gen/32x1-minmax-neon-pipelined.c
1596 src/f32-spmm/gen/32x1-minmax-neon-x2.c
1597 src/f32-spmm/gen/32x1-minmax-neon.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1598 src/f32-vbinary/gen/vadd-minmax-neon-x4.c
1599 src/f32-vbinary/gen/vadd-minmax-neon-x8.c
1600 src/f32-vbinary/gen/vaddc-minmax-neon-x4.c
1601 src/f32-vbinary/gen/vaddc-minmax-neon-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1602 src/f32-vbinary/gen/vmax-neon-x4.c
1603 src/f32-vbinary/gen/vmax-neon-x8.c
1604 src/f32-vbinary/gen/vmaxc-neon-x4.c
1605 src/f32-vbinary/gen/vmaxc-neon-x8.c
1606 src/f32-vbinary/gen/vmin-neon-x4.c
1607 src/f32-vbinary/gen/vmin-neon-x8.c
1608 src/f32-vbinary/gen/vminc-neon-x4.c
1609 src/f32-vbinary/gen/vminc-neon-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1610 src/f32-vbinary/gen/vmul-minmax-neon-x4.c
1611 src/f32-vbinary/gen/vmul-minmax-neon-x8.c
1612 src/f32-vbinary/gen/vmulc-minmax-neon-x4.c
1613 src/f32-vbinary/gen/vmulc-minmax-neon-x8.c
1614 src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c
1615 src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]1616 src/f32-vbinary/gen/vsqrdiff-neon-x4.c
1617 src/f32-vbinary/gen/vsqrdiff-neon-x8.c
1618 src/f32-vbinary/gen/vsqrdiffc-neon-x4.c
1619 src/f32-vbinary/gen/vsqrdiffc-neon-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1620 src/f32-vbinary/gen/vsub-minmax-neon-x4.c
1621 src/f32-vbinary/gen/vsub-minmax-neon-x8.c
1622 src/f32-vbinary/gen/vsubc-minmax-neon-x4.c
1623 src/f32-vbinary/gen/vsubc-minmax-neon-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]1624 src/f32-vclamp/gen/vclamp-neon-x4.c
1625 src/f32-vclamp/gen/vclamp-neon-x8.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]1626 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c
1627 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c
1628 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c
1629 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c
1630 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c
1631 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c
1632 src/f32-velu/gen/velu-neon-rr2-p6-x4.c
1633 src/f32-velu/gen/velu-neon-rr2-p6-x8.c
1634 src/f32-velu/gen/velu-neon-rr2-p6-x12.c
1635 src/f32-velu/gen/velu-neon-rr2-p6-x16.c
1636 src/f32-velu/gen/velu-neon-rr2-p6-x20.c
1637 src/f32-velu/gen/velu-neon-rr2-p6-x24.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]1638 src/f32-vhswish/gen/vhswish-neon-x4.c
1639 src/f32-vhswish/gen/vhswish-neon-x8.c
1640 src/f32-vhswish/gen/vhswish-neon-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1641 src/f32-vlrelu/gen/vlrelu-neon-x4.c
1642 src/f32-vlrelu/gen/vlrelu-neon-x8.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1643 src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c
1644 src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]1645 src/f32-vrelu/gen/vrelu-neon-x4.c
1646 src/f32-vrelu/gen/vrelu-neon-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1647 src/f32-vrnd/gen/vrndd-neon-x4.c
1648 src/f32-vrnd/gen/vrndd-neon-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1649 src/f32-vrnd/gen/vrndne-neon-x4.c
1650 src/f32-vrnd/gen/vrndne-neon-x8.c
1651 src/f32-vrnd/gen/vrndu-neon-x4.c
1652 src/f32-vrnd/gen/vrndu-neon-x8.c
1653 src/f32-vrnd/gen/vrndz-neon-x4.c
1654 src/f32-vrnd/gen/vrndz-neon-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]1655 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c
1656 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c
1657 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c
1658 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c
1659 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c
1660 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c
1661 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c
1662 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c
1663 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c
1664 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c
1665 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c
1666 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c
1667 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c
1668 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c
1669 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c
1670 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c
1671 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c
1672 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]1673 src/f32-vunary/gen/vabs-neon-x4.c
1674 src/f32-vunary/gen/vabs-neon-x8.c
1675 src/f32-vunary/gen/vneg-neon-x4.c
1676 src/f32-vunary/gen/vneg-neon-x8.c
1677 src/f32-vunary/gen/vsqr-neon-x4.c
1678 src/f32-vunary/gen/vsqr-neon-x8.c
Marat Dukhan60f903b2021-09-30 09:43:13 -0700[diff] [blame]1679 src/math/cvt-f16-f32-neon-int16.c
1680 src/math/cvt-f16-f32-neon-int32.c
Marat Dukhana6eb1e52021-11-06 18:29:36 -0700[diff] [blame]1681 src/math/cvt-f32-f16-neon.c
Marat Dukhand24301d2021-12-02 00:13:45 -0800[diff] [blame]1682 src/math/cvt-f32-qs8-neon.c
1683 src/math/cvt-f32-qu8-neon.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]1684 src/math/expm1minus-neon-rr2-lut16-p3.c
1685 src/math/expm1minus-neon-rr2-p6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1686 src/math/roundd-neon-addsub.c
1687 src/math/roundd-neon-cvt.c
1688 src/math/roundne-neon-addsub.c
1689 src/math/roundu-neon-addsub.c
1690 src/math/roundu-neon-cvt.c
1691 src/math/roundz-neon-addsub.c
1692 src/math/roundz-neon-cvt.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1693 src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c
1694 src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c
1695 src/math/sigmoid-neon-rr2-p5-nr2recps.c
1696 src/math/sqrt-neon-nr1rsqrts.c
1697 src/math/sqrt-neon-nr2rsqrts.c
1698 src/math/sqrt-neon-nr3rsqrts.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1699 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c
1700 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1701 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1702 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c
1703 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1704 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1705 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c
1706 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c
1707 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c
1708 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1709 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1710 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c
1711 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c
1712 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c
1713 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1714 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
1715 src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
1716 src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
1717 src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
1718 src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]1719 src/qc8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane-prfm.c
1720 src/qc8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1721 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1722 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c
1723 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1724 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1725 src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1726 src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1727 src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c
1728 src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1729 src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c
1730 src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]1731 src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane-prfm.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1732 src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]1733 src/qc8-gemm/gen/2x8-minmax-fp32-neon-mlal-lane-prfm.c
1734 src/qc8-gemm/gen/2x8-minmax-fp32-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1735 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1736 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c
1737 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1738 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1739 src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
1740 src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1741 src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c
1742 src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1743 src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c
1744 src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]1745 src/qc8-gemm/gen/2x16-minmax-fp32-neon-mlal-lane-prfm.c
1746 src/qc8-gemm/gen/2x16-minmax-fp32-neon-mlal-lane.c
1747 src/qc8-gemm/gen/3x8-minmax-fp32-neon-mlal-lane-prfm.c
1748 src/qc8-gemm/gen/3x8-minmax-fp32-neon-mlal-lane.c
1749 src/qc8-gemm/gen/3x16-minmax-fp32-neon-mlal-lane-prfm.c
1750 src/qc8-gemm/gen/3x16-minmax-fp32-neon-mlal-lane.c
1751 src/qc8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane-prfm.c
1752 src/qc8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane.c
1753 src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane-prfm.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1754 src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]1755 src/qc8-gemm/gen/6x8-minmax-fp32-neon-mlal-lane-prfm.c
1756 src/qc8-gemm/gen/6x8-minmax-fp32-neon-mlal-lane.c
1757 src/qc8-gemm/gen/6x16-minmax-fp32-neon-mlal-lane-prfm.c
1758 src/qc8-gemm/gen/6x16-minmax-fp32-neon-mlal-lane.c
1759 src/qc8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane-prfm.c
1760 src/qc8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1761 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1762 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c
1763 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1764 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1765 src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1766 src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1767 src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c
1768 src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1769 src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c
1770 src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]1771 src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane-prfm.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1772 src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]1773 src/qc8-igemm/gen/2x8-minmax-fp32-neon-mlal-lane-prfm.c
1774 src/qc8-igemm/gen/2x8-minmax-fp32-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1775 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1776 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c
1777 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1778 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1779 src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
1780 src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1781 src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c
1782 src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1783 src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c
1784 src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]1785 src/qc8-igemm/gen/2x16-minmax-fp32-neon-mlal-lane-prfm.c
1786 src/qc8-igemm/gen/2x16-minmax-fp32-neon-mlal-lane.c
1787 src/qc8-igemm/gen/3x8-minmax-fp32-neon-mlal-lane-prfm.c
1788 src/qc8-igemm/gen/3x8-minmax-fp32-neon-mlal-lane.c
1789 src/qc8-igemm/gen/3x16-minmax-fp32-neon-mlal-lane-prfm.c
1790 src/qc8-igemm/gen/3x16-minmax-fp32-neon-mlal-lane.c
1791 src/qc8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane-prfm.c
1792 src/qc8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane.c
1793 src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane-prfm.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1794 src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]1795 src/qc8-igemm/gen/6x8-minmax-fp32-neon-mlal-lane-prfm.c
1796 src/qc8-igemm/gen/6x8-minmax-fp32-neon-mlal-lane.c
1797 src/qc8-igemm/gen/6x16-minmax-fp32-neon-mlal-lane-prfm.c
1798 src/qc8-igemm/gen/6x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1799 src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1800 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c
1801 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1802 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1803 src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1804 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c
1805 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1806 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1807 src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1808 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c
1809 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c
1810 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c
1811 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1812 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1813 src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1814 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c
1815 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c
1816 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c
1817 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1818 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1819 src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1820 src/qs8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1821 src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1822 src/qs8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1823 src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1824 src/qs8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1825 src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Frank Barchard2aa2e2a2021-09-16 14:59:13 -0700[diff] [blame]1826 src/qs8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c
Marat Dukhanfee66be2021-12-09 17:51:15 -0800[diff] [blame]1827 src/qs8-f32-vcvt/gen/vcvt-neon-x8.c
1828 src/qs8-f32-vcvt/gen/vcvt-neon-x16.c
1829 src/qs8-f32-vcvt/gen/vcvt-neon-x24.c
1830 src/qs8-f32-vcvt/gen/vcvt-neon-x32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1831 src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c
1832 src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c
1833 src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c
1834 src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c
1835 src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c
1836 src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c
1837 src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c
1838 src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1839 src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c
1840 src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1841 src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1842 src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1843 src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c
1844 src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1845 src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1846 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1847 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c
1848 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1849 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1850 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1851 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c
1852 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1853 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1854 src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1855 src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c
1856 src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c
1857 src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1858 src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c
1859 src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1860 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1861 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c
1862 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1863 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1864 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c
1865 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1866 src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c
1867 src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c
1868 src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c
1869 src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1870 src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1871 src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mull.c
1872 src/qs8-gemm/gen/1x8c16-minmax-rndnu-neon-mlal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1873 src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1874 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c
1875 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1876 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1877 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1878 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c
1879 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1880 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1881 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1882 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c
1883 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1884 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1885 src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c
1886 src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c
1887 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1888 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c
1889 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1890 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1891 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c
1892 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1893 src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c
1894 src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1895 src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mlal.c
1896 src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mull.c
1897 src/qs8-gemm/gen/1x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1898 src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c
1899 src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1900 src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1901 src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1902 src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c
1903 src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1904 src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1905 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1906 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c
1907 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1908 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1909 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1910 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c
1911 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1912 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1913 src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
1914 src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c
1915 src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c
1916 src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1917 src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c
1918 src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1919 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1920 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c
1921 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1922 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1923 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c
1924 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1925 src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c
1926 src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c
1927 src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c
1928 src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1929 src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1930 src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mull.c
1931 src/qs8-gemm/gen/2x8c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1932 src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c
1933 src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1934 src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1935 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1936 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c
1937 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1938 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1939 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1940 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c
1941 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1942 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1943 src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c
1944 src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c
1945 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1946 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c
1947 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1948 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1949 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c
1950 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1951 src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c
1952 src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1953 src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mlal.c
1954 src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mull.c
1955 src/qs8-gemm/gen/2x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1956 src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c
1957 src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1958 src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1959 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1960 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c
1961 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1962 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1963 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1964 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c
1965 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1966 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1967 src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c
1968 src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c
1969 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1970 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c
1971 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1972 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1973 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c
1974 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1975 src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c
1976 src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1977 src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mlal.c
1978 src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mull.c
1979 src/qs8-gemm/gen/3x8c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1980 src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c
1981 src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1982 src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1983 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1984 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c
1985 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1986 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1987 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1988 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c
1989 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1990 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1991 src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c
1992 src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c
1993 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1994 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c
1995 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1996 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1997 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c
1998 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1999 src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c
2000 src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2001 src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mlal.c
2002 src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mull.c
2003 src/qs8-gemm/gen/3x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2004 src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c
2005 src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]2006 src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2007 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2008 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c
2009 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2010 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2011 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2012 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c
2013 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2014 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2015 src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c
2016 src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c
2017 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2018 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c
2019 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2020 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2021 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c
2022 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2023 src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c
2024 src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2025 src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mlal.c
2026 src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mull.c
2027 src/qs8-gemm/gen/4x8c16-minmax-rndnu-neon-mlal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]2028 src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]2029 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c
2030 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2031 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2032 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2033 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c
2034 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2035 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2036 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2037 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c
2038 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2039 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2040 src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c
2041 src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c
2042 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2043 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c
2044 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2045 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2046 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c
2047 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2048 src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c
2049 src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2050 src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mlal.c
2051 src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mull.c
2052 src/qs8-gemm/gen/4x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2053 src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c
2054 src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2055 src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c
2056 src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2057 src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c
2058 src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]2059 src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2060 src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2061 src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c
2062 src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2063 src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2064 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2065 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c
2066 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2067 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2068 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2069 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c
2070 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2071 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2072 src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
2073 src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c
2074 src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c
2075 src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2076 src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c
2077 src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2078 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2079 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c
2080 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2081 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2082 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c
2083 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2084 src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c
2085 src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c
2086 src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c
2087 src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2088 src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2089 src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mull.c
2090 src/qs8-igemm/gen/1x8c16-minmax-rndnu-neon-mlal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]2091 src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]2092 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c
2093 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2094 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2095 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2096 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c
2097 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2098 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2099 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2100 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c
2101 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2102 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2103 src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c
2104 src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c
2105 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2106 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c
2107 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2108 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2109 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c
2110 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2111 src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c
2112 src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2113 src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mlal.c
2114 src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mull.c
2115 src/qs8-igemm/gen/1x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2116 src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c
2117 src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]2118 src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2119 src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2120 src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c
2121 src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2122 src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2123 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2124 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c
2125 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2126 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2127 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2128 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c
2129 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2130 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2131 src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
2132 src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c
2133 src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c
2134 src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2135 src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c
2136 src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2137 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2138 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c
2139 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2140 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2141 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c
2142 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2143 src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c
2144 src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c
2145 src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c
2146 src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2147 src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2148 src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mull.c
2149 src/qs8-igemm/gen/2x8c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2150 src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c
2151 src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]2152 src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2153 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2154 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c
2155 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2156 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2157 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2158 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c
2159 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2160 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2161 src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c
2162 src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c
2163 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2164 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c
2165 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2166 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2167 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c
2168 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2169 src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c
2170 src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2171 src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mlal.c
2172 src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mull.c
2173 src/qs8-igemm/gen/2x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2174 src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c
2175 src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]2176 src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2177 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2178 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c
2179 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2180 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2181 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2182 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c
2183 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2184 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2185 src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c
2186 src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c
2187 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2188 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c
2189 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2190 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2191 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c
2192 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2193 src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c
2194 src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2195 src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mlal.c
2196 src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mull.c
2197 src/qs8-igemm/gen/3x8c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2198 src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c
2199 src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]2200 src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2201 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2202 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c
2203 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2204 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2205 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2206 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c
2207 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2208 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2209 src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c
2210 src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c
2211 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2212 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c
2213 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2214 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2215 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c
2216 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2217 src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c
2218 src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2219 src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mlal.c
2220 src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mull.c
2221 src/qs8-igemm/gen/3x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2222 src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c
2223 src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]2224 src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2225 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2226 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c
2227 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2228 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2229 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2230 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c
2231 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2232 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2233 src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c
2234 src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c
2235 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2236 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c
2237 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2238 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2239 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c
2240 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2241 src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c
2242 src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2243 src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mlal.c
2244 src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mull.c
2245 src/qs8-igemm/gen/4x8c16-minmax-rndnu-neon-mlal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]2246 src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]2247 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c
2248 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2249 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2250 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2251 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c
2252 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2253 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2254 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2255 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c
2256 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2257 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2258 src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c
2259 src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c
2260 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2261 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c
2262 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2263 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2264 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c
2265 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2266 src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c
2267 src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2268 src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mlal.c
2269 src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mull.c
2270 src/qs8-igemm/gen/4x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2271 src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c
2272 src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2273 src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c
2274 src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]2275 src/qs8-requantization/fp32-neon.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]2276 src/qs8-requantization/gemmlowp-neon.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]2277 src/qs8-requantization/rndna-neon.c
Marat Dukhand3d818c2021-07-16 17:56:54 -0700[diff] [blame]2278 src/qs8-requantization/rndnu-neon-mull.c
2279 src/qs8-requantization/rndnu-neon-qdmulh.c
Marat Dukhanba7b2792020-09-02 14:26:45 -0700[diff] [blame]2280 src/qs8-vadd/gen/minmax-neon-ld64-x8.c
2281 src/qs8-vadd/gen/minmax-neon-ld64-x16.c
2282 src/qs8-vadd/gen/minmax-neon-ld64-x24.c
2283 src/qs8-vadd/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]2284 src/qs8-vadd/gen/minmax-neon-ld128-x16.c
2285 src/qs8-vadd/gen/minmax-neon-ld128-x32.c
Marat Dukhanba7b2792020-09-02 14:26:45 -0700[diff] [blame]2286 src/qs8-vaddc/gen/minmax-neon-ld64-x8.c
2287 src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
2288 src/qs8-vaddc/gen/minmax-neon-ld64-x24.c
2289 src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]2290 src/qs8-vaddc/gen/minmax-neon-ld128-x16.c
2291 src/qs8-vaddc/gen/minmax-neon-ld128-x32.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2292 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x8.c
2293 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c
2294 src/qs8-vmul/gen/minmax-fp32-neon-ld128-x16.c
2295 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x8.c
2296 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
2297 src/qs8-vmulc/gen/minmax-fp32-neon-ld128-x16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]2298 src/qu8-avgpool/9p8x-minmax-neon-c8.c
2299 src/qu8-avgpool/9x-minmax-neon-c8.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2300 src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2301 src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]2302 src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2303 src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2304 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]2305 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2306 src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2307 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]2308 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2309 src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2310 src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]2311 src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2312 src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2313 src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul8.c
2314 src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2315 src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2316 src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul8.c
2317 src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2318 src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2319 src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul8.c
2320 src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2321 src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2322 src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul8.c
2323 src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c
Marat Dukhanfee66be2021-12-09 17:51:15 -0800[diff] [blame]2324 src/qu8-f32-vcvt/gen/vcvt-neon-x8.c
2325 src/qu8-f32-vcvt/gen/vcvt-neon-x16.c
2326 src/qu8-f32-vcvt/gen/vcvt-neon-x24.c
2327 src/qu8-f32-vcvt/gen/vcvt-neon-x32.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]2328 src/qu8-gavgpool/7p7x-minmax-neon-c8.c
2329 src/qu8-gavgpool/7x-minmax-neon-c8.c
Digant Desai59d65152021-11-29 10:44:04 -0800[diff] [blame]2330 src/qu8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2331 src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]2332 src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2333 src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Digant Desai59d65152021-11-29 10:44:04 -0800[diff] [blame]2334 src/qu8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2335 src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]2336 src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2337 src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Digant Desai59d65152021-11-29 10:44:04 -0800[diff] [blame]2338 src/qu8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2339 src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]2340 src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2341 src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Digant Desai59d65152021-11-29 10:44:04 -0800[diff] [blame]2342 src/qu8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2343 src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]2344 src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2345 src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]2346 src/qu8-requantization/fp32-neon.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]2347 src/qu8-requantization/gemmlowp-neon.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]2348 src/qu8-requantization/rndna-neon.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]2349 src/qu8-vadd/gen/minmax-neon-ld64-x8.c
2350 src/qu8-vadd/gen/minmax-neon-ld64-x16.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]2351 src/qu8-vadd/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]2352 src/qu8-vadd/gen/minmax-neon-ld128-x16.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]2353 src/qu8-vaddc/gen/minmax-neon-ld64-x8.c
2354 src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]2355 src/qu8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]2356 src/qu8-vaddc/gen/minmax-neon-ld128-x16.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2357 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x8.c
2358 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c
2359 src/qu8-vmul/gen/minmax-fp32-neon-ld128-x16.c
2360 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x8.c
2361 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
2362 src/qu8-vmulc/gen/minmax-fp32-neon-ld128-x16.c
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]2363 src/s8-ibilinear/gen/neon-c8.c
2364 src/s8-ibilinear/gen/neon-c16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]2365 src/s8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]2366 src/s8-vclamp/neon-x64.c
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]2367 src/u8-ibilinear/gen/neon-c8.c
2368 src/u8-ibilinear/gen/neon-c16.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2369 src/u8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]2370 src/u8-rmax/neon.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]2371 src/u8-vclamp/neon-x64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2372 src/x8-zip/x2-neon.c
2373 src/x8-zip/x3-neon.c
2374 src/x8-zip/x4-neon.c
2375 src/x8-zip/xm-neon.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]2376 src/x32-packx/x4-neon-st4.c
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]2377 src/x32-unpool/neon.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]2378 src/x32-zip/x2-neon.c
2379 src/x32-zip/x3-neon.c
2380 src/x32-zip/x4-neon.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]2381 src/x32-zip/xm-neon.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]2382 src/xx-fill/neon-x64.c
2383 src/xx-pad/neon.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2384
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]2385SET(PROD_NEONFP16_MICROKERNEL_SRCS
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]2386 src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c
2387 src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c)
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]2388
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]2389SET(ALL_NEONFP16_MICROKERNEL_SRCS
2390 src/f16-f32-vcvt/gen/vcvt-neonfp16-x8.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]2391 src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]2392 src/f32-f16-vcvt/gen/vcvt-neonfp16-x8.c
2393 src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c
Marat Dukhan582e1842021-10-25 17:18:36 -0700[diff] [blame]2394 src/math/cvt-f16-f32-neonfp16.c
2395 src/math/cvt-f32-f16-neonfp16.c)
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]2396
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2397SET(PROD_NEONFMA_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2398 src/f32-dwconv/gen/up8x3-minmax-neonfma.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2399 src/f32-dwconv/gen/up8x4-minmax-neonfma.c
2400 src/f32-dwconv/gen/up8x9-minmax-neonfma.c
Frank Barcharddbe781b2021-10-18 10:29:52 -0700[diff] [blame]2401 src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2402 src/f32-gemm/gen/1x8s4-minmax-neonfma.c
2403 src/f32-gemm/gen/6x8s4-minmax-neonfma.c
2404 src/f32-ibilinear-chw/gen/neonfma-p8.c
2405 src/f32-ibilinear/gen/neonfma-c8.c
2406 src/f32-igemm/gen/1x8s4-minmax-neonfma.c
2407 src/f32-igemm/gen/6x8s4-minmax-neonfma.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]2408 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2409 src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c
2410 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c
2411 src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c
2412 src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c
2413 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c)
2414
2415SET(ALL_NEONFMA_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2416 src/f32-dwconv/gen/up4x3-minmax-neonfma-acc2.c
2417 src/f32-dwconv/gen/up4x3-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2418 src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c
2419 src/f32-dwconv/gen/up4x4-minmax-neonfma.c
2420 src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c
2421 src/f32-dwconv/gen/up4x9-minmax-neonfma.c
2422 src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c
2423 src/f32-dwconv/gen/up4x25-minmax-neonfma.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2424 src/f32-dwconv/gen/up8x3-minmax-neonfma-acc2.c
2425 src/f32-dwconv/gen/up8x3-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2426 src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c
2427 src/f32-dwconv/gen/up8x4-minmax-neonfma.c
2428 src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c
2429 src/f32-dwconv/gen/up8x9-minmax-neonfma.c
2430 src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c
2431 src/f32-dwconv/gen/up8x25-minmax-neonfma.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2432 src/f32-dwconv/gen/up16x3-minmax-neon-acc2.c
2433 src/f32-dwconv/gen/up16x3-minmax-neon.c
2434 src/f32-dwconv/gen/up16x3-minmax-neonfma-acc2.c
2435 src/f32-dwconv/gen/up16x3-minmax-neonfma.c
Frank Barchardc9f9d672021-10-18 12:51:59 -0700[diff] [blame]2436 src/f32-dwconv/gen/up16x4-minmax-neon-acc2.c
2437 src/f32-dwconv/gen/up16x4-minmax-neon.c
2438 src/f32-dwconv/gen/up16x4-minmax-neonfma-acc2.c
2439 src/f32-dwconv/gen/up16x4-minmax-neonfma.c
2440 src/f32-dwconv/gen/up16x9-minmax-neon-acc2.c
2441 src/f32-dwconv/gen/up16x9-minmax-neon.c
2442 src/f32-dwconv/gen/up16x9-minmax-neonfma-acc2.c
2443 src/f32-dwconv/gen/up16x9-minmax-neonfma.c
2444 src/f32-dwconv/gen/up16x25-minmax-neon-acc2.c
2445 src/f32-dwconv/gen/up16x25-minmax-neon.c
2446 src/f32-dwconv/gen/up16x25-minmax-neonfma-acc2.c
2447 src/f32-dwconv/gen/up16x25-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2448 src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c
2449 src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c
2450 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c
2451 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c
2452 src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c
2453 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c
2454 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c
2455 src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c
2456 src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c
2457 src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c
2458 src/f32-gemm/gen/1x8s4-minmax-neonfma.c
2459 src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c
2460 src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c
2461 src/f32-gemm/gen/4x8s4-minmax-neonfma.c
2462 src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c
2463 src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c
2464 src/f32-gemm/gen/6x8s4-minmax-neonfma.c
2465 src/f32-gemm/gen/8x8s4-minmax-neonfma.c
Artsiom Ablavatski2202c812021-01-22 14:16:43 -0800[diff] [blame]2466 src/f32-ibilinear-chw/gen/neonfma-p4.c
2467 src/f32-ibilinear-chw/gen/neonfma-p8.c
Frank Barchard8247e212021-02-03 18:12:33 -0800[diff] [blame]2468 src/f32-ibilinear/gen/neonfma-c4.c
2469 src/f32-ibilinear/gen/neonfma-c8.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2470 src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2471 src/f32-igemm/gen/1x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2472 src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2473 src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c
2474 src/f32-igemm/gen/4x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2475 src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c
2476 src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2477 src/f32-igemm/gen/6x8s4-minmax-neonfma.c
2478 src/f32-igemm/gen/8x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2479 src/f32-ppmm/gen/4x8-minmax-neonfma.c
2480 src/f32-ppmm/gen/8x8-minmax-neonfma.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]2481 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x4.c
2482 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x8-acc2.c
2483 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x8.c
2484 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12-acc2.c
2485 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12-acc3.c
2486 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12.c
2487 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16-acc2.c
2488 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16-acc4.c
2489 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16.c
2490 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20-acc2.c
2491 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20-acc5.c
2492 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20.c
2493 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x4.c
2494 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x8-acc2.c
2495 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x8.c
2496 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12-acc2.c
2497 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12-acc3.c
2498 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12.c
2499 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16-acc2.c
2500 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16-acc4.c
2501 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16.c
2502 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20-acc2.c
2503 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20-acc5.c
2504 src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20.c
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -0800[diff] [blame]2505 src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c
2506 src/f32-spmm/gen/4x1-minmax-neonfma-x2.c
2507 src/f32-spmm/gen/4x1-minmax-neonfma.c
2508 src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c
2509 src/f32-spmm/gen/8x1-minmax-neonfma-x2.c
2510 src/f32-spmm/gen/8x1-minmax-neonfma.c
2511 src/f32-spmm/gen/12x1-minmax-neonfma.c
2512 src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c
2513 src/f32-spmm/gen/16x1-minmax-neonfma-x2.c
2514 src/f32-spmm/gen/16x1-minmax-neonfma.c
2515 src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c
2516 src/f32-spmm/gen/32x1-minmax-neonfma-x2.c
2517 src/f32-spmm/gen/32x1-minmax-neonfma.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]2518 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c
2519 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c
2520 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c
2521 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c
2522 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c
2523 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c
2524 src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c
2525 src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c
2526 src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c
2527 src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c
2528 src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c
2529 src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2530 src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c
2531 src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2532 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c
2533 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c
2534 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c
2535 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c
2536 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c
2537 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c
2538 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c
2539 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c
2540 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c
2541 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c
2542 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c
2543 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c
2544 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c
2545 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c
2546 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c
2547 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c
2548 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c
2549 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c
2550 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c
2551 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c
2552 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c
2553 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c
2554 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c
2555 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c
2556 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c
2557 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c
2558 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c
2559 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c
2560 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c
2561 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c
2562 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c
2563 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c
2564 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c
2565 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c
2566 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c
2567 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c
2568 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c
2569 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c
2570 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c
2571 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c
2572 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c
2573 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c
2574 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c
2575 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c
2576 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c
2577 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c
2578 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c
2579 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c
2580 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c
2581 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c
2582 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c
2583 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c
2584 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c
2585 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]2586 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c
2587 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c
2588 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c
2589 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c
2590 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c
2591 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c
2592 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c
2593 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c
2594 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c
2595 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c
2596 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c
2597 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c
2598 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c
2599 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c
2600 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c
2601 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c
2602 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c
2603 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c
2604 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c
2605 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]2606 src/math/exp-neonfma-rr2-lut64-p2.c
2607 src/math/exp-neonfma-rr2-p5.c
Frank Barcharde7223ee2020-12-04 19:04:01 -0800[diff] [blame]2608 src/math/expm1minus-neonfma-rr1-lut16-p3.c
2609 src/math/expm1minus-neonfma-rr1-p6.c
Marat Dukhan9dd119a2020-11-20 18:20:04 -0800[diff] [blame]2610 src/math/expminus-neonfma-rr2-lut64-p2.c
2611 src/math/expminus-neonfma-rr2-lut2048-p1.c
2612 src/math/expminus-neonfma-rr2-p5.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2613 src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c
2614 src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c
2615 src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2616 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c
2617 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c
2618 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2619 src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c
2620 src/math/sigmoid-neonfma-rr1-p5-nr2fma.c
2621 src/math/sigmoid-neonfma-rr1-p5-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2622 src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c
2623 src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c
2624 src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2625 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c
2626 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c
2627 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2628 src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c
2629 src/math/sigmoid-neonfma-rr2-p5-nr2fma.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2630 src/math/sigmoid-neonfma-rr2-p5-nr2recps.c
2631 src/math/sqrt-neonfma-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2632 src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2633 src/math/sqrt-neonfma-nr2fma.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2634 src/math/sqrt-neonfma-nr2fma1adj.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2635 src/math/sqrt-neonfma-nr3fma.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2636
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2637SET(PROD_AARCH64_NEON_MICROKERNEL_SRCS
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2638 src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c
2639 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c
2640 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c
2641 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c
2642 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c
2643 src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c
2644 src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c
2645 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c
2646 src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c
2647 src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c
2648 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c
2649 src/f32-spmm/gen/32x2-minmax-neonfma.c
2650 src/f32-spmm/gen/32x4-minmax-neonfma.c
2651 src/f32-vbinary/gen/vdiv-minmax-neon-x8.c
2652 src/f32-vbinary/gen/vdivc-minmax-neon-x8.c
2653 src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c
Marat Dukhane4118ef2021-09-14 17:41:00 -0700[diff] [blame]2654 src/f32-vsqrt/gen/neon-sqrt-x4.c
2655 src/x8-lut/gen/lut-neon-tbx128x4-x64.c)
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2656
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2657SET(ALL_AARCH64_NEON_MICROKERNEL_SRCS
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]2658 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2659 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2660 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2661 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]2662 src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2663 src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2664 src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2665 src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]2666 src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2667 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c
2668 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c
2669 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c
Marat Dukhan1268a242020-10-24 00:36:32 -0700[diff] [blame]2670 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2671 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c
Marat Dukhan1268a242020-10-24 00:36:32 -0700[diff] [blame]2672 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c
2673 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c
2674 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c
2675 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c
2676 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]2677 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c
2678 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c
2679 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2680 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]2681 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2682 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c
2683 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c
2684 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2685 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c
2686 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c
2687 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c
2688 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2689 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2690 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c
2691 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2692 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2693 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2694 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2695 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2696 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c
2697 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]2698 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c
2699 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c
2700 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c
2701 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c
2702 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c
2703 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c
2704 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c
2705 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]2706 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2707 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2708 src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c
2709 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c
2710 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c
2711 src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c
2712 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c
2713 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c
2714 src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c
2715 src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c
2716 src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c
2717 src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c
2718 src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c
2719 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c
2720 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c
2721 src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c
2722 src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c
2723 src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c
2724 src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c
2725 src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c
2726 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c
2727 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2728 src/f32-spmm/gen/4x2-minmax-neonfma.c
2729 src/f32-spmm/gen/4x4-minmax-neonfma.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2730 src/f32-spmm/gen/8x2-minmax-neonfma.c
2731 src/f32-spmm/gen/8x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2732 src/f32-spmm/gen/12x2-minmax-neonfma.c
2733 src/f32-spmm/gen/12x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2734 src/f32-spmm/gen/16x2-minmax-neonfma.c
2735 src/f32-spmm/gen/16x4-minmax-neonfma.c
Frank Barchard846c0c62020-10-26 15:01:39 -0700[diff] [blame]2736 src/f32-spmm/gen/32x2-minmax-neonfma.c
2737 src/f32-spmm/gen/32x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2738 src/f32-vbinary/gen/vdiv-minmax-neon-x4.c
2739 src/f32-vbinary/gen/vdiv-minmax-neon-x8.c
2740 src/f32-vbinary/gen/vdivc-minmax-neon-x4.c
2741 src/f32-vbinary/gen/vdivc-minmax-neon-x8.c
2742 src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c
2743 src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2744 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c
2745 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c
2746 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c
2747 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c
2748 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c
2749 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c
2750 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c
2751 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c
2752 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c
2753 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c
2754 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c
2755 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c
2756 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c
2757 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c
2758 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c
2759 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c
2760 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c
2761 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]2762 src/f32-vsqrt/gen/neon-sqrt-x4.c
2763 src/f32-vsqrt/gen/neon-sqrt-x8.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2764 src/math/sigmoid-neonfma-rr1-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2765 src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2766 src/math/sigmoid-neonfma-rr1-p5-div.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2767 src/math/sigmoid-neonfma-rr2-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2768 src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2769 src/math/sigmoid-neonfma-rr2-p5-div.c
2770 src/x8-lut/gen/lut-neon-tbx128x4-x16.c
2771 src/x8-lut/gen/lut-neon-tbx128x4-x32.c
2772 src/x8-lut/gen/lut-neon-tbx128x4-x48.c
Alan Kellyed902162022-01-05 01:51:30 -0800[diff] [blame]2773 src/x8-lut/gen/lut-neon-tbx128x4-x64.c
2774 src/x32-transpose/4x4-aarch64-tbl.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2775
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2776SET(PROD_NEONV8_MICROKERNEL_SRCS
Marat Dukhaned2d7762021-12-03 23:51:19 -0800[diff] [blame]2777 src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c
2778 src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2779 src/f32-vrnd/gen/vrndd-neonv8-x8.c
2780 src/f32-vrnd/gen/vrndne-neonv8-x8.c
2781 src/f32-vrnd/gen/vrndu-neonv8-x8.c
2782 src/f32-vrnd/gen/vrndz-neonv8-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2783 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]2784 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c
2785 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c
Frank Barchardf290a142022-01-05 01:08:37 -0800[diff] [blame]2786 src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2787 src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2788 src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2789 src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2790 src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2791 src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2792 src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2793 src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barchardf290a142022-01-05 01:08:37 -0800[diff] [blame]2794 src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2795 src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2796 src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2797 src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2798 src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2799 src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2800 src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]2801 src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2802 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2803 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2804 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2805 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2806
2807SET(ALL_NEONV8_MICROKERNEL_SRCS
Marat Dukhan3df14d32021-12-01 13:05:51 -0800[diff] [blame]2808 src/f32-qs8-vcvt/gen/vcvt-neonv8-x8.c
2809 src/f32-qs8-vcvt/gen/vcvt-neonv8-x16.c
2810 src/f32-qs8-vcvt/gen/vcvt-neonv8-x24.c
2811 src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c
2812 src/f32-qu8-vcvt/gen/vcvt-neonv8-x8.c
2813 src/f32-qu8-vcvt/gen/vcvt-neonv8-x16.c
2814 src/f32-qu8-vcvt/gen/vcvt-neonv8-x24.c
2815 src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c
Frank Barchardcb052a32021-12-10 14:16:33 -0800[diff] [blame]2816 src/f32-vrnd/gen/vrndd-neonv8-x4.c
2817 src/f32-vrnd/gen/vrndd-neonv8-x8.c
2818 src/f32-vrnd/gen/vrndne-neonv8-x4.c
2819 src/f32-vrnd/gen/vrndne-neonv8-x8.c
2820 src/f32-vrnd/gen/vrndu-neonv8-x4.c
2821 src/f32-vrnd/gen/vrndu-neonv8-x8.c
2822 src/f32-vrnd/gen/vrndz-neonv8-x4.c
2823 src/f32-vrnd/gen/vrndz-neonv8-x8.c
Marat Dukhand24301d2021-12-02 00:13:45 -0800[diff] [blame]2824 src/math/cvt-f32-qs8-neonv8.c
2825 src/math/cvt-f32-qu8-neonv8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2826 src/math/roundd-neonv8.c
2827 src/math/roundne-neonv8.c
2828 src/math/roundu-neonv8.c
2829 src/math/roundz-neonv8.c
2830 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c
2831 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c
2832 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2833 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c
2834 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c
2835 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2836 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c
2837 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c
2838 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c
2839 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c
2840 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2841 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c
2842 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c
2843 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c
2844 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c
2845 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2846 src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2847 src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2848 src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2849 src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]2850 src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2851 src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2852 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2853 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2854 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2855 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2856 src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2857 src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2858 src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2859 src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2860 src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c
2861 src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]2862 src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane-prfm.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2863 src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]2864 src/qc8-gemm/gen/2x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2865 src/qc8-gemm/gen/2x8-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2866 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2867 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2868 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2869 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2870 src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2871 src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2872 src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2873 src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2874 src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c
2875 src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]2876 src/qc8-gemm/gen/2x16-minmax-fp32-neonv8-mlal-lane-prfm.c
2877 src/qc8-gemm/gen/2x16-minmax-fp32-neonv8-mlal-lane.c
2878 src/qc8-gemm/gen/3x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2879 src/qc8-gemm/gen/3x8-minmax-fp32-neonv8-mlal-lane.c
2880 src/qc8-gemm/gen/3x16-minmax-fp32-neonv8-mlal-lane-prfm.c
2881 src/qc8-gemm/gen/3x16-minmax-fp32-neonv8-mlal-lane.c
2882 src/qc8-gemm/gen/4x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2883 src/qc8-gemm/gen/4x8-minmax-fp32-neonv8-mlal-lane.c
2884 src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane-prfm.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2885 src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]2886 src/qc8-gemm/gen/6x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2887 src/qc8-gemm/gen/6x8-minmax-fp32-neonv8-mlal-lane.c
2888 src/qc8-gemm/gen/6x16-minmax-fp32-neonv8-mlal-lane-prfm.c
2889 src/qc8-gemm/gen/6x16-minmax-fp32-neonv8-mlal-lane.c
2890 src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2891 src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2892 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2893 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2894 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2895 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2896 src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2897 src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2898 src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2899 src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2900 src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c
2901 src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]2902 src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane-prfm.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2903 src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]2904 src/qc8-igemm/gen/2x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2905 src/qc8-igemm/gen/2x8-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2906 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2907 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2908 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2909 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2910 src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2911 src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2912 src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2913 src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2914 src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c
2915 src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]2916 src/qc8-igemm/gen/2x16-minmax-fp32-neonv8-mlal-lane-prfm.c
2917 src/qc8-igemm/gen/2x16-minmax-fp32-neonv8-mlal-lane.c
2918 src/qc8-igemm/gen/3x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2919 src/qc8-igemm/gen/3x8-minmax-fp32-neonv8-mlal-lane.c
2920 src/qc8-igemm/gen/3x16-minmax-fp32-neonv8-mlal-lane-prfm.c
2921 src/qc8-igemm/gen/3x16-minmax-fp32-neonv8-mlal-lane.c
2922 src/qc8-igemm/gen/4x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2923 src/qc8-igemm/gen/4x8-minmax-fp32-neonv8-mlal-lane.c
2924 src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane-prfm.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2925 src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barchardf6237402022-01-05 00:26:09 -0800[diff] [blame]2926 src/qc8-igemm/gen/6x8-minmax-fp32-neonv8-mlal-lane-prfm.c
2927 src/qc8-igemm/gen/6x8-minmax-fp32-neonv8-mlal-lane.c
2928 src/qc8-igemm/gen/6x16-minmax-fp32-neonv8-mlal-lane-prfm.c
2929 src/qc8-igemm/gen/6x16-minmax-fp32-neonv8-mlal-lane.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2930 src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2931 src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2932 src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2933 src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2934 src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2935 src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2936 src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2937 src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2938 src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2939 src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2940 src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2941 src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2942 src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2943 src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2944 src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2945 src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2946 src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c
2947 src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2948 src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2949 src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2950 src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2951 src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2952 src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2953 src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2954 src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2955 src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2956 src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2957 src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c
2958 src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2959 src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2960 src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2961 src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2962 src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2963 src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2964 src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2965 src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2966 src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2967 src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2968 src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c
2969 src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2970 src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2971 src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2972 src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2973 src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2974 src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2975 src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2976 src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2977 src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2978 src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2979 src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c
2980 src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2981 src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2982 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c
2983 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2984 src/qs8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c
2985 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c
2986 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2987 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2988 src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2989 src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2990 src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2991 src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2992 src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2993 src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2994 src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2995 src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
2996 src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2997 src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2998 src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2999 src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
3000 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c
3001 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
3002 src/qu8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c
3003 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c
3004 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
3005 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3006
3007SET(PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS
3008 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c
3009 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c
3010 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c
3011 src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c
3012 src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c
3013 src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c
3014 src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c
3015 src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c
3016 src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c
3017 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c
3018 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c
3019 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c
3020 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c
3021 src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c
3022 src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c)
3023
3024SET(ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3025 src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c
3026 src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c
3027 src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c
3028 src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3029 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c
3030 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c
3031 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c
3032 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c
3033 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c
3034 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c
3035 src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c
3036 src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c
Frank Barchardc9f9d672021-10-18 12:51:59 -0700[diff] [blame]3037 src/f16-dwconv/gen/up32x4-minmax-neonfp16arith-acc2.c
3038 src/f16-dwconv/gen/up32x4-minmax-neonfp16arith.c
3039 src/f16-dwconv/gen/up32x9-minmax-neonfp16arith-acc2.c
3040 src/f16-dwconv/gen/up32x9-minmax-neonfp16arith.c
3041 src/f16-dwconv/gen/up32x25-minmax-neonfp16arith-acc2.c
3042 src/f16-dwconv/gen/up32x25-minmax-neonfp16arith.c
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]3043 src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c
3044 src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]3045 src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]3046 src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3047 src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]3048 src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3049 src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]3050 src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3051 src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]3052 src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3053 src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c
3054 src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c
3055 src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c
3056 src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c
3057 src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c
3058 src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c
3059 src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c
3060 src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3061 src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]3062 src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3063 src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]3064 src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3065 src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]3066 src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3067 src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]3068 src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3069 src/f16-prelu/gen/neonfp16arith-2x8.c
3070 src/f16-prelu/gen/neonfp16arith-2x16.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]3071 src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3072 src/f16-spmm/gen/8x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]3073 src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3074 src/f16-spmm/gen/16x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]3075 src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3076 src/f16-spmm/gen/24x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]3077 src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3078 src/f16-spmm/gen/32x1-minmax-neonfp16arith.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3079 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c
3080 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c
3081 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c
3082 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c
3083 src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c
3084 src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c
3085 src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c
3086 src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c
3087 src/f16-vbinary/gen/vmax-neonfp16arith-x8.c
3088 src/f16-vbinary/gen/vmax-neonfp16arith-x16.c
3089 src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c
3090 src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c
3091 src/f16-vbinary/gen/vmin-neonfp16arith-x8.c
3092 src/f16-vbinary/gen/vmin-neonfp16arith-x16.c
3093 src/f16-vbinary/gen/vminc-neonfp16arith-x8.c
3094 src/f16-vbinary/gen/vminc-neonfp16arith-x16.c
3095 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c
3096 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c
3097 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c
3098 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c
3099 src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c
3100 src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c
3101 src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c
3102 src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c
3103 src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c
3104 src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c
3105 src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c
3106 src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]3107 src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c
3108 src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]3109 src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c
3110 src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3111 src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]3112 src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]3113 src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c
3114 src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3115
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3116SET(PROD_NEONDOT_MICROKERNEL_SRCS
3117 src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c
3118 src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c
3119 src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c
3120 src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c
3121 src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c
3122 src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c
3123 src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c
3124 src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c
3125 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
3126 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
3127 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
3128 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
3129 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
3130 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
3131 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
Frank Barchard20255152021-08-11 14:01:45 -0700[diff] [blame]3132 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barchard8b698022021-08-26 11:17:32 -0700[diff] [blame]3133 src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
Frank Barchardde9c64a2021-08-17 18:32:50 -0700[diff] [blame]3134 src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
3135 src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c
3136 src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barchard8b698022021-08-26 11:17:32 -0700[diff] [blame]3137 src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
Frank Barchardde9c64a2021-08-17 18:32:50 -0700[diff] [blame]3138 src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
3139 src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c
3140 src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3141
3142SET(ALL_NEONDOT_MICROKERNEL_SRCS
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]3143 src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c
3144 src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c
3145 src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c
3146 src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c
3147 src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c
3148 src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c
3149 src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c
3150 src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c
3151 src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c
3152 src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c
3153 src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c
3154 src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c
3155 src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c
3156 src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c
3157 src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c
3158 src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c
Marat Dukhan18630de2021-06-02 22:20:01 -0700[diff] [blame]3159 src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]3160 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]3161 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]3162 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]3163 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Marat Dukhan4486f872021-08-07 15:22:50 -0700[diff] [blame]3164 src/qs8-gemm/gen/6x8c4-minmax-rndnu-neondot.c
3165 src/qs8-gemm/gen/6x16c4-minmax-rndnu-neondot.c
3166 src/qs8-gemm/gen/8x8c4-minmax-rndnu-neondot.c
3167 src/qs8-gemm/gen/8x16c4-minmax-rndnu-neondot.c
Marat Dukhan18630de2021-06-02 22:20:01 -0700[diff] [blame]3168 src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]3169 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]3170 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]3171 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]3172 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Marat Dukhan4486f872021-08-07 15:22:50 -0700[diff] [blame]3173 src/qs8-igemm/gen/6x8c4-minmax-rndnu-neondot.c
3174 src/qs8-igemm/gen/6x16c4-minmax-rndnu-neondot.c
3175 src/qs8-igemm/gen/8x8c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]3176 src/qs8-igemm/gen/8x16c4-minmax-rndnu-neondot.c
3177 src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
Digant Desai9982ed32021-11-24 13:03:54 -0800[diff] [blame]3178 src/qu8-gemm/gen/1x16c4-minmax-fp32-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]3179 src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]3180 src/qu8-gemm/gen/1x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]3181 src/qu8-gemm/gen/2x8c4-minmax-rndnu-neondot.c
Digant Desai9982ed32021-11-24 13:03:54 -0800[diff] [blame]3182 src/qu8-gemm/gen/2x16c4-minmax-fp32-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]3183 src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]3184 src/qu8-gemm/gen/2x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]3185 src/qu8-gemm/gen/3x8c4-minmax-rndnu-neondot.c
3186 src/qu8-gemm/gen/3x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]3187 src/qu8-gemm/gen/3x32c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]3188 src/qu8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
Digant Desai9982ed32021-11-24 13:03:54 -0800[diff] [blame]3189 src/qu8-gemm/gen/4x16c4-minmax-fp32-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]3190 src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]3191 src/qu8-gemm/gen/5x8c4-minmax-rndnu-neondot.c
3192 src/qu8-gemm/gen/5x16c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]3193 src/qu8-gemm/gen/6x8c4-minmax-rndnu-neondot.c
3194 src/qu8-gemm/gen/6x16c4-minmax-rndnu-neondot.c
3195 src/qu8-gemm/gen/8x8c4-minmax-rndnu-neondot.c
3196 src/qu8-gemm/gen/8x16c4-minmax-rndnu-neondot.c
3197 src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
Digant Desai9982ed32021-11-24 13:03:54 -0800[diff] [blame]3198 src/qu8-igemm/gen/1x16c4-minmax-fp32-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]3199 src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]3200 src/qu8-igemm/gen/1x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]3201 src/qu8-igemm/gen/2x8c4-minmax-rndnu-neondot.c
Digant Desai9982ed32021-11-24 13:03:54 -0800[diff] [blame]3202 src/qu8-igemm/gen/2x16c4-minmax-fp32-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]3203 src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]3204 src/qu8-igemm/gen/2x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]3205 src/qu8-igemm/gen/3x8c4-minmax-rndnu-neondot.c
3206 src/qu8-igemm/gen/3x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]3207 src/qu8-igemm/gen/3x32c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]3208 src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
Digant Desai9982ed32021-11-24 13:03:54 -0800[diff] [blame]3209 src/qu8-igemm/gen/4x16c4-minmax-fp32-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]3210 src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]3211 src/qu8-igemm/gen/5x8c4-minmax-rndnu-neondot.c
3212 src/qu8-igemm/gen/5x16c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]3213 src/qu8-igemm/gen/6x8c4-minmax-rndnu-neondot.c
3214 src/qu8-igemm/gen/6x16c4-minmax-rndnu-neondot.c
3215 src/qu8-igemm/gen/8x8c4-minmax-rndnu-neondot.c
3216 src/qu8-igemm/gen/8x16c4-minmax-rndnu-neondot.c)
Benoit Jacoba9644732020-08-13 12:48:55 -0700[diff] [blame]3217
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3218SET(PROD_SSE_MICROKERNEL_SRCS
3219 src/f32-avgpool/9p8x-minmax-sse-c4.c
3220 src/f32-avgpool/9x-minmax-sse-c4.c
3221 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]3222 src/f32-dwconv/gen/up8x3-minmax-sse.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3223 src/f32-dwconv/gen/up8x4-minmax-sse.c
3224 src/f32-dwconv/gen/up8x9-minmax-sse.c
3225 src/f32-dwconv/gen/up8x25-minmax-sse.c
3226 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c
3227 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c
3228 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c
3229 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c
3230 src/f32-gavgpool-cw/sse-x4.c
3231 src/f32-gavgpool/7p7x-minmax-sse-c4.c
3232 src/f32-gavgpool/7x-minmax-sse-c4.c
3233 src/f32-gemm/gen/1x8-minmax-sse-load1.c
3234 src/f32-gemm/gen/4x2c4-minmax-sse.c
3235 src/f32-gemm/gen/4x8-minmax-sse-load1.c
3236 src/f32-ibilinear-chw/gen/sse-p8.c
3237 src/f32-ibilinear/gen/sse-c8.c
3238 src/f32-igemm/gen/1x8-minmax-sse-load1.c
3239 src/f32-igemm/gen/4x2c4-minmax-sse.c
3240 src/f32-igemm/gen/4x8-minmax-sse-load1.c
3241 src/f32-maxpool/9p8x-minmax-sse-c4.c
3242 src/f32-pavgpool/9p8x-minmax-sse-c4.c
3243 src/f32-pavgpool/9x-minmax-sse-c4.c
3244 src/f32-rmax/sse.c
3245 src/f32-spmm/gen/32x1-minmax-sse.c
3246 src/f32-vbinary/gen/vadd-minmax-sse-x8.c
3247 src/f32-vbinary/gen/vaddc-minmax-sse-x8.c
3248 src/f32-vbinary/gen/vdiv-minmax-sse-x8.c
3249 src/f32-vbinary/gen/vdivc-minmax-sse-x8.c
3250 src/f32-vbinary/gen/vmax-sse-x8.c
3251 src/f32-vbinary/gen/vmaxc-sse-x8.c
3252 src/f32-vbinary/gen/vmin-sse-x8.c
3253 src/f32-vbinary/gen/vminc-sse-x8.c
3254 src/f32-vbinary/gen/vmul-minmax-sse-x8.c
3255 src/f32-vbinary/gen/vmulc-minmax-sse-x8.c
3256 src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c
3257 src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c
3258 src/f32-vbinary/gen/vsqrdiff-sse-x8.c
3259 src/f32-vbinary/gen/vsqrdiffc-sse-x8.c
3260 src/f32-vbinary/gen/vsub-minmax-sse-x8.c
3261 src/f32-vbinary/gen/vsubc-minmax-sse-x8.c
3262 src/f32-vclamp/gen/vclamp-sse-x8.c
3263 src/f32-vhswish/gen/vhswish-sse-x8.c
3264 src/f32-vlrelu/gen/vlrelu-sse-x8.c
3265 src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c
3266 src/f32-vsqrt/gen/sse-sqrt-x4.c
3267 src/f32-vunary/gen/vabs-sse-x8.c
3268 src/f32-vunary/gen/vneg-sse-x8.c
3269 src/f32-vunary/gen/vsqr-sse-x8.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]3270 src/x32-packx/x4-sse.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3271
3272SET(ALL_SSE_MICROKERNEL_SRCS
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3273 src/f32-avgpool/9p8x-minmax-sse-c4.c
3274 src/f32-avgpool/9x-minmax-sse-c4.c
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]3275 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c
3276 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]3277 src/f32-dwconv/gen/up4x3-minmax-sse-acc2.c
3278 src/f32-dwconv/gen/up4x3-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3279 src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c
3280 src/f32-dwconv/gen/up4x4-minmax-sse.c
3281 src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c
3282 src/f32-dwconv/gen/up4x9-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3283 src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c
3284 src/f32-dwconv/gen/up4x25-minmax-sse.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]3285 src/f32-dwconv/gen/up8x3-minmax-sse-acc2.c
3286 src/f32-dwconv/gen/up8x3-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3287 src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c
3288 src/f32-dwconv/gen/up8x4-minmax-sse.c
3289 src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c
3290 src/f32-dwconv/gen/up8x9-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3291 src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c
3292 src/f32-dwconv/gen/up8x25-minmax-sse.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3293 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c
3294 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c
3295 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c
Marat Dukhan470078a2020-10-23 22:36:52 -0700[diff] [blame]3296 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3297 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c
Marat Dukhan470078a2020-10-23 22:36:52 -0700[diff] [blame]3298 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c
3299 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c
3300 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c
3301 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c
3302 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c
Marat Dukhan0ff97182020-10-25 19:14:03 -0700[diff] [blame]3303 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c
3304 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c
3305 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3306 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c
Marat Dukhan0ff97182020-10-25 19:14:03 -0700[diff] [blame]3307 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3308 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c
3309 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c
3310 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c
Marat Dukhand0503892020-10-30 08:22:04 -0700[diff] [blame]3311 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c
3312 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c
3313 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c
3314 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c
3315 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c
3316 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c
3317 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c
3318 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c
3319 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c
3320 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c
3321 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c
3322 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c
3323 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c
Marat Dukhanccca2142020-10-30 17:32:45 -0700[diff] [blame]3324 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c
3325 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c
3326 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c
3327 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c
3328 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c
3329 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c
3330 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c
3331 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c
Marat Dukhanccca2142020-10-30 17:32:45 -0700[diff] [blame]3332 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c
Frank Barchard9cef5ea2020-11-18 14:52:08 -0800[diff] [blame]3333 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3334 src/f32-gavgpool-cw/sse-x4.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]3335 src/f32-gavgpool/7p7x-minmax-sse-c4.c
3336 src/f32-gavgpool/7x-minmax-sse-c4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3337 src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c
3338 src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c
3339 src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3340 src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c
3341 src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c
3342 src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3343 src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c
3344 src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c
3345 src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3346 src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c
3347 src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c
3348 src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3349 src/f32-gemm/gen/1x8-minmax-sse-dup.c
3350 src/f32-gemm/gen/1x8-minmax-sse-load1.c
3351 src/f32-gemm/gen/1x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3352 src/f32-gemm/gen/3x8-minmax-sse-dup.c
3353 src/f32-gemm/gen/3x8-minmax-sse-load1.c
3354 src/f32-gemm/gen/3x8s4-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3355 src/f32-gemm/gen/4x2c4-minmax-sse.c
3356 src/f32-gemm/gen/4x8-minmax-sse-dup.c
3357 src/f32-gemm/gen/4x8-minmax-sse-load1.c
3358 src/f32-gemm/gen/4x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3359 src/f32-gemm/gen/5x8-minmax-sse-dup.c
3360 src/f32-gemm/gen/5x8-minmax-sse-load1.c
3361 src/f32-gemm/gen/5x8s4-minmax-sse.c
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -0700[diff] [blame]3362 src/f32-ibilinear-chw/gen/sse-p4.c
3363 src/f32-ibilinear-chw/gen/sse-p8.c
Frank Barchard4a352042021-04-13 15:52:08 -0700[diff] [blame]3364 src/f32-ibilinear/gen/sse-c4.c
3365 src/f32-ibilinear/gen/sse-c8.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3366 src/f32-igemm/gen/1x8-minmax-sse-dup.c
3367 src/f32-igemm/gen/1x8-minmax-sse-load1.c
3368 src/f32-igemm/gen/1x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3369 src/f32-igemm/gen/3x8-minmax-sse-dup.c
3370 src/f32-igemm/gen/3x8-minmax-sse-load1.c
3371 src/f32-igemm/gen/3x8s4-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3372 src/f32-igemm/gen/4x2c4-minmax-sse.c
3373 src/f32-igemm/gen/4x8-minmax-sse-dup.c
3374 src/f32-igemm/gen/4x8-minmax-sse-load1.c
3375 src/f32-igemm/gen/4x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3376 src/f32-igemm/gen/5x8-minmax-sse-dup.c
3377 src/f32-igemm/gen/5x8-minmax-sse-load1.c
3378 src/f32-igemm/gen/5x8s4-minmax-sse.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3379 src/f32-maxpool/9p8x-minmax-sse-c4.c
3380 src/f32-pavgpool/9p8x-minmax-sse-c4.c
3381 src/f32-pavgpool/9x-minmax-sse-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3382 src/f32-ppmm/gen/4x8-minmax-sse.c
Marat Dukhan39b5e942020-06-24 15:03:48 -0700[diff] [blame]3383 src/f32-prelu/gen/sse-2x4.c
3384 src/f32-prelu/gen/sse-2x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3385 src/f32-rmax/sse.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3386 src/f32-spmm/gen/4x1-minmax-sse.c
3387 src/f32-spmm/gen/8x1-minmax-sse.c
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]3388 src/f32-spmm/gen/16x1-minmax-sse.c
Frank Barchard846c0c62020-10-26 15:01:39 -0700[diff] [blame]3389 src/f32-spmm/gen/32x1-minmax-sse.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3390 src/f32-vbinary/gen/vadd-minmax-sse-x4.c
3391 src/f32-vbinary/gen/vadd-minmax-sse-x8.c
3392 src/f32-vbinary/gen/vaddc-minmax-sse-x4.c
3393 src/f32-vbinary/gen/vaddc-minmax-sse-x8.c
3394 src/f32-vbinary/gen/vdiv-minmax-sse-x4.c
3395 src/f32-vbinary/gen/vdiv-minmax-sse-x8.c
3396 src/f32-vbinary/gen/vdivc-minmax-sse-x4.c
3397 src/f32-vbinary/gen/vdivc-minmax-sse-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]3398 src/f32-vbinary/gen/vmax-sse-x4.c
3399 src/f32-vbinary/gen/vmax-sse-x8.c
3400 src/f32-vbinary/gen/vmaxc-sse-x4.c
3401 src/f32-vbinary/gen/vmaxc-sse-x8.c
3402 src/f32-vbinary/gen/vmin-sse-x4.c
3403 src/f32-vbinary/gen/vmin-sse-x8.c
3404 src/f32-vbinary/gen/vminc-sse-x4.c
3405 src/f32-vbinary/gen/vminc-sse-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3406 src/f32-vbinary/gen/vmul-minmax-sse-x4.c
3407 src/f32-vbinary/gen/vmul-minmax-sse-x8.c
3408 src/f32-vbinary/gen/vmulc-minmax-sse-x4.c
3409 src/f32-vbinary/gen/vmulc-minmax-sse-x8.c
3410 src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c
3411 src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c
3412 src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c
3413 src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]3414 src/f32-vbinary/gen/vsqrdiff-sse-x4.c
3415 src/f32-vbinary/gen/vsqrdiff-sse-x8.c
3416 src/f32-vbinary/gen/vsqrdiffc-sse-x4.c
3417 src/f32-vbinary/gen/vsqrdiffc-sse-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3418 src/f32-vbinary/gen/vsub-minmax-sse-x4.c
3419 src/f32-vbinary/gen/vsub-minmax-sse-x8.c
3420 src/f32-vbinary/gen/vsubc-minmax-sse-x4.c
3421 src/f32-vbinary/gen/vsubc-minmax-sse-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]3422 src/f32-vclamp/gen/vclamp-sse-x4.c
3423 src/f32-vclamp/gen/vclamp-sse-x8.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]3424 src/f32-vhswish/gen/vhswish-sse-x4.c
3425 src/f32-vhswish/gen/vhswish-sse-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3426 src/f32-vlrelu/gen/vlrelu-sse-x4.c
3427 src/f32-vlrelu/gen/vlrelu-sse-x8.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3428 src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c
3429 src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]3430 src/f32-vrelu/gen/vrelu-sse-x4.c
3431 src/f32-vrelu/gen/vrelu-sse-x8.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]3432 src/f32-vsqrt/gen/sse-sqrt-x4.c
3433 src/f32-vsqrt/gen/sse-sqrt-x8.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]3434 src/f32-vunary/gen/vabs-sse-x4.c
3435 src/f32-vunary/gen/vabs-sse-x8.c
3436 src/f32-vunary/gen/vneg-sse-x4.c
3437 src/f32-vunary/gen/vneg-sse-x8.c
3438 src/f32-vunary/gen/vsqr-sse-x4.c
3439 src/f32-vunary/gen/vsqr-sse-x8.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3440 src/math/roundd-sse-addsub.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3441 src/math/roundne-sse-addsub.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3442 src/math/roundu-sse-addsub.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]3443 src/math/roundz-sse-addsub.c
3444 src/math/sqrt-sse-hh1mac.c
3445 src/math/sqrt-sse-nr1mac.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3446 src/math/sqrt-sse-nr2mac.c
Alan Kellyfda06cb2021-12-15 03:30:32 -0800[diff] [blame]3447 src/x32-packx/x4-sse.c
3448 src/x32-transpose/4x4-sse.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3449
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3450SET(PROD_SSE2_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]3451 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3452 src/f32-argmaxpool/4x-sse2-c4.c
3453 src/f32-argmaxpool/9p8x-sse2-c4.c
3454 src/f32-argmaxpool/9x-sse2-c4.c
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]3455 src/f32-f16-vcvt/gen/vcvt-sse2-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3456 src/f32-prelu/gen/sse2-2x8.c
Marat Dukhaned2d7762021-12-03 23:51:19 -0800[diff] [blame]3457 src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c
3458 src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]3459 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3460 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c
3461 src/f32-vlrelu/gen/vlrelu-sse2-x8.c
3462 src/f32-vrnd/gen/vrndd-sse2-x8.c
3463 src/f32-vrnd/gen/vrndne-sse2-x8.c
3464 src/f32-vrnd/gen/vrndu-sse2-x8.c
3465 src/f32-vrnd/gen/vrndz-sse2-x8.c
Marat Dukhance834ad2022-01-03 00:22:01 -0800[diff] [blame]3466 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3467 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
3468 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
3469 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3470 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3471 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3472 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3473 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
3474 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
Marat Dukhanf92206b2021-12-10 17:02:07 -0800[diff] [blame]3475 src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3476 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c
3477 src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c
3478 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3479 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3480 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3481 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3482 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3483 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3484 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3485 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3486 src/qu8-avgpool/9p8x-minmax-sse2-c8.c
3487 src/qu8-avgpool/9x-minmax-sse2-c8.c
3488 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
3489 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
Marat Dukhanf92206b2021-12-10 17:02:07 -0800[diff] [blame]3490 src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3491 src/qu8-gavgpool/7p7x-minmax-sse2-c8.c
3492 src/qu8-gavgpool/7x-minmax-sse2-c8.c
3493 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3494 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3495 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3496 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3497 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3498 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3499 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3500 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]3501 src/s8-ibilinear/gen/sse2-c8.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3502 src/s8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3503 src/s8-vclamp/sse2-x64.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]3504 src/u8-ibilinear/gen/sse2-c8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3505 src/u8-maxpool/9p8x-minmax-sse2-c16.c
3506 src/u8-rmax/sse2.c
3507 src/u8-vclamp/sse2-x64.c
3508 src/x8-zip/x2-sse2.c
3509 src/x8-zip/x3-sse2.c
3510 src/x8-zip/x4-sse2.c
3511 src/x8-zip/xm-sse2.c
3512 src/x32-unpool/sse2.c
3513 src/x32-zip/x2-sse2.c
3514 src/x32-zip/x3-sse2.c
3515 src/x32-zip/x4-sse2.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]3516 src/x32-zip/xm-sse2.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]3517 src/xx-fill/sse2-x64.c
3518 src/xx-pad/sse2.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3519
3520SET(ALL_SSE2_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]3521 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x8.c
3522 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x16.c
3523 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x24.c
3524 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c
3525 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x8.c
3526 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x16.c
3527 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x24.c
3528 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x32.c
Ashkan Aliabadif866a452019-11-20 10:58:51 -0800[diff] [blame]3529 src/f32-argmaxpool/4x-sse2-c4.c
3530 src/f32-argmaxpool/9p8x-sse2-c4.c
3531 src/f32-argmaxpool/9x-sse2-c4.c
Marat Dukhaneb844232021-11-08 23:07:53 -0800[diff] [blame]3532 src/f32-f16-vcvt/gen/vcvt-sse2-x8.c
3533 src/f32-f16-vcvt/gen/vcvt-sse2-x16.c
3534 src/f32-f16-vcvt/gen/vcvt-sse2-x24.c
3535 src/f32-f16-vcvt/gen/vcvt-sse2-x32.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3536 src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c
3537 src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c
3538 src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c
3539 src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c
3540 src/f32-gemm/gen/1x8-minmax-sse2-dup.c
3541 src/f32-gemm/gen/3x8-minmax-sse2-dup.c
3542 src/f32-gemm/gen/4x8-minmax-sse2-dup.c
3543 src/f32-gemm/gen/5x8-minmax-sse2-dup.c
3544 src/f32-igemm/gen/1x8-minmax-sse2-dup.c
3545 src/f32-igemm/gen/3x8-minmax-sse2-dup.c
3546 src/f32-igemm/gen/4x8-minmax-sse2-dup.c
3547 src/f32-igemm/gen/5x8-minmax-sse2-dup.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]3548 src/f32-prelu/gen/sse2-2x4.c
3549 src/f32-prelu/gen/sse2-2x8.c
Marat Dukhanc5aa2422021-12-01 00:15:19 -0800[diff] [blame]3550 src/f32-qs8-vcvt/gen/vcvt-sse2-x8.c
3551 src/f32-qs8-vcvt/gen/vcvt-sse2-x16.c
3552 src/f32-qs8-vcvt/gen/vcvt-sse2-x24.c
3553 src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c
3554 src/f32-qu8-vcvt/gen/vcvt-sse2-x8.c
3555 src/f32-qu8-vcvt/gen/vcvt-sse2-x16.c
3556 src/f32-qu8-vcvt/gen/vcvt-sse2-x24.c
3557 src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]3558 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x4.c
3559 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x8-acc2.c
3560 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x8.c
3561 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12-acc2.c
3562 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12-acc3.c
3563 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12.c
3564 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16-acc2.c
3565 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16-acc4.c
3566 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16.c
3567 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc2.c
3568 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc5.c
3569 src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]3570 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c
3571 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c
3572 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c
3573 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c
3574 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c
3575 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c
3576 src/f32-velu/gen/velu-sse2-rr2-p6-x4.c
3577 src/f32-velu/gen/velu-sse2-rr2-p6-x8.c
3578 src/f32-velu/gen/velu-sse2-rr2-p6-x12.c
3579 src/f32-velu/gen/velu-sse2-rr2-p6-x16.c
3580 src/f32-velu/gen/velu-sse2-rr2-p6-x20.c
3581 src/f32-velu/gen/velu-sse2-rr2-p6-x24.c
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700[diff] [blame]3582 src/f32-vlrelu/gen/vlrelu-sse2-x4.c
3583 src/f32-vlrelu/gen/vlrelu-sse2-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]3584 src/f32-vrnd/gen/vrndd-sse2-x4.c
3585 src/f32-vrnd/gen/vrndd-sse2-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3586 src/f32-vrnd/gen/vrndne-sse2-x4.c
3587 src/f32-vrnd/gen/vrndne-sse2-x8.c
3588 src/f32-vrnd/gen/vrndu-sse2-x4.c
3589 src/f32-vrnd/gen/vrndu-sse2-x8.c
3590 src/f32-vrnd/gen/vrndz-sse2-x4.c
3591 src/f32-vrnd/gen/vrndz-sse2-x8.c
Marat Dukhance834ad2022-01-03 00:22:01 -0800[diff] [blame]3592 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x4.c
3593 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x8.c
3594 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x12.c
3595 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x16.c
3596 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x20.c
3597 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x24.c
3598 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x4.c
3599 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x8.c
3600 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x12.c
3601 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x16.c
3602 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x20.c
3603 src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x24.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]3604 src/math/cvt-f16-f32-sse2-int16.c
3605 src/math/cvt-f16-f32-sse2-int32.c
Marat Dukhan056f49d2021-11-08 17:44:42 -0800[diff] [blame]3606 src/math/cvt-f32-f16-sse2.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]3607 src/math/exp-sse2-rr2-lut64-p2.c
3608 src/math/exp-sse2-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]3609 src/math/expm1minus-sse2-rr2-lut16-p3.c
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]3610 src/math/expm1minus-sse2-rr2-p6.c
Frank Barchard22136062020-11-24 18:44:46 -0800[diff] [blame]3611 src/math/expminus-sse2-rr2-p5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3612 src/math/roundd-sse2-cvt.c
3613 src/math/roundne-sse2-cvt.c
3614 src/math/roundu-sse2-cvt.c
3615 src/math/roundz-sse2-cvt.c
3616 src/math/sigmoid-sse2-rr2-lut64-p2-div.c
3617 src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c
3618 src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c
3619 src/math/sigmoid-sse2-rr2-p5-div.c
3620 src/math/sigmoid-sse2-rr2-p5-nr1.c
3621 src/math/sigmoid-sse2-rr2-p5-nr2.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3622 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3623 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3624 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3625 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3626 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3627 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3628 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3629 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3630 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c
3631 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3632 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3633 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3634 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3635 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
3636 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
3637 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
3638 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
3639 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
3640 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
3641 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
3642 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3643 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
3644 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
3645 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3646 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3647 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3648 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3649 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3650 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3651 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3652 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3653 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3654 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3655 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3656 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3657 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3658 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3659 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3660 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3661 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3662 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3663 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3664 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3665 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3666 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3667 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3668 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3669 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c
Marat Dukhand873fa22021-12-10 01:55:10 -0800[diff] [blame]3670 src/qs8-f32-vcvt/gen/vcvt-sse2-x8.c
3671 src/qs8-f32-vcvt/gen/vcvt-sse2-x16.c
3672 src/qs8-f32-vcvt/gen/vcvt-sse2-x24.c
3673 src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]3674 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c
3675 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c
3676 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]3677 src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c
3678 src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c
3679 src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3680 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3681 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3682 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3683 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3684 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3685 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3686 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3687 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3688 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3689 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3690 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3691 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3692 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3693 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3694 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3695 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3696 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3697 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3698 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3699 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3700 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3701 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3702 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3703 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3704 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3705 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3706 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3707 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3708 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3709 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3710 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3711 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3712 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3713 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3714 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]3715 src/qs8-requantization/fp32-sse2.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3716 src/qs8-requantization/gemmlowp-sse2.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3717 src/qs8-requantization/rndna-sse2.c
Marat Dukhand9f3ad42020-08-10 12:30:58 -0700[diff] [blame]3718 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3719 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
3720 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c
3721 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]3722 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
3723 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
3724 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c
3725 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3726 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3727 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c
3728 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3729 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]3730 src/qu8-avgpool/9p8x-minmax-sse2-c8.c
3731 src/qu8-avgpool/9x-minmax-sse2-c8.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3732 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
3733 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
3734 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
3735 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Marat Dukhand873fa22021-12-10 01:55:10 -0800[diff] [blame]3736 src/qu8-f32-vcvt/gen/vcvt-sse2-x8.c
3737 src/qu8-f32-vcvt/gen/vcvt-sse2-x16.c
3738 src/qu8-f32-vcvt/gen/vcvt-sse2-x24.c
3739 src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]3740 src/qu8-gavgpool/7p7x-minmax-sse2-c8.c
3741 src/qu8-gavgpool/7x-minmax-sse2-c8.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3742 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
3743 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
3744 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3745 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
3746 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
3747 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
3748 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
3749 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3750 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
3751 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
3752 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3753 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
3754 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
3755 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3756 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
3757 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
3758 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3759 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
3760 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
3761 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
3762 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
3763 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3764 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
3765 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
3766 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3767 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
3768 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
3769 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]3770 src/qu8-requantization/fp32-sse2.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3771 src/qu8-requantization/gemmlowp-sse2.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3772 src/qu8-requantization/rndna-sse2.c
Marat Dukhan28c82b22021-07-21 13:48:45 -0700[diff] [blame]3773 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3774 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
3775 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
3776 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3777 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3778 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c
3779 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3780 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c
Marat Dukhan7519eb12021-11-23 19:08:29 -0800[diff] [blame]3781 src/s8-ibilinear/gen/sse2-c8.c
3782 src/s8-ibilinear/gen/sse2-c16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3783 src/s8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3784 src/s8-vclamp/sse2-x64.c
Marat Dukhan7519eb12021-11-23 19:08:29 -0800[diff] [blame]3785 src/u8-ibilinear/gen/sse2-c8.c
3786 src/u8-ibilinear/gen/sse2-c16.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3787 src/u8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3788 src/u8-rmax/sse2.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]3789 src/u8-vclamp/sse2-x64.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3790 src/x8-zip/x2-sse2.c
3791 src/x8-zip/x3-sse2.c
3792 src/x8-zip/x4-sse2.c
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]3793 src/x8-zip/xm-sse2.c
Alan Kelly1945f0b2021-12-24 01:26:45 -0800[diff] [blame]3794 src/x16-transpose/4x8-sse2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3795 src/x32-unpool/sse2.c
3796 src/x32-zip/x2-sse2.c
3797 src/x32-zip/x3-sse2.c
3798 src/x32-zip/x4-sse2.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]3799 src/x32-zip/xm-sse2.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]3800 src/xx-fill/sse2-x64.c
3801 src/xx-pad/sse2.c)
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3802
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3803SET(PROD_SSSE3_MICROKERNEL_SRCS
3804 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c
3805 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c
3806 src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c)
3807
3808SET(ALL_SSSE3_MICROKERNEL_SRCS
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3809 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c
3810 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c
3811 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c
Marat Dukhan98f2eeb2020-10-23 23:13:41 -0700[diff] [blame]3812 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3813 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c
Marat Dukhan98f2eeb2020-10-23 23:13:41 -0700[diff] [blame]3814 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c
3815 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c
3816 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c
3817 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c
3818 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]3819 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c
3820 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c
3821 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]3822 src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c
3823 src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c
3824 src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3825 src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3826 src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3827 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3828 src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3829 src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3830 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3831 src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3832 src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3833 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3834 src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3835 src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3836 src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3837 src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3838 src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3839 src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3840 src/qs8-requantization/gemmlowp-ssse3.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3841 src/qs8-requantization/rndna-ssse3.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3842 src/qu8-requantization/gemmlowp-ssse3.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]3843 src/qu8-requantization/rndna-ssse3.c
3844 src/x8-lut/gen/lut-ssse3-x16.c
3845 src/x8-lut/gen/lut-ssse3-x32.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3846
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3847SET(PROD_SSE41_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]3848 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]3849 src/f32-f16-vcvt/gen/vcvt-sse41-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3850 src/f32-prelu/gen/sse41-2x8.c
Marat Dukhaned2d7762021-12-03 23:51:19 -0800[diff] [blame]3851 src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3852 src/f32-vlrelu/gen/vlrelu-sse41-x8.c
3853 src/f32-vrnd/gen/vrndd-sse41-x8.c
3854 src/f32-vrnd/gen/vrndne-sse41-x8.c
3855 src/f32-vrnd/gen/vrndu-sse41-x8.c
3856 src/f32-vrnd/gen/vrndz-sse41-x8.c
Marat Dukhance834ad2022-01-03 00:22:01 -0800[diff] [blame]3857 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3858 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
3859 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
3860 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3861 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3862 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3863 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3864 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
3865 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
Marat Dukhanf92206b2021-12-10 17:02:07 -0800[diff] [blame]3866 src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3867 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c
3868 src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c
3869 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3870 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3871 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3872 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3873 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
3874 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3875 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
3876 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3877 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
3878 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Marat Dukhanf92206b2021-12-10 17:02:07 -0800[diff] [blame]3879 src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3880 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3881 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3882 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3883 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3884 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3885 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
3886 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3887 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]3888 src/s8-ibilinear/gen/sse41-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3889 src/s8-maxpool/9p8x-minmax-sse41-c16.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]3890 src/s8-vclamp/sse41-x64.c
3891 src/u8-ibilinear/gen/sse41-c16.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3892
3893SET(ALL_SSE41_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]3894 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x8.c
3895 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c
3896 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x24.c
3897 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x32.c
3898 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x8.c
3899 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x16.c
3900 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x24.c
3901 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x32.c
Marat Dukhaneb844232021-11-08 23:07:53 -0800[diff] [blame]3902 src/f32-f16-vcvt/gen/vcvt-sse41-x8.c
3903 src/f32-f16-vcvt/gen/vcvt-sse41-x16.c
3904 src/f32-f16-vcvt/gen/vcvt-sse41-x24.c
3905 src/f32-f16-vcvt/gen/vcvt-sse41-x32.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]3906 src/f32-prelu/gen/sse41-2x4.c
3907 src/f32-prelu/gen/sse41-2x8.c
Marat Dukhanc5aa2422021-12-01 00:15:19 -0800[diff] [blame]3908 src/f32-qs8-vcvt/gen/vcvt-sse41-x8.c
3909 src/f32-qs8-vcvt/gen/vcvt-sse41-x16.c
3910 src/f32-qs8-vcvt/gen/vcvt-sse41-x24.c
3911 src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]3912 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c
3913 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c
3914 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c
3915 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c
3916 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c
3917 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c
3918 src/f32-velu/gen/velu-sse41-rr2-p6-x4.c
3919 src/f32-velu/gen/velu-sse41-rr2-p6-x8.c
3920 src/f32-velu/gen/velu-sse41-rr2-p6-x12.c
3921 src/f32-velu/gen/velu-sse41-rr2-p6-x16.c
3922 src/f32-velu/gen/velu-sse41-rr2-p6-x20.c
3923 src/f32-velu/gen/velu-sse41-rr2-p6-x24.c
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700[diff] [blame]3924 src/f32-vlrelu/gen/vlrelu-sse41-x4.c
3925 src/f32-vlrelu/gen/vlrelu-sse41-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]3926 src/f32-vrnd/gen/vrndd-sse41-x4.c
3927 src/f32-vrnd/gen/vrndd-sse41-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3928 src/f32-vrnd/gen/vrndne-sse41-x4.c
3929 src/f32-vrnd/gen/vrndne-sse41-x8.c
3930 src/f32-vrnd/gen/vrndu-sse41-x4.c
3931 src/f32-vrnd/gen/vrndu-sse41-x8.c
3932 src/f32-vrnd/gen/vrndz-sse41-x4.c
3933 src/f32-vrnd/gen/vrndz-sse41-x8.c
Marat Dukhance834ad2022-01-03 00:22:01 -0800[diff] [blame]3934 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x4.c
3935 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x8.c
3936 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x12.c
3937 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x16.c
3938 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x20.c
3939 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x24.c
3940 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x4.c
3941 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x8.c
3942 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x12.c
3943 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x16.c
3944 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x20.c
3945 src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x24.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]3946 src/math/cvt-f16-f32-sse41-int16.c
3947 src/math/cvt-f16-f32-sse41-int32.c
Marat Dukhan056f49d2021-11-08 17:44:42 -0800[diff] [blame]3948 src/math/cvt-f32-f16-sse41.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3949 src/math/roundd-sse41.c
3950 src/math/roundne-sse41.c
3951 src/math/roundu-sse41.c
3952 src/math/roundz-sse41.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3953 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3954 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3955 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3956 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3957 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3958 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3959 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3960 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3961 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3962 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3963 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3964 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
3965 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c
3966 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c
3967 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c
3968 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3969 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3970 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3971 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3972 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3973 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3974 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3975 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3976 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3977 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3978 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3979 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3980 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3981 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3982 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3983 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3984 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3985 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3986 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3987 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3988 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3989 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3990 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3991 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3992 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3993 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3994 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3995 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3996 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3997 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3998 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]3999 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4000 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4001 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4002 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4003 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4004 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4005 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4006 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4007 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4008 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4009 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c
4010 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4011 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c
4012 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c
Marat Dukhanf9cf55d2021-12-09 18:54:00 -0800[diff] [blame]4013 src/qs8-f32-vcvt/gen/vcvt-sse41-x8.c
4014 src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c
4015 src/qs8-f32-vcvt/gen/vcvt-sse41-x24.c
4016 src/qs8-f32-vcvt/gen/vcvt-sse41-x32.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]4017 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c
4018 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c
4019 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]4020 src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c
4021 src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c
4022 src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4023 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4024 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4025 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4026 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4027 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4028 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4029 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4030 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4031 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4032 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4033 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4034 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4035 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4036 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4037 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4038 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4039 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4040 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4041 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4042 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4043 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4044 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4045 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4046 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4047 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4048 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4049 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4050 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4051 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4052 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4053 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4054 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4055 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4056 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4057 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]4058 src/qs8-requantization/fp32-sse4.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]4059 src/qs8-requantization/gemmlowp-sse4.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]4060 src/qs8-requantization/rndna-sse4.c
Marat Dukhan0d979d52021-06-09 13:21:18 -0700[diff] [blame]4061 src/qs8-requantization/rndnu-sse4-sra.c
4062 src/qs8-requantization/rndnu-sse4-srl.c
Marat Dukhand9f3ad42020-08-10 12:30:58 -0700[diff] [blame]4063 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
4064 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
4065 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c
4066 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]4067 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
4068 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
4069 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c
4070 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]4071 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
4072 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
4073 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c
4074 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]4075 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
4076 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
4077 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c
4078 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]4079 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c
4080 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
4081 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c
4082 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4083 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4084 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4085 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4086 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4087 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4088 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4089 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4090 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
Marat Dukhanf9cf55d2021-12-09 18:54:00 -0800[diff] [blame]4091 src/qu8-f32-vcvt/gen/vcvt-sse41-x8.c
4092 src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c
4093 src/qu8-f32-vcvt/gen/vcvt-sse41-x24.c
4094 src/qu8-f32-vcvt/gen/vcvt-sse41-x32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4095 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
4096 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
4097 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
4098 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
4099 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
4100 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
4101 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
4102 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4103 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
4104 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
4105 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
4106 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
4107 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
4108 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4109 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
4110 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
4111 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
4112 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
4113 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
4114 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
4115 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
4116 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4117 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
4118 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
4119 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
4120 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
4121 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
4122 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]4123 src/qu8-requantization/gemmlowp-sse4.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]4124 src/qu8-requantization/rndna-sse4.c
4125 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
4126 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
4127 src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
4128 src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
4129 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
4130 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
4131 src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]4132 src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
4133 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c
4134 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
4135 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]4136 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan7519eb12021-11-23 19:08:29 -0800[diff] [blame]4137 src/s8-ibilinear/gen/sse41-c8.c
4138 src/s8-ibilinear/gen/sse41-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]4139 src/s8-maxpool/9p8x-minmax-sse41-c16.c
Marat Dukhan7519eb12021-11-23 19:08:29 -0800[diff] [blame]4140 src/s8-vclamp/sse41-x64.c
4141 src/u8-ibilinear/gen/sse41-c8.c
4142 src/u8-ibilinear/gen/sse41-c16.c)
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]4143
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4144SET(PROD_AVX_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]4145 src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4146 src/f32-dwconv/gen/up8x25-minmax-avx.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4147 src/f32-dwconv/gen/up16x3-minmax-avx.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4148 src/f32-dwconv/gen/up16x4-minmax-avx.c
4149 src/f32-dwconv/gen/up16x9-minmax-avx.c
Frank Barchardeb704f72021-11-12 01:26:50 -0800[diff] [blame]4150 src/f32-f16-vcvt/gen/vcvt-avx-x24.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4151 src/f32-gemm/gen/1x16-minmax-avx-broadcast.c
4152 src/f32-gemm/gen/5x16-minmax-avx-broadcast.c
4153 src/f32-igemm/gen/1x16-minmax-avx-broadcast.c
4154 src/f32-igemm/gen/5x16-minmax-avx-broadcast.c
4155 src/f32-prelu/gen/avx-2x16.c
Marat Dukhanb91432c2021-12-14 16:52:09 -0800[diff] [blame]4156 src/f32-qs8-vcvt/gen/vcvt-avx-x32.c
4157 src/f32-qu8-vcvt/gen/vcvt-avx-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4158 src/f32-vbinary/gen/vadd-minmax-avx-x16.c
4159 src/f32-vbinary/gen/vaddc-minmax-avx-x16.c
4160 src/f32-vbinary/gen/vdiv-minmax-avx-x16.c
4161 src/f32-vbinary/gen/vdivc-minmax-avx-x16.c
4162 src/f32-vbinary/gen/vmax-avx-x16.c
4163 src/f32-vbinary/gen/vmaxc-avx-x16.c
4164 src/f32-vbinary/gen/vmin-avx-x16.c
4165 src/f32-vbinary/gen/vminc-avx-x16.c
4166 src/f32-vbinary/gen/vmul-minmax-avx-x16.c
4167 src/f32-vbinary/gen/vmulc-minmax-avx-x16.c
4168 src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c
4169 src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c
4170 src/f32-vbinary/gen/vsqrdiff-avx-x16.c
4171 src/f32-vbinary/gen/vsqrdiffc-avx-x16.c
4172 src/f32-vbinary/gen/vsub-minmax-avx-x16.c
4173 src/f32-vbinary/gen/vsubc-minmax-avx-x16.c
4174 src/f32-vclamp/gen/vclamp-avx-x16.c
4175 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c
4176 src/f32-vhswish/gen/vhswish-avx-x16.c
4177 src/f32-vlrelu/gen/vlrelu-avx-x16.c
4178 src/f32-vrnd/gen/vrndd-avx-x16.c
4179 src/f32-vrnd/gen/vrndne-avx-x16.c
4180 src/f32-vrnd/gen/vrndu-avx-x16.c
4181 src/f32-vrnd/gen/vrndz-avx-x16.c
4182 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c
4183 src/f32-vsqrt/gen/avx-sqrt-x8.c
4184 src/f32-vunary/gen/vabs-avx-x16.c
4185 src/f32-vunary/gen/vneg-avx-x16.c
4186 src/f32-vunary/gen/vsqr-avx-x16.c
Marat Dukhan28480592021-07-27 23:52:27 -0700[diff] [blame]4187 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
4188 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4189 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
4190 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
4191 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
4192 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
4193 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
4194 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Marat Dukhancd4089f2021-12-14 23:53:33 -0800[diff] [blame]4195 src/qs8-f32-vcvt/gen/vcvt-avx-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4196 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
4197 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
4198 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
4199 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
4200 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
4201 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]4202 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
4203 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4204 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
4205 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Marat Dukhancd4089f2021-12-14 23:53:33 -0800[diff] [blame]4206 src/qu8-f32-vcvt/gen/vcvt-avx-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4207 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
4208 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
4209 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
4210 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
4211 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]4212 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
4213 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]4214 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
4215 src/x8-lut/gen/lut-avx-x64.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4216
4217SET(ALL_AVX_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]4218 src/f16-f32-vcvt/gen/vcvt-avx-int16-x8.c
4219 src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c
4220 src/f16-f32-vcvt/gen/vcvt-avx-int16-x24.c
4221 src/f16-f32-vcvt/gen/vcvt-avx-int16-x32.c
4222 src/f16-f32-vcvt/gen/vcvt-avx-int32-x8.c
4223 src/f16-f32-vcvt/gen/vcvt-avx-int32-x16.c
4224 src/f16-f32-vcvt/gen/vcvt-avx-int32-x24.c
4225 src/f16-f32-vcvt/gen/vcvt-avx-int32-x32.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4226 src/f32-dwconv/gen/up8x3-minmax-avx-acc2.c
4227 src/f32-dwconv/gen/up8x3-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4228 src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c
4229 src/f32-dwconv/gen/up8x4-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4230 src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c
4231 src/f32-dwconv/gen/up8x9-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4232 src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c
4233 src/f32-dwconv/gen/up8x25-minmax-avx.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4234 src/f32-dwconv/gen/up16x3-minmax-avx-acc2.c
4235 src/f32-dwconv/gen/up16x3-minmax-avx.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4236 src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c
4237 src/f32-dwconv/gen/up16x4-minmax-avx.c
4238 src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c
4239 src/f32-dwconv/gen/up16x9-minmax-avx.c
4240 src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c
4241 src/f32-dwconv/gen/up16x25-minmax-avx.c
Marat Dukhaneb844232021-11-08 23:07:53 -0800[diff] [blame]4242 src/f32-f16-vcvt/gen/vcvt-avx-x8.c
4243 src/f32-f16-vcvt/gen/vcvt-avx-x16.c
4244 src/f32-f16-vcvt/gen/vcvt-avx-x24.c
4245 src/f32-f16-vcvt/gen/vcvt-avx-x32.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4246 src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4247 src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c
4248 src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4249 src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4250 src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4251 src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4252 src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4253 src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c
4254 src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c
4255 src/f32-gemm/gen/1x8-minmax-avx-broadcast.c
4256 src/f32-gemm/gen/1x16-minmax-avx-broadcast.c
4257 src/f32-gemm/gen/3x16-minmax-avx-broadcast.c
4258 src/f32-gemm/gen/4x8-minmax-avx-broadcast.c
4259 src/f32-gemm/gen/4x16-minmax-avx-broadcast.c
4260 src/f32-gemm/gen/5x8-minmax-avx-broadcast.c
4261 src/f32-gemm/gen/5x16-minmax-avx-broadcast.c
4262 src/f32-gemm/gen/6x8-minmax-avx-broadcast.c
4263 src/f32-gemm/gen/7x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4264 src/f32-igemm/gen/1x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4265 src/f32-igemm/gen/1x16-minmax-avx-broadcast.c
4266 src/f32-igemm/gen/3x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4267 src/f32-igemm/gen/4x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4268 src/f32-igemm/gen/4x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4269 src/f32-igemm/gen/5x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4270 src/f32-igemm/gen/5x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4271 src/f32-igemm/gen/6x8-minmax-avx-broadcast.c
4272 src/f32-igemm/gen/7x8-minmax-avx-broadcast.c
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]4273 src/f32-prelu/gen/avx-2x8.c
4274 src/f32-prelu/gen/avx-2x16.c
Marat Dukhanb91432c2021-12-14 16:52:09 -0800[diff] [blame]4275 src/f32-qs8-vcvt/gen/vcvt-avx-x8.c
4276 src/f32-qs8-vcvt/gen/vcvt-avx-x16.c
4277 src/f32-qs8-vcvt/gen/vcvt-avx-x24.c
4278 src/f32-qs8-vcvt/gen/vcvt-avx-x32.c
4279 src/f32-qu8-vcvt/gen/vcvt-avx-x8.c
4280 src/f32-qu8-vcvt/gen/vcvt-avx-x16.c
4281 src/f32-qu8-vcvt/gen/vcvt-avx-x24.c
4282 src/f32-qu8-vcvt/gen/vcvt-avx-x32.c
Marat Dukhana5977df2019-10-30 22:02:15 -0700[diff] [blame]4283 src/f32-rmax/avx.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4284 src/f32-vbinary/gen/vadd-minmax-avx-x8.c
4285 src/f32-vbinary/gen/vadd-minmax-avx-x16.c
4286 src/f32-vbinary/gen/vaddc-minmax-avx-x8.c
4287 src/f32-vbinary/gen/vaddc-minmax-avx-x16.c
4288 src/f32-vbinary/gen/vdiv-minmax-avx-x8.c
4289 src/f32-vbinary/gen/vdiv-minmax-avx-x16.c
4290 src/f32-vbinary/gen/vdivc-minmax-avx-x8.c
4291 src/f32-vbinary/gen/vdivc-minmax-avx-x16.c
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]4292 src/f32-vbinary/gen/vmax-avx-x8.c
4293 src/f32-vbinary/gen/vmax-avx-x16.c
4294 src/f32-vbinary/gen/vmaxc-avx-x8.c
4295 src/f32-vbinary/gen/vmaxc-avx-x16.c
4296 src/f32-vbinary/gen/vmin-avx-x8.c
4297 src/f32-vbinary/gen/vmin-avx-x16.c
4298 src/f32-vbinary/gen/vminc-avx-x8.c
4299 src/f32-vbinary/gen/vminc-avx-x16.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4300 src/f32-vbinary/gen/vmul-minmax-avx-x8.c
4301 src/f32-vbinary/gen/vmul-minmax-avx-x16.c
4302 src/f32-vbinary/gen/vmulc-minmax-avx-x8.c
4303 src/f32-vbinary/gen/vmulc-minmax-avx-x16.c
4304 src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c
4305 src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c
4306 src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c
4307 src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]4308 src/f32-vbinary/gen/vsqrdiff-avx-x8.c
4309 src/f32-vbinary/gen/vsqrdiff-avx-x16.c
4310 src/f32-vbinary/gen/vsqrdiffc-avx-x8.c
4311 src/f32-vbinary/gen/vsqrdiffc-avx-x16.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4312 src/f32-vbinary/gen/vsub-minmax-avx-x8.c
4313 src/f32-vbinary/gen/vsub-minmax-avx-x16.c
4314 src/f32-vbinary/gen/vsubc-minmax-avx-x8.c
4315 src/f32-vbinary/gen/vsubc-minmax-avx-x16.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4316 src/f32-vclamp/gen/vclamp-avx-x8.c
4317 src/f32-vclamp/gen/vclamp-avx-x16.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]4318 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c
4319 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c
4320 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c
4321 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c
4322 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c
4323 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c
4324 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c
4325 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c
4326 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c
4327 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c
4328 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c
4329 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c
4330 src/f32-velu/gen/velu-avx-rr2-p6-x8.c
4331 src/f32-velu/gen/velu-avx-rr2-p6-x16.c
4332 src/f32-velu/gen/velu-avx-rr2-p6-x24.c
4333 src/f32-velu/gen/velu-avx-rr2-p6-x32.c
4334 src/f32-velu/gen/velu-avx-rr2-p6-x40.c
4335 src/f32-velu/gen/velu-avx-rr2-p6-x48.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]4336 src/f32-vhswish/gen/vhswish-avx-x8.c
4337 src/f32-vhswish/gen/vhswish-avx-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4338 src/f32-vlrelu/gen/vlrelu-avx-x8.c
4339 src/f32-vlrelu/gen/vlrelu-avx-x16.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4340 src/f32-vrnd/gen/vrndd-avx-x8.c
4341 src/f32-vrnd/gen/vrndd-avx-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4342 src/f32-vrnd/gen/vrndne-avx-x8.c
4343 src/f32-vrnd/gen/vrndne-avx-x16.c
4344 src/f32-vrnd/gen/vrndu-avx-x8.c
4345 src/f32-vrnd/gen/vrndu-avx-x16.c
4346 src/f32-vrnd/gen/vrndz-avx-x8.c
4347 src/f32-vrnd/gen/vrndz-avx-x16.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]4348 src/f32-vscale/avx-x32.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]4349 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c
4350 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c
4351 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c
4352 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c
4353 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c
4354 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c
4355 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c
4356 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c
4357 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c
4358 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c
4359 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c
4360 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c
4361 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c
4362 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c
4363 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c
4364 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c
4365 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c
4366 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c
4367 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c
4368 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]4369 src/f32-vsqrt/gen/avx-sqrt-x8.c
4370 src/f32-vsqrt/gen/avx-sqrt-x16.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]4371 src/f32-vunary/gen/vabs-avx-x8.c
4372 src/f32-vunary/gen/vabs-avx-x16.c
4373 src/f32-vunary/gen/vneg-avx-x8.c
4374 src/f32-vunary/gen/vneg-avx-x16.c
4375 src/f32-vunary/gen/vsqr-avx-x8.c
Marat Dukhand08abcb2020-09-21 00:26:25 -0700[diff] [blame]4376 src/f32-vunary/gen/vsqr-avx-x16.c
Frank Barchard4a352042021-04-13 15:52:08 -0700[diff] [blame]4377 src/math/exp-avx-rr2-p5.c
4378 src/math/expm1minus-avx-rr2-lut4-p4-perm.c
4379 src/math/expm1minus-avx-rr2-lut16-p3.c
4380 src/math/expm1minus-avx-rr2-p6.c
4381 src/math/sigmoid-avx-rr2-lut64-p2-div.c
4382 src/math/sigmoid-avx-rr2-p5-div.c
4383 src/math/sigmoid-avx-rr2-p5-nr1.c
4384 src/math/sigmoid-avx-rr2-p5-nr2.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4385 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4386 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4387 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4388 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4389 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4390 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4391 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4392 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4393 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4394 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4395 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4396 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
4397 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c
4398 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c
4399 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c
4400 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4401 src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4402 src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4403 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4404 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4405 src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4406 src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4407 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4408 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4409 src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4410 src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4411 src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4412 src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4413 src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4414 src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4415 src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4416 src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4417 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4418 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4419 src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4420 src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4421 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4422 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4423 src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4424 src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4425 src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4426 src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4427 src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4428 src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4429 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4430 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]4431 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4432 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4433 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4434 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4435 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4436 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4437 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4438 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4439 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4440 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4441 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c
4442 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4443 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c
4444 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c
Marat Dukhancd4089f2021-12-14 23:53:33 -0800[diff] [blame]4445 src/qs8-f32-vcvt/gen/vcvt-avx-x8.c
4446 src/qs8-f32-vcvt/gen/vcvt-avx-x16.c
4447 src/qs8-f32-vcvt/gen/vcvt-avx-x24.c
4448 src/qs8-f32-vcvt/gen/vcvt-avx-x32.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4449 src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4450 src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4451 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4452 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4453 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4454 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4455 src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4456 src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4457 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4458 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4459 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4460 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4461 src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4462 src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4463 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4464 src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4465 src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4466 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4467 src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4468 src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4469 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4470 src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4471 src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4472 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4473 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4474 src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4475 src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4476 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4477 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4478 src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4479 src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4480 src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4481 src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4482 src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4483 src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhane9c4b962021-04-02 16:56:55 -0700[diff] [blame]4484 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c
4485 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c
4486 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c
4487 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c
4488 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
4489 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c
4490 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c
4491 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c
4492 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
4493 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
4494 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c
4495 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c
4496 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
4497 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
4498 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4499 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]4500 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c
4501 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
4502 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c
4503 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4504 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4505 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4506 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4507 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4508 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4509 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4510 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4511 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
Marat Dukhancd4089f2021-12-14 23:53:33 -0800[diff] [blame]4512 src/qu8-f32-vcvt/gen/vcvt-avx-x8.c
4513 src/qu8-f32-vcvt/gen/vcvt-avx-x16.c
4514 src/qu8-f32-vcvt/gen/vcvt-avx-x24.c
4515 src/qu8-f32-vcvt/gen/vcvt-avx-x32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4516 src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
4517 src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
4518 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
4519 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
4520 src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
4521 src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
4522 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
4523 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
4524 src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
4525 src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
4526 src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
4527 src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
4528 src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
4529 src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
4530 src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
4531 src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
4532 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
4533 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
4534 src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
4535 src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
4536 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
4537 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
4538 src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
4539 src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
4540 src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
4541 src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
4542 src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]4543 src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
4544 src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c
4545 src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c
4546 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
4547 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c
4548 src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
4549 src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
4550 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]4551 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
4552 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c
4553 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
4554 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]4555 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
4556 src/x8-lut/gen/lut-avx-x16.c
4557 src/x8-lut/gen/lut-avx-x32.c
4558 src/x8-lut/gen/lut-avx-x48.c
4559 src/x8-lut/gen/lut-avx-x64.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]4560
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]4561SET(PROD_F16C_MICROKERNEL_SRCS
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]4562 src/f16-f32-vcvt/gen/vcvt-f16c-x16.c
4563 src/f32-f16-vcvt/gen/vcvt-f16c-x16.c)
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]4564
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]4565SET(ALL_F16C_MICROKERNEL_SRCS
4566 src/f16-f32-vcvt/gen/vcvt-f16c-x8.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]4567 src/f16-f32-vcvt/gen/vcvt-f16c-x16.c
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]4568 src/f32-f16-vcvt/gen/vcvt-f16c-x8.c
4569 src/f32-f16-vcvt/gen/vcvt-f16c-x16.c
Marat Dukhan582e1842021-10-25 17:18:36 -0700[diff] [blame]4570 src/math/cvt-f16-f32-f16c.c
4571 src/math/cvt-f32-f16-f16c.c)
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]4572
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4573SET(PROD_XOP_MICROKERNEL_SRCS
Marat Dukhan28480592021-07-27 23:52:27 -0700[diff] [blame]4574 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
4575 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4576 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4577 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4578 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4579 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4580 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
4581 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
4582 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4583 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4584 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4585 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4586 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
4587 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
4588 src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
4589 src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
4590 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4591 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4592 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4593 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4594 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
4595 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c)
4596
4597SET(ALL_XOP_MICROKERNEL_SRCS
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4598 src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4599 src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4600 src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4601 src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4602 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4603 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4604 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4605 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
4606 src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c
4607 src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4608 src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4609 src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4610 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4611 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4612 src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4613 src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4614 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4615 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4616 src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4617 src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4618 src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4619 src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4620 src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4621 src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4622 src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4623 src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4624 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4625 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4626 src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4627 src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4628 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4629 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4630 src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4631 src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4632 src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4633 src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4634 src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4635 src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4636 src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]4637 src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4638 src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4639 src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4640 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4641 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4642 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4643 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4644 src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4645 src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4646 src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4647 src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4648 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4649 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4650 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4651 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4652 src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4653 src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4654 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4655 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4656 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4657 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4658 src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4659 src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4660 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4661 src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4662 src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4663 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4664 src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4665 src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4666 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4667 src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4668 src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4669 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4670 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4671 src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4672 src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4673 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4674 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4675 src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4676 src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4677 src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4678 src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4679 src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4680 src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]4681 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
4682 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c
4683 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c
4684 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c
4685 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
4686 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
4687 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4688 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4689 src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
4690 src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
4691 src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
4692 src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4693 src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
4694 src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
4695 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4696 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
4697 src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
4698 src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
4699 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4700 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
4701 src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
4702 src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
4703 src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
4704 src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
4705 src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
4706 src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
4707 src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
4708 src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
4709 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4710 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
4711 src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
4712 src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
4713 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4714 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
4715 src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
4716 src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
4717 src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
4718 src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
4719 src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]4720 src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
4721 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
4722 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c
4723 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
4724 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c)
Marat Dukhan1566fee2020-08-02 21:55:41 -0700[diff] [blame]4725
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4726SET(PROD_FMA3_MICROKERNEL_SRCS
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4727 src/f32-dwconv/gen/up8x25-minmax-fma3.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4728 src/f32-dwconv/gen/up16x3-minmax-fma3.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4729 src/f32-dwconv/gen/up16x4-minmax-fma3.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4730 src/f32-dwconv/gen/up16x9-minmax-fma3.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4731 src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c
4732 src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c
4733 src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c
4734 src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c
4735 src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c
4736 src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c
4737 src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c
4738 src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c
4739 src/f32-vhswish/gen/vhswish-fma3-x16.c)
4740
4741SET(ALL_FMA3_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4742 src/f32-dwconv/gen/up8x3-minmax-fma3-acc2.c
4743 src/f32-dwconv/gen/up8x3-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4744 src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c
4745 src/f32-dwconv/gen/up8x4-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4746 src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c
4747 src/f32-dwconv/gen/up8x9-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4748 src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c
4749 src/f32-dwconv/gen/up8x25-minmax-fma3.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4750 src/f32-dwconv/gen/up16x3-minmax-fma3-acc2.c
4751 src/f32-dwconv/gen/up16x3-minmax-fma3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4752 src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c
4753 src/f32-dwconv/gen/up16x4-minmax-fma3.c
4754 src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c
4755 src/f32-dwconv/gen/up16x9-minmax-fma3.c
4756 src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c
4757 src/f32-dwconv/gen/up16x25-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4758 src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4759 src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c
4760 src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c
4761 src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c
4762 src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4763 src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4764 src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c
4765 src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4766 src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4767 src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c
4768 src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4769 src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c
4770 src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c
4771 src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4772 src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c
4773 src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c
4774 src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c
4775 src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c
4776 src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c
4777 src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c
4778 src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c
4779 src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c
4780 src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c
4781 src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c
4782 src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c
4783 src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c
4784 src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c
4785 src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4786 src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4787 src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c
4788 src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c
4789 src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c
4790 src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4791 src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4792 src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c
4793 src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4794 src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4795 src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c
4796 src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4797 src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c
4798 src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c
4799 src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]4800 src/f32-vhswish/gen/vhswish-fma3-x8.c
4801 src/f32-vhswish/gen/vhswish-fma3-x16.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]4802 src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c
4803 src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c
4804 src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c
4805 src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c
4806 src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c
4807 src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c
4808 src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c
4809 src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]4810 src/math/sqrt-fma3-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4811 src/math/sqrt-fma3-nr1fma1adj.c
4812 src/math/sqrt-fma3-nr2fma.c)
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]4813
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4814SET(PROD_AVX2_MICROKERNEL_SRCS
Marat Dukhan0d399ca2021-12-14 19:25:50 -0800[diff] [blame]4815 src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c
4816 src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4817 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c
4818 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c
4819 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4820 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4821 src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4822 src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4823 src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4824 src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4825 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4826 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
Marat Dukhan7b5f7792021-12-15 00:29:39 -0800[diff] [blame]4827 src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4828 src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4829 src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4830 src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4831 src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4832 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
4833 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4834 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4835 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
Marat Dukhan7b5f7792021-12-15 00:29:39 -0800[diff] [blame]4836 src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4837 src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4838 src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4839 src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4840 src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4841 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]4842 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4843 src/x8-lut/gen/lut-avx2-x128.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4844
4845SET(ALL_AVX2_MICROKERNEL_SRCS
Marat Dukhan0d399ca2021-12-14 19:25:50 -0800[diff] [blame]4846 src/f32-qs8-vcvt/gen/vcvt-avx2-x16.c
4847 src/f32-qs8-vcvt/gen/vcvt-avx2-x32.c
4848 src/f32-qs8-vcvt/gen/vcvt-avx2-x48.c
4849 src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c
4850 src/f32-qu8-vcvt/gen/vcvt-avx2-x16.c
4851 src/f32-qu8-vcvt/gen/vcvt-avx2-x32.c
4852 src/f32-qu8-vcvt/gen/vcvt-avx2-x48.c
4853 src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4854 src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c
4855 src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4856 src/f32-raddexpminusmax/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4857 src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4858 src/f32-raddexpminusmax/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4859 src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c
4860 src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4861 src/f32-raddexpminusmax/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4862 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c
4863 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c
4864 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4865 src/f32-raddexpminusmax/gen/avx2-p5-x96.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4866 src/f32-raddextexp/gen/avx2-p5-x64-acc2.c
4867 src/f32-raddextexp/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4868 src/f32-raddextexp/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4869 src/f32-raddextexp/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4870 src/f32-raddextexp/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4871 src/f32-raddextexp/gen/avx2-p5-x80-acc2.c
4872 src/f32-raddextexp/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4873 src/f32-raddextexp/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4874 src/f32-raddextexp/gen/avx2-p5-x96-acc2.c
4875 src/f32-raddextexp/gen/avx2-p5-x96-acc3.c
4876 src/f32-raddextexp/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4877 src/f32-raddextexp/gen/avx2-p5-x96.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]4878 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64-acc2.c
4879 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64-acc4.c
4880 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64.c
4881 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x72-acc3.c
4882 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x72.c
4883 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80-acc2.c
4884 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80-acc5.c
4885 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80.c
4886 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc2.c
4887 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc3.c
4888 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc6.c
4889 src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]4890 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c
4891 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c
4892 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c
4893 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c
4894 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c
4895 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c
4896 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c
4897 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c
4898 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c
4899 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c
4900 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c
4901 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c
4902 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c
4903 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c
4904 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c
4905 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c
4906 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c
4907 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c
4908 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c
4909 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c
4910 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c
4911 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c
4912 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c
4913 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c
4914 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c
4915 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c
4916 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c
4917 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c
4918 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c
4919 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c
4920 src/f32-velu/gen/velu-avx2-rr1-p6-x8.c
4921 src/f32-velu/gen/velu-avx2-rr1-p6-x16.c
4922 src/f32-velu/gen/velu-avx2-rr1-p6-x24.c
4923 src/f32-velu/gen/velu-avx2-rr1-p6-x32.c
4924 src/f32-velu/gen/velu-avx2-rr1-p6-x40.c
4925 src/f32-velu/gen/velu-avx2-rr1-p6-x48.c
4926 src/f32-velu/gen/velu-avx2-rr1-p6-x56.c
4927 src/f32-velu/gen/velu-avx2-rr1-p6-x64.c
4928 src/f32-velu/gen/velu-avx2-rr1-p6-x72.c
4929 src/f32-velu/gen/velu-avx2-rr1-p6-x80.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4930 src/f32-vrelu/gen/vrelu-avx-x8.c
4931 src/f32-vrelu/gen/vrelu-avx-x16.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4932 src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c
4933 src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c
4934 src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c
4935 src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c
4936 src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c
4937 src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c
4938 src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c
4939 src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c
4940 src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c
4941 src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c
4942 src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c
4943 src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c
4944 src/f32-vscaleextexp/gen/avx2-p5-x8.c
4945 src/f32-vscaleextexp/gen/avx2-p5-x16.c
4946 src/f32-vscaleextexp/gen/avx2-p5-x24.c
4947 src/f32-vscaleextexp/gen/avx2-p5-x32.c
4948 src/f32-vscaleextexp/gen/avx2-p5-x40.c
4949 src/f32-vscaleextexp/gen/avx2-p5-x48.c
4950 src/f32-vscaleextexp/gen/avx2-p5-x56.c
4951 src/f32-vscaleextexp/gen/avx2-p5-x64.c
4952 src/f32-vscaleextexp/gen/avx2-p5-x72.c
4953 src/f32-vscaleextexp/gen/avx2-p5-x80.c
4954 src/f32-vscaleextexp/gen/avx2-p5-x88.c
4955 src/f32-vscaleextexp/gen/avx2-p5-x96.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]4956 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c
4957 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c
4958 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c
4959 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c
4960 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c
4961 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c
4962 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c
4963 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c
4964 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c
4965 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c
4966 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c
4967 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c
4968 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c
4969 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c
4970 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c
4971 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c
4972 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c
4973 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c
4974 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c
4975 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c
4976 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c
4977 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c
4978 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c
4979 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c
4980 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c
4981 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c
4982 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c
4983 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c
4984 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c
4985 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]4986 src/math/exp-avx2-rr2-lut8-p3-perm.c
4987 src/math/exp-avx2-rr2-lut8-p4-perm.c
4988 src/math/exp-avx2-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]4989 src/math/expm1minus-avx2-rr1-lut4-p4-perm.c
4990 src/math/expm1minus-avx2-rr1-lut8-p4-perm.c
4991 src/math/expm1minus-avx2-rr1-lut16-p3-gather.c
4992 src/math/expm1minus-avx2-rr1-p6.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]4993 src/math/expminus-avx2-rr1-p5.c
Frank Barcharde7223ee2020-12-04 19:04:01 -0800[diff] [blame]4994 src/math/expminus-avx2-rr2-p5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4995 src/math/extexp-avx2-p5.c
4996 src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c
4997 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c
4998 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c
4999 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c
5000 src/math/sigmoid-avx2-rr1-p5-div.c
5001 src/math/sigmoid-avx2-rr1-p5-nr1fma.c
5002 src/math/sigmoid-avx2-rr1-p5-nr2fma.c
5003 src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c
5004 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c
5005 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c
5006 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c
5007 src/math/sigmoid-avx2-rr2-p5-div.c
5008 src/math/sigmoid-avx2-rr2-p5-nr1fma.c
5009 src/math/sigmoid-avx2-rr2-p5-nr2fma.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]5010 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
5011 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5012 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]5013 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c
5014 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]5015 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5016 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]5017 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c
5018 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]5019 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
5020 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c
5021 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5022 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]5023 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c
5024 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]5025 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5026 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]5027 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c
5028 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]5029 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]5030 src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c
5031 src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c
5032 src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c
5033 src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c
5034 src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c
5035 src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]5036 src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c
5037 src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c
5038 src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5039 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5040 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5041 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]5042 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c
5043 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5044 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5045 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]5046 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c
5047 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5048 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5049 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5050 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5051 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]5052 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c
5053 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5054 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5055 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]5056 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c
5057 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5058 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan7b5f7792021-12-15 00:29:39 -0800[diff] [blame]5059 src/qs8-f32-vcvt/gen/vcvt-avx2-x8.c
5060 src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c
5061 src/qs8-f32-vcvt/gen/vcvt-avx2-x24.c
5062 src/qs8-f32-vcvt/gen/vcvt-avx2-x32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5063 src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]5064 src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5065 src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]5066 src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5067 src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]5068 src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5069 src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5070 src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]5071 src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c
Marat Dukhane6dc0b62020-09-08 23:57:14 -0700[diff] [blame]5072 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
5073 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
5074 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c
5075 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c
5076 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
5077 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
5078 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
Marat Dukhan902ef7f2021-07-02 16:11:06 -0700[diff] [blame]5079 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c
Marat Dukhan09c312b2021-07-09 00:45:04 -0700[diff] [blame]5080 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
5081 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
5082 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
5083 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
5084 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
5085 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan7b5f7792021-12-15 00:29:39 -0800[diff] [blame]5086 src/qu8-f32-vcvt/gen/vcvt-avx2-x8.c
5087 src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c
5088 src/qu8-f32-vcvt/gen/vcvt-avx2-x24.c
5089 src/qu8-f32-vcvt/gen/vcvt-avx2-x32.c
Marat Dukhan902ef7f2021-07-02 16:11:06 -0700[diff] [blame]5090 src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c
5091 src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c
5092 src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c
5093 src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c
5094 src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]5095 src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c
5096 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
5097 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
5098 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]5099 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
5100 src/x8-lut/gen/lut-avx2-x32.c
5101 src/x8-lut/gen/lut-avx2-x64.c
5102 src/x8-lut/gen/lut-avx2-x96.c
5103 src/x8-lut/gen/lut-avx2-x128.c)
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]5104
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5105SET(PROD_AVX512F_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]5106 src/f32-dwconv/gen/up16x3-minmax-avx512f.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5107 src/f32-dwconv/gen/up16x4-minmax-avx512f.c
5108 src/f32-dwconv/gen/up16x9-minmax-avx512f.c
5109 src/f32-dwconv/gen/up16x25-minmax-avx512f.c
5110 src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c
5111 src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c
5112 src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c
5113 src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c
5114 src/f32-prelu/gen/avx512f-2x16.c
5115 src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c
5116 src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c
5117 src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c
5118 src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c
5119 src/f32-vbinary/gen/vmax-avx512f-x32.c
5120 src/f32-vbinary/gen/vmaxc-avx512f-x32.c
5121 src/f32-vbinary/gen/vmin-avx512f-x32.c
5122 src/f32-vbinary/gen/vminc-avx512f-x32.c
5123 src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c
5124 src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c
5125 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c
5126 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c
5127 src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c
5128 src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c
5129 src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c
5130 src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c
5131 src/f32-vclamp/gen/vclamp-avx512f-x16.c
5132 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c
5133 src/f32-vhswish/gen/vhswish-avx512f-x16.c
5134 src/f32-vlrelu/gen/vlrelu-avx512f-x16.c
5135 src/f32-vrnd/gen/vrndd-avx512f-x16.c
5136 src/f32-vrnd/gen/vrndne-avx512f-x16.c
5137 src/f32-vrnd/gen/vrndu-avx512f-x16.c
5138 src/f32-vrnd/gen/vrndz-avx512f-x16.c
5139 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c
5140 src/f32-vunary/gen/vabs-avx512f-x16.c
5141 src/f32-vunary/gen/vneg-avx512f-x16.c
5142 src/f32-vunary/gen/vsqr-avx512f-x16.c)
5143
5144SET(ALL_AVX512F_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]5145 src/f32-dwconv/gen/up16x3-minmax-avx512f-acc2.c
5146 src/f32-dwconv/gen/up16x3-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5147 src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c
5148 src/f32-dwconv/gen/up16x4-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5149 src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c
5150 src/f32-dwconv/gen/up16x9-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5151 src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c
5152 src/f32-dwconv/gen/up16x25-minmax-avx512f.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]5153 src/f32-dwconv/gen/up32x3-minmax-avx512f-acc2.c
5154 src/f32-dwconv/gen/up32x3-minmax-avx512f.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5155 src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c
5156 src/f32-dwconv/gen/up32x4-minmax-avx512f.c
5157 src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c
5158 src/f32-dwconv/gen/up32x9-minmax-avx512f.c
5159 src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c
5160 src/f32-dwconv/gen/up32x25-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5161 src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c
5162 src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c
5163 src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c
5164 src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c
5165 src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c
5166 src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5167 src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c
5168 src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c
5169 src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c
5170 src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c
5171 src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c
5172 src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5173 src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c
5174 src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c
5175 src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c
5176 src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c
5177 src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c
5178 src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]5179 src/f32-prelu/gen/avx512f-2x16.c
5180 src/f32-prelu/gen/avx512f-2x32.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]5181 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c
5182 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5183 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]5184 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5185 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]5186 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c
5187 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5188 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]5189 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c
5190 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c
5191 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5192 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]5193 src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c
5194 src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5195 src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]5196 src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5197 src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]5198 src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c
5199 src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5200 src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]5201 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c
5202 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c
5203 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5204 src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c
Marat Dukhan5999c922022-01-05 18:10:20 -0800[diff] [blame]5205 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128-acc2.c
5206 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128-acc4.c
5207 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128.c
5208 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x144-acc3.c
5209 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x144.c
5210 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160-acc2.c
5211 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160-acc5.c
5212 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160.c
5213 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc2.c
5214 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc3.c
5215 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc6.c
5216 src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5217 src/f32-rmax/avx512f.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]5218 src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c
5219 src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c
5220 src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c
5221 src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c
5222 src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c
5223 src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c
5224 src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c
5225 src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]5226 src/f32-vbinary/gen/vmax-avx512f-x16.c
5227 src/f32-vbinary/gen/vmax-avx512f-x32.c
5228 src/f32-vbinary/gen/vmaxc-avx512f-x16.c
5229 src/f32-vbinary/gen/vmaxc-avx512f-x32.c
5230 src/f32-vbinary/gen/vmin-avx512f-x16.c
5231 src/f32-vbinary/gen/vmin-avx512f-x32.c
5232 src/f32-vbinary/gen/vminc-avx512f-x16.c
5233 src/f32-vbinary/gen/vminc-avx512f-x32.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]5234 src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c
5235 src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c
5236 src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c
5237 src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c
5238 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c
5239 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c
5240 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c
5241 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]5242 src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c
5243 src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c
5244 src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c
5245 src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]5246 src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c
5247 src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c
5248 src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c
5249 src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]5250 src/f32-vclamp/gen/vclamp-avx512f-x16.c
5251 src/f32-vclamp/gen/vclamp-avx512f-x32.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]5252 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c
5253 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c
5254 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c
5255 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c
5256 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c
5257 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c
5258 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c
5259 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c
5260 src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c
5261 src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c
5262 src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c
5263 src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c
5264 src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c
5265 src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c
5266 src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c
5267 src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5268 src/f32-vhswish/gen/vhswish-avx512f-x16.c
5269 src/f32-vhswish/gen/vhswish-avx512f-x32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5270 src/f32-vlrelu/gen/vlrelu-avx512f-x16.c
5271 src/f32-vlrelu/gen/vlrelu-avx512f-x32.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]5272 src/f32-vrelu/gen/vrelu-avx512f-x16.c
5273 src/f32-vrelu/gen/vrelu-avx512f-x32.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]5274 src/f32-vrnd/gen/vrndd-avx512f-x16.c
5275 src/f32-vrnd/gen/vrndd-avx512f-x32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5276 src/f32-vrnd/gen/vrndne-avx512f-x16.c
5277 src/f32-vrnd/gen/vrndne-avx512f-x32.c
5278 src/f32-vrnd/gen/vrndu-avx512f-x16.c
5279 src/f32-vrnd/gen/vrndu-avx512f-x32.c
5280 src/f32-vrnd/gen/vrndz-avx512f-x16.c
5281 src/f32-vrnd/gen/vrndz-avx512f-x32.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]5282 src/f32-vscale/avx512f-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]5283 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c
5284 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c
5285 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c
5286 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c
5287 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c
5288 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c
5289 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c
5290 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c
5291 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c
5292 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c
5293 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c
5294 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c
5295 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c
5296 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c
5297 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c
5298 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c
5299 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c
5300 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c
5301 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c
5302 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c
5303 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c
5304 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c
5305 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c
5306 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]5307 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c
5308 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c
5309 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c
5310 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c
5311 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c
5312 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c
5313 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c
5314 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c
5315 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c
5316 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c
5317 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c
5318 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c
5319 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c
5320 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c
5321 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c
5322 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c
5323 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c
5324 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c
5325 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c
5326 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c
5327 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c
5328 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c
5329 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c
5330 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c
5331 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c
5332 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c
5333 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c
5334 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c
5335 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c
5336 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c
5337 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c
5338 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c
5339 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c
5340 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c
5341 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c
5342 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c
5343 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c
5344 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c
5345 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c
5346 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c
5347 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c
5348 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c
5349 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c
5350 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c
5351 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c
5352 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c
5353 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c
5354 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]5355 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c
5356 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c
5357 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c
5358 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c
5359 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c
5360 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c
5361 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c
5362 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]5363 src/f32-vunary/gen/vabs-avx512f-x16.c
5364 src/f32-vunary/gen/vabs-avx512f-x32.c
5365 src/f32-vunary/gen/vneg-avx512f-x16.c
5366 src/f32-vunary/gen/vneg-avx512f-x32.c
5367 src/f32-vunary/gen/vsqr-avx512f-x16.c
5368 src/f32-vunary/gen/vsqr-avx512f-x32.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]5369 src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c
5370 src/math/exp-avx512f-rr2-lut16-p3-perm.c
5371 src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c
5372 src/math/exp-avx512f-rr2-lut32-p2-perm2.c
5373 src/math/exp-avx512f-rr2-p5-scalef.c
5374 src/math/exp-avx512f-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]5375 src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c
5376 src/math/expm1minus-avx512f-rr1-p6.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]5377 src/math/extexp-avx512f-p5.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]5378 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]5379 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5380 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]5381 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]5382 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5383 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]5384 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]5385 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5386 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c
5387 src/math/sigmoid-avx512f-rr1-p5-scalef-div.c
5388 src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c
5389 src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c
5390 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c
5391 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c
5392 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c
5393 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c
5394 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c
5395 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]5396 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]5397 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5398 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c
5399 src/math/sigmoid-avx512f-rr2-p5-scalef-div.c
5400 src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c
5401 src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]5402 src/math/sqrt-avx512f-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5403 src/math/sqrt-avx512f-nr1fma1adj.c
5404 src/math/sqrt-avx512f-nr2fma.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5405
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5406SET(PROD_AVX512SKX_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]5407 src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]5408 src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c
Marat Dukhan2edf8632021-12-14 23:17:14 -0800[diff] [blame]5409 src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c
5410 src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5411 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
5412 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
5413 src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
5414 src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
5415 src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
5416 src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
5417 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
5418 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhan98393ad2021-12-15 11:07:40 -0800[diff] [blame]5419 src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5420 src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
5421 src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
5422 src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
5423 src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
5424 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
5425 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
5426 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
5427 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhan98393ad2021-12-15 11:07:40 -0800[diff] [blame]5428 src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5429 src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
5430 src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
5431 src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
5432 src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
5433 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]5434 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
5435 src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5436
5437SET(ALL_AVX512SKX_MICROKERNEL_SRCS
Marat Dukhan79c76ab2021-09-26 20:26:39 -0700[diff] [blame]5438 src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c
5439 src/f16-f32-vcvt/gen/vcvt-avx512skx-x32.c
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]5440 src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c
5441 src/f32-f16-vcvt/gen/vcvt-avx512skx-x32.c
Marat Dukhan2edf8632021-12-14 23:17:14 -0800[diff] [blame]5442 src/f32-qs8-vcvt/gen/vcvt-avx512skx-x32.c
5443 src/f32-qs8-vcvt/gen/vcvt-avx512skx-x64.c
5444 src/f32-qs8-vcvt/gen/vcvt-avx512skx-x96.c
5445 src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c
5446 src/f32-qu8-vcvt/gen/vcvt-avx512skx-x32.c
5447 src/f32-qu8-vcvt/gen/vcvt-avx512skx-x64.c
5448 src/f32-qu8-vcvt/gen/vcvt-avx512skx-x96.c
5449 src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]5450 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
5451 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
5452 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
5453 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -0700[diff] [blame]5454 src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
5455 src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
5456 src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
5457 src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
5458 src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
5459 src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
5460 src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
5461 src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5462 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5463 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5464 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5465 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhan98393ad2021-12-15 11:07:40 -0800[diff] [blame]5466 src/qs8-f32-vcvt/gen/vcvt-avx512skx-x16.c
5467 src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c
5468 src/qs8-f32-vcvt/gen/vcvt-avx512skx-x48.c
5469 src/qs8-f32-vcvt/gen/vcvt-avx512skx-x64.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5470 src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5471 src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5472 src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5473 src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5474 src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5475 src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5476 src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]5477 src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
Marat Dukhane76049a2021-07-22 14:48:59 -0700[diff] [blame]5478 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
5479 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c
5480 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
5481 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c
Marat Dukhancfd606b2021-07-09 01:18:45 -0700[diff] [blame]5482 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
5483 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
5484 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
5485 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhan98393ad2021-12-15 11:07:40 -0800[diff] [blame]5486 src/qu8-f32-vcvt/gen/vcvt-avx512skx-x16.c
5487 src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c
5488 src/qu8-f32-vcvt/gen/vcvt-avx512skx-x48.c
5489 src/qu8-f32-vcvt/gen/vcvt-avx512skx-x64.c
Marat Dukhan3cf2e222021-07-08 11:38:45 -0700[diff] [blame]5490 src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
5491 src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
5492 src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
5493 src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
5494 src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
5495 src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
5496 src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
Marat Dukhane76049a2021-07-22 14:48:59 -0700[diff] [blame]5497 src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
5498 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
5499 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c
5500 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
Marat Dukhan2b3c4102021-09-10 19:05:37 -0700[diff] [blame]5501 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c
5502 src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c
5503 src/x8-lut/gen/lut-avx512skx-vpshufb-x128.c
5504 src/x8-lut/gen/lut-avx512skx-vpshufb-x192.c
5505 src/x8-lut/gen/lut-avx512skx-vpshufb-x256.c)
Marat Dukhanbb00b1d2020-08-10 11:37:23 -0700[diff] [blame]5506
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5507SET(AARCH32_ASM_MICROKERNEL_SRCS
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]5508 src/f32-gemm/4x4-aarch32-vfp-ld64.S
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]5509 src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5510 src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S
5511 src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]5512 src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5513 src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]5514 src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S
Frank Barchard78735862022-01-04 16:47:44 -0800[diff] [blame]5515 src/f32-gemm/gen/4x8-minmax-aarch32-neon-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5516 src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S
Marat Dukhandc2e4372020-07-21 17:01:00 -0700[diff] [blame]5517 src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]5518 src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S
5519 src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S
5520 src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S
Frank Barchard78735862022-01-04 16:47:44 -0800[diff] [blame]5521 src/f32-igemm/gen/4x8-minmax-aarch32-neon-prfm-cortex-a75.S
Frank Barchard87fe4102021-12-28 14:42:23 -0800[diff] [blame]5522 src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-ld64.S
5523 src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-ld64.S
5524 src/qc8-gemm/gen/4x8c4-minmax-fp32-aarch32-neondot-ld64.S
5525 src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-ld64.S
5526 src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-ld64.S
Frank Barchardcccb0122022-01-04 15:24:00 -0800[diff] [blame]5527 src/qc8-igemm/gen/4x8c4-minmax-fp32-aarch32-neondot-ld64.S
5528 src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S
5529 src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S
5530 src/qs8-gemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S
5531 src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S
5532 src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S
5533 src/qs8-igemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5534
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5535SET(AARCH64_ASM_MICROKERNEL_SRCS
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]5536 src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5537 src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]5538 src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5539 src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]5540 src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard80fc5f42021-06-07 10:43:16 -0700[diff] [blame]5541 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S
Frank Barchard97374612021-06-07 11:51:07 -0700[diff] [blame]5542 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]5543 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S
5544 src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5545 src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S
5546 src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S
5547 src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S
5548 src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S
5549 src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard80fc5f42021-06-07 10:43:16 -0700[diff] [blame]5550 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S
Frank Barchard97374612021-06-07 11:51:07 -0700[diff] [blame]5551 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]5552 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S
5553 src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5554 src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S
5555 src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5556 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5557 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5558 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5559 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5560 src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5561 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S
5562 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5563 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5564 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5565 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5566 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5567 src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5568 src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5569 src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5570 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S
5571 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5572 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5573 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5574 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5575 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5576 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5577 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5578 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S
5579 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5580 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5581 src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S
5582 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S
5583 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5584 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S
5585 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S
5586 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5587 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5588 src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5589 src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5590 src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5591 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S
5592 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5593 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S
5594 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S
5595 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S
5596 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5597 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5598 src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5599 src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5600 src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S
5601 src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S
5602 src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5603 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S
5604 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S
5605 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5606 src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5607 src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5608 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barcharde3491242021-06-11 14:04:57 -0700[diff] [blame]5609 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard79cd5f92021-06-21 17:34:59 -0700[diff] [blame]5610 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5611 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
5612 src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S
5613 src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
5614 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barcharde3491242021-06-11 14:04:57 -0700[diff] [blame]5615 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard79cd5f92021-06-21 17:34:59 -0700[diff] [blame]5616 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5617 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5618 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5619 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5620 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5621 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5622 src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S
5623 src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5624 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5625 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5626 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5627 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S
5628 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S
5629 src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5630 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5631 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5632 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5633 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5634 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
5635 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S
5636 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
5637 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5638 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5639 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5640 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5641 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S
5642 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5643 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5644 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5645 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S
5646 src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5647 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5648 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5649 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5650 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5651 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
5652 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
5653 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5654 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5655 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5656 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5657 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5658 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S
5659 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S
5660 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S
5661 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]5662 src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S
5663 src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5664 src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S
5665 src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5666 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5667 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5668 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5669 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S
5670 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5671 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S
5672 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S
5673 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S
5674 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S
5675 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull.S
5676 src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5677 src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S
Frank Barchard914f57b2021-12-13 12:31:42 -0800[diff] [blame]5678 src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S
5679 src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]5680 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5681 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]5682 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5683 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5684 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5685 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5686 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5687 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]5688 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
5689 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S
5690 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
5691 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5692 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
5693 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S
5694 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barchard60729d02021-07-20 12:25:09 -0700[diff] [blame]5695 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5696 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5697 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5698 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5699 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5700 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S
5701 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S
5702 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S
5703 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S
5704 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5705 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5706 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5707 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5708 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S
5709 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S
5710 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S
5711 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S
5712 src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5713 src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S
Frank Barchard914f57b2021-12-13 12:31:42 -0800[diff] [blame]5714 src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S
5715 src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]5716 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5717 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]5718 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5719 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5720 src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5721 src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5722 src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5723 src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]5724 src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
5725 src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
5726 src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5727 src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
5728 src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5729 src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchardca4c68e2021-08-25 19:06:40 -0700[diff] [blame]5730 src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barcharddf8e6042021-09-03 13:56:29 -0700[diff] [blame]5731 src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5732 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]5733 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S
Frank Barchard9cdc10d2021-11-22 19:03:54 -0800[diff] [blame]5734 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5735 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]5736 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S
Frank Barchard9cdc10d2021-11-22 19:03:54 -0800[diff] [blame]5737 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S
Digant Desai10f9f622021-11-23 13:33:52 -0800[diff] [blame]5738 src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
Digant Desai2e2d1792021-11-24 11:06:37 -0800[diff] [blame]5739 src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]5740 src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]5741 src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchardca4c68e2021-08-25 19:06:40 -0700[diff] [blame]5742 src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barcharddf8e6042021-09-03 13:56:29 -0700[diff] [blame]5743 src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5744 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]5745 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S
Frank Barchard9cdc10d2021-11-22 19:03:54 -0800[diff] [blame]5746 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]5747 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]5748 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S
Frank Barchard9cdc10d2021-11-22 19:03:54 -0800[diff] [blame]5749 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S
Digant Desai10f9f622021-11-23 13:33:52 -0800[diff] [blame]5750 src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
Digant Desai2e2d1792021-11-24 11:06:37 -0800[diff] [blame]5751 src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]5752 src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]5753 src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5754
Marat Dukhane0f15ad2021-12-22 15:15:25 -0800[diff] [blame]5755SET(PROD_MICROKERNEL_SRCS ${PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5756SET(ALL_MICROKERNEL_SRCS ${ALL_SCALAR_MICROKERNEL_SRCS})
Chester Liu5c29c642020-12-30 09:55:57 +0800[diff] [blame]5757IF(CMAKE_SYSTEM_PROCESSOR MATCHES "^armv[5-8]" OR IOS_ARCH MATCHES "^armv7")
Marat Dukhane0f15ad2021-12-22 15:15:25 -0800[diff] [blame]5758 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SCALAR_AARCH32_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5759 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEON_MICROKERNEL_SRCS})
Marat Dukhanb4cde5a2021-11-09 10:35:17 -0800[diff] [blame]5760 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5761 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFMA_MICROKERNEL_SRCS})
5762 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONV8_MICROKERNEL_SRCS})
5763 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEON_MICROKERNEL_SRCS})
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]5764 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5765 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFMA_MICROKERNEL_SRCS})
5766 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONV8_MICROKERNEL_SRCS})
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]5767 IF(NOT IOS)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5768 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONDOT_MICROKERNEL_SRCS})
5769 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONDOT_MICROKERNEL_SRCS})
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]5770 ENDIF()
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5771 IF(XNNPACK_ENABLE_ASSEMBLY)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5772 LIST(APPEND PROD_MICROKERNEL_SRCS ${AARCH32_ASM_MICROKERNEL_SRCS})
5773 LIST(APPEND ALL_MICROKERNEL_SRCS ${AARCH32_ASM_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5774 ENDIF()
Zhi An Ng13b57dd2022-01-06 09:33:20 -0800[diff] [blame^]5775 LIST(APPEND JIT_SRCS ${JIT_AARCH32_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5776ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5777IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(aarch64|arm64)$" OR IOS_ARCH MATCHES "^arm64.*")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5778 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEON_MICROKERNEL_SRCS})
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]5779 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5780 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFMA_MICROKERNEL_SRCS})
5781 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONV8_MICROKERNEL_SRCS})
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]5782 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AARCH64_NEON_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5783 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS})
5784 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONDOT_MICROKERNEL_SRCS})
5785 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEON_MICROKERNEL_SRCS})
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]5786 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5787 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFMA_MICROKERNEL_SRCS})
5788 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONV8_MICROKERNEL_SRCS})
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]5789 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AARCH64_NEON_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5790 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS})
5791 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONDOT_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5792 IF(XNNPACK_ENABLE_ASSEMBLY)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5793 LIST(APPEND PROD_MICROKERNEL_SRCS ${AARCH64_ASM_MICROKERNEL_SRCS})
5794 LIST(APPEND ALL_MICROKERNEL_SRCS ${AARCH64_ASM_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5795 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5796ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5797IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86_64|AMD64)$" OR IOS_ARCH MATCHES "^(i386|x86_64|AMD64)$")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5798 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE_MICROKERNEL_SRCS})
5799 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE2_MICROKERNEL_SRCS})
5800 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSSE3_MICROKERNEL_SRCS})
5801 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE41_MICROKERNEL_SRCS})
5802 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX_MICROKERNEL_SRCS})
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]5803 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_F16C_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5804 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_XOP_MICROKERNEL_SRCS})
5805 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_FMA3_MICROKERNEL_SRCS})
5806 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX2_MICROKERNEL_SRCS})
5807 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX512F_MICROKERNEL_SRCS})
5808 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX512SKX_MICROKERNEL_SRCS})
5809 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE_MICROKERNEL_SRCS})
5810 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE2_MICROKERNEL_SRCS})
5811 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSSE3_MICROKERNEL_SRCS})
5812 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE41_MICROKERNEL_SRCS})
5813 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX_MICROKERNEL_SRCS})
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5814 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_F16C_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5815 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_XOP_MICROKERNEL_SRCS})
5816 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_FMA3_MICROKERNEL_SRCS})
5817 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX2_MICROKERNEL_SRCS})
5818 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX512F_MICROKERNEL_SRCS})
5819 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX512SKX_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5820ENDIF()
Marat Dukhand8a1dbe2022-01-04 22:51:23 -0800[diff] [blame]5821IF(XNNPACK_TARGET_PROCESSOR MATCHES "^riscv(32|64)$")
5822 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SCALAR_RISCV_MICROKERNEL_SRCS})
5823ENDIF()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5824ADD_LIBRARY(all_microkernels OBJECT ${ALL_MICROKERNEL_SRCS} ${TABLE_SRCS})
Marat Dukhan599d3db2021-08-03 10:50:53 -0700[diff] [blame]5825ADD_LIBRARY(indirection OBJECT src/indirection.c)
5826ADD_LIBRARY(packing OBJECT src/packing.c)
Zhi An Ngb559fe92021-12-06 09:25:38 -0800[diff] [blame]5827ADD_LIBRARY(jit OBJECT ${JIT_SRCS})
xbwee562112e2021-12-22 12:40:21 +0800[diff] [blame]5828SET_TARGET_PROPERTIES(jit PROPERTIES
xbweef98f58d2021-12-22 18:57:14 +0800[diff] [blame]5829 CXX_STANDARD 11
xbwee562112e2021-12-22 12:40:21 +0800[diff] [blame]5830 CXX_STANDARD_REQUIRED YES
5831 CXX_EXTENSIONS NO)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5832IF(XNNPACK_LIBRARY_TYPE STREQUAL "default")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5833 ADD_LIBRARY(XNNPACK ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5834ELSEIF(XNNPACK_LIBRARY_TYPE STREQUAL "shared")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5835 ADD_LIBRARY(XNNPACK SHARED ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5836ELSEIF(XNNPACK_LIBRARY_TYPE STREQUAL "static")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5837 ADD_LIBRARY(XNNPACK STATIC ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5838ELSE()
5839 MESSAGE(FATAL_ERROR "Unsupported XNNPACK library type \"${XNNPACK_LIBRARY_TYPE}\". Must be \"static\", \"shared\", or \"default\"")
5840ENDIF()
5841SET_TARGET_PROPERTIES(XNNPACK PROPERTIES
5842 C_STANDARD 99
5843 C_EXTENSIONS YES)
Marat Dukhanbd11e6a2022-01-04 15:37:48 -0800[diff] [blame]5844IF(NOT MSVC)
5845 SET_PROPERTY(SOURCE ${PROD_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -fno-math-errno ")
5846ENDIF()
Chester Liu5c29c642020-12-30 09:55:57 +0800[diff] [blame]5847IF(CMAKE_SYSTEM_PROCESSOR MATCHES "^armv[5-8]" OR IOS_ARCH MATCHES "^armv7")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5848 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -marm ")
5849 SET_PROPERTY(SOURCE ${ALL_NEON_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon ")
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]5850 SET_PROPERTY(SOURCE ${ALL_NEONFP16_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon-fp16 ")
Marat Dukhan27008092021-12-29 11:30:06 -0800[diff] [blame]5851 # GCC requires -mfp16-format=ieee to define __fp16 type, but Clang doesn't support this option at all.
5852 IF(CMAKE_C_COMPILER_ID STREQUAL "GNU")
5853 SET_PROPERTY(SOURCE ${ALL_NEONFP16_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfp16-format=ieee ")
5854 ENDIF()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5855 SET_PROPERTY(SOURCE ${ALL_NEONFMA_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon-vfpv4 ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5856 IF(IOS)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5857 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mcpu=cyclone -mtune=generic ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5858 SET_PROPERTY(SOURCE ${AARCH32_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch ${IOS_ARCH} ")
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]5859 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5860 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8-a -mfpu=neon-fp-armv8 ")
5861 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+dotprod -mfpu=neon-fp-armv8 ")
Frank Barchard9f3f4202021-12-16 18:13:51 -0800[diff] [blame]5862 SET_PROPERTY(SOURCE ${AARCH32_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+dotprod -mfpu=neon-fp-armv8 ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5863 ENDIF()
peterjc123ae2d0f62020-10-23 11:00:25 +0800[diff] [blame]5864 # Workground the neon detection bug in ARM v8
5865 # Related links:
5866 # https://github.com/android/ndk/issues/910
5867 # https://reviews.llvm.org/D58477
5868 IF(ANDROID_NDK_MAJOR AND ANDROID_NDK_MAJOR LESS 21)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5869 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfloat-abi=softfp ")
5870 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfloat-abi=softfp ")
peterjc123ae2d0f62020-10-23 11:00:25 +0800[diff] [blame]5871 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5872ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5873IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(aarch64|arm64)$" OR IOS_ARCH MATCHES "^arm64.*")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5874 SET_PROPERTY(SOURCE ${ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+fp16 ")
5875 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+dotprod ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5876 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+fp16+dotprod ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5877 IF(IOS)
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5878 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch ${IOS_ARCH} ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5879 ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5880 IF(XNNPACK_TARGET_PROCESSOR STREQUAL "arm64" AND CMAKE_HOST_SYSTEM_PROCESSOR STREQUAL "x86_64")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5881 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch arm64 ")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5882 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5883ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5884IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86|x86_64|AMD64)$" OR IOS_ARCH MATCHES "^(i386|x86_64|AMD64)$")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5885 IF(MSVC)
5886 IF(CMAKE_SYSTEM_PROCESSOR STREQUAL "x86" OR CMAKE_SIZEOF_VOID_P EQUAL 4)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5887 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE ")
5888 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
5889 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
5890 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5891 ENDIF()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5892 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5893 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5894 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
5895 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
5896 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX2 ")
5897 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX512 ")
5898 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX512 ")
peter65692c72021-08-17 23:41:05 +0800[diff] [blame]5899 IF(CMAKE_CXX_COMPILER_ID STREQUAL "Clang")
5900 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse ")
5901 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse2 ")
5902 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mssse3 ")
5903 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse4.1 ")
5904 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mavx ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5905 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mf16c ")
peter65692c72021-08-17 23:41:05 +0800[diff] [blame]5906 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mxop ")
5907 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mfma ")
5908 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mfma -clang:-mavx2 ")
5909 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mavx512f ")
5910 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRIDE PROPERTY COMPILE_FLAGS " -clang:-mavx512f -clang:-mavx512cd -clang:-mavx512bw -clang:-mavx512dq -clang:-mavx512vl ")
5911 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5912 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5913 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse ")
5914 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse2 ")
5915 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mssse3 ")
5916 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse4.1 ")
5917 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mavx ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5918 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mf16c ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5919 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mxop ")
5920 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfma ")
5921 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfma -mavx2 ")
5922 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mavx512f ")
5923 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRIDE PROPERTY COMPILE_FLAGS " -mavx512f -mavx512cd -mavx512bw -mavx512dq -mavx512vl ")
Marat Dukhan78583c72020-04-26 22:00:43 -0700[diff] [blame]5924 IF(MINGW OR CMAKE_SYSTEM_NAME MATCHES "^(CYGWIN|MSYS)$")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5925 # Work-around for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65782
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5926 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -fno-asynchronous-unwind-tables ")
5927 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -fno-asynchronous-unwind-tables ")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5928 ENDIF()
Yasuhiro Matsumoto081b77c2020-03-02 10:20:53 +0900[diff] [blame]5929 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5930ENDIF()
Marat Dukhan5fd403b2020-06-23 17:43:48 -0700[diff] [blame]5931TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE "XNN_LOG_LEVEL=$<$<CONFIG:Debug>:5>$<$<NOT:$<CONFIG:Debug>>:0>")
Marat Dukhan1e9c5ac2021-12-21 14:59:17 -0800[diff] [blame]5932TARGET_COMPILE_DEFINITIONS(jit PRIVATE "XNN_LOG_LEVEL=$<$<CONFIG:Debug>:5>$<$<NOT:$<CONFIG:Debug>>:0>")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5933IF(MSVC)
Marat Dukhanf196d012020-04-15 11:50:03 -0700[diff] [blame]5934 # Even though MSVC has __restrict, it can't be used in all the same contexts as the C99 restrict keyword
5935 TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE "restrict=")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5936 TARGET_COMPILE_DEFINITIONS(all_microkernels PRIVATE "restrict=")
5937 TARGET_COMPILE_DEFINITIONS(packing PRIVATE "restrict=")
5938 TARGET_COMPILE_DEFINITIONS(indirection PRIVATE "restrict=")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5939 IF(${CMAKE_VERSION} VERSION_LESS "3.8.0")
peterjc12360a3b192020-10-22 12:01:20 +0800[diff] [blame]5940 IF(NOT CMAKE_BUILD_TYPE STREQUAL "Debug")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5941 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O2 ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5942 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O2 ")
5943 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O1 ")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5944 ENDIF()
5945 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5946 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O2 >")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5947 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O2 >")
5948 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O1 >")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5949 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5950ELSE()
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5951 IF(${CMAKE_VERSION} VERSION_LESS "3.8.0")
5952 IF(NOT CMAKE_BUILD_TYPE STREQUAL "Debug")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5953 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -O2 ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5954 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -O2 ")
5955 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -Os ")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5956 ENDIF()
5957 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5958 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -O2 >")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5959 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -O2 >")
5960 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -Os >")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5961 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5962ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5963
5964TARGET_INCLUDE_DIRECTORIES(XNNPACK PUBLIC include)
5965TARGET_INCLUDE_DIRECTORIES(XNNPACK PRIVATE src)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5966TARGET_INCLUDE_DIRECTORIES(all_microkernels PRIVATE include src)
5967TARGET_INCLUDE_DIRECTORIES(packing PRIVATE include src)
5968TARGET_INCLUDE_DIRECTORIES(indirection PRIVATE include src)
Zhi An Ngb559fe92021-12-06 09:25:38 -0800[diff] [blame]5969TARGET_INCLUDE_DIRECTORIES(jit PRIVATE include src)
Marat Dukhan6ae741a2020-04-13 02:33:53 -0700[diff] [blame]5970IF(WIN32)
5971 # Target Windows 7+ API
5972 TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE _WIN32_WINNT=0x0601)
5973ENDIF()
Ashkan Aliabadid255a312019-12-03 12:44:34 -0800[diff] [blame]5974SET_TARGET_PROPERTIES(XNNPACK PROPERTIES PUBLIC_HEADER include/xnnpack.h)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5975
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5976# ---[ Find libm
5977FIND_LIBRARY(LIBM m)
5978IF(LIBM)
5979 TARGET_LINK_LIBRARIES(XNNPACK PRIVATE ${LIBM})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5980 TARGET_LINK_LIBRARIES(all_microkernels PRIVATE ${LIBM})
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5981ENDIF()
5982
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5983# ---[ Configure clog
5984IF(NOT TARGET clog)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5985 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5986 SET(CLOG_BUILD_TESTS OFF CACHE BOOL "")
5987 SET(CLOG_RUNTIME_TYPE "${CPUINFO_RUNTIME_TYPE}" CACHE STRING "")
5988 ADD_SUBDIRECTORY(
5989 "${CLOG_SOURCE_DIR}/deps/clog"
5990 "${CMAKE_BINARY_DIR}/clog")
5991 # We build static version of clog but a dynamic library may indirectly depend on it
5992 SET_PROPERTY(TARGET clog PROPERTY POSITION_INDEPENDENT_CODE ON)
5993 ELSE()
5994 ADD_LIBRARY(clog STATIC IMPORTED)
5995 FIND_LIBRARY(CLOG_LIBRARY clog)
5996 IF(NOT CLOG_LIBRARY)
5997 MESSAGE(FATAL_ERROR "Cannot find clog")
5998 ENDIF()
5999 SET_PROPERTY(TARGET clog PROPERTY IMPORTED_LOCATION "${CLOG_LIBRARY}")
6000 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6001ENDIF()
6002TARGET_LINK_LIBRARIES(XNNPACK PRIVATE clog)
Marat Dukhan1e9c5ac2021-12-21 14:59:17 -0800[diff] [blame]6003TARGET_LINK_LIBRARIES(jit PRIVATE clog)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6004
6005# ---[ Configure cpuinfo
6006IF(NOT TARGET cpuinfo)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]6007 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
6008 SET(CPUINFO_BUILD_TOOLS OFF CACHE BOOL "")
6009 SET(CPUINFO_BUILD_UNIT_TESTS OFF CACHE BOOL "")
6010 SET(CPUINFO_BUILD_MOCK_TESTS OFF CACHE BOOL "")
6011 SET(CPUINFO_BUILD_BENCHMARKS OFF CACHE BOOL "")
6012 ADD_SUBDIRECTORY(
6013 "${CPUINFO_SOURCE_DIR}"
6014 "${CMAKE_BINARY_DIR}/cpuinfo")
6015 ELSE()
6016 ADD_LIBRARY(cpuinfo SHARED IMPORTED)
6017 FIND_LIBRARY(CPUINFO_LIBRARY cpuinfo)
6018 IF(NOT CPUINFO_LIBRARY)
6019 MESSAGE(FATAL_ERROR "Cannot find cpuinfo")
6020 ENDIF()
6021 SET_PROPERTY(TARGET cpuinfo PROPERTY IMPORTED_LOCATION "${CPUINFO_LIBRARY}")
6022 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6023ENDIF()
6024TARGET_LINK_LIBRARIES(XNNPACK PRIVATE cpuinfo)
6025
6026# ---[ Configure pthreadpool
6027IF(NOT TARGET pthreadpool)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]6028 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
6029 SET(PTHREADPOOL_BUILD_TESTS OFF CACHE BOOL "")
6030 SET(PTHREADPOOL_BUILD_BENCHMARKS OFF CACHE BOOL "")
6031 SET(PTHREADPOOL_ALLOW_DEPRECATED_API OFF CACHE BOOL "")
6032 ADD_SUBDIRECTORY(
6033 "${PTHREADPOOL_SOURCE_DIR}"
6034 "${CMAKE_BINARY_DIR}/pthreadpool")
6035 ELSE()
6036 ADD_LIBRARY(pthreadpool SHARED IMPORTED)
6037 FIND_LIBRARY(PTHREADPOOL_LIBRARY pthreadpool)
6038 IF(NOT PTHREADPOOL_LIBRARY)
6039 MESSAGE(FATAL_ERROR "Cannot find pthreadpool")
6040 ENDIF()
6041 SET_PROPERTY(TARGET pthreadpool PROPERTY IMPORTED_LOCATION "${PTHREADPOOL_LIBRARY}")
6042 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6043ENDIF()
6044TARGET_LINK_LIBRARIES(XNNPACK PUBLIC pthreadpool)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6045TARGET_LINK_LIBRARIES(all_microkernels PRIVATE pthreadpool)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6046TARGET_LINK_LIBRARIES(indirection PRIVATE pthreadpool)
Marat Dukhan1e9c5ac2021-12-21 14:59:17 -0800[diff] [blame]6047TARGET_LINK_LIBRARIES(jit PRIVATE pthreadpool)
6048TARGET_LINK_LIBRARIES(packing PRIVATE pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6049
6050# ---[ Configure FXdiv
6051IF(NOT TARGET fxdiv)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]6052 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
6053 SET(FXDIV_BUILD_TESTS OFF CACHE BOOL "")
6054 SET(FXDIV_BUILD_BENCHMARKS OFF CACHE BOOL "")
6055 ADD_SUBDIRECTORY(
6056 "${FXDIV_SOURCE_DIR}"
6057 "${CMAKE_BINARY_DIR}/FXdiv")
6058 ELSE()
6059 FIND_FILE(FXDIV_HDR fxdiv.h PATH_SUFFIXES include)
6060 IF(NOT FXDIV_HDR)
6061 MESSAGE(FATAL_ERROR "Cannot find fxdiv")
6062 ENDIF()
6063 ADD_LIBRARY(fxdiv STATIC "${FXDIV_HDR}")
6064 SET_PROPERTY(TARGET fxdiv PROPERTY LINKER_LANGUAGE C)
6065 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6066ENDIF()
6067TARGET_LINK_LIBRARIES(XNNPACK PRIVATE fxdiv)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6068TARGET_LINK_LIBRARIES(all_microkernels PRIVATE fxdiv)
6069TARGET_LINK_LIBRARIES(indirection PRIVATE fxdiv)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6070
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6071# ---[ Configure FP16
6072IF(NOT TARGET fp16)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]6073 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
6074 SET(FP16_BUILD_TESTS OFF CACHE BOOL "")
6075 SET(FP16_BUILD_BENCHMARKS OFF CACHE BOOL "")
6076 ADD_SUBDIRECTORY(
6077 "${FP16_SOURCE_DIR}"
6078 "${CMAKE_BINARY_DIR}/FP16")
6079 ELSE()
6080 FIND_FILE(FP16_HDR fp16.h PATH_SUFFIXES include)
6081 IF(NOT FP16_HDR)
6082 MESSAGE(FATAL_ERROR "Cannot find fp16")
6083 ENDIF()
6084 ADD_LIBRARY(fp16 STATIC "${FP16_HDR}")
6085 SET_PROPERTY(TARGET fp16 PROPERTY LINKER_LANGUAGE C)
6086 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6087ENDIF()
6088TARGET_LINK_LIBRARIES(XNNPACK PRIVATE fp16)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6089TARGET_LINK_LIBRARIES(all_microkernels PRIVATE fp16)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6090
6091INSTALL(TARGETS XNNPACK
6092 LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR}
6093 ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR}
6094 PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_INCLUDEDIR})
6095
6096# ---[ XNNPACK unit tests
6097IF(XNNPACK_BUILD_TESTS)
6098 # ---[ Build google test
6099 IF(NOT TARGET gtest)
6100 SET(gtest_force_shared_crt ON CACHE BOOL "" FORCE)
6101 ADD_SUBDIRECTORY(
6102 "${GOOGLETEST_SOURCE_DIR}"
6103 "${CMAKE_BINARY_DIR}/googletest")
6104 ENDIF()
6105
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]6106 # ---[ Build size tests
6107
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]6108 ADD_EXECUTABLE(operator-size-test test/operator-size.c)
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]6109 SET_TARGET_PROPERTIES(operator-size-test PROPERTIES
6110 C_STANDARD 99
6111 C_EXTENSIONS NO)
6112 TARGET_LINK_LIBRARIES(operator-size-test PRIVATE XNNPACK)
6113
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]6114 ADD_EXECUTABLE(subgraph-size-test test/subgraph-size.c)
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]6115 SET_TARGET_PROPERTIES(subgraph-size-test PROPERTIES
6116 C_STANDARD 99
6117 C_EXTENSIONS NO)
6118 TARGET_LINK_LIBRARIES(subgraph-size-test PRIVATE XNNPACK)
6119
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6120 # ---[ Build operator-level unit tests
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]6121 ADD_EXECUTABLE(abs-nc-test test/abs-nc.cc)
6122 SET_TARGET_PROPERTIES(abs-nc-test PROPERTIES
6123 CXX_STANDARD 11
6124 CXX_STANDARD_REQUIRED YES
6125 CXX_EXTENSIONS NO)
6126 TARGET_INCLUDE_DIRECTORIES(abs-nc-test PRIVATE src test)
6127 TARGET_LINK_LIBRARIES(abs-nc-test PRIVATE XNNPACK gtest gtest_main)
6128 ADD_TEST(abs-nc-test abs-nc-test)
6129
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]6130 ADD_EXECUTABLE(add-nd-test test/add-nd.cc)
6131 SET_TARGET_PROPERTIES(add-nd-test PROPERTIES
6132 CXX_STANDARD 11
6133 CXX_STANDARD_REQUIRED YES
6134 CXX_EXTENSIONS NO)
6135 TARGET_INCLUDE_DIRECTORIES(add-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6136 TARGET_LINK_LIBRARIES(add-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]6137 ADD_TEST(add-nd-test add-nd-test)
6138
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6139 ADD_EXECUTABLE(argmax-pooling-nhwc-test test/argmax-pooling-nhwc.cc)
6140 SET_TARGET_PROPERTIES(argmax-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6141 CXX_STANDARD 11
6142 CXX_STANDARD_REQUIRED YES
6143 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6144 TARGET_INCLUDE_DIRECTORIES(argmax-pooling-nhwc-test PRIVATE src test)
6145 TARGET_LINK_LIBRARIES(argmax-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
6146 ADD_TEST(argmax-pooling-nhwc-test argmax-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6147
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6148 ADD_EXECUTABLE(average-pooling-nhwc-test test/average-pooling-nhwc.cc)
6149 SET_TARGET_PROPERTIES(average-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6150 CXX_STANDARD 11
6151 CXX_STANDARD_REQUIRED YES
6152 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6153 TARGET_INCLUDE_DIRECTORIES(average-pooling-nhwc-test PRIVATE src test)
6154 TARGET_LINK_LIBRARIES(average-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
6155 ADD_TEST(average-pooling-nhwc-test average-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6156
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]6157 ADD_EXECUTABLE(bankers-rounding-nc-test test/bankers-rounding-nc.cc)
6158 SET_TARGET_PROPERTIES(bankers-rounding-nc-test PROPERTIES
6159 CXX_STANDARD 11
6160 CXX_STANDARD_REQUIRED YES
6161 CXX_EXTENSIONS NO)
6162 TARGET_INCLUDE_DIRECTORIES(bankers-rounding-nc-test PRIVATE src test)
6163 TARGET_LINK_LIBRARIES(bankers-rounding-nc-test PRIVATE XNNPACK gtest gtest_main)
6164 ADD_TEST(bankers-rounding-nc-test bankers-rounding-nc-test)
6165
6166 ADD_EXECUTABLE(ceiling-nc-test test/ceiling-nc.cc)
6167 SET_TARGET_PROPERTIES(ceiling-nc-test PROPERTIES
6168 CXX_STANDARD 11
6169 CXX_STANDARD_REQUIRED YES
6170 CXX_EXTENSIONS NO)
6171 TARGET_INCLUDE_DIRECTORIES(ceiling-nc-test PRIVATE src test)
6172 TARGET_LINK_LIBRARIES(ceiling-nc-test PRIVATE XNNPACK gtest gtest_main)
6173 ADD_TEST(ceiling-nc-test ceiling-nc-test)
6174
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6175 ADD_EXECUTABLE(channel-shuffle-nc-test test/channel-shuffle-nc.cc)
6176 SET_TARGET_PROPERTIES(channel-shuffle-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6177 CXX_STANDARD 11
6178 CXX_STANDARD_REQUIRED YES
6179 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6180 TARGET_INCLUDE_DIRECTORIES(channel-shuffle-nc-test PRIVATE src test)
6181 TARGET_LINK_LIBRARIES(channel-shuffle-nc-test PRIVATE XNNPACK gtest gtest_main)
6182 ADD_TEST(channel-shuffle-nc-test channel-shuffle-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6183
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6184 ADD_EXECUTABLE(clamp-nc-test test/clamp-nc.cc)
6185 SET_TARGET_PROPERTIES(clamp-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6186 CXX_STANDARD 11
6187 CXX_STANDARD_REQUIRED YES
6188 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6189 TARGET_INCLUDE_DIRECTORIES(clamp-nc-test PRIVATE src test)
6190 TARGET_LINK_LIBRARIES(clamp-nc-test PRIVATE XNNPACK gtest gtest_main)
6191 ADD_TEST(clamp-nc-test clamp-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6192
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]6193 ADD_EXECUTABLE(constant-pad-nd-test test/constant-pad-nd.cc)
6194 SET_TARGET_PROPERTIES(constant-pad-nd-test PROPERTIES
6195 CXX_STANDARD 11
6196 CXX_STANDARD_REQUIRED YES
6197 CXX_EXTENSIONS NO)
6198 TARGET_INCLUDE_DIRECTORIES(constant-pad-nd-test PRIVATE src test)
6199 TARGET_LINK_LIBRARIES(constant-pad-nd-test PRIVATE XNNPACK gtest gtest_main)
6200 ADD_TEST(constant-pad-nd-test constant-pad-nd-test)
6201
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]6202 ADD_EXECUTABLE(convert-nc-test test/convert-nc.cc)
6203 SET_TARGET_PROPERTIES(convert-nc-test PROPERTIES
6204 CXX_STANDARD 11
6205 CXX_STANDARD_REQUIRED YES
6206 CXX_EXTENSIONS YES)
6207 TARGET_INCLUDE_DIRECTORIES(convert-nc-test PRIVATE src test)
6208 TARGET_LINK_LIBRARIES(convert-nc-test PRIVATE XNNPACK fp16 gtest gtest_main)
6209 ADD_TEST(convert-nc-test convert-nc-test)
6210
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6211 ADD_EXECUTABLE(convolution-nhwc-test test/convolution-nhwc.cc)
6212 SET_TARGET_PROPERTIES(convolution-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6213 CXX_STANDARD 11
6214 CXX_STANDARD_REQUIRED YES
Marat Dukhan258b6392021-06-29 19:18:09 -0700[diff] [blame]6215 CXX_EXTENSIONS YES)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6216 TARGET_INCLUDE_DIRECTORIES(convolution-nhwc-test PRIVATE src test)
Frank Barchard49b4dcc2020-06-26 14:07:19 -0700[diff] [blame]6217 TARGET_LINK_LIBRARIES(convolution-nhwc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6218 ADD_TEST(convolution-nhwc-test convolution-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6219
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6220 ADD_EXECUTABLE(convolution-nchw-test test/convolution-nchw.cc)
6221 SET_TARGET_PROPERTIES(convolution-nchw-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6222 CXX_STANDARD 11
6223 CXX_STANDARD_REQUIRED YES
Marat Dukhan258b6392021-06-29 19:18:09 -0700[diff] [blame]6224 CXX_EXTENSIONS YES)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6225 TARGET_INCLUDE_DIRECTORIES(convolution-nchw-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6226 TARGET_LINK_LIBRARIES(convolution-nchw-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6227 ADD_TEST(convolution-nchw-test convolution-nchw-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6228
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]6229 ADD_EXECUTABLE(copy-nc-test test/copy-nc.cc)
6230 SET_TARGET_PROPERTIES(copy-nc-test PROPERTIES
6231 CXX_STANDARD 11
6232 CXX_STANDARD_REQUIRED YES
6233 CXX_EXTENSIONS NO)
6234 TARGET_INCLUDE_DIRECTORIES(copy-nc-test PRIVATE src test)
6235 TARGET_LINK_LIBRARIES(copy-nc-test PRIVATE XNNPACK gtest gtest_main)
6236 ADD_TEST(copy-nc-test copy-nc-test)
6237
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6238 ADD_EXECUTABLE(deconvolution-nhwc-test test/deconvolution-nhwc.cc)
6239 SET_TARGET_PROPERTIES(deconvolution-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6240 CXX_STANDARD 11
6241 CXX_STANDARD_REQUIRED YES
6242 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6243 TARGET_INCLUDE_DIRECTORIES(deconvolution-nhwc-test PRIVATE src test)
6244 TARGET_LINK_LIBRARIES(deconvolution-nhwc-test PRIVATE XNNPACK gtest gtest_main)
6245 ADD_TEST(deconvolution-nhwc-test deconvolution-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6246
Marat Dukhan188d1042020-11-24 23:39:40 -0800[diff] [blame]6247 ADD_EXECUTABLE(depth-to-space-nchw2nhwc-test test/depth-to-space-nchw2nhwc.cc)
6248 SET_TARGET_PROPERTIES(depth-to-space-nchw2nhwc-test PROPERTIES
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -0800[diff] [blame]6249 CXX_STANDARD 11
6250 CXX_STANDARD_REQUIRED YES
6251 CXX_EXTENSIONS NO)
Marat Dukhan188d1042020-11-24 23:39:40 -0800[diff] [blame]6252 TARGET_INCLUDE_DIRECTORIES(depth-to-space-nchw2nhwc-test PRIVATE src test)
6253 TARGET_LINK_LIBRARIES(depth-to-space-nchw2nhwc-test PRIVATE XNNPACK gtest gtest_main)
6254 ADD_TEST(depth-to-space-nchw2nhwc-test depth-to-space-nchw2nhwc-test)
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -0800[diff] [blame]6255
Marat Dukhan0e521172020-11-25 13:10:04 -0800[diff] [blame]6256 ADD_EXECUTABLE(depth-to-space-nhwc-test test/depth-to-space-nhwc.cc)
6257 SET_TARGET_PROPERTIES(depth-to-space-nhwc-test PROPERTIES
6258 CXX_STANDARD 11
6259 CXX_STANDARD_REQUIRED YES
6260 CXX_EXTENSIONS NO)
6261 TARGET_INCLUDE_DIRECTORIES(depth-to-space-nhwc-test PRIVATE src test)
6262 TARGET_LINK_LIBRARIES(depth-to-space-nhwc-test PRIVATE XNNPACK gtest gtest_main)
6263 ADD_TEST(depth-to-space-nhwc-test depth-to-space-nhwc-test)
6264
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]6265 ADD_EXECUTABLE(divide-nd-test test/divide-nd.cc)
6266 SET_TARGET_PROPERTIES(divide-nd-test PROPERTIES
6267 CXX_STANDARD 11
6268 CXX_STANDARD_REQUIRED YES
6269 CXX_EXTENSIONS NO)
6270 TARGET_INCLUDE_DIRECTORIES(divide-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6271 TARGET_LINK_LIBRARIES(divide-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]6272 ADD_TEST(divide-nd-test divide-nd-test)
6273
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]6274 ADD_EXECUTABLE(elu-nc-test test/elu-nc.cc)
6275 SET_TARGET_PROPERTIES(elu-nc-test PROPERTIES
6276 CXX_STANDARD 11
6277 CXX_STANDARD_REQUIRED YES
6278 CXX_EXTENSIONS NO)
6279 TARGET_INCLUDE_DIRECTORIES(elu-nc-test PRIVATE src test)
6280 TARGET_LINK_LIBRARIES(elu-nc-test PRIVATE XNNPACK gtest gtest_main)
6281 ADD_TEST(elu-nc-test elu-nc-test)
6282
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6283 ADD_EXECUTABLE(fully-connected-nc-test test/fully-connected-nc.cc)
6284 SET_TARGET_PROPERTIES(fully-connected-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6285 CXX_STANDARD 11
6286 CXX_STANDARD_REQUIRED YES
6287 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6288 TARGET_INCLUDE_DIRECTORIES(fully-connected-nc-test PRIVATE src test)
Marat Dukhanddb3d162021-10-25 17:05:51 -0700[diff] [blame]6289 TARGET_LINK_LIBRARIES(fully-connected-nc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6290 ADD_TEST(fully-connected-nc-test fully-connected-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6291
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]6292 ADD_EXECUTABLE(floor-nc-test test/floor-nc.cc)
6293 SET_TARGET_PROPERTIES(floor-nc-test PROPERTIES
6294 CXX_STANDARD 11
6295 CXX_STANDARD_REQUIRED YES
6296 CXX_EXTENSIONS NO)
6297 TARGET_INCLUDE_DIRECTORIES(floor-nc-test PRIVATE src test)
6298 TARGET_LINK_LIBRARIES(floor-nc-test PRIVATE XNNPACK gtest gtest_main)
6299 ADD_TEST(floor-nc-test floor-nc-test)
6300
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6301 ADD_EXECUTABLE(global-average-pooling-nwc-test test/global-average-pooling-nwc.cc)
6302 SET_TARGET_PROPERTIES(global-average-pooling-nwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6303 CXX_STANDARD 11
6304 CXX_STANDARD_REQUIRED YES
6305 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6306 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-nwc-test PRIVATE src test)
Marat Dukhanef61d022020-06-19 13:54:49 -0700[diff] [blame]6307 TARGET_LINK_LIBRARIES(global-average-pooling-nwc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6308 ADD_TEST(global-average-pooling-nwc-test global-average-pooling-nwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6309
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6310 ADD_EXECUTABLE(global-average-pooling-ncw-test test/global-average-pooling-ncw.cc)
6311 SET_TARGET_PROPERTIES(global-average-pooling-ncw-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6312 CXX_STANDARD 11
6313 CXX_STANDARD_REQUIRED YES
6314 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6315 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-ncw-test PRIVATE src test)
Marat Dukhan5fd403b2020-06-23 17:43:48 -0700[diff] [blame]6316 TARGET_LINK_LIBRARIES(global-average-pooling-ncw-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6317 ADD_TEST(global-average-pooling-ncw-test global-average-pooling-ncw-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6318
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6319 ADD_EXECUTABLE(hardswish-nc-test test/hardswish-nc.cc)
6320 SET_TARGET_PROPERTIES(hardswish-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6321 CXX_STANDARD 11
6322 CXX_STANDARD_REQUIRED YES
6323 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6324 TARGET_INCLUDE_DIRECTORIES(hardswish-nc-test PRIVATE src test)
Marat Dukhanae24dfc2020-09-23 17:12:45 -0700[diff] [blame]6325 TARGET_LINK_LIBRARIES(hardswish-nc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6326 ADD_TEST(hardswish-nc-test hardswish-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6327
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6328 ADD_EXECUTABLE(leaky-relu-nc-test test/leaky-relu-nc.cc)
6329 SET_TARGET_PROPERTIES(leaky-relu-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6330 CXX_STANDARD 11
6331 CXX_STANDARD_REQUIRED YES
6332 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6333 TARGET_INCLUDE_DIRECTORIES(leaky-relu-nc-test PRIVATE src test)
6334 TARGET_LINK_LIBRARIES(leaky-relu-nc-test PRIVATE XNNPACK gtest gtest_main)
6335 ADD_TEST(leaky-relu-nc-test leaky-relu-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6336
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6337 ADD_EXECUTABLE(max-pooling-nhwc-test test/max-pooling-nhwc.cc)
6338 SET_TARGET_PROPERTIES(max-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6339 CXX_STANDARD 11
6340 CXX_STANDARD_REQUIRED YES
6341 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6342 TARGET_INCLUDE_DIRECTORIES(max-pooling-nhwc-test PRIVATE src test)
6343 TARGET_LINK_LIBRARIES(max-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
6344 ADD_TEST(max-pooling-nhwc-test max-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6345
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6346 ADD_EXECUTABLE(maximum-nd-test test/maximum-nd.cc)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]6347 SET_TARGET_PROPERTIES(maximum-nd-test PROPERTIES
6348 CXX_STANDARD 11
6349 CXX_STANDARD_REQUIRED YES
6350 CXX_EXTENSIONS NO)
6351 TARGET_INCLUDE_DIRECTORIES(maximum-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6352 TARGET_LINK_LIBRARIES(maximum-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]6353 ADD_TEST(maximum-nd-test maximum-nd-test)
6354
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6355 ADD_EXECUTABLE(minimum-nd-test test/minimum-nd.cc)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]6356 SET_TARGET_PROPERTIES(minimum-nd-test PROPERTIES
6357 CXX_STANDARD 11
6358 CXX_STANDARD_REQUIRED YES
6359 CXX_EXTENSIONS NO)
6360 TARGET_INCLUDE_DIRECTORIES(minimum-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6361 TARGET_LINK_LIBRARIES(minimum-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]6362 ADD_TEST(minimum-nd-test minimum-nd-test)
6363
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6364 ADD_EXECUTABLE(multiply-nd-test test/multiply-nd.cc)
6365 SET_TARGET_PROPERTIES(multiply-nd-test PROPERTIES
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]6366 CXX_STANDARD 11
6367 CXX_STANDARD_REQUIRED YES
6368 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6369 TARGET_INCLUDE_DIRECTORIES(multiply-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6370 TARGET_LINK_LIBRARIES(multiply-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6371 ADD_TEST(multiply-nd-test multiply-nd-test)
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]6372
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]6373 ADD_EXECUTABLE(negate-nc-test test/negate-nc.cc)
6374 SET_TARGET_PROPERTIES(negate-nc-test PROPERTIES
6375 CXX_STANDARD 11
6376 CXX_STANDARD_REQUIRED YES
6377 CXX_EXTENSIONS NO)
6378 TARGET_INCLUDE_DIRECTORIES(negate-nc-test PRIVATE src test)
6379 TARGET_LINK_LIBRARIES(negate-nc-test PRIVATE XNNPACK gtest gtest_main)
6380 ADD_TEST(negate-nc-test negate-nc-test)
6381
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6382 ADD_EXECUTABLE(prelu-nc-test test/prelu-nc.cc)
6383 SET_TARGET_PROPERTIES(prelu-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6384 CXX_STANDARD 11
6385 CXX_STANDARD_REQUIRED YES
6386 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6387 TARGET_INCLUDE_DIRECTORIES(prelu-nc-test PRIVATE src test)
6388 TARGET_LINK_LIBRARIES(prelu-nc-test PRIVATE XNNPACK gtest gtest_main)
6389 ADD_TEST(prelu-nc-test prelu-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6390
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6391 ADD_EXECUTABLE(resize-bilinear-nhwc-test test/resize-bilinear-nhwc.cc)
6392 SET_TARGET_PROPERTIES(resize-bilinear-nhwc-test PROPERTIES
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]6393 CXX_STANDARD 11
6394 CXX_STANDARD_REQUIRED YES
6395 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6396 TARGET_INCLUDE_DIRECTORIES(resize-bilinear-nhwc-test PRIVATE src test)
6397 TARGET_LINK_LIBRARIES(resize-bilinear-nhwc-test PRIVATE XNNPACK gtest gtest_main)
6398 ADD_TEST(resize-bilinear-nhwc-test resize-bilinear-nhwc-test)
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]6399
Artsiom Ablavatski97918102020-10-27 15:52:59 -0700[diff] [blame]6400 ADD_EXECUTABLE(resize-bilinear-nchw-test test/resize-bilinear-nchw.cc)
6401 SET_TARGET_PROPERTIES(resize-bilinear-nchw-test PROPERTIES
6402 CXX_STANDARD 11
6403 CXX_STANDARD_REQUIRED YES
6404 CXX_EXTENSIONS NO)
6405 TARGET_INCLUDE_DIRECTORIES(resize-bilinear-nchw-test PRIVATE src test)
6406 TARGET_LINK_LIBRARIES(resize-bilinear-nchw-test PRIVATE XNNPACK gtest gtest_main)
6407 ADD_TEST(resize-bilinear-nchw-test resize-bilinear-nchw-test)
6408
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6409 ADD_EXECUTABLE(sigmoid-nc-test test/sigmoid-nc.cc)
6410 SET_TARGET_PROPERTIES(sigmoid-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6411 CXX_STANDARD 11
6412 CXX_STANDARD_REQUIRED YES
6413 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6414 TARGET_INCLUDE_DIRECTORIES(sigmoid-nc-test PRIVATE src test)
6415 TARGET_LINK_LIBRARIES(sigmoid-nc-test PRIVATE XNNPACK gtest gtest_main)
6416 ADD_TEST(sigmoid-nc-test sigmoid-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6417
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]6418 ADD_EXECUTABLE(softmax-nc-test test/softmax-nc.cc)
6419 SET_TARGET_PROPERTIES(softmax-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6420 CXX_STANDARD 11
6421 CXX_STANDARD_REQUIRED YES
6422 CXX_EXTENSIONS NO)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]6423 TARGET_INCLUDE_DIRECTORIES(softmax-nc-test PRIVATE src test)
6424 TARGET_LINK_LIBRARIES(softmax-nc-test PRIVATE XNNPACK gtest gtest_main)
6425 ADD_TEST(softmax-nc-test softmax-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6426
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]6427 ADD_EXECUTABLE(square-nc-test test/square-nc.cc)
6428 SET_TARGET_PROPERTIES(square-nc-test PROPERTIES
6429 CXX_STANDARD 11
6430 CXX_STANDARD_REQUIRED YES
6431 CXX_EXTENSIONS NO)
6432 TARGET_INCLUDE_DIRECTORIES(square-nc-test PRIVATE src test)
6433 TARGET_LINK_LIBRARIES(square-nc-test PRIVATE XNNPACK gtest gtest_main)
6434 ADD_TEST(square-nc-test square-nc-test)
6435
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]6436 ADD_EXECUTABLE(square-root-nc-test test/square-root-nc.cc)
6437 SET_TARGET_PROPERTIES(square-root-nc-test PROPERTIES
6438 CXX_STANDARD 11
6439 CXX_STANDARD_REQUIRED YES
6440 CXX_EXTENSIONS NO)
6441 TARGET_INCLUDE_DIRECTORIES(square-root-nc-test PRIVATE src test)
6442 TARGET_LINK_LIBRARIES(square-root-nc-test PRIVATE XNNPACK gtest gtest_main)
6443 ADD_TEST(square-root-nc-test square-root-nc-test)
6444
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]6445 ADD_EXECUTABLE(squared-difference-nd-test test/squared-difference-nd.cc)
6446 SET_TARGET_PROPERTIES(squared-difference-nd-test PROPERTIES
6447 CXX_STANDARD 11
6448 CXX_STANDARD_REQUIRED YES
6449 CXX_EXTENSIONS NO)
6450 TARGET_INCLUDE_DIRECTORIES(squared-difference-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6451 TARGET_LINK_LIBRARIES(squared-difference-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]6452 ADD_TEST(squared-difference-nd-test squared-difference-nd-test)
6453
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]6454 ADD_EXECUTABLE(subtract-nd-test test/subtract-nd.cc)
6455 SET_TARGET_PROPERTIES(subtract-nd-test PROPERTIES
6456 CXX_STANDARD 11
6457 CXX_STANDARD_REQUIRED YES
6458 CXX_EXTENSIONS NO)
6459 TARGET_INCLUDE_DIRECTORIES(subtract-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6460 TARGET_LINK_LIBRARIES(subtract-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]6461 ADD_TEST(subtract-nd-test subtract-nd-test)
6462
Marat Dukhan5de7bc02021-09-09 19:04:01 -0700[diff] [blame]6463 ADD_EXECUTABLE(tanh-nc-test test/tanh-nc.cc)
6464 SET_TARGET_PROPERTIES(tanh-nc-test PROPERTIES
6465 CXX_STANDARD 11
6466 CXX_STANDARD_REQUIRED YES
6467 CXX_EXTENSIONS NO)
6468 TARGET_INCLUDE_DIRECTORIES(tanh-nc-test PRIVATE src test)
6469 TARGET_LINK_LIBRARIES(tanh-nc-test PRIVATE XNNPACK gtest gtest_main)
6470 ADD_TEST(tanh-nc-test tanh-nc-test)
6471
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]6472 ADD_EXECUTABLE(truncation-nc-test test/truncation-nc.cc)
6473 SET_TARGET_PROPERTIES(truncation-nc-test PROPERTIES
6474 CXX_STANDARD 11
6475 CXX_STANDARD_REQUIRED YES
6476 CXX_EXTENSIONS NO)
6477 TARGET_INCLUDE_DIRECTORIES(truncation-nc-test PRIVATE src test)
6478 TARGET_LINK_LIBRARIES(truncation-nc-test PRIVATE XNNPACK gtest gtest_main)
6479 ADD_TEST(truncation-nc-test truncation-nc-test)
6480
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6481 ADD_EXECUTABLE(unpooling-nhwc-test test/unpooling-nhwc.cc)
6482 SET_TARGET_PROPERTIES(unpooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6483 CXX_STANDARD 11
6484 CXX_STANDARD_REQUIRED YES
6485 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6486 TARGET_INCLUDE_DIRECTORIES(unpooling-nhwc-test PRIVATE src test)
6487 TARGET_LINK_LIBRARIES(unpooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
6488 ADD_TEST(unpooling-nhwc-test unpooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6489
XNNPACK Teamab8c4c82020-10-09 08:05:51 -0700[diff] [blame]6490 ADD_EXECUTABLE(memory-planner-test test/memory-planner-test.cc)
6491 SET_TARGET_PROPERTIES(memory-planner-test PROPERTIES
6492 C_STANDARD 11
6493 CXX_STANDARD_REQUIRED YES
6494 C_EXTENSIONS NO)
6495 TARGET_INCLUDE_DIRECTORIES(memory-planner-test PRIVATE src test)
6496 TARGET_LINK_LIBRARIES(memory-planner-test PRIVATE XNNPACK gtest gtest_main)
6497 ADD_TEST(memory-planner-test memory-planner-test)
6498
6499 ADD_EXECUTABLE(subgraph-nchw-test test/subgraph-nchw.cc)
6500 SET_TARGET_PROPERTIES(subgraph-nchw-test PROPERTIES
6501 C_STANDARD 11
6502 CXX_STANDARD_REQUIRED YES
6503 C_EXTENSIONS NO)
6504 TARGET_INCLUDE_DIRECTORIES(subgraph-nchw-test PRIVATE src test)
6505 TARGET_LINK_LIBRARIES(subgraph-nchw-test PRIVATE XNNPACK gtest gtest_main)
6506 ADD_TEST(subgraph-nchw-test subgraph-nchw-test)
6507
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6508 # ---[ Build microkernel-level unit tests
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]6509 ADD_EXECUTABLE(f16-f32-vcvt-test test/f16-f32-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
6510 SET_TARGET_PROPERTIES(f16-f32-vcvt-test PROPERTIES
6511 CXX_STANDARD 11
6512 CXX_STANDARD_REQUIRED YES
6513 CXX_EXTENSIONS YES)
6514 TARGET_INCLUDE_DIRECTORIES(f16-f32-vcvt-test PRIVATE include src test)
6515 TARGET_LINK_LIBRARIES(f16-f32-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6516 ADD_TEST(f16-f32-vcvt-test f16-f32-vcvt-test)
6517
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6518 ADD_EXECUTABLE(f16-dwconv-minmax-test test/f16-dwconv-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]6519 SET_TARGET_PROPERTIES(f16-dwconv-minmax-test PROPERTIES
6520 CXX_STANDARD 11
6521 CXX_STANDARD_REQUIRED YES
6522 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6523 TARGET_INCLUDE_DIRECTORIES(f16-dwconv-minmax-test PRIVATE include src test)
6524 TARGET_LINK_LIBRARIES(f16-dwconv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]6525 ADD_TEST(f16-dwconv-minmax-test f16-dwconv-minmax-test)
6526
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6527 ADD_EXECUTABLE(f16-gavgpool-minmax-test test/f16-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]6528 SET_TARGET_PROPERTIES(f16-gavgpool-minmax-test PROPERTIES
6529 CXX_STANDARD 11
6530 CXX_STANDARD_REQUIRED YES
6531 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6532 TARGET_INCLUDE_DIRECTORIES(f16-gavgpool-minmax-test PRIVATE include src test)
6533 TARGET_LINK_LIBRARIES(f16-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]6534 ADD_TEST(f16-gavgpool-minmax-test f16-gavgpool-minmax-test)
6535
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6536 ADD_EXECUTABLE(f16-gemm-minmax-test test/f16-gemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6537 SET_TARGET_PROPERTIES(f16-gemm-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6538 CXX_STANDARD 11
6539 CXX_STANDARD_REQUIRED YES
6540 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6541 TARGET_INCLUDE_DIRECTORIES(f16-gemm-minmax-test PRIVATE include src test)
6542 TARGET_LINK_LIBRARIES(f16-gemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6543 ADD_TEST(f16-gemm-minmax-test f16-gemm-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6544
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6545 ADD_EXECUTABLE(f16-igemm-minmax-test test/f16-igemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]6546 SET_TARGET_PROPERTIES(f16-igemm-minmax-test PROPERTIES
6547 CXX_STANDARD 11
6548 CXX_STANDARD_REQUIRED YES
6549 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6550 TARGET_INCLUDE_DIRECTORIES(f16-igemm-minmax-test PRIVATE include src test)
6551 TARGET_LINK_LIBRARIES(f16-igemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]6552 ADD_TEST(f16-igemm-minmax-test f16-igemm-minmax-test)
6553
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6554 ADD_EXECUTABLE(f16-spmm-minmax-test test/f16-spmm-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6555 SET_TARGET_PROPERTIES(f16-spmm-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6556 CXX_STANDARD 11
6557 CXX_STANDARD_REQUIRED YES
6558 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6559 TARGET_INCLUDE_DIRECTORIES(f16-spmm-minmax-test PRIVATE include src test)
6560 TARGET_LINK_LIBRARIES(f16-spmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6561 ADD_TEST(f16-spmm-minmax-test f16-spmm-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6562
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6563 ADD_EXECUTABLE(f16-vadd-minmax-test test/f16-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6564 SET_TARGET_PROPERTIES(f16-vadd-minmax-test PROPERTIES
6565 CXX_STANDARD 11
6566 CXX_STANDARD_REQUIRED YES
6567 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6568 TARGET_INCLUDE_DIRECTORIES(f16-vadd-minmax-test PRIVATE include src test)
6569 TARGET_LINK_LIBRARIES(f16-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6570 ADD_TEST(f16-vadd-minmax-test f16-vadd-minmax-test)
6571
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6572 ADD_EXECUTABLE(f16-vaddc-minmax-test test/f16-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6573 SET_TARGET_PROPERTIES(f16-vaddc-minmax-test PROPERTIES
6574 CXX_STANDARD 11
6575 CXX_STANDARD_REQUIRED YES
6576 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6577 TARGET_INCLUDE_DIRECTORIES(f16-vaddc-minmax-test PRIVATE include src test)
6578 TARGET_LINK_LIBRARIES(f16-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6579 ADD_TEST(f16-vaddc-minmax-test f16-vaddc-minmax-test)
6580
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6581 ADD_EXECUTABLE(f16-vclamp-test test/f16-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6582 SET_TARGET_PROPERTIES(f16-vclamp-test PROPERTIES
6583 CXX_STANDARD 11
6584 CXX_STANDARD_REQUIRED YES
6585 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6586 TARGET_INCLUDE_DIRECTORIES(f16-vclamp-test PRIVATE include src test)
6587 TARGET_LINK_LIBRARIES(f16-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6588 ADD_TEST(f16-vclamp-test f16-vclamp-test)
6589
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6590 ADD_EXECUTABLE(f16-vdiv-minmax-test test/f16-vdiv-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6591 SET_TARGET_PROPERTIES(f16-vdiv-minmax-test PROPERTIES
6592 CXX_STANDARD 11
6593 CXX_STANDARD_REQUIRED YES
6594 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6595 TARGET_INCLUDE_DIRECTORIES(f16-vdiv-minmax-test PRIVATE include src test)
6596 TARGET_LINK_LIBRARIES(f16-vdiv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6597 ADD_TEST(f16-vdiv-minmax-test f16-vdiv-minmax-test)
6598
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6599 ADD_EXECUTABLE(f16-vdivc-minmax-test test/f16-vdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6600 SET_TARGET_PROPERTIES(f16-vdivc-minmax-test PROPERTIES
6601 CXX_STANDARD 11
6602 CXX_STANDARD_REQUIRED YES
6603 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6604 TARGET_INCLUDE_DIRECTORIES(f16-vdivc-minmax-test PRIVATE include src test)
6605 TARGET_LINK_LIBRARIES(f16-vdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6606 ADD_TEST(f16-vdivc-minmax-test f16-vdivc-minmax-test)
6607
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6608 ADD_EXECUTABLE(f16-vrdivc-minmax-test test/f16-vrdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6609 SET_TARGET_PROPERTIES(f16-vrdivc-minmax-test PROPERTIES
6610 CXX_STANDARD 11
6611 CXX_STANDARD_REQUIRED YES
6612 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6613 TARGET_INCLUDE_DIRECTORIES(f16-vrdivc-minmax-test PRIVATE include src test)
6614 TARGET_LINK_LIBRARIES(f16-vrdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6615 ADD_TEST(f16-vrdivc-minmax-test f16-vrdivc-minmax-test)
6616
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6617 ADD_EXECUTABLE(f16-vhswish-test test/f16-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6618 SET_TARGET_PROPERTIES(f16-vhswish-test PROPERTIES
6619 CXX_STANDARD 11
6620 CXX_STANDARD_REQUIRED YES
6621 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6622 TARGET_INCLUDE_DIRECTORIES(f16-vhswish-test PRIVATE include src test)
6623 TARGET_LINK_LIBRARIES(f16-vhswish-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6624 ADD_TEST(f16-vhswish-test f16-vhswish-test)
6625
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6626 ADD_EXECUTABLE(f16-vmax-test test/f16-vmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6627 SET_TARGET_PROPERTIES(f16-vmax-test PROPERTIES
6628 CXX_STANDARD 11
6629 CXX_STANDARD_REQUIRED YES
6630 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6631 TARGET_INCLUDE_DIRECTORIES(f16-vmax-test PRIVATE include src test)
6632 TARGET_LINK_LIBRARIES(f16-vmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6633 ADD_TEST(f16-vmax-test f16-vmax-test)
6634
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6635 ADD_EXECUTABLE(f16-vmaxc-test test/f16-vmaxc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6636 SET_TARGET_PROPERTIES(f16-vmaxc-test PROPERTIES
6637 CXX_STANDARD 11
6638 CXX_STANDARD_REQUIRED YES
6639 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6640 TARGET_INCLUDE_DIRECTORIES(f16-vmaxc-test PRIVATE include src test)
6641 TARGET_LINK_LIBRARIES(f16-vmaxc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6642 ADD_TEST(f16-vmaxc-test f16-vmaxc-test)
6643
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6644 ADD_EXECUTABLE(f16-vmin-test test/f16-vmin.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6645 SET_TARGET_PROPERTIES(f16-vmin-test PROPERTIES
6646 CXX_STANDARD 11
6647 CXX_STANDARD_REQUIRED YES
6648 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6649 TARGET_INCLUDE_DIRECTORIES(f16-vmin-test PRIVATE include src test)
6650 TARGET_LINK_LIBRARIES(f16-vmin-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6651 ADD_TEST(f16-vmin-test f16-vmin-test)
6652
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6653 ADD_EXECUTABLE(f16-vminc-test test/f16-vminc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6654 SET_TARGET_PROPERTIES(f16-vminc-test PROPERTIES
6655 CXX_STANDARD 11
6656 CXX_STANDARD_REQUIRED YES
6657 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6658 TARGET_INCLUDE_DIRECTORIES(f16-vminc-test PRIVATE include src test)
6659 TARGET_LINK_LIBRARIES(f16-vminc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6660 ADD_TEST(f16-vminc-test f16-vminc-test)
6661
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6662 ADD_EXECUTABLE(f16-vmul-minmax-test test/f16-vmul-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6663 SET_TARGET_PROPERTIES(f16-vmul-minmax-test PROPERTIES
6664 CXX_STANDARD 11
6665 CXX_STANDARD_REQUIRED YES
6666 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6667 TARGET_INCLUDE_DIRECTORIES(f16-vmul-minmax-test PRIVATE include src test)
6668 TARGET_LINK_LIBRARIES(f16-vmul-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6669 ADD_TEST(f16-vmul-minmax-test f16-vmul-minmax-test)
6670
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6671 ADD_EXECUTABLE(f16-vmulc-minmax-test test/f16-vmulc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6672 SET_TARGET_PROPERTIES(f16-vmulc-minmax-test PROPERTIES
6673 CXX_STANDARD 11
6674 CXX_STANDARD_REQUIRED YES
6675 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6676 TARGET_INCLUDE_DIRECTORIES(f16-vmulc-minmax-test PRIVATE include src test)
6677 TARGET_LINK_LIBRARIES(f16-vmulc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6678 ADD_TEST(f16-vmulc-minmax-test f16-vmulc-minmax-test)
6679
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6680 ADD_EXECUTABLE(f16-vmulcaddc-minmax-test test/f16-vmulcaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6681 SET_TARGET_PROPERTIES(f16-vmulcaddc-minmax-test PROPERTIES
6682 CXX_STANDARD 11
6683 CXX_STANDARD_REQUIRED YES
6684 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6685 TARGET_INCLUDE_DIRECTORIES(f16-vmulcaddc-minmax-test PRIVATE include src test)
6686 TARGET_LINK_LIBRARIES(f16-vmulcaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6687 ADD_TEST(f16-vmulcaddc-minmax-test f16-vmulcaddc-minmax-test)
6688
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6689 ADD_EXECUTABLE(f16-prelu-test test/f16-prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6690 SET_TARGET_PROPERTIES(f16-prelu-test PROPERTIES
6691 CXX_STANDARD 11
6692 CXX_STANDARD_REQUIRED YES
6693 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6694 TARGET_INCLUDE_DIRECTORIES(f16-prelu-test PRIVATE include src test)
6695 TARGET_LINK_LIBRARIES(f16-prelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6696 ADD_TEST(f16-prelu-test f16-prelu-test)
6697
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6698 ADD_EXECUTABLE(f16-vsub-minmax-test test/f16-vsub-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6699 SET_TARGET_PROPERTIES(f16-vsub-minmax-test PROPERTIES
6700 CXX_STANDARD 11
6701 CXX_STANDARD_REQUIRED YES
6702 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6703 TARGET_INCLUDE_DIRECTORIES(f16-vsub-minmax-test PRIVATE include src test)
6704 TARGET_LINK_LIBRARIES(f16-vsub-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6705 ADD_TEST(f16-vsub-minmax-test f16-vsub-minmax-test)
6706
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6707 ADD_EXECUTABLE(f16-vsubc-minmax-test test/f16-vsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6708 SET_TARGET_PROPERTIES(f16-vsubc-minmax-test PROPERTIES
6709 CXX_STANDARD 11
6710 CXX_STANDARD_REQUIRED YES
6711 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6712 TARGET_INCLUDE_DIRECTORIES(f16-vsubc-minmax-test PRIVATE include src test)
6713 TARGET_LINK_LIBRARIES(f16-vsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6714 ADD_TEST(f16-vsubc-minmax-test f16-vsubc-minmax-test)
6715
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6716 ADD_EXECUTABLE(f16-vrsubc-minmax-test test/f16-vrsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6717 SET_TARGET_PROPERTIES(f16-vrsubc-minmax-test PROPERTIES
6718 CXX_STANDARD 11
6719 CXX_STANDARD_REQUIRED YES
6720 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6721 TARGET_INCLUDE_DIRECTORIES(f16-vrsubc-minmax-test PRIVATE include src test)
6722 TARGET_LINK_LIBRARIES(f16-vrsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6723 ADD_TEST(f16-vrsubc-minmax-test f16-vrsubc-minmax-test)
6724
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6725 ADD_EXECUTABLE(f32-argmaxpool-test test/f32-argmaxpool.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6726 SET_TARGET_PROPERTIES(f32-argmaxpool-test PROPERTIES
6727 CXX_STANDARD 11
6728 CXX_STANDARD_REQUIRED YES
6729 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6730 TARGET_INCLUDE_DIRECTORIES(f32-argmaxpool-test PRIVATE include src test)
6731 TARGET_LINK_LIBRARIES(f32-argmaxpool-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6732 ADD_TEST(f32-argmaxpool-test f32-argmaxpool-test)
6733
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6734 ADD_EXECUTABLE(f32-avgpool-minmax-test test/f32-avgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6735 SET_TARGET_PROPERTIES(f32-avgpool-minmax-test PROPERTIES
6736 CXX_STANDARD 11
6737 CXX_STANDARD_REQUIRED YES
6738 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6739 TARGET_INCLUDE_DIRECTORIES(f32-avgpool-minmax-test PRIVATE include src test)
6740 TARGET_LINK_LIBRARIES(f32-avgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6741 ADD_TEST(f32-avgpool-minmax-test f32-avgpool-minmax-test)
6742
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6743 ADD_EXECUTABLE(f32-conv-hwc-test test/f32-conv-hwc.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6744 SET_TARGET_PROPERTIES(f32-conv-hwc-test PROPERTIES
6745 CXX_STANDARD 11
6746 CXX_STANDARD_REQUIRED YES
6747 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6748 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc-test PRIVATE include src test)
6749 TARGET_LINK_LIBRARIES(f32-conv-hwc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6750 ADD_TEST(f32-conv-hwc-test f32-conv-hwc-test)
6751
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6752 ADD_EXECUTABLE(f32-conv-hwc2chw-test test/f32-conv-hwc2chw.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6753 SET_TARGET_PROPERTIES(f32-conv-hwc2chw-test PROPERTIES
6754 CXX_STANDARD 11
6755 CXX_STANDARD_REQUIRED YES
6756 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6757 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc2chw-test PRIVATE include src test)
6758 TARGET_LINK_LIBRARIES(f32-conv-hwc2chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6759 ADD_TEST(f32-conv-hwc2chw-test f32-conv-hwc2chw-test)
6760
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6761 ADD_EXECUTABLE(f32-dwconv-test test/f32-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6762 SET_TARGET_PROPERTIES(f32-dwconv-test PROPERTIES
6763 CXX_STANDARD 11
6764 CXX_STANDARD_REQUIRED YES
6765 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6766 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-test PRIVATE include src test)
6767 TARGET_LINK_LIBRARIES(f32-dwconv-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6768 ADD_TEST(f32-dwconv-test f32-dwconv-test)
6769
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6770 ADD_EXECUTABLE(f32-dwconv2d-chw-test test/f32-dwconv2d-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6771 SET_TARGET_PROPERTIES(f32-dwconv2d-chw-test PROPERTIES
6772 CXX_STANDARD 11
6773 CXX_STANDARD_REQUIRED YES
6774 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6775 TARGET_INCLUDE_DIRECTORIES(f32-dwconv2d-chw-test PRIVATE include src test)
6776 TARGET_LINK_LIBRARIES(f32-dwconv2d-chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6777 ADD_TEST(f32-dwconv2d-chw-test f32-dwconv2d-chw-test)
6778
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6779 ADD_EXECUTABLE(f32-dwconv-minmax-test test/f32-dwconv-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6780 SET_TARGET_PROPERTIES(f32-dwconv-minmax-test PROPERTIES
6781 CXX_STANDARD 11
6782 CXX_STANDARD_REQUIRED YES
6783 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6784 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-minmax-test PRIVATE include src test)
6785 TARGET_LINK_LIBRARIES(f32-dwconv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6786 ADD_TEST(f32-dwconv-minmax-test f32-dwconv-minmax-test)
6787
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]6788 ADD_EXECUTABLE(f32-f16-vcvt-test test/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
6789 SET_TARGET_PROPERTIES(f32-f16-vcvt-test PROPERTIES
6790 CXX_STANDARD 11
6791 CXX_STANDARD_REQUIRED YES
6792 CXX_EXTENSIONS YES)
6793 TARGET_INCLUDE_DIRECTORIES(f32-f16-vcvt-test PRIVATE include src test)
6794 TARGET_LINK_LIBRARIES(f32-f16-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6795 ADD_TEST(f32-f16-vcvt-test f32-f16-vcvt-test)
6796
Marat Dukhanc5aa2422021-12-01 00:15:19 -0800[diff] [blame]6797 ADD_EXECUTABLE(f32-qs8-vcvt-test test/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
6798 SET_TARGET_PROPERTIES(f32-qs8-vcvt-test PROPERTIES
6799 CXX_STANDARD 11
6800 CXX_STANDARD_REQUIRED YES
6801 CXX_EXTENSIONS YES)
6802 TARGET_INCLUDE_DIRECTORIES(f32-qs8-vcvt-test PRIVATE include src test)
6803 TARGET_LINK_LIBRARIES(f32-qs8-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6804 ADD_TEST(f32-qs8-vcvt-test f32-qs8-vcvt-test)
6805
6806 ADD_EXECUTABLE(f32-qu8-vcvt-test test/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
6807 SET_TARGET_PROPERTIES(f32-qu8-vcvt-test PROPERTIES
6808 CXX_STANDARD 11
6809 CXX_STANDARD_REQUIRED YES
6810 CXX_EXTENSIONS YES)
6811 TARGET_INCLUDE_DIRECTORIES(f32-qu8-vcvt-test PRIVATE include src test)
6812 TARGET_LINK_LIBRARIES(f32-qu8-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6813 ADD_TEST(f32-qu8-vcvt-test f32-qu8-vcvt-test)
6814
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6815 ADD_EXECUTABLE(f32-gavgpool-cw-test test/f32-gavgpool-cw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6816 SET_TARGET_PROPERTIES(f32-gavgpool-cw-test PROPERTIES
6817 CXX_STANDARD 11
6818 CXX_STANDARD_REQUIRED YES
6819 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6820 TARGET_INCLUDE_DIRECTORIES(f32-gavgpool-cw-test PRIVATE include src test)
6821 TARGET_LINK_LIBRARIES(f32-gavgpool-cw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6822 ADD_TEST(f32-gavgpool-cw-test f32-gavgpool-cw-test)
6823
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6824 ADD_EXECUTABLE(f32-gavgpool-minmax-test test/f32-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6825 SET_TARGET_PROPERTIES(f32-gavgpool-minmax-test PROPERTIES
6826 CXX_STANDARD 11
6827 CXX_STANDARD_REQUIRED YES
6828 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6829 TARGET_INCLUDE_DIRECTORIES(f32-gavgpool-minmax-test PRIVATE include src test)
6830 TARGET_LINK_LIBRARIES(f32-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6831 ADD_TEST(f32-gavgpool-minmax-test f32-gavgpool-minmax-test)
6832
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6833 ADD_EXECUTABLE(f32-gemm-test test/f32-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6834 SET_TARGET_PROPERTIES(f32-gemm-test PROPERTIES
6835 CXX_STANDARD 11
6836 CXX_STANDARD_REQUIRED YES
6837 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6838 TARGET_INCLUDE_DIRECTORIES(f32-gemm-test PRIVATE include src test)
6839 TARGET_LINK_LIBRARIES(f32-gemm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6840 ADD_TEST(f32-gemm-test f32-gemm-test)
6841
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6842 ADD_EXECUTABLE(f32-gemm-relu-test test/f32-gemm-relu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6843 SET_TARGET_PROPERTIES(f32-gemm-relu-test PROPERTIES
6844 CXX_STANDARD 11
6845 CXX_STANDARD_REQUIRED YES
6846 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6847 TARGET_INCLUDE_DIRECTORIES(f32-gemm-relu-test PRIVATE include src test)
6848 TARGET_LINK_LIBRARIES(f32-gemm-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6849 ADD_TEST(f32-gemm-relu-test f32-gemm-relu-test)
6850
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6851 ADD_EXECUTABLE(f32-gemm-minmax-test test/f32-gemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6852 SET_TARGET_PROPERTIES(f32-gemm-minmax-test PROPERTIES
6853 CXX_STANDARD 11
6854 CXX_STANDARD_REQUIRED YES
6855 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6856 TARGET_INCLUDE_DIRECTORIES(f32-gemm-minmax-test PRIVATE include src test)
Zhi An Ngb43b47a2021-12-23 16:27:22 -0800[diff] [blame]6857 TARGET_LINK_LIBRARIES(f32-gemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main jit)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6858 ADD_TEST(f32-gemm-minmax-test f32-gemm-minmax-test)
6859
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6860 ADD_EXECUTABLE(f32-gemminc-minmax-test test/f32-gemminc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6861 SET_TARGET_PROPERTIES(f32-gemminc-minmax-test PROPERTIES
6862 CXX_STANDARD 11
6863 CXX_STANDARD_REQUIRED YES
6864 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6865 TARGET_INCLUDE_DIRECTORIES(f32-gemminc-minmax-test PRIVATE include src test)
6866 TARGET_LINK_LIBRARIES(f32-gemminc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6867 ADD_TEST(f32-gemminc-minmax-test f32-gemminc-minmax-test)
6868
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6869 ADD_EXECUTABLE(f32-ibilinear-test test/f32-ibilinear.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6870 SET_TARGET_PROPERTIES(f32-ibilinear-test PROPERTIES
6871 CXX_STANDARD 11
6872 CXX_STANDARD_REQUIRED YES
6873 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6874 TARGET_INCLUDE_DIRECTORIES(f32-ibilinear-test PRIVATE include src test)
6875 TARGET_LINK_LIBRARIES(f32-ibilinear-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6876 ADD_TEST(f32-ibilinear-test f32-ibilinear-test)
6877
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6878 ADD_EXECUTABLE(f32-ibilinear-chw-test test/f32-ibilinear-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6879 SET_TARGET_PROPERTIES(f32-ibilinear-chw-test PROPERTIES
6880 CXX_STANDARD 11
6881 CXX_STANDARD_REQUIRED YES
6882 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6883 TARGET_INCLUDE_DIRECTORIES(f32-ibilinear-chw-test PRIVATE include src test)
6884 TARGET_LINK_LIBRARIES(f32-ibilinear-chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6885 ADD_TEST(f32-ibilinear-chw-test f32-ibilinear-chw-test)
6886
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6887 ADD_EXECUTABLE(f32-igemm-test test/f32-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6888 SET_TARGET_PROPERTIES(f32-igemm-test PROPERTIES
6889 CXX_STANDARD 11
6890 CXX_STANDARD_REQUIRED YES
6891 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6892 TARGET_INCLUDE_DIRECTORIES(f32-igemm-test PRIVATE include src test)
6893 TARGET_LINK_LIBRARIES(f32-igemm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6894 ADD_TEST(f32-igemm-test f32-igemm-test)
6895
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6896 ADD_EXECUTABLE(f32-igemm-relu-test test/f32-igemm-relu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6897 SET_TARGET_PROPERTIES(f32-igemm-relu-test PROPERTIES
6898 CXX_STANDARD 11
6899 CXX_STANDARD_REQUIRED YES
6900 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6901 TARGET_INCLUDE_DIRECTORIES(f32-igemm-relu-test PRIVATE include src test)
6902 TARGET_LINK_LIBRARIES(f32-igemm-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6903 ADD_TEST(f32-igemm-relu-test f32-igemm-relu-test)
6904
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6905 ADD_EXECUTABLE(f32-igemm-minmax-test test/f32-igemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6906 SET_TARGET_PROPERTIES(f32-igemm-minmax-test PROPERTIES
6907 CXX_STANDARD 11
6908 CXX_STANDARD_REQUIRED YES
6909 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6910 TARGET_INCLUDE_DIRECTORIES(f32-igemm-minmax-test PRIVATE include src test)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6911 IF(MINGW)
6912 # Work-around for "too many sections" error
6913 TARGET_COMPILE_OPTIONS(f32-igemm-minmax-test PRIVATE "$<$<NOT:$<OR:$<CONFIG:Release>,$<CONFIG:MinSizeRel>>>:-Wa,-mbig-obj>")
6914 ENDIF()
Zhi An Ng13b57dd2022-01-06 09:33:20 -0800[diff] [blame^]6915 TARGET_LINK_LIBRARIES(f32-igemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main jit)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6916 ADD_TEST(f32-igemm-minmax-test f32-igemm-minmax-test)
6917
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6918 ADD_EXECUTABLE(f32-maxpool-minmax-test test/f32-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6919 SET_TARGET_PROPERTIES(f32-maxpool-minmax-test PROPERTIES
6920 CXX_STANDARD 11
6921 CXX_STANDARD_REQUIRED YES
6922 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6923 TARGET_INCLUDE_DIRECTORIES(f32-maxpool-minmax-test PRIVATE include src test)
6924 TARGET_LINK_LIBRARIES(f32-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6925 ADD_TEST(f32-maxpool-minmax-test f32-maxpool-minmax-test)
6926
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6927 ADD_EXECUTABLE(f32-pavgpool-minmax-test test/f32-pavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6928 SET_TARGET_PROPERTIES(f32-pavgpool-minmax-test PROPERTIES
6929 CXX_STANDARD 11
6930 CXX_STANDARD_REQUIRED YES
6931 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6932 TARGET_INCLUDE_DIRECTORIES(f32-pavgpool-minmax-test PRIVATE include src test)
6933 TARGET_LINK_LIBRARIES(f32-pavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6934 ADD_TEST(f32-pavgpool-minmax-test f32-pavgpool-minmax-test)
6935
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6936 ADD_EXECUTABLE(f32-ppmm-minmax-test test/f32-ppmm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6937 SET_TARGET_PROPERTIES(f32-ppmm-minmax-test PROPERTIES
6938 CXX_STANDARD 11
6939 CXX_STANDARD_REQUIRED YES
6940 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6941 TARGET_INCLUDE_DIRECTORIES(f32-ppmm-minmax-test PRIVATE include src test)
6942 TARGET_LINK_LIBRARIES(f32-ppmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6943 ADD_TEST(f32-ppmm-minmax-test f32-ppmm-minmax-test)
6944
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6945 ADD_EXECUTABLE(f32-prelu-test test/f32-prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6946 SET_TARGET_PROPERTIES(f32-prelu-test PROPERTIES
6947 CXX_STANDARD 11
6948 CXX_STANDARD_REQUIRED YES
6949 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6950 TARGET_INCLUDE_DIRECTORIES(f32-prelu-test PRIVATE include src test)
6951 TARGET_LINK_LIBRARIES(f32-prelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6952 ADD_TEST(f32-prelu-test f32-prelu-test)
6953
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6954 ADD_EXECUTABLE(f32-raddexpminusmax-test test/f32-raddexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6955 SET_TARGET_PROPERTIES(f32-raddexpminusmax-test PROPERTIES
6956 CXX_STANDARD 11
6957 CXX_STANDARD_REQUIRED YES
6958 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6959 TARGET_INCLUDE_DIRECTORIES(f32-raddexpminusmax-test PRIVATE include src test)
6960 TARGET_LINK_LIBRARIES(f32-raddexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6961 ADD_TEST(f32-raddexpminusmax-test f32-raddexpminusmax-test)
6962
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6963 ADD_EXECUTABLE(f32-raddextexp-test test/f32-raddextexp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6964 SET_TARGET_PROPERTIES(f32-raddextexp-test PROPERTIES
6965 CXX_STANDARD 11
6966 CXX_STANDARD_REQUIRED YES
6967 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6968 TARGET_INCLUDE_DIRECTORIES(f32-raddextexp-test PRIVATE include src test)
6969 TARGET_LINK_LIBRARIES(f32-raddextexp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6970 ADD_TEST(f32-raddextexp-test f32-raddextexp-test)
6971
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6972 ADD_EXECUTABLE(f32-raddstoreexpminusmax-test test/f32-raddstoreexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6973 SET_TARGET_PROPERTIES(f32-raddstoreexpminusmax-test PROPERTIES
6974 CXX_STANDARD 11
6975 CXX_STANDARD_REQUIRED YES
6976 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6977 TARGET_INCLUDE_DIRECTORIES(f32-raddstoreexpminusmax-test PRIVATE include src test)
6978 TARGET_LINK_LIBRARIES(f32-raddstoreexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6979 ADD_TEST(f32-raddstoreexpminusmax-test f32-raddstoreexpminusmax-test)
6980
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6981 ADD_EXECUTABLE(f32-rmax-test test/f32-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6982 SET_TARGET_PROPERTIES(f32-rmax-test PROPERTIES
6983 CXX_STANDARD 11
6984 CXX_STANDARD_REQUIRED YES
6985 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6986 TARGET_INCLUDE_DIRECTORIES(f32-rmax-test PRIVATE include src test)
6987 TARGET_LINK_LIBRARIES(f32-rmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6988 ADD_TEST(f32-rmax-test f32-rmax-test)
6989
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6990 ADD_EXECUTABLE(f32-spmm-minmax-test test/f32-spmm-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6991 SET_TARGET_PROPERTIES(f32-spmm-minmax-test PROPERTIES
6992 CXX_STANDARD 11
6993 CXX_STANDARD_REQUIRED YES
6994 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6995 TARGET_INCLUDE_DIRECTORIES(f32-spmm-minmax-test PRIVATE include src test)
6996 TARGET_LINK_LIBRARIES(f32-spmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6997 ADD_TEST(f32-spmm-minmax-test f32-spmm-minmax-test)
6998
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6999 ADD_EXECUTABLE(f32-vabs-test test/f32-vabs.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7000 SET_TARGET_PROPERTIES(f32-vabs-test PROPERTIES
7001 CXX_STANDARD 11
7002 CXX_STANDARD_REQUIRED YES
7003 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7004 TARGET_INCLUDE_DIRECTORIES(f32-vabs-test PRIVATE include src test)
7005 TARGET_LINK_LIBRARIES(f32-vabs-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7006 ADD_TEST(f32-vabs-test f32-vabs-test)
7007
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7008 ADD_EXECUTABLE(f32-vadd-test test/f32-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7009 SET_TARGET_PROPERTIES(f32-vadd-test PROPERTIES
7010 CXX_STANDARD 11
7011 CXX_STANDARD_REQUIRED YES
7012 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7013 TARGET_INCLUDE_DIRECTORIES(f32-vadd-test PRIVATE include src test)
7014 TARGET_LINK_LIBRARIES(f32-vadd-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7015 ADD_TEST(f32-vadd-test f32-vadd-test)
7016
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7017 ADD_EXECUTABLE(f32-vadd-minmax-test test/f32-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7018 SET_TARGET_PROPERTIES(f32-vadd-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7019 CXX_STANDARD 11
7020 CXX_STANDARD_REQUIRED YES
7021 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7022 TARGET_INCLUDE_DIRECTORIES(f32-vadd-minmax-test PRIVATE include src test)
7023 TARGET_LINK_LIBRARIES(f32-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7024 ADD_TEST(f32-vadd-minmax-test f32-vadd-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7025
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7026 ADD_EXECUTABLE(f32-vadd-relu-test test/f32-vadd-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7027 SET_TARGET_PROPERTIES(f32-vadd-relu-test PROPERTIES
7028 CXX_STANDARD 11
7029 CXX_STANDARD_REQUIRED YES
7030 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7031 TARGET_INCLUDE_DIRECTORIES(f32-vadd-relu-test PRIVATE include src test)
7032 TARGET_LINK_LIBRARIES(f32-vadd-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7033 ADD_TEST(f32-vadd-relu-test f32-vadd-relu-test)
7034
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7035 ADD_EXECUTABLE(f32-vaddc-test test/f32-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7036 SET_TARGET_PROPERTIES(f32-vaddc-test PROPERTIES
7037 CXX_STANDARD 11
7038 CXX_STANDARD_REQUIRED YES
7039 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7040 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-test PRIVATE include src test)
7041 TARGET_LINK_LIBRARIES(f32-vaddc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7042 ADD_TEST(f32-vaddc-test f32-vaddc-test)
7043
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7044 ADD_EXECUTABLE(f32-vaddc-minmax-test test/f32-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7045 SET_TARGET_PROPERTIES(f32-vaddc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7046 CXX_STANDARD 11
7047 CXX_STANDARD_REQUIRED YES
7048 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7049 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-minmax-test PRIVATE include src test)
7050 TARGET_LINK_LIBRARIES(f32-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7051 ADD_TEST(f32-vaddc-minmax-test f32-vaddc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7052
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7053 ADD_EXECUTABLE(f32-vaddc-relu-test test/f32-vaddc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7054 SET_TARGET_PROPERTIES(f32-vaddc-relu-test PROPERTIES
7055 CXX_STANDARD 11
7056 CXX_STANDARD_REQUIRED YES
7057 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7058 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-relu-test PRIVATE include src test)
7059 TARGET_LINK_LIBRARIES(f32-vaddc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7060 ADD_TEST(f32-vaddc-relu-test f32-vaddc-relu-test)
7061
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7062 ADD_EXECUTABLE(f32-vclamp-test test/f32-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7063 SET_TARGET_PROPERTIES(f32-vclamp-test PROPERTIES
7064 CXX_STANDARD 11
7065 CXX_STANDARD_REQUIRED YES
7066 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7067 TARGET_INCLUDE_DIRECTORIES(f32-vclamp-test PRIVATE include src test)
7068 TARGET_LINK_LIBRARIES(f32-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7069 ADD_TEST(f32-vclamp-test f32-vclamp-test)
7070
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7071 ADD_EXECUTABLE(f32-vhswish-test test/f32-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7072 SET_TARGET_PROPERTIES(f32-vhswish-test PROPERTIES
7073 CXX_STANDARD 11
7074 CXX_STANDARD_REQUIRED YES
7075 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7076 TARGET_INCLUDE_DIRECTORIES(f32-vhswish-test PRIVATE include src test)
7077 TARGET_LINK_LIBRARIES(f32-vhswish-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7078 ADD_TEST(f32-vhswish-test f32-vhswish-test)
7079
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7080 ADD_EXECUTABLE(f32-vdiv-test test/f32-vdiv.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7081 SET_TARGET_PROPERTIES(f32-vdiv-test PROPERTIES
7082 CXX_STANDARD 11
7083 CXX_STANDARD_REQUIRED YES
7084 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7085 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-test PRIVATE include src test)
7086 TARGET_LINK_LIBRARIES(f32-vdiv-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7087 ADD_TEST(f32-vdiv-test f32-vdiv-test)
7088
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7089 ADD_EXECUTABLE(f32-vdiv-minmax-test test/f32-vdiv-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7090 SET_TARGET_PROPERTIES(f32-vdiv-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]7091 CXX_STANDARD 11
7092 CXX_STANDARD_REQUIRED YES
7093 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7094 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-minmax-test PRIVATE include src test)
7095 TARGET_LINK_LIBRARIES(f32-vdiv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7096 ADD_TEST(f32-vdiv-minmax-test f32-vdiv-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]7097
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7098 ADD_EXECUTABLE(f32-vdiv-relu-test test/f32-vdiv-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7099 SET_TARGET_PROPERTIES(f32-vdiv-relu-test PROPERTIES
7100 CXX_STANDARD 11
7101 CXX_STANDARD_REQUIRED YES
7102 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7103 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-relu-test PRIVATE include src test)
7104 TARGET_LINK_LIBRARIES(f32-vdiv-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7105 ADD_TEST(f32-vdiv-relu-test f32-vdiv-relu-test)
7106
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7107 ADD_EXECUTABLE(f32-vdivc-test test/f32-vdivc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7108 SET_TARGET_PROPERTIES(f32-vdivc-test PROPERTIES
7109 CXX_STANDARD 11
7110 CXX_STANDARD_REQUIRED YES
7111 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7112 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-test PRIVATE include src test)
7113 TARGET_LINK_LIBRARIES(f32-vdivc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7114 ADD_TEST(f32-vdivc-test f32-vdivc-test)
7115
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7116 ADD_EXECUTABLE(f32-vdivc-minmax-test test/f32-vdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7117 SET_TARGET_PROPERTIES(f32-vdivc-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]7118 CXX_STANDARD 11
7119 CXX_STANDARD_REQUIRED YES
7120 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7121 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-minmax-test PRIVATE include src test)
7122 TARGET_LINK_LIBRARIES(f32-vdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7123 ADD_TEST(f32-vdivc-minmax-test f32-vdivc-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]7124
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7125 ADD_EXECUTABLE(f32-vdivc-relu-test test/f32-vdivc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7126 SET_TARGET_PROPERTIES(f32-vdivc-relu-test PROPERTIES
7127 CXX_STANDARD 11
7128 CXX_STANDARD_REQUIRED YES
7129 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7130 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-relu-test PRIVATE include src test)
7131 TARGET_LINK_LIBRARIES(f32-vdivc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7132 ADD_TEST(f32-vdivc-relu-test f32-vdivc-relu-test)
7133
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7134 ADD_EXECUTABLE(f32-vrdivc-test test/f32-vrdivc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7135 SET_TARGET_PROPERTIES(f32-vrdivc-test PROPERTIES
7136 CXX_STANDARD 11
7137 CXX_STANDARD_REQUIRED YES
7138 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7139 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-test PRIVATE include src test)
7140 TARGET_LINK_LIBRARIES(f32-vrdivc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7141 ADD_TEST(f32-vrdivc-test f32-vrdivc-test)
7142
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7143 ADD_EXECUTABLE(f32-vrdivc-minmax-test test/f32-vrdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7144 SET_TARGET_PROPERTIES(f32-vrdivc-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]7145 CXX_STANDARD 11
7146 CXX_STANDARD_REQUIRED YES
7147 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7148 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-minmax-test PRIVATE include src test)
7149 TARGET_LINK_LIBRARIES(f32-vrdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7150 ADD_TEST(f32-vrdivc-minmax-test f32-vrdivc-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]7151
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7152 ADD_EXECUTABLE(f32-vrdivc-relu-test test/f32-vrdivc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7153 SET_TARGET_PROPERTIES(f32-vrdivc-relu-test PROPERTIES
7154 CXX_STANDARD 11
7155 CXX_STANDARD_REQUIRED YES
7156 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7157 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-relu-test PRIVATE include src test)
7158 TARGET_LINK_LIBRARIES(f32-vrdivc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7159 ADD_TEST(f32-vrdivc-relu-test f32-vrdivc-relu-test)
7160
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7161 ADD_EXECUTABLE(f32-velu-test test/f32-velu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]7162 SET_TARGET_PROPERTIES(f32-velu-test PROPERTIES
7163 CXX_STANDARD 11
7164 CXX_STANDARD_REQUIRED YES
7165 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7166 TARGET_INCLUDE_DIRECTORIES(f32-velu-test PRIVATE include src test)
7167 TARGET_LINK_LIBRARIES(f32-velu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]7168 ADD_TEST(f32-velu-test f32-velu-test)
7169
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7170 ADD_EXECUTABLE(f32-vlrelu-test test/f32-vlrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]7171 SET_TARGET_PROPERTIES(f32-vlrelu-test PROPERTIES
7172 CXX_STANDARD 11
7173 CXX_STANDARD_REQUIRED YES
7174 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7175 TARGET_INCLUDE_DIRECTORIES(f32-vlrelu-test PRIVATE include src test)
7176 TARGET_LINK_LIBRARIES(f32-vlrelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]7177 ADD_TEST(f32-vlrelu-test f32-vlrelu-test)
7178
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7179 ADD_EXECUTABLE(f32-vmax-test test/f32-vmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]7180 SET_TARGET_PROPERTIES(f32-vmax-test PROPERTIES
7181 CXX_STANDARD 11
7182 CXX_STANDARD_REQUIRED YES
7183 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7184 TARGET_INCLUDE_DIRECTORIES(f32-vmax-test PRIVATE include src test)
7185 TARGET_LINK_LIBRARIES(f32-vmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]7186 ADD_TEST(f32-vmax-test f32-vmax-test)
7187
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7188 ADD_EXECUTABLE(f32-vmaxc-test test/f32-vmaxc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]7189 SET_TARGET_PROPERTIES(f32-vmaxc-test PROPERTIES
7190 CXX_STANDARD 11
7191 CXX_STANDARD_REQUIRED YES
7192 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7193 TARGET_INCLUDE_DIRECTORIES(f32-vmaxc-test PRIVATE include src test)
7194 TARGET_LINK_LIBRARIES(f32-vmaxc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]7195 ADD_TEST(f32-vmaxc-test f32-vmaxc-test)
7196
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7197 ADD_EXECUTABLE(f32-vmin-test test/f32-vmin.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]7198 SET_TARGET_PROPERTIES(f32-vmin-test PROPERTIES
7199 CXX_STANDARD 11
7200 CXX_STANDARD_REQUIRED YES
7201 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7202 TARGET_INCLUDE_DIRECTORIES(f32-vmin-test PRIVATE include src test)
7203 TARGET_LINK_LIBRARIES(f32-vmin-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]7204 ADD_TEST(f32-vmin-test f32-vmin-test)
7205
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7206 ADD_EXECUTABLE(f32-vminc-test test/f32-vminc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]7207 SET_TARGET_PROPERTIES(f32-vminc-test PROPERTIES
7208 CXX_STANDARD 11
7209 CXX_STANDARD_REQUIRED YES
7210 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7211 TARGET_INCLUDE_DIRECTORIES(f32-vminc-test PRIVATE include src test)
7212 TARGET_LINK_LIBRARIES(f32-vminc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]7213 ADD_TEST(f32-vminc-test f32-vminc-test)
7214
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7215 ADD_EXECUTABLE(f32-vmul-test test/f32-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7216 SET_TARGET_PROPERTIES(f32-vmul-test PROPERTIES
7217 CXX_STANDARD 11
7218 CXX_STANDARD_REQUIRED YES
7219 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7220 TARGET_INCLUDE_DIRECTORIES(f32-vmul-test PRIVATE include src test)
7221 TARGET_LINK_LIBRARIES(f32-vmul-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7222 ADD_TEST(f32-vmul-test f32-vmul-test)
7223
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7224 ADD_EXECUTABLE(f32-vmul-minmax-test test/f32-vmul-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7225 SET_TARGET_PROPERTIES(f32-vmul-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7226 CXX_STANDARD 11
7227 CXX_STANDARD_REQUIRED YES
7228 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7229 TARGET_INCLUDE_DIRECTORIES(f32-vmul-minmax-test PRIVATE include src test)
7230 TARGET_LINK_LIBRARIES(f32-vmul-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7231 ADD_TEST(f32-vmul-minmax-test f32-vmul-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7232
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7233 ADD_EXECUTABLE(f32-vmul-relu-test test/f32-vmul-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7234 SET_TARGET_PROPERTIES(f32-vmul-relu-test PROPERTIES
7235 CXX_STANDARD 11
7236 CXX_STANDARD_REQUIRED YES
7237 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7238 TARGET_INCLUDE_DIRECTORIES(f32-vmul-relu-test PRIVATE include src test)
7239 TARGET_LINK_LIBRARIES(f32-vmul-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7240 ADD_TEST(f32-vmul-relu-test f32-vmul-relu-test)
7241
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7242 ADD_EXECUTABLE(f32-vmulc-test test/f32-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7243 SET_TARGET_PROPERTIES(f32-vmulc-test PROPERTIES
7244 CXX_STANDARD 11
7245 CXX_STANDARD_REQUIRED YES
7246 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7247 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-test PRIVATE include src test)
7248 TARGET_LINK_LIBRARIES(f32-vmulc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7249 ADD_TEST(f32-vmulc-test f32-vmulc-test)
7250
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7251 ADD_EXECUTABLE(f32-vmulc-minmax-test test/f32-vmulc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7252 SET_TARGET_PROPERTIES(f32-vmulc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7253 CXX_STANDARD 11
7254 CXX_STANDARD_REQUIRED YES
7255 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7256 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-minmax-test PRIVATE include src test)
7257 TARGET_LINK_LIBRARIES(f32-vmulc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7258 ADD_TEST(f32-vmulc-minmax-test f32-vmulc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7259
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7260 ADD_EXECUTABLE(f32-vmulc-relu-test test/f32-vmulc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7261 SET_TARGET_PROPERTIES(f32-vmulc-relu-test PROPERTIES
7262 CXX_STANDARD 11
7263 CXX_STANDARD_REQUIRED YES
7264 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7265 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-relu-test PRIVATE include src test)
7266 TARGET_LINK_LIBRARIES(f32-vmulc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7267 ADD_TEST(f32-vmulc-relu-test f32-vmulc-relu-test)
7268
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7269 ADD_EXECUTABLE(f32-vmulcaddc-minmax-test test/f32-vmulcaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]7270 SET_TARGET_PROPERTIES(f32-vmulcaddc-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7271 CXX_STANDARD 11
7272 CXX_STANDARD_REQUIRED YES
7273 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7274 TARGET_INCLUDE_DIRECTORIES(f32-vmulcaddc-minmax-test PRIVATE include src test)
7275 TARGET_LINK_LIBRARIES(f32-vmulcaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]7276 ADD_TEST(f32-vmulcaddc-minmax-test f32-vmulcaddc-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7277
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7278 ADD_EXECUTABLE(f32-vneg-test test/f32-vneg.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7279 SET_TARGET_PROPERTIES(f32-vneg-test PROPERTIES
7280 CXX_STANDARD 11
7281 CXX_STANDARD_REQUIRED YES
7282 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7283 TARGET_INCLUDE_DIRECTORIES(f32-vneg-test PRIVATE include src test)
7284 TARGET_LINK_LIBRARIES(f32-vneg-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7285 ADD_TEST(f32-vneg-test f32-vneg-test)
7286
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7287 ADD_EXECUTABLE(f32-vrelu-test test/f32-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7288 SET_TARGET_PROPERTIES(f32-vrelu-test PROPERTIES
7289 CXX_STANDARD 11
7290 CXX_STANDARD_REQUIRED YES
7291 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7292 TARGET_INCLUDE_DIRECTORIES(f32-vrelu-test PRIVATE include src test)
7293 TARGET_LINK_LIBRARIES(f32-vrelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7294 ADD_TEST(f32-vrelu-test f32-vrelu-test)
7295
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7296 ADD_EXECUTABLE(f32-vrndne-test test/f32-vrndne.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7297 SET_TARGET_PROPERTIES(f32-vrndne-test PROPERTIES
7298 CXX_STANDARD 11
7299 CXX_STANDARD_REQUIRED YES
7300 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7301 TARGET_INCLUDE_DIRECTORIES(f32-vrndne-test PRIVATE include src test)
7302 TARGET_LINK_LIBRARIES(f32-vrndne-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7303 ADD_TEST(f32-vrndne-test f32-vrndne-test)
7304
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7305 ADD_EXECUTABLE(f32-vrndz-test test/f32-vrndz.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7306 SET_TARGET_PROPERTIES(f32-vrndz-test PROPERTIES
7307 CXX_STANDARD 11
7308 CXX_STANDARD_REQUIRED YES
7309 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7310 TARGET_INCLUDE_DIRECTORIES(f32-vrndz-test PRIVATE include src test)
7311 TARGET_LINK_LIBRARIES(f32-vrndz-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7312 ADD_TEST(f32-vrndz-test f32-vrndz-test)
7313
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7314 ADD_EXECUTABLE(f32-vrndu-test test/f32-vrndu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7315 SET_TARGET_PROPERTIES(f32-vrndu-test PROPERTIES
7316 CXX_STANDARD 11
7317 CXX_STANDARD_REQUIRED YES
7318 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7319 TARGET_INCLUDE_DIRECTORIES(f32-vrndu-test PRIVATE include src test)
7320 TARGET_LINK_LIBRARIES(f32-vrndu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7321 ADD_TEST(f32-vrndu-test f32-vrndu-test)
7322
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7323 ADD_EXECUTABLE(f32-vrndd-test test/f32-vrndd.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7324 SET_TARGET_PROPERTIES(f32-vrndd-test PROPERTIES
7325 CXX_STANDARD 11
7326 CXX_STANDARD_REQUIRED YES
7327 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7328 TARGET_INCLUDE_DIRECTORIES(f32-vrndd-test PRIVATE include src test)
7329 TARGET_LINK_LIBRARIES(f32-vrndd-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7330 ADD_TEST(f32-vrndd-test f32-vrndd-test)
7331
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7332 ADD_EXECUTABLE(f32-vscaleexpminusmax-test test/f32-vscaleexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]7333 SET_TARGET_PROPERTIES(f32-vscaleexpminusmax-test PROPERTIES
7334 CXX_STANDARD 11
7335 CXX_STANDARD_REQUIRED YES
7336 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7337 TARGET_INCLUDE_DIRECTORIES(f32-vscaleexpminusmax-test PRIVATE include src test)
7338 TARGET_LINK_LIBRARIES(f32-vscaleexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]7339 ADD_TEST(f32-vscaleexpminusmax-test f32-vscaleexpminusmax-test)
7340
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7341 ADD_EXECUTABLE(f32-vscaleextexp-test test/f32-vscaleextexp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan9f240d12020-04-13 10:42:30 -0700[diff] [blame]7342 SET_TARGET_PROPERTIES(f32-vscaleextexp-test PROPERTIES
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]7343 CXX_STANDARD 11
7344 CXX_STANDARD_REQUIRED YES
7345 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7346 TARGET_INCLUDE_DIRECTORIES(f32-vscaleextexp-test PRIVATE include src test)
7347 TARGET_LINK_LIBRARIES(f32-vscaleextexp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]7348 ADD_TEST(f32-vscaleextexp-test f32-vscaleextexp-test)
7349
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7350 ADD_EXECUTABLE(f32-vsigmoid-test test/f32-vsigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7351 SET_TARGET_PROPERTIES(f32-vsigmoid-test PROPERTIES
7352 CXX_STANDARD 11
7353 CXX_STANDARD_REQUIRED YES
7354 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7355 TARGET_INCLUDE_DIRECTORIES(f32-vsigmoid-test PRIVATE include src test)
7356 TARGET_LINK_LIBRARIES(f32-vsigmoid-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7357 ADD_TEST(f32-vsigmoid-test f32-vsigmoid-test)
7358
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7359 ADD_EXECUTABLE(f32-vsqr-test test/f32-vsqr.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7360 SET_TARGET_PROPERTIES(f32-vsqr-test PROPERTIES
7361 CXX_STANDARD 11
7362 CXX_STANDARD_REQUIRED YES
7363 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7364 TARGET_INCLUDE_DIRECTORIES(f32-vsqr-test PRIVATE include src test)
7365 TARGET_LINK_LIBRARIES(f32-vsqr-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]7366 ADD_TEST(f32-vsqr-test f32-vsqr-test)
7367
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7368 ADD_EXECUTABLE(f32-vsqrdiff-test test/f32-vsqrdiff.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]7369 SET_TARGET_PROPERTIES(f32-vsqrdiff-test PROPERTIES
7370 CXX_STANDARD 11
7371 CXX_STANDARD_REQUIRED YES
7372 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7373 TARGET_INCLUDE_DIRECTORIES(f32-vsqrdiff-test PRIVATE include src test)
7374 TARGET_LINK_LIBRARIES(f32-vsqrdiff-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]7375 ADD_TEST(f32-vsqrdiff-test f32-vsqrdiff-test)
7376
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7377 ADD_EXECUTABLE(f32-vsqrdiffc-test test/f32-vsqrdiffc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]7378 SET_TARGET_PROPERTIES(f32-vsqrdiffc-test PROPERTIES
7379 CXX_STANDARD 11
7380 CXX_STANDARD_REQUIRED YES
7381 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7382 TARGET_INCLUDE_DIRECTORIES(f32-vsqrdiffc-test PRIVATE include src test)
7383 TARGET_LINK_LIBRARIES(f32-vsqrdiffc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]7384 ADD_TEST(f32-vsqrdiffc-test f32-vsqrdiffc-test)
7385
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7386 ADD_EXECUTABLE(f32-vsqrt-test test/f32-vsqrt.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]7387 SET_TARGET_PROPERTIES(f32-vsqrt-test PROPERTIES
7388 CXX_STANDARD 11
7389 CXX_STANDARD_REQUIRED YES
7390 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7391 TARGET_INCLUDE_DIRECTORIES(f32-vsqrt-test PRIVATE include src test)
7392 TARGET_LINK_LIBRARIES(f32-vsqrt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]7393 ADD_TEST(f32-vsqrt-test f32-vsqrt-test)
7394
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7395 ADD_EXECUTABLE(f32-vsub-test test/f32-vsub.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7396 SET_TARGET_PROPERTIES(f32-vsub-test PROPERTIES
7397 CXX_STANDARD 11
7398 CXX_STANDARD_REQUIRED YES
7399 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7400 TARGET_INCLUDE_DIRECTORIES(f32-vsub-test PRIVATE include src test)
7401 TARGET_LINK_LIBRARIES(f32-vsub-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7402 ADD_TEST(f32-vsub-test f32-vsub-test)
7403
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7404 ADD_EXECUTABLE(f32-vsub-minmax-test test/f32-vsub-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7405 SET_TARGET_PROPERTIES(f32-vsub-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7406 CXX_STANDARD 11
7407 CXX_STANDARD_REQUIRED YES
7408 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7409 TARGET_INCLUDE_DIRECTORIES(f32-vsub-minmax-test PRIVATE include src test)
7410 TARGET_LINK_LIBRARIES(f32-vsub-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7411 ADD_TEST(f32-vsub-minmax-test f32-vsub-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7412
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7413 ADD_EXECUTABLE(f32-vsub-relu-test test/f32-vsub-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7414 SET_TARGET_PROPERTIES(f32-vsub-relu-test PROPERTIES
7415 CXX_STANDARD 11
7416 CXX_STANDARD_REQUIRED YES
7417 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7418 TARGET_INCLUDE_DIRECTORIES(f32-vsub-relu-test PRIVATE include src test)
7419 TARGET_LINK_LIBRARIES(f32-vsub-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7420 ADD_TEST(f32-vsub-relu-test f32-vsub-relu-test)
7421
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7422 ADD_EXECUTABLE(f32-vsubc-test test/f32-vsubc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7423 SET_TARGET_PROPERTIES(f32-vsubc-test PROPERTIES
7424 CXX_STANDARD 11
7425 CXX_STANDARD_REQUIRED YES
7426 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7427 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-test PRIVATE include src test)
7428 TARGET_LINK_LIBRARIES(f32-vsubc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7429 ADD_TEST(f32-vsubc-test f32-vsubc-test)
7430
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7431 ADD_EXECUTABLE(f32-vsubc-minmax-test test/f32-vsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7432 SET_TARGET_PROPERTIES(f32-vsubc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7433 CXX_STANDARD 11
7434 CXX_STANDARD_REQUIRED YES
7435 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7436 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-minmax-test PRIVATE include src test)
7437 TARGET_LINK_LIBRARIES(f32-vsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7438 ADD_TEST(f32-vsubc-minmax-test f32-vsubc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7439
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7440 ADD_EXECUTABLE(f32-vsubc-relu-test test/f32-vsubc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7441 SET_TARGET_PROPERTIES(f32-vsubc-relu-test PROPERTIES
7442 CXX_STANDARD 11
7443 CXX_STANDARD_REQUIRED YES
7444 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7445 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-relu-test PRIVATE include src test)
7446 TARGET_LINK_LIBRARIES(f32-vsubc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7447 ADD_TEST(f32-vsubc-relu-test f32-vsubc-relu-test)
7448
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7449 ADD_EXECUTABLE(f32-vrsubc-test test/f32-vrsubc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7450 SET_TARGET_PROPERTIES(f32-vrsubc-test PROPERTIES
7451 CXX_STANDARD 11
7452 CXX_STANDARD_REQUIRED YES
7453 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7454 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-test PRIVATE include src test)
7455 TARGET_LINK_LIBRARIES(f32-vrsubc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7456 ADD_TEST(f32-vrsubc-test f32-vrsubc-test)
7457
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7458 ADD_EXECUTABLE(f32-vrsubc-minmax-test test/f32-vrsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7459 SET_TARGET_PROPERTIES(f32-vrsubc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7460 CXX_STANDARD 11
7461 CXX_STANDARD_REQUIRED YES
7462 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7463 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-minmax-test PRIVATE include src test)
7464 TARGET_LINK_LIBRARIES(f32-vrsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7465 ADD_TEST(f32-vrsubc-minmax-test f32-vrsubc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7466
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7467 ADD_EXECUTABLE(f32-vrsubc-relu-test test/f32-vrsubc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7468 SET_TARGET_PROPERTIES(f32-vrsubc-relu-test PROPERTIES
7469 CXX_STANDARD 11
7470 CXX_STANDARD_REQUIRED YES
7471 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7472 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-relu-test PRIVATE include src test)
7473 TARGET_LINK_LIBRARIES(f32-vrsubc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7474 ADD_TEST(f32-vrsubc-relu-test f32-vrsubc-relu-test)
7475
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7476 ADD_EXECUTABLE(qc8-dwconv-minmax-fp32-test test/qc8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]7477 SET_TARGET_PROPERTIES(qc8-dwconv-minmax-fp32-test PROPERTIES
7478 CXX_STANDARD 11
7479 CXX_STANDARD_REQUIRED YES
7480 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7481 TARGET_INCLUDE_DIRECTORIES(qc8-dwconv-minmax-fp32-test PRIVATE include src test)
7482 TARGET_LINK_LIBRARIES(qc8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]7483 ADD_TEST(qc8-dwconv-minmax-fp32-test qc8-dwconv-minmax-fp32-test)
7484
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7485 ADD_EXECUTABLE(qc8-gemm-minmax-fp32-test test/qc8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]7486 SET_TARGET_PROPERTIES(qc8-gemm-minmax-fp32-test PROPERTIES
7487 CXX_STANDARD 11
7488 CXX_STANDARD_REQUIRED YES
7489 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7490 TARGET_INCLUDE_DIRECTORIES(qc8-gemm-minmax-fp32-test PRIVATE include src test)
7491 TARGET_LINK_LIBRARIES(qc8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]7492 ADD_TEST(qc8-gemm-minmax-fp32-test qc8-gemm-minmax-fp32-test)
7493
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7494 ADD_EXECUTABLE(qc8-igemm-minmax-fp32-test test/qc8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane06c8132021-06-03 08:59:11 -0700[diff] [blame]7495 SET_TARGET_PROPERTIES(qc8-igemm-minmax-fp32-test PROPERTIES
7496 CXX_STANDARD 11
7497 CXX_STANDARD_REQUIRED YES
7498 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7499 TARGET_INCLUDE_DIRECTORIES(qc8-igemm-minmax-fp32-test PRIVATE include src test)
7500 TARGET_LINK_LIBRARIES(qc8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane06c8132021-06-03 08:59:11 -0700[diff] [blame]7501 ADD_TEST(qc8-igemm-minmax-fp32-test qc8-igemm-minmax-fp32-test)
7502
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7503 ADD_EXECUTABLE(qs8-dwconv-minmax-fp32-test test/qs8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]7504 SET_TARGET_PROPERTIES(qs8-dwconv-minmax-fp32-test PROPERTIES
7505 CXX_STANDARD 11
7506 CXX_STANDARD_REQUIRED YES
7507 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7508 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-minmax-fp32-test PRIVATE include src test)
7509 TARGET_LINK_LIBRARIES(qs8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]7510 ADD_TEST(qs8-dwconv-minmax-fp32-test qs8-dwconv-minmax-fp32-test)
7511
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7512 ADD_EXECUTABLE(qs8-dwconv-minmax-rndnu-test test/qs8-dwconv-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]7513 SET_TARGET_PROPERTIES(qs8-dwconv-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7514 CXX_STANDARD 11
7515 CXX_STANDARD_REQUIRED YES
7516 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7517 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-minmax-rndnu-test PRIVATE include src test)
7518 TARGET_LINK_LIBRARIES(qs8-dwconv-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]7519 ADD_TEST(qs8-dwconv-minmax-rndnu-test qs8-dwconv-minmax-rndnu-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7520
Marat Dukhanfee66be2021-12-09 17:51:15 -0800[diff] [blame]7521 ADD_EXECUTABLE(qs8-f32-vcvt-test test/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
7522 SET_TARGET_PROPERTIES(qs8-f32-vcvt-test PROPERTIES
7523 CXX_STANDARD 11
7524 CXX_STANDARD_REQUIRED YES
7525 CXX_EXTENSIONS YES)
7526 TARGET_INCLUDE_DIRECTORIES(qs8-f32-vcvt-test PRIVATE include src test)
7527 TARGET_LINK_LIBRARIES(qs8-f32-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7528 ADD_TEST(qs8-f32-vcvt-test qs8-f32-vcvt-test)
7529
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7530 ADD_EXECUTABLE(qs8-gavgpool-minmax-test test/qs8-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]7531 SET_TARGET_PROPERTIES(qs8-gavgpool-minmax-test PROPERTIES
7532 CXX_STANDARD 11
7533 CXX_STANDARD_REQUIRED YES
7534 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7535 TARGET_INCLUDE_DIRECTORIES(qs8-gavgpool-minmax-test PRIVATE include src test)
7536 TARGET_LINK_LIBRARIES(qs8-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]7537 ADD_TEST(qs8-gavgpool-test qs8-gavgpool-minmax-test)
7538
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7539 ADD_EXECUTABLE(qs8-gemm-minmax-fp32-test test/qs8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7540 SET_TARGET_PROPERTIES(qs8-gemm-minmax-fp32-test PROPERTIES
7541 CXX_STANDARD 11
7542 CXX_STANDARD_REQUIRED YES
7543 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7544 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-minmax-fp32-test PRIVATE include src test)
7545 TARGET_LINK_LIBRARIES(qs8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7546 ADD_TEST(qs8-gemm-minmax-fp32-test qs8-gemm-minmax-fp32-test)
7547
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7548 ADD_EXECUTABLE(qs8-gemm-minmax-rndnu-test test/qs8-gemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7549 SET_TARGET_PROPERTIES(qs8-gemm-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7550 CXX_STANDARD 11
7551 CXX_STANDARD_REQUIRED YES
7552 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7553 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-minmax-rndnu-test PRIVATE include src test)
Zhi An Ng13b57dd2022-01-06 09:33:20 -0800[diff] [blame^]7554 TARGET_LINK_LIBRARIES(qs8-gemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main jit)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7555 ADD_TEST(qs8-gemm-minmax-rndnu-test qs8-gemm-minmax-rndnu-test)
7556
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7557 ADD_EXECUTABLE(qs8-igemm-minmax-fp32-test test/qs8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7558 SET_TARGET_PROPERTIES(qs8-igemm-minmax-fp32-test PROPERTIES
7559 CXX_STANDARD 11
7560 CXX_STANDARD_REQUIRED YES
7561 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7562 TARGET_INCLUDE_DIRECTORIES(qs8-igemm-minmax-fp32-test PRIVATE include src test)
7563 TARGET_LINK_LIBRARIES(qs8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7564 ADD_TEST(qs8-igemm-minmax-fp32-test qs8-igemm-minmax-fp32-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7565
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7566 ADD_EXECUTABLE(qs8-igemm-minmax-rndnu-test test/qs8-igemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7567 SET_TARGET_PROPERTIES(qs8-igemm-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7568 CXX_STANDARD 11
7569 CXX_STANDARD_REQUIRED YES
7570 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7571 TARGET_INCLUDE_DIRECTORIES(qs8-igemm-minmax-rndnu-test PRIVATE include src test)
Zhi An Ng13b57dd2022-01-06 09:33:20 -0800[diff] [blame^]7572 TARGET_LINK_LIBRARIES(qs8-igemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main jit)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7573 ADD_TEST(qs8-igemm-minmax-rndnu-test qs8-igemm-minmax-rndnu-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7574
Marat Dukhanf879d9e2021-08-06 01:09:30 -0700[diff] [blame]7575 ADD_EXECUTABLE(qs8-requantization-test test/qs8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
7576 SET_TARGET_PROPERTIES(qs8-requantization-test PROPERTIES
7577 CXX_STANDARD 11
7578 CXX_STANDARD_REQUIRED YES
7579 CXX_EXTENSIONS YES)
7580 TARGET_INCLUDE_DIRECTORIES(qs8-requantization-test PRIVATE include src test)
7581 TARGET_LINK_LIBRARIES(qs8-requantization-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7582 ADD_TEST(qs8-requantization-test qs8-requantization-test)
7583
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7584 ADD_EXECUTABLE(qs8-vadd-minmax-test test/qs8-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]7585 SET_TARGET_PROPERTIES(qs8-vadd-minmax-test PROPERTIES
7586 CXX_STANDARD 11
7587 CXX_STANDARD_REQUIRED YES
7588 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7589 TARGET_INCLUDE_DIRECTORIES(qs8-vadd-minmax-test PRIVATE include src test)
7590 TARGET_LINK_LIBRARIES(qs8-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]7591 ADD_TEST(qs8-vadd-minmax-test qs8-vadd-minmax-test)
7592
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7593 ADD_EXECUTABLE(qs8-vaddc-minmax-test test/qs8-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]7594 SET_TARGET_PROPERTIES(qs8-vaddc-minmax-test PROPERTIES
7595 CXX_STANDARD 11
7596 CXX_STANDARD_REQUIRED YES
7597 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7598 TARGET_INCLUDE_DIRECTORIES(qs8-vaddc-minmax-test PRIVATE include src test)
7599 TARGET_LINK_LIBRARIES(qs8-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]7600 ADD_TEST(qs8-vaddc-minmax-test qs8-vaddc-minmax-test)
7601
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]7602 ADD_EXECUTABLE(qs8-vmul-minmax-fp32-test test/qs8-vmul-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
7603 SET_TARGET_PROPERTIES(qs8-vmul-minmax-fp32-test PROPERTIES
7604 CXX_STANDARD 11
7605 CXX_STANDARD_REQUIRED YES
7606 CXX_EXTENSIONS YES)
7607 TARGET_INCLUDE_DIRECTORIES(qs8-vmul-minmax-fp32-test PRIVATE include src test)
7608 TARGET_LINK_LIBRARIES(qs8-vmul-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7609 ADD_TEST(qs8-vmul-minmax-fp32-test qs8-vmul-minmax-fp32-test)
7610
7611 ADD_EXECUTABLE(qs8-vmulc-minmax-fp32-test test/qs8-vmulc-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
7612 SET_TARGET_PROPERTIES(qs8-vmulc-minmax-fp32-test PROPERTIES
7613 CXX_STANDARD 11
7614 CXX_STANDARD_REQUIRED YES
7615 CXX_EXTENSIONS YES)
7616 TARGET_INCLUDE_DIRECTORIES(qs8-vmulc-minmax-fp32-test PRIVATE include src test)
7617 TARGET_LINK_LIBRARIES(qs8-vmulc-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7618 ADD_TEST(qs8-vmulc-minmax-fp32-test qs8-vmulc-minmax-fp32-test)
7619
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7620 ADD_EXECUTABLE(qu8-avgpool-minmax-test test/qu8-avgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7621 SET_TARGET_PROPERTIES(qu8-avgpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7622 CXX_STANDARD 11
7623 CXX_STANDARD_REQUIRED YES
7624 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7625 TARGET_INCLUDE_DIRECTORIES(qu8-avgpool-minmax-test PRIVATE include src test)
7626 TARGET_LINK_LIBRARIES(qu8-avgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7627 ADD_TEST(qu8-avgpool-minmax-test qu8-avgpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7628
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7629 ADD_EXECUTABLE(qu8-dwconv-minmax-fp32-test test/qu8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]7630 SET_TARGET_PROPERTIES(qu8-dwconv-minmax-fp32-test PROPERTIES
7631 CXX_STANDARD 11
7632 CXX_STANDARD_REQUIRED YES
7633 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7634 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-minmax-fp32-test PRIVATE include src test)
7635 TARGET_LINK_LIBRARIES(qu8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]7636 ADD_TEST(qu8-dwconv-minmax-fp32-test qu8-dwconv-minmax-fp32-test)
7637
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7638 ADD_EXECUTABLE(qu8-dwconv-minmax-rndnu-test test/qu8-dwconv-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]7639 SET_TARGET_PROPERTIES(qu8-dwconv-minmax-rndnu-test PROPERTIES
7640 CXX_STANDARD 11
7641 CXX_STANDARD_REQUIRED YES
7642 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7643 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-minmax-rndnu-test PRIVATE include src test)
7644 TARGET_LINK_LIBRARIES(qu8-dwconv-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]7645 ADD_TEST(qu8-dwconv-minmax-rndnu-test qu8-dwconv-minmax-rndnu-test)
7646
Marat Dukhanfee66be2021-12-09 17:51:15 -0800[diff] [blame]7647 ADD_EXECUTABLE(qu8-f32-vcvt-test test/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
7648 SET_TARGET_PROPERTIES(qu8-f32-vcvt-test PROPERTIES
7649 CXX_STANDARD 11
7650 CXX_STANDARD_REQUIRED YES
7651 CXX_EXTENSIONS YES)
7652 TARGET_INCLUDE_DIRECTORIES(qu8-f32-vcvt-test PRIVATE include src test)
7653 TARGET_LINK_LIBRARIES(qu8-f32-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7654 ADD_TEST(qu8-f32-vcvt-test qu8-f32-vcvt-test)
7655
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7656 ADD_EXECUTABLE(qu8-gavgpool-minmax-test test/qu8-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7657 SET_TARGET_PROPERTIES(qu8-gavgpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7658 CXX_STANDARD 11
7659 CXX_STANDARD_REQUIRED YES
7660 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7661 TARGET_INCLUDE_DIRECTORIES(qu8-gavgpool-minmax-test PRIVATE include src test)
7662 TARGET_LINK_LIBRARIES(qu8-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7663 ADD_TEST(qu8-gavgpool-test qu8-gavgpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7664
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7665 ADD_EXECUTABLE(qu8-gemm-minmax-fp32-test test/qu8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]7666 SET_TARGET_PROPERTIES(qu8-gemm-minmax-fp32-test PROPERTIES
7667 CXX_STANDARD 11
7668 CXX_STANDARD_REQUIRED YES
7669 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7670 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-minmax-fp32-test PRIVATE include src test)
7671 TARGET_LINK_LIBRARIES(qu8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]7672 ADD_TEST(qu8-gemm-minmax-fp32-test qu8-gemm-minmax-fp32-test)
7673
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7674 ADD_EXECUTABLE(qu8-gemm-minmax-rndnu-test test/qu8-gemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]7675 SET_TARGET_PROPERTIES(qu8-gemm-minmax-rndnu-test PROPERTIES
7676 CXX_STANDARD 11
7677 CXX_STANDARD_REQUIRED YES
7678 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7679 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-minmax-rndnu-test PRIVATE include src test)
7680 TARGET_LINK_LIBRARIES(qu8-gemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]7681 ADD_TEST(qu8-gemm-minmax-rndnu-test qu8-gemm-minmax-rndnu-test)
7682
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7683 ADD_EXECUTABLE(qu8-igemm-minmax-fp32-test test/qu8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]7684 SET_TARGET_PROPERTIES(qu8-igemm-minmax-fp32-test PROPERTIES
7685 CXX_STANDARD 11
7686 CXX_STANDARD_REQUIRED YES
7687 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7688 TARGET_INCLUDE_DIRECTORIES(qu8-igemm-minmax-fp32-test PRIVATE include src test)
7689 TARGET_LINK_LIBRARIES(qu8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]7690 ADD_TEST(qu8-igemm-minmax-fp32-test qu8-igemm-minmax-fp32-test)
7691
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7692 ADD_EXECUTABLE(qu8-igemm-minmax-rndnu-test test/qu8-igemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]7693 SET_TARGET_PROPERTIES(qu8-igemm-minmax-rndnu-test PROPERTIES
7694 CXX_STANDARD 11
7695 CXX_STANDARD_REQUIRED YES
7696 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7697 TARGET_INCLUDE_DIRECTORIES(qu8-igemm-minmax-rndnu-test PRIVATE include src test)
7698 TARGET_LINK_LIBRARIES(qu8-igemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]7699 ADD_TEST(qu8-igemm-minmax-rndnu-test qu8-igemm-minmax-rndnu-test)
7700
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7701 ADD_EXECUTABLE(qu8-requantization-test test/qu8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]7702 SET_TARGET_PROPERTIES(qu8-requantization-test PROPERTIES
7703 CXX_STANDARD 11
7704 CXX_STANDARD_REQUIRED YES
7705 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7706 TARGET_INCLUDE_DIRECTORIES(qu8-requantization-test PRIVATE include src test)
7707 TARGET_LINK_LIBRARIES(qu8-requantization-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]7708 ADD_TEST(qu8-requantization-test qu8-requantization-test)
7709
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7710 ADD_EXECUTABLE(qu8-vadd-minmax-test test/qu8-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7711 SET_TARGET_PROPERTIES(qu8-vadd-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7712 CXX_STANDARD 11
7713 CXX_STANDARD_REQUIRED YES
7714 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7715 TARGET_INCLUDE_DIRECTORIES(qu8-vadd-minmax-test PRIVATE include src test)
7716 TARGET_LINK_LIBRARIES(qu8-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7717 ADD_TEST(qu8-vadd-minmax-test qu8-vadd-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7718
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7719 ADD_EXECUTABLE(qu8-vaddc-minmax-test test/qu8-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]7720 SET_TARGET_PROPERTIES(qu8-vaddc-minmax-test PROPERTIES
7721 CXX_STANDARD 11
7722 CXX_STANDARD_REQUIRED YES
7723 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7724 TARGET_INCLUDE_DIRECTORIES(qu8-vaddc-minmax-test PRIVATE include src test)
7725 TARGET_LINK_LIBRARIES(qu8-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]7726 ADD_TEST(qu8-vaddc-minmax-test qu8-vaddc-minmax-test)
7727
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]7728 ADD_EXECUTABLE(qu8-vmul-minmax-fp32-test test/qu8-vmul-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
7729 SET_TARGET_PROPERTIES(qu8-vmul-minmax-fp32-test PROPERTIES
7730 CXX_STANDARD 11
7731 CXX_STANDARD_REQUIRED YES
7732 CXX_EXTENSIONS YES)
7733 TARGET_INCLUDE_DIRECTORIES(qu8-vmul-minmax-fp32-test PRIVATE include src test)
7734 TARGET_LINK_LIBRARIES(qu8-vmul-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7735 ADD_TEST(qu8-vmul-minmax-fp32-test qu8-vmul-minmax-fp32-test)
7736
7737 ADD_EXECUTABLE(qu8-vmulc-minmax-fp32-test test/qu8-vmulc-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
7738 SET_TARGET_PROPERTIES(qu8-vmulc-minmax-fp32-test PROPERTIES
7739 CXX_STANDARD 11
7740 CXX_STANDARD_REQUIRED YES
7741 CXX_EXTENSIONS YES)
7742 TARGET_INCLUDE_DIRECTORIES(qu8-vmulc-minmax-fp32-test PRIVATE include src test)
7743 TARGET_LINK_LIBRARIES(qu8-vmulc-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7744 ADD_TEST(qu8-vmulc-minmax-fp32-test qu8-vmulc-minmax-fp32-test)
7745
Marat Dukhan95510752021-12-01 22:00:56 -0800[diff] [blame]7746 ADD_EXECUTABLE(s8-ibilinear-test test/s8-ibilinear.cc $<TARGET_OBJECTS:all_microkernels>)
7747 SET_TARGET_PROPERTIES(s8-ibilinear-test PROPERTIES
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]7748 CXX_STANDARD 11
7749 CXX_STANDARD_REQUIRED YES
7750 CXX_EXTENSIONS YES)
Marat Dukhan95510752021-12-01 22:00:56 -0800[diff] [blame]7751 TARGET_INCLUDE_DIRECTORIES(s8-ibilinear-test PRIVATE include src test)
7752 TARGET_LINK_LIBRARIES(s8-ibilinear-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7753 ADD_TEST(s8-ibilinear-test s8-ibilinear-test)
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]7754
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]7755 ADD_EXECUTABLE(s8-maxpool-minmax-test test/s8-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
7756 SET_TARGET_PROPERTIES(s8-maxpool-minmax-test PROPERTIES
7757 CXX_STANDARD 11
7758 CXX_STANDARD_REQUIRED YES
7759 CXX_EXTENSIONS YES)
7760 TARGET_INCLUDE_DIRECTORIES(s8-maxpool-minmax-test PRIVATE include src test)
7761 TARGET_LINK_LIBRARIES(s8-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7762 ADD_TEST(s8-maxpool-minmax-test s8-maxpool-minmax-test)
7763
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]7764 ADD_EXECUTABLE(s8-vclamp-test test/s8-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
7765 SET_TARGET_PROPERTIES(s8-vclamp-test PROPERTIES
7766 CXX_STANDARD 11
7767 CXX_STANDARD_REQUIRED YES
7768 CXX_EXTENSIONS YES)
7769 TARGET_INCLUDE_DIRECTORIES(s8-vclamp-test PRIVATE include src test)
7770 TARGET_LINK_LIBRARIES(s8-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7771 ADD_TEST(s8-vclamp-test s8-vclamp-test)
7772
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7773 ADD_EXECUTABLE(u8-lut32norm-test test/u8-lut32norm.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7774 SET_TARGET_PROPERTIES(u8-lut32norm-test PROPERTIES
7775 CXX_STANDARD 11
7776 CXX_STANDARD_REQUIRED YES
7777 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7778 TARGET_INCLUDE_DIRECTORIES(u8-lut32norm-test PRIVATE include src test)
7779 TARGET_LINK_LIBRARIES(u8-lut32norm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7780 ADD_TEST(u8-lut32norm-test u8-lut32norm-test)
7781
Marat Dukhan95510752021-12-01 22:00:56 -0800[diff] [blame]7782 ADD_EXECUTABLE(u8-ibilinear-test test/u8-ibilinear.cc $<TARGET_OBJECTS:all_microkernels>)
7783 SET_TARGET_PROPERTIES(u8-ibilinear-test PROPERTIES
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]7784 CXX_STANDARD 11
7785 CXX_STANDARD_REQUIRED YES
7786 CXX_EXTENSIONS YES)
Marat Dukhan95510752021-12-01 22:00:56 -0800[diff] [blame]7787 TARGET_INCLUDE_DIRECTORIES(u8-ibilinear-test PRIVATE include src test)
7788 TARGET_LINK_LIBRARIES(u8-ibilinear-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7789 ADD_TEST(u8-ibilinear-test u8-ibilinear-test)
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]7790
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7791 ADD_EXECUTABLE(u8-maxpool-minmax-test test/u8-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]7792 SET_TARGET_PROPERTIES(u8-maxpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7793 CXX_STANDARD 11
7794 CXX_STANDARD_REQUIRED YES
7795 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7796 TARGET_INCLUDE_DIRECTORIES(u8-maxpool-minmax-test PRIVATE include src test)
7797 TARGET_LINK_LIBRARIES(u8-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]7798 ADD_TEST(u8-maxpool-minmax-test u8-maxpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7799
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7800 ADD_EXECUTABLE(u8-rmax-test test/u8-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7801 SET_TARGET_PROPERTIES(u8-rmax-test PROPERTIES
7802 CXX_STANDARD 11
7803 CXX_STANDARD_REQUIRED YES
7804 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7805 TARGET_INCLUDE_DIRECTORIES(u8-rmax-test PRIVATE include src test)
7806 TARGET_LINK_LIBRARIES(u8-rmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7807 ADD_TEST(u8-rmax-test u8-rmax-test)
7808
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7809 ADD_EXECUTABLE(u8-vclamp-test test/u8-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7810 SET_TARGET_PROPERTIES(u8-vclamp-test PROPERTIES
7811 CXX_STANDARD 11
7812 CXX_STANDARD_REQUIRED YES
7813 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7814 TARGET_INCLUDE_DIRECTORIES(u8-vclamp-test PRIVATE include src test)
7815 TARGET_LINK_LIBRARIES(u8-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7816 ADD_TEST(u8-vclamp-test u8-vclamp-test)
7817
Alan Kelly1945f0b2021-12-24 01:26:45 -0800[diff] [blame]7818 ADD_EXECUTABLE(x16-transpose-test test/x16-transpose.cc $<TARGET_OBJECTS:all_microkernels>)
7819 SET_TARGET_PROPERTIES(x16-transpose-test PROPERTIES
7820 CXX_STANDARD 11
7821 CXX_STANDARD_REQUIRED YES
7822 CXX_EXTENSIONS YES)
7823 TARGET_INCLUDE_DIRECTORIES(x16-transpose-test PRIVATE include src test)
7824 TARGET_LINK_LIBRARIES(x16-transpose-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7825 ADD_TEST(x16-transpose-test x16-transpose-test)
7826
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7827 ADD_EXECUTABLE(x32-packx-test test/x32-packx.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7828 SET_TARGET_PROPERTIES(x32-packx-test PROPERTIES
7829 CXX_STANDARD 11
7830 CXX_STANDARD_REQUIRED YES
7831 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7832 TARGET_INCLUDE_DIRECTORIES(x32-packx-test PRIVATE include src test)
7833 TARGET_LINK_LIBRARIES(x32-packx-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7834 ADD_TEST(x32-packx-test x32-packx-test)
7835
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7836 ADD_EXECUTABLE(x32-unpool-test test/x32-unpool.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7837 SET_TARGET_PROPERTIES(x32-unpool-test PROPERTIES
7838 CXX_STANDARD 11
7839 CXX_STANDARD_REQUIRED YES
7840 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7841 TARGET_INCLUDE_DIRECTORIES(x32-unpool-test PRIVATE include src test)
7842 TARGET_LINK_LIBRARIES(x32-unpool-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7843 ADD_TEST(x32-unpool-test x32-unpool-test)
7844
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7845 ADD_EXECUTABLE(x32-depthtospace2d-chw2hwc-test test/x32-depthtospace2d-chw2hwc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]7846 SET_TARGET_PROPERTIES(x32-depthtospace2d-chw2hwc-test PROPERTIES
Yury Kartynnike7841862020-11-04 18:22:18 -0800[diff] [blame]7847 CXX_STANDARD 11
7848 CXX_STANDARD_REQUIRED YES
7849 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7850 TARGET_INCLUDE_DIRECTORIES(x32-depthtospace2d-chw2hwc-test PRIVATE include src test)
7851 TARGET_LINK_LIBRARIES(x32-depthtospace2d-chw2hwc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]7852 ADD_TEST(x32-depthtospace2d-chw2hwc-test x32-depthtospace2d-chw2hwc-test)
Yury Kartynnike7841862020-11-04 18:22:18 -0800[diff] [blame]7853
Alan Kellyfda06cb2021-12-15 03:30:32 -0800[diff] [blame]7854 ADD_EXECUTABLE(x32-transpose-test test/x32-transpose.cc $<TARGET_OBJECTS:all_microkernels>)
7855 SET_TARGET_PROPERTIES(x32-transpose-test PROPERTIES
7856 CXX_STANDARD 11
7857 CXX_STANDARD_REQUIRED YES
7858 CXX_EXTENSIONS YES)
7859 TARGET_INCLUDE_DIRECTORIES(x32-transpose-test PRIVATE include src test)
7860 TARGET_LINK_LIBRARIES(x32-transpose-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7861 ADD_TEST(x32-transpose-test x32-transpose-test)
7862
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7863 ADD_EXECUTABLE(x32-zip-test test/x32-zip.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7864 SET_TARGET_PROPERTIES(x32-zip-test PROPERTIES
7865 CXX_STANDARD 11
7866 CXX_STANDARD_REQUIRED YES
7867 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7868 TARGET_INCLUDE_DIRECTORIES(x32-zip-test PRIVATE include src test)
7869 TARGET_LINK_LIBRARIES(x32-zip-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7870 ADD_TEST(x32-zip-test x32-zip-test)
7871
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7872 ADD_EXECUTABLE(x8-lut-test test/x8-lut.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7873 SET_TARGET_PROPERTIES(x8-lut-test PROPERTIES
7874 CXX_STANDARD 11
7875 CXX_STANDARD_REQUIRED YES
7876 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7877 TARGET_INCLUDE_DIRECTORIES(x8-lut-test PRIVATE include src test)
7878 TARGET_LINK_LIBRARIES(x8-lut-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7879 ADD_TEST(x8-lut-test x8-lut-test)
7880
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7881 ADD_EXECUTABLE(x8-zip-test test/x8-zip.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7882 SET_TARGET_PROPERTIES(x8-zip-test PROPERTIES
7883 CXX_STANDARD 11
7884 CXX_STANDARD_REQUIRED YES
7885 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7886 TARGET_INCLUDE_DIRECTORIES(x8-zip-test PRIVATE include src test)
7887 TARGET_LINK_LIBRARIES(x8-zip-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7888 ADD_TEST(x8-zip-test x8-zip-test)
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]7889
7890 ADD_EXECUTABLE(xx-fill-test test/xx-fill.cc $<TARGET_OBJECTS:all_microkernels>)
7891 SET_TARGET_PROPERTIES(xx-fill-test PROPERTIES
7892 CXX_STANDARD 11
7893 CXX_STANDARD_REQUIRED YES
7894 CXX_EXTENSIONS YES)
7895 TARGET_INCLUDE_DIRECTORIES(xx-fill-test PRIVATE include src test)
7896 TARGET_LINK_LIBRARIES(xx-fill-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7897 ADD_TEST(xx-fill-test xx-fill-test)
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]7898
7899 ADD_EXECUTABLE(xx-pad-test test/xx-pad.cc $<TARGET_OBJECTS:all_microkernels>)
7900 SET_TARGET_PROPERTIES(xx-pad-test PROPERTIES
7901 CXX_STANDARD 11
7902 CXX_STANDARD_REQUIRED YES
7903 CXX_EXTENSIONS YES)
7904 TARGET_INCLUDE_DIRECTORIES(xx-pad-test PRIVATE include src test)
7905 TARGET_LINK_LIBRARIES(xx-pad-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7906 ADD_TEST(xx-pad-test xx-pad-test)
Zhi An Ngb559fe92021-12-06 09:25:38 -0800[diff] [blame]7907
7908 ADD_EXECUTABLE(aarch32-assembler-test test/aarch32-assembler.cc $<TARGET_OBJECTS:jit>)
7909 SET_TARGET_PROPERTIES(aarch32-assembler-test PROPERTIES
7910 CXX_STANDARD 11
7911 CXX_STANDARD_REQUIRED YES
7912 CXX_EXTENSIONS YES)
Marat Dukhan1e9c5ac2021-12-21 14:59:17 -0800[diff] [blame]7913 TARGET_INCLUDE_DIRECTORIES(aarch32-assembler-test PRIVATE include src)
7914 TARGET_LINK_LIBRARIES(aarch32-assembler-test PRIVATE pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7915ENDIF()
7916
7917# ---[ XNNPACK microbenchmarks
7918IF(XNNPACK_BUILD_BENCHMARKS)
7919 # ---[ Build google benchmark
7920 IF(NOT TARGET benchmark)
7921 SET(BENCHMARK_ENABLE_TESTING OFF CACHE BOOL "")
7922 ADD_SUBDIRECTORY(
7923 "${GOOGLEBENCHMARK_SOURCE_DIR}"
7924 "${CONFU_DEPENDENCIES_BINARY_DIR}/googlebenchmark")
7925 ENDIF()
7926
7927 ADD_LIBRARY(bench-utils bench/utils.cc)
7928 SET_TARGET_PROPERTIES(bench-utils PROPERTIES
7929 CXX_STANDARD 11
7930 CXX_STANDARD_REQUIRED YES
7931 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7932 TARGET_INCLUDE_DIRECTORIES(bench-utils PRIVATE .)
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]7933 TARGET_LINK_LIBRARIES(bench-utils PRIVATE benchmark cpuinfo)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7934
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7935 # ---[ Build accuracy microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7936 ADD_EXECUTABLE(f32-exp-ulp-eval eval/f32-exp-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7937 SET_TARGET_PROPERTIES(f32-exp-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7938 CXX_STANDARD 11
7939 CXX_STANDARD_REQUIRED YES
7940 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7941 TARGET_INCLUDE_DIRECTORIES(f32-exp-ulp-eval PRIVATE . src)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7942 TARGET_LINK_LIBRARIES(f32-exp-ulp-eval PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7943
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7944 ADD_EXECUTABLE(f32-expminus-ulp-eval eval/f32-expminus-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7945 SET_TARGET_PROPERTIES(f32-expminus-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7946 CXX_STANDARD 11
7947 CXX_STANDARD_REQUIRED YES
7948 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7949 TARGET_INCLUDE_DIRECTORIES(f32-expminus-ulp-eval PRIVATE . src)
7950 TARGET_LINK_LIBRARIES(f32-expminus-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7951
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7952 ADD_EXECUTABLE(f32-expm1minus-ulp-eval eval/f32-expm1minus-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7953 SET_TARGET_PROPERTIES(f32-expm1minus-ulp-eval PROPERTIES
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]7954 CXX_STANDARD 11
7955 CXX_STANDARD_REQUIRED YES
7956 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7957 TARGET_INCLUDE_DIRECTORIES(f32-expm1minus-ulp-eval PRIVATE . src)
7958 TARGET_LINK_LIBRARIES(f32-expm1minus-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]7959
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7960 ADD_EXECUTABLE(f32-extexp-ulp-eval eval/f32-extexp-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7961 SET_TARGET_PROPERTIES(f32-extexp-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7962 CXX_STANDARD 11
7963 CXX_STANDARD_REQUIRED YES
7964 CXX_EXTENSIONS YES)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7965 TARGET_INCLUDE_DIRECTORIES(f32-extexp-ulp-eval PRIVATE . src)
7966 TARGET_LINK_LIBRARIES(f32-extexp-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7967
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7968 ADD_EXECUTABLE(f32-sigmoid-ulp-eval eval/f32-sigmoid-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7969 SET_TARGET_PROPERTIES(f32-sigmoid-ulp-eval PROPERTIES
7970 CXX_STANDARD 11
7971 CXX_STANDARD_REQUIRED YES
7972 CXX_EXTENSIONS NO)
7973 TARGET_INCLUDE_DIRECTORIES(f32-sigmoid-ulp-eval PRIVATE . src)
7974 TARGET_LINK_LIBRARIES(f32-sigmoid-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
7975
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7976 ADD_EXECUTABLE(f32-sqrt-ulp-eval eval/f32-sqrt-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7977 SET_TARGET_PROPERTIES(f32-sqrt-ulp-eval PROPERTIES
7978 CXX_STANDARD 11
7979 CXX_STANDARD_REQUIRED YES
7980 CXX_EXTENSIONS NO)
7981 TARGET_INCLUDE_DIRECTORIES(f32-sqrt-ulp-eval PRIVATE . src)
7982 TARGET_LINK_LIBRARIES(f32-sqrt-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
7983
7984 # ---[ Build accuracy tests
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]7985 ADD_EXECUTABLE(f16-f32-cvt-eval eval/f16-f32-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
7986 SET_TARGET_PROPERTIES(f16-f32-cvt-eval PROPERTIES
7987 CXX_STANDARD 11
7988 CXX_STANDARD_REQUIRED YES
7989 CXX_EXTENSIONS NO)
7990 TARGET_INCLUDE_DIRECTORIES(f16-f32-cvt-eval PRIVATE include src)
7991 TARGET_LINK_LIBRARIES(f16-f32-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7992
Marat Dukhan582e1842021-10-25 17:18:36 -0700[diff] [blame]7993 ADD_EXECUTABLE(f32-f16-cvt-eval eval/f32-f16-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
7994 SET_TARGET_PROPERTIES(f32-f16-cvt-eval PROPERTIES
7995 CXX_STANDARD 11
7996 CXX_STANDARD_REQUIRED YES
7997 CXX_EXTENSIONS NO)
7998 TARGET_INCLUDE_DIRECTORIES(f32-f16-cvt-eval PRIVATE include src)
7999 TARGET_LINK_LIBRARIES(f32-f16-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
8000
Marat Dukhand24301d2021-12-02 00:13:45 -0800[diff] [blame]8001 ADD_EXECUTABLE(f32-qs8-cvt-eval eval/f32-qs8-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
8002 SET_TARGET_PROPERTIES(f32-qs8-cvt-eval PROPERTIES
8003 CXX_STANDARD 11
8004 CXX_STANDARD_REQUIRED YES
8005 CXX_EXTENSIONS NO)
8006 TARGET_INCLUDE_DIRECTORIES(f32-qs8-cvt-eval PRIVATE include src)
8007 TARGET_LINK_LIBRARIES(f32-qs8-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
8008
8009 ADD_EXECUTABLE(f32-qu8-cvt-eval eval/f32-qu8-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
8010 SET_TARGET_PROPERTIES(f32-qu8-cvt-eval PROPERTIES
8011 CXX_STANDARD 11
8012 CXX_STANDARD_REQUIRED YES
8013 CXX_EXTENSIONS NO)
8014 TARGET_INCLUDE_DIRECTORIES(f32-qu8-cvt-eval PRIVATE include src)
8015 TARGET_LINK_LIBRARIES(f32-qu8-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
8016
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8017 ADD_EXECUTABLE(f32-exp-eval eval/f32-exp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf7291fc2020-12-15 11:02:50 -0800[diff] [blame]8018 SET_TARGET_PROPERTIES(f32-exp-eval PROPERTIES
8019 CXX_STANDARD 11
8020 CXX_STANDARD_REQUIRED YES
8021 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8022 TARGET_INCLUDE_DIRECTORIES(f32-exp-eval PRIVATE include src)
8023 TARGET_LINK_LIBRARIES(f32-exp-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf7291fc2020-12-15 11:02:50 -0800[diff] [blame]8024
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8025 ADD_EXECUTABLE(f32-expm1minus-eval eval/f32-expm1minus.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]8026 SET_TARGET_PROPERTIES(f32-expm1minus-eval PROPERTIES
8027 CXX_STANDARD 11
8028 CXX_STANDARD_REQUIRED YES
8029 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8030 TARGET_INCLUDE_DIRECTORIES(f32-expm1minus-eval PRIVATE include src)
8031 TARGET_LINK_LIBRARIES(f32-expm1minus-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]8032
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8033 ADD_EXECUTABLE(f32-expminus-eval eval/f32-expminus.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand28a5a22020-12-14 15:27:22 -0800[diff] [blame]8034 SET_TARGET_PROPERTIES(f32-expminus-eval PROPERTIES
8035 CXX_STANDARD 11
8036 CXX_STANDARD_REQUIRED YES
8037 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8038 TARGET_INCLUDE_DIRECTORIES(f32-expminus-eval PRIVATE include src)
8039 TARGET_LINK_LIBRARIES(f32-expminus-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand28a5a22020-12-14 15:27:22 -0800[diff] [blame]8040
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8041 ADD_EXECUTABLE(f32-roundne-eval eval/f32-roundne.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf35d73b2020-05-11 19:15:04 -0700[diff] [blame]8042 SET_TARGET_PROPERTIES(f32-roundne-eval PROPERTIES
8043 CXX_STANDARD 11
8044 CXX_STANDARD_REQUIRED YES
8045 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8046 TARGET_INCLUDE_DIRECTORIES(f32-roundne-eval PRIVATE include src)
8047 TARGET_LINK_LIBRARIES(f32-roundne-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf35d73b2020-05-11 19:15:04 -0700[diff] [blame]8048
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8049 ADD_EXECUTABLE(f32-roundd-eval eval/f32-roundd.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]8050 SET_TARGET_PROPERTIES(f32-roundd-eval PROPERTIES
8051 CXX_STANDARD 11
8052 CXX_STANDARD_REQUIRED YES
8053 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8054 TARGET_INCLUDE_DIRECTORIES(f32-roundd-eval PRIVATE include src)
8055 TARGET_LINK_LIBRARIES(f32-roundd-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]8056
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8057 ADD_EXECUTABLE(f32-roundu-eval eval/f32-roundu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]8058 SET_TARGET_PROPERTIES(f32-roundu-eval PROPERTIES
8059 CXX_STANDARD 11
8060 CXX_STANDARD_REQUIRED YES
8061 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8062 TARGET_INCLUDE_DIRECTORIES(f32-roundu-eval PRIVATE include src)
8063 TARGET_LINK_LIBRARIES(f32-roundu-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]8064
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8065 ADD_EXECUTABLE(f32-roundz-eval eval/f32-roundz.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]8066 SET_TARGET_PROPERTIES(f32-roundz-eval PROPERTIES
8067 CXX_STANDARD 11
8068 CXX_STANDARD_REQUIRED YES
8069 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8070 TARGET_INCLUDE_DIRECTORIES(f32-roundz-eval PRIVATE include src)
8071 TARGET_LINK_LIBRARIES(f32-roundz-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]8072
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]8073 # ---[ Build end-to-end microbenchmarks
Marat Dukhan17e16282019-12-10 12:09:35 -0800[diff] [blame]8074 ADD_LIBRARY(bench-models STATIC
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]8075 models/fp16-mobilenet-v1.cc
8076 models/fp32-mobilenet-v1.cc
Marat Dukhane252f922021-08-31 08:57:41 -0700[diff] [blame]8077 models/qc8-mobilenet-v1.cc
8078 models/qc8-mobilenet-v2.cc
Marat Dukhan0743cdf2020-08-04 18:52:07 -0700[diff] [blame]8079 models/qs8-mobilenet-v1.cc
Marat Dukhan70a96182020-09-03 17:13:58 -0700[diff] [blame]8080 models/qs8-mobilenet-v2.cc
Marat Dukhan12a23bb2021-03-08 08:13:21 -0800[diff] [blame]8081 models/qu8-mobilenet-v1.cc
Marat Dukhan036b2b12021-07-21 01:12:58 -0700[diff] [blame]8082 models/qu8-mobilenet-v2.cc
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]8083 models/fp16-mobilenet-v2.cc
8084 models/fp32-mobilenet-v2.cc
Marat Dukhan66f3ccd2020-09-14 16:09:38 -0700[diff] [blame]8085 models/fp16-mobilenet-v3-large.cc
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]8086 models/fp32-mobilenet-v3-large.cc
Marat Dukhan66f3ccd2020-09-14 16:09:38 -0700[diff] [blame]8087 models/fp16-mobilenet-v3-small.cc
Marat Dukhan4cea2322021-03-09 09:35:36 -0800[diff] [blame]8088 models/fp32-mobilenet-v3-small.cc
8089 models/fp32-sparse-mobilenet-v1.cc
8090 models/fp32-sparse-mobilenet-v2.cc
8091 models/fp32-sparse-mobilenet-v3-large.cc
8092 models/fp32-sparse-mobilenet-v3-small.cc)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]8093 SET_TARGET_PROPERTIES(bench-models PROPERTIES
8094 CXX_STANDARD 11
8095 CXX_STANDARD_REQUIRED YES
8096 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8097 TARGET_INCLUDE_DIRECTORIES(bench-models PRIVATE .)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]8098 TARGET_LINK_LIBRARIES(bench-models PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]8099
8100 ADD_EXECUTABLE(end2end-bench bench/end2end.cc)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8101 SET_TARGET_PROPERTIES(end2end-bench PROPERTIES
8102 CXX_STANDARD 11
8103 CXX_STANDARD_REQUIRED YES
8104 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8105 TARGET_INCLUDE_DIRECTORIES(end2end-bench PRIVATE .)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]8106 TARGET_LINK_LIBRARIES(end2end-bench PRIVATE XNNPACK benchmark bench-models bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8107
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8108 ADD_EXECUTABLE(f32-dwconv-e2e-bench bench/f32-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]8109 SET_TARGET_PROPERTIES(f32-dwconv-e2e-bench PROPERTIES
8110 CXX_STANDARD 11
8111 CXX_STANDARD_REQUIRED YES
8112 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8113 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-e2e-bench PRIVATE . src)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]8114 TARGET_LINK_LIBRARIES(f32-dwconv-e2e-bench PRIVATE XNNPACK benchmark bench-models bench-utils)
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]8115
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8116 ADD_EXECUTABLE(f32-gemm-e2e-bench bench/f32-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0a5a53f2019-10-31 10:58:31 -0700[diff] [blame]8117 SET_TARGET_PROPERTIES(f32-gemm-e2e-bench PROPERTIES
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]8118 CXX_STANDARD 11
8119 CXX_STANDARD_REQUIRED YES
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]8120 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8121 TARGET_INCLUDE_DIRECTORIES(f32-gemm-e2e-bench PRIVATE . src)
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]8122 TARGET_LINK_LIBRARIES(f32-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]8123
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8124 ADD_EXECUTABLE(qs8-dwconv-e2e-bench bench/qs8-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanbbfc6d32021-07-26 18:31:02 -0700[diff] [blame]8125 SET_TARGET_PROPERTIES(qs8-dwconv-e2e-bench PROPERTIES
8126 CXX_STANDARD 11
8127 CXX_STANDARD_REQUIRED YES
8128 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8129 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-e2e-bench PRIVATE . src)
Marat Dukhanbbfc6d32021-07-26 18:31:02 -0700[diff] [blame]8130 TARGET_LINK_LIBRARIES(qs8-dwconv-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
8131
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8132 ADD_EXECUTABLE(qs8-gemm-e2e-bench bench/qs8-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barcharddc909cb2021-02-08 13:59:31 -0800[diff] [blame]8133 SET_TARGET_PROPERTIES(qs8-gemm-e2e-bench PROPERTIES
8134 CXX_STANDARD 11
8135 CXX_STANDARD_REQUIRED YES
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]8136 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8137 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-e2e-bench PRIVATE . src)
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]8138 TARGET_LINK_LIBRARIES(qs8-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
Frank Barcharddc909cb2021-02-08 13:59:31 -0800[diff] [blame]8139
Frank Barchard9098aba2021-08-12 12:20:03 -0700[diff] [blame]8140 ADD_EXECUTABLE(qu8-gemm-e2e-bench bench/qu8-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
8141 SET_TARGET_PROPERTIES(qu8-gemm-e2e-bench PROPERTIES
8142 CXX_STANDARD 11
8143 CXX_STANDARD_REQUIRED YES
8144 CXX_EXTENSIONS YES)
8145 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-e2e-bench PRIVATE . src)
8146 TARGET_LINK_LIBRARIES(qu8-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
8147
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8148 ADD_EXECUTABLE(qu8-dwconv-e2e-bench bench/qu8-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6084fb82021-07-27 07:45:02 -0700[diff] [blame]8149 SET_TARGET_PROPERTIES(qu8-dwconv-e2e-bench PROPERTIES
8150 CXX_STANDARD 11
8151 CXX_STANDARD_REQUIRED YES
8152 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8153 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-e2e-bench PRIVATE . src)
Marat Dukhan6084fb82021-07-27 07:45:02 -0700[diff] [blame]8154 TARGET_LINK_LIBRARIES(qu8-dwconv-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
8155
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8156 # ---[ Build operator-level microbenchmarks
Marat Dukhan3ddc20c2021-12-31 10:15:28 -0800[diff] [blame]8157 ADD_EXECUTABLE(abs-bench bench/abs.cc $<TARGET_OBJECTS:all_microkernels>)
8158 SET_TARGET_PROPERTIES(abs-bench PROPERTIES
8159 CXX_STANDARD 11
8160 CXX_STANDARD_REQUIRED YES
8161 CXX_EXTENSIONS NO)
8162 TARGET_INCLUDE_DIRECTORIES(abs-bench PRIVATE .)
8163 TARGET_LINK_LIBRARIES(abs-bench PRIVATE XNNPACK benchmark bench-utils)
8164
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8165 ADD_EXECUTABLE(average-pooling-bench bench/average-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8166 SET_TARGET_PROPERTIES(average-pooling-bench PROPERTIES
8167 CXX_STANDARD 11
8168 CXX_STANDARD_REQUIRED YES
8169 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8170 TARGET_INCLUDE_DIRECTORIES(average-pooling-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]8171 TARGET_LINK_LIBRARIES(average-pooling-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8172
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8173 ADD_EXECUTABLE(bankers-rounding-bench bench/bankers-rounding.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]8174 SET_TARGET_PROPERTIES(bankers-rounding-bench PROPERTIES
8175 CXX_STANDARD 11
8176 CXX_STANDARD_REQUIRED YES
8177 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8178 TARGET_INCLUDE_DIRECTORIES(bankers-rounding-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]8179 TARGET_LINK_LIBRARIES(bankers-rounding-bench PRIVATE XNNPACK benchmark bench-utils)
8180
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8181 ADD_EXECUTABLE(ceiling-bench bench/ceiling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]8182 SET_TARGET_PROPERTIES(ceiling-bench PROPERTIES
8183 CXX_STANDARD 11
8184 CXX_STANDARD_REQUIRED YES
8185 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8186 TARGET_INCLUDE_DIRECTORIES(ceiling-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]8187 TARGET_LINK_LIBRARIES(ceiling-bench PRIVATE XNNPACK benchmark bench-utils)
8188
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8189 ADD_EXECUTABLE(channel-shuffle-bench bench/channel-shuffle.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8190 SET_TARGET_PROPERTIES(channel-shuffle-bench PROPERTIES
8191 CXX_STANDARD 11
8192 CXX_STANDARD_REQUIRED YES
8193 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8194 TARGET_INCLUDE_DIRECTORIES(channel-shuffle-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]8195 TARGET_LINK_LIBRARIES(channel-shuffle-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8196
Marat Dukhan710fb422021-12-13 16:32:26 -0800[diff] [blame]8197 ADD_EXECUTABLE(convert-bench bench/convert.cc $<TARGET_OBJECTS:all_microkernels>)
8198 SET_TARGET_PROPERTIES(convert-bench PROPERTIES
8199 CXX_STANDARD 11
8200 CXX_STANDARD_REQUIRED YES
8201 CXX_EXTENSIONS NO)
8202 TARGET_INCLUDE_DIRECTORIES(convert-bench PRIVATE .)
Marat Dukhan1e9c5ac2021-12-21 14:59:17 -0800[diff] [blame]8203 TARGET_LINK_LIBRARIES(convert-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhan710fb422021-12-13 16:32:26 -0800[diff] [blame]8204
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8205 ADD_EXECUTABLE(convolution-bench bench/convolution.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8206 SET_TARGET_PROPERTIES(convolution-bench PROPERTIES
8207 CXX_STANDARD 11
8208 CXX_STANDARD_REQUIRED YES
8209 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8210 TARGET_INCLUDE_DIRECTORIES(convolution-bench PRIVATE .)
Frank Barchard49b4dcc2020-06-26 14:07:19 -0700[diff] [blame]8211 TARGET_LINK_LIBRARIES(convolution-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8212
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8213 ADD_EXECUTABLE(deconvolution-bench bench/deconvolution.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8214 SET_TARGET_PROPERTIES(deconvolution-bench PROPERTIES
8215 CXX_STANDARD 11
8216 CXX_STANDARD_REQUIRED YES
8217 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8218 TARGET_INCLUDE_DIRECTORIES(deconvolution-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]8219 TARGET_LINK_LIBRARIES(deconvolution-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8220
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8221 ADD_EXECUTABLE(elu-bench bench/elu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]8222 SET_TARGET_PROPERTIES(elu-bench PROPERTIES
8223 CXX_STANDARD 11
8224 CXX_STANDARD_REQUIRED YES
8225 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8226 TARGET_INCLUDE_DIRECTORIES(elu-bench PRIVATE .)
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]8227 TARGET_LINK_LIBRARIES(elu-bench PRIVATE XNNPACK benchmark bench-utils)
8228
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8229 ADD_EXECUTABLE(floor-bench bench/floor.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]8230 SET_TARGET_PROPERTIES(floor-bench PROPERTIES
8231 CXX_STANDARD 11
8232 CXX_STANDARD_REQUIRED YES
8233 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8234 TARGET_INCLUDE_DIRECTORIES(floor-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]8235 TARGET_LINK_LIBRARIES(floor-bench PRIVATE XNNPACK benchmark bench-utils)
8236
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8237 ADD_EXECUTABLE(global-average-pooling-bench bench/global-average-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8238 SET_TARGET_PROPERTIES(global-average-pooling-bench PROPERTIES
8239 CXX_STANDARD 11
8240 CXX_STANDARD_REQUIRED YES
8241 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8242 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-bench PRIVATE .)
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]8243 TARGET_LINK_LIBRARIES(global-average-pooling-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8244
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8245 ADD_EXECUTABLE(hardswish-bench bench/hardswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]8246 SET_TARGET_PROPERTIES(hardswish-bench PROPERTIES
8247 CXX_STANDARD 11
8248 CXX_STANDARD_REQUIRED YES
8249 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8250 TARGET_INCLUDE_DIRECTORIES(hardswish-bench PRIVATE .)
Marat Dukhanae24dfc2020-09-23 17:12:45 -0700[diff] [blame]8251 TARGET_LINK_LIBRARIES(hardswish-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]8252
Marat Dukhan5c7fd892021-12-30 16:04:23 -0800[diff] [blame]8253 ADD_EXECUTABLE(leaky-relu-bench bench/leaky-relu.cc $<TARGET_OBJECTS:all_microkernels>)
8254 SET_TARGET_PROPERTIES(leaky-relu-bench PROPERTIES
8255 CXX_STANDARD 11
8256 CXX_STANDARD_REQUIRED YES
8257 CXX_EXTENSIONS NO)
8258 TARGET_INCLUDE_DIRECTORIES(leaky-relu-bench PRIVATE .)
8259 TARGET_LINK_LIBRARIES(leaky-relu-bench PRIVATE XNNPACK benchmark bench-utils)
8260
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8261 ADD_EXECUTABLE(max-pooling-bench bench/max-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8262 SET_TARGET_PROPERTIES(max-pooling-bench PROPERTIES
8263 CXX_STANDARD 11
8264 CXX_STANDARD_REQUIRED YES
8265 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8266 TARGET_INCLUDE_DIRECTORIES(max-pooling-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]8267 TARGET_LINK_LIBRARIES(max-pooling-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8268
Marat Dukhan3ddc20c2021-12-31 10:15:28 -0800[diff] [blame]8269 ADD_EXECUTABLE(negate-bench bench/negate.cc $<TARGET_OBJECTS:all_microkernels>)
8270 SET_TARGET_PROPERTIES(negate-bench PROPERTIES
8271 CXX_STANDARD 11
8272 CXX_STANDARD_REQUIRED YES
8273 CXX_EXTENSIONS NO)
8274 TARGET_INCLUDE_DIRECTORIES(negate-bench PRIVATE .)
8275 TARGET_LINK_LIBRARIES(negate-bench PRIVATE XNNPACK benchmark bench-utils)
8276
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8277 ADD_EXECUTABLE(prelu-bench bench/prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]8278 SET_TARGET_PROPERTIES(prelu-bench PROPERTIES
8279 CXX_STANDARD 11
8280 CXX_STANDARD_REQUIRED YES
8281 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8282 TARGET_INCLUDE_DIRECTORIES(prelu-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]8283 TARGET_LINK_LIBRARIES(prelu-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]8284
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8285 ADD_EXECUTABLE(sigmoid-bench bench/sigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8286 SET_TARGET_PROPERTIES(sigmoid-bench PROPERTIES
8287 CXX_STANDARD 11
8288 CXX_STANDARD_REQUIRED YES
8289 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8290 TARGET_INCLUDE_DIRECTORIES(sigmoid-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]8291 TARGET_LINK_LIBRARIES(sigmoid-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8292
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8293 ADD_EXECUTABLE(softmax-bench bench/softmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]8294 SET_TARGET_PROPERTIES(softmax-bench PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8295 CXX_STANDARD 11
8296 CXX_STANDARD_REQUIRED YES
8297 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8298 TARGET_INCLUDE_DIRECTORIES(softmax-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]8299 TARGET_LINK_LIBRARIES(softmax-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8300
Marat Dukhan3ddc20c2021-12-31 10:15:28 -0800[diff] [blame]8301 ADD_EXECUTABLE(square-bench bench/square.cc $<TARGET_OBJECTS:all_microkernels>)
8302 SET_TARGET_PROPERTIES(square-bench PROPERTIES
8303 CXX_STANDARD 11
8304 CXX_STANDARD_REQUIRED YES
8305 CXX_EXTENSIONS NO)
8306 TARGET_INCLUDE_DIRECTORIES(square-bench PRIVATE .)
8307 TARGET_LINK_LIBRARIES(square-bench PRIVATE XNNPACK benchmark bench-utils)
8308
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8309 ADD_EXECUTABLE(square-root-bench bench/square-root.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]8310 SET_TARGET_PROPERTIES(square-root-bench PROPERTIES
8311 CXX_STANDARD 11
8312 CXX_STANDARD_REQUIRED YES
8313 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8314 TARGET_INCLUDE_DIRECTORIES(square-root-bench PRIVATE .)
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]8315 TARGET_LINK_LIBRARIES(square-root-bench PRIVATE XNNPACK benchmark bench-utils)
8316
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8317 ADD_EXECUTABLE(truncation-bench bench/truncation.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]8318 SET_TARGET_PROPERTIES(truncation-bench PROPERTIES
8319 CXX_STANDARD 11
8320 CXX_STANDARD_REQUIRED YES
8321 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8322 TARGET_INCLUDE_DIRECTORIES(truncation-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]8323 TARGET_LINK_LIBRARIES(truncation-bench PRIVATE XNNPACK benchmark bench-utils)
8324
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8325 # ---[ Build microkernel-level microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8326 ADD_EXECUTABLE(f16-dwconv-bench bench/f16-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8327 SET_TARGET_PROPERTIES(f16-dwconv-bench PROPERTIES
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]8328 CXX_STANDARD 11
8329 CXX_STANDARD_REQUIRED YES
8330 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8331 TARGET_INCLUDE_DIRECTORIES(f16-dwconv-bench PRIVATE . include src)
8332 TARGET_LINK_LIBRARIES(f16-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]8333
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8334 ADD_EXECUTABLE(f16-gemm-bench bench/f16-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8335 SET_TARGET_PROPERTIES(f16-gemm-bench PROPERTIES
8336 CXX_STANDARD 11
8337 CXX_STANDARD_REQUIRED YES
8338 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8339 TARGET_INCLUDE_DIRECTORIES(f16-gemm-bench PRIVATE . include src)
8340 TARGET_LINK_LIBRARIES(f16-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8341
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8342 ADD_EXECUTABLE(f16-igemm-bench bench/f16-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8343 SET_TARGET_PROPERTIES(f16-igemm-bench PROPERTIES
Frank Barchardc2010062020-07-19 10:04:12 -0700[diff] [blame]8344 CXX_STANDARD 11
8345 CXX_STANDARD_REQUIRED YES
8346 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8347 TARGET_INCLUDE_DIRECTORIES(f16-igemm-bench PRIVATE . include src)
8348 TARGET_LINK_LIBRARIES(f16-igemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8349
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8350 ADD_EXECUTABLE(f16-vrelu-bench bench/f16-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8351 SET_TARGET_PROPERTIES(f16-vrelu-bench PROPERTIES
8352 CXX_STANDARD 11
8353 CXX_STANDARD_REQUIRED YES
8354 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8355 TARGET_INCLUDE_DIRECTORIES(f16-vrelu-bench PRIVATE . include src)
8356 TARGET_LINK_LIBRARIES(f16-vrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Frank Barchardc2010062020-07-19 10:04:12 -0700[diff] [blame]8357
Marat Dukhan434352f2021-10-16 18:28:55 -0700[diff] [blame]8358 ADD_EXECUTABLE(f16-f32-vcvt-bench bench/f16-f32-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
8359 SET_TARGET_PROPERTIES(f16-f32-vcvt-bench PROPERTIES
8360 CXX_STANDARD 11
8361 CXX_STANDARD_REQUIRED YES
8362 CXX_EXTENSIONS YES)
8363 TARGET_INCLUDE_DIRECTORIES(f16-f32-vcvt-bench PRIVATE . include src)
8364 TARGET_LINK_LIBRARIES(f16-f32-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8365
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8366 ADD_EXECUTABLE(f32-conv-hwc-bench bench/f32-conv-hwc.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8367 SET_TARGET_PROPERTIES(f32-conv-hwc-bench PROPERTIES
8368 CXX_STANDARD 11
8369 CXX_STANDARD_REQUIRED YES
8370 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8371 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc-bench PRIVATE . include src)
8372 TARGET_LINK_LIBRARIES(f32-conv-hwc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8373
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8374 ADD_EXECUTABLE(f32-dwconv-bench bench/f32-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8375 SET_TARGET_PROPERTIES(f32-dwconv-bench PROPERTIES
8376 CXX_STANDARD 11
8377 CXX_STANDARD_REQUIRED YES
8378 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8379 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-bench PRIVATE . include src)
8380 TARGET_LINK_LIBRARIES(f32-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8381
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8382 ADD_EXECUTABLE(f32-dwconv2d-chw-bench bench/f32-dwconv2d-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanbf715f92020-10-23 20:17:00 -0700[diff] [blame]8383 SET_TARGET_PROPERTIES(f32-dwconv2d-chw-bench PROPERTIES
8384 CXX_STANDARD 11
8385 CXX_STANDARD_REQUIRED YES
8386 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8387 TARGET_INCLUDE_DIRECTORIES(f32-dwconv2d-chw-bench PRIVATE . include src)
8388 TARGET_LINK_LIBRARIES(f32-dwconv2d-chw-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanbf715f92020-10-23 20:17:00 -0700[diff] [blame]8389
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]8390 ADD_EXECUTABLE(f32-f16-vcvt-bench bench/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
8391 SET_TARGET_PROPERTIES(f32-f16-vcvt-bench PROPERTIES
8392 CXX_STANDARD 11
8393 CXX_STANDARD_REQUIRED YES
8394 CXX_EXTENSIONS YES)
8395 TARGET_INCLUDE_DIRECTORIES(f32-f16-vcvt-bench PRIVATE . include src)
8396 TARGET_LINK_LIBRARIES(f32-f16-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8397
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8398 ADD_EXECUTABLE(f32-gemm-bench bench/f32-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8399 SET_TARGET_PROPERTIES(f32-gemm-bench PROPERTIES
8400 CXX_STANDARD 11
8401 CXX_STANDARD_REQUIRED YES
8402 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8403 TARGET_INCLUDE_DIRECTORIES(f32-gemm-bench PRIVATE . include src)
8404 TARGET_LINK_LIBRARIES(f32-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8405
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8406 ADD_EXECUTABLE(f32-igemm-bench bench/f32-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8407 SET_TARGET_PROPERTIES(f32-igemm-bench PROPERTIES
8408 CXX_STANDARD 11
8409 CXX_STANDARD_REQUIRED YES
8410 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8411 TARGET_INCLUDE_DIRECTORIES(f32-igemm-bench PRIVATE . include src)
8412 TARGET_LINK_LIBRARIES(f32-igemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8413
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8414 ADD_EXECUTABLE(f32-im2col-gemm-bench bench/f32-im2col-gemm.cc src/im2col.c $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8415 SET_TARGET_PROPERTIES(f32-im2col-gemm-bench PROPERTIES
8416 C_STANDARD 99
8417 C_STANDARD_REQUIRED YES
8418 C_EXTENSIONS NO
8419 CXX_STANDARD 11
8420 CXX_STANDARD_REQUIRED YES
8421 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8422 TARGET_INCLUDE_DIRECTORIES(f32-im2col-gemm-bench PRIVATE . include src)
8423 TARGET_LINK_LIBRARIES(f32-im2col-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8424
Marat Dukhan563eee12021-12-02 14:44:25 -0800[diff] [blame]8425 ADD_EXECUTABLE(f32-qs8-vcvt-bench bench/f32-qs8-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
8426 SET_TARGET_PROPERTIES(f32-qs8-vcvt-bench PROPERTIES
8427 CXX_STANDARD 11
8428 CXX_STANDARD_REQUIRED YES
8429 CXX_EXTENSIONS YES)
8430 TARGET_INCLUDE_DIRECTORIES(f32-qs8-vcvt-bench PRIVATE . include src)
8431 TARGET_LINK_LIBRARIES(f32-qs8-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8432
8433 ADD_EXECUTABLE(f32-qu8-vcvt-bench bench/f32-qu8-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
8434 SET_TARGET_PROPERTIES(f32-qu8-vcvt-bench PROPERTIES
8435 CXX_STANDARD 11
8436 CXX_STANDARD_REQUIRED YES
8437 CXX_EXTENSIONS YES)
8438 TARGET_INCLUDE_DIRECTORIES(f32-qu8-vcvt-bench PRIVATE . include src)
8439 TARGET_LINK_LIBRARIES(f32-qu8-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8440
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8441 ADD_EXECUTABLE(f32-rmax-bench bench/f32-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8442 SET_TARGET_PROPERTIES(f32-rmax-bench PROPERTIES
8443 CXX_STANDARD 11
8444 CXX_STANDARD_REQUIRED YES
8445 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8446 TARGET_INCLUDE_DIRECTORIES(f32-rmax-bench PRIVATE . include src)
8447 TARGET_LINK_LIBRARIES(f32-rmax-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8448
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8449 ADD_EXECUTABLE(f32-spmm-bench bench/f32-spmm.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8450 SET_TARGET_PROPERTIES(f32-spmm-bench PROPERTIES
8451 CXX_STANDARD 11
8452 CXX_STANDARD_REQUIRED YES
8453 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8454 TARGET_INCLUDE_DIRECTORIES(f32-spmm-bench PRIVATE . include src)
8455 TARGET_LINK_LIBRARIES(f32-spmm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8456
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8457 ADD_EXECUTABLE(f32-softmax-bench bench/f32-softmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]8458 SET_TARGET_PROPERTIES(f32-softmax-bench PROPERTIES
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]8459 CXX_STANDARD 11
8460 CXX_STANDARD_REQUIRED YES
8461 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8462 TARGET_INCLUDE_DIRECTORIES(f32-softmax-bench PRIVATE . include src)
8463 TARGET_LINK_LIBRARIES(f32-softmax-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]8464
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8465 ADD_EXECUTABLE(f32-velu-bench bench/f32-velu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]8466 SET_TARGET_PROPERTIES(f32-velu-bench PROPERTIES
8467 CXX_STANDARD 11
8468 CXX_STANDARD_REQUIRED YES
8469 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8470 TARGET_INCLUDE_DIRECTORIES(f32-velu-bench PRIVATE . include src)
8471 TARGET_LINK_LIBRARIES(f32-velu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]8472
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8473 ADD_EXECUTABLE(f32-vhswish-bench bench/f32-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8474 SET_TARGET_PROPERTIES(f32-vhswish-bench PROPERTIES
8475 CXX_STANDARD 11
8476 CXX_STANDARD_REQUIRED YES
8477 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8478 TARGET_INCLUDE_DIRECTORIES(f32-vhswish-bench PRIVATE . include src)
8479 TARGET_LINK_LIBRARIES(f32-vhswish-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8480
Marat Dukhan7c74aff2021-08-07 15:44:27 -0700[diff] [blame]8481 ADD_EXECUTABLE(f32-vlrelu-bench bench/f32-vlrelu.cc $<TARGET_OBJECTS:all_microkernels>)
8482 SET_TARGET_PROPERTIES(f32-vlrelu-bench PROPERTIES
8483 CXX_STANDARD 11
8484 CXX_STANDARD_REQUIRED YES
8485 CXX_EXTENSIONS YES)
8486 TARGET_INCLUDE_DIRECTORIES(f32-vlrelu-bench PRIVATE . include src)
8487 TARGET_LINK_LIBRARIES(f32-vlrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8488
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8489 ADD_EXECUTABLE(f32-vrelu-bench bench/f32-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8490 SET_TARGET_PROPERTIES(f32-vrelu-bench PROPERTIES
8491 CXX_STANDARD 11
8492 CXX_STANDARD_REQUIRED YES
8493 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8494 TARGET_INCLUDE_DIRECTORIES(f32-vrelu-bench PRIVATE . include src)
8495 TARGET_LINK_LIBRARIES(f32-vrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8496
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8497 ADD_EXECUTABLE(f32-vsigmoid-bench bench/f32-vsigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8498 SET_TARGET_PROPERTIES(f32-vsigmoid-bench PROPERTIES
8499 CXX_STANDARD 11
8500 CXX_STANDARD_REQUIRED YES
8501 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8502 TARGET_INCLUDE_DIRECTORIES(f32-vsigmoid-bench PRIVATE . include src)
8503 TARGET_LINK_LIBRARIES(f32-vsigmoid-bench PRIVATE benchmark bench-utils fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8504
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8505 ADD_EXECUTABLE(f32-vsqrt-bench bench/f32-vsqrt.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]8506 SET_TARGET_PROPERTIES(f32-vsqrt-bench PROPERTIES
8507 CXX_STANDARD 11
8508 CXX_STANDARD_REQUIRED YES
8509 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8510 TARGET_INCLUDE_DIRECTORIES(f32-vsqrt-bench PRIVATE . include src)
8511 TARGET_LINK_LIBRARIES(f32-vsqrt-bench PRIVATE benchmark bench-utils fp16 pthreadpool)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]8512
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8513 ADD_EXECUTABLE(qs8-dwconv-bench bench/qs8-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan0744fa02021-07-26 22:56:27 -0700[diff] [blame]8514 SET_TARGET_PROPERTIES(qs8-dwconv-bench PROPERTIES
8515 CXX_STANDARD 11
8516 CXX_STANDARD_REQUIRED YES
8517 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8518 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-bench PRIVATE . include src)
8519 TARGET_LINK_LIBRARIES(qs8-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan0744fa02021-07-26 22:56:27 -0700[diff] [blame]8520
Marat Dukhanad6f2dc2021-12-10 14:38:41 -0800[diff] [blame]8521 ADD_EXECUTABLE(qs8-f32-vcvt-bench bench/qs8-f32-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
8522 SET_TARGET_PROPERTIES(qs8-f32-vcvt-bench PROPERTIES
8523 CXX_STANDARD 11
8524 CXX_STANDARD_REQUIRED YES
8525 CXX_EXTENSIONS YES)
8526 TARGET_INCLUDE_DIRECTORIES(qs8-f32-vcvt-bench PRIVATE . include src)
8527 TARGET_LINK_LIBRARIES(qs8-f32-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8528
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8529 ADD_EXECUTABLE(qs8-gemm-bench bench/qs8-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]8530 SET_TARGET_PROPERTIES(qs8-gemm-bench PROPERTIES
8531 CXX_STANDARD 11
8532 CXX_STANDARD_REQUIRED YES
8533 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8534 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-bench PRIVATE . include src)
8535 TARGET_LINK_LIBRARIES(qs8-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]8536
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8537 ADD_EXECUTABLE(qs8-requantization-bench bench/qs8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan56bdd4a2020-08-03 19:47:04 -0700[diff] [blame]8538 SET_TARGET_PROPERTIES(qs8-requantization-bench PROPERTIES
8539 CXX_STANDARD 11
8540 CXX_STANDARD_REQUIRED YES
8541 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8542 TARGET_INCLUDE_DIRECTORIES(qs8-requantization-bench PRIVATE . include src)
8543 TARGET_LINK_LIBRARIES(qs8-requantization-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan56bdd4a2020-08-03 19:47:04 -0700[diff] [blame]8544
Marat Dukhan83a8d2f2021-07-29 16:41:19 -0700[diff] [blame]8545 ADD_EXECUTABLE(qs8-vadd-bench bench/qs8-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
8546 SET_TARGET_PROPERTIES(qs8-vadd-bench PROPERTIES
8547 CXX_STANDARD 11
8548 CXX_STANDARD_REQUIRED YES
8549 CXX_EXTENSIONS YES)
8550 TARGET_INCLUDE_DIRECTORIES(qs8-vadd-bench PRIVATE . include src)
8551 TARGET_LINK_LIBRARIES(qs8-vadd-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8552
8553 ADD_EXECUTABLE(qs8-vaddc-bench bench/qs8-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
8554 SET_TARGET_PROPERTIES(qs8-vaddc-bench PROPERTIES
8555 CXX_STANDARD 11
8556 CXX_STANDARD_REQUIRED YES
8557 CXX_EXTENSIONS YES)
8558 TARGET_INCLUDE_DIRECTORIES(qs8-vaddc-bench PRIVATE . include src)
8559 TARGET_LINK_LIBRARIES(qs8-vaddc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8560
Marat Dukhan795e5ab2021-08-02 19:07:52 -0700[diff] [blame]8561 ADD_EXECUTABLE(qs8-vmul-bench bench/qs8-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
8562 SET_TARGET_PROPERTIES(qs8-vmul-bench PROPERTIES
8563 CXX_STANDARD 11
8564 CXX_STANDARD_REQUIRED YES
8565 CXX_EXTENSIONS YES)
8566 TARGET_INCLUDE_DIRECTORIES(qs8-vmul-bench PRIVATE . include src)
8567 TARGET_LINK_LIBRARIES(qs8-vmul-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8568
Marat Dukhan8b024c92021-08-03 00:05:14 -0700[diff] [blame]8569 ADD_EXECUTABLE(qs8-vmulc-bench bench/qs8-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
8570 SET_TARGET_PROPERTIES(qs8-vmulc-bench PROPERTIES
8571 CXX_STANDARD 11
8572 CXX_STANDARD_REQUIRED YES
8573 CXX_EXTENSIONS YES)
8574 TARGET_INCLUDE_DIRECTORIES(qs8-vmulc-bench PRIVATE . include src)
8575 TARGET_LINK_LIBRARIES(qs8-vmulc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8576
Marat Dukhanad6f2dc2021-12-10 14:38:41 -0800[diff] [blame]8577 ADD_EXECUTABLE(qu8-f32-vcvt-bench bench/qu8-f32-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
8578 SET_TARGET_PROPERTIES(qu8-f32-vcvt-bench PROPERTIES
8579 CXX_STANDARD 11
8580 CXX_STANDARD_REQUIRED YES
8581 CXX_EXTENSIONS YES)
8582 TARGET_INCLUDE_DIRECTORIES(qu8-f32-vcvt-bench PRIVATE . include src)
8583 TARGET_LINK_LIBRARIES(qu8-f32-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8584
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8585 ADD_EXECUTABLE(qu8-gemm-bench bench/qu8-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]8586 SET_TARGET_PROPERTIES(qu8-gemm-bench PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8587 CXX_STANDARD 11
8588 CXX_STANDARD_REQUIRED YES
8589 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8590 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-bench PRIVATE . include src)
8591 TARGET_LINK_LIBRARIES(qu8-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]8592
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8593 ADD_EXECUTABLE(qu8-requantization-bench bench/qu8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]8594 SET_TARGET_PROPERTIES(qu8-requantization-bench PROPERTIES
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]8595 CXX_STANDARD 11
8596 CXX_STANDARD_REQUIRED YES
8597 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8598 TARGET_INCLUDE_DIRECTORIES(qu8-requantization-bench PRIVATE . include src)
8599 TARGET_LINK_LIBRARIES(qu8-requantization-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]8600
Marat Dukhan1ef9de82021-07-29 17:15:33 -0700[diff] [blame]8601 ADD_EXECUTABLE(qu8-vadd-bench bench/qu8-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
8602 SET_TARGET_PROPERTIES(qu8-vadd-bench PROPERTIES
8603 CXX_STANDARD 11
8604 CXX_STANDARD_REQUIRED YES
8605 CXX_EXTENSIONS YES)
8606 TARGET_INCLUDE_DIRECTORIES(qu8-vadd-bench PRIVATE . include src)
8607 TARGET_LINK_LIBRARIES(qu8-vadd-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8608
8609 ADD_EXECUTABLE(qu8-vaddc-bench bench/qu8-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
8610 SET_TARGET_PROPERTIES(qu8-vaddc-bench PROPERTIES
8611 CXX_STANDARD 11
8612 CXX_STANDARD_REQUIRED YES
8613 CXX_EXTENSIONS YES)
8614 TARGET_INCLUDE_DIRECTORIES(qu8-vaddc-bench PRIVATE . include src)
8615 TARGET_LINK_LIBRARIES(qu8-vaddc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8616
Marat Dukhan795e5ab2021-08-02 19:07:52 -0700[diff] [blame]8617 ADD_EXECUTABLE(qu8-vmul-bench bench/qu8-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
8618 SET_TARGET_PROPERTIES(qu8-vmul-bench PROPERTIES
8619 CXX_STANDARD 11
8620 CXX_STANDARD_REQUIRED YES
8621 CXX_EXTENSIONS YES)
8622 TARGET_INCLUDE_DIRECTORIES(qu8-vmul-bench PRIVATE . include src)
8623 TARGET_LINK_LIBRARIES(qu8-vmul-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8624
Marat Dukhan8b024c92021-08-03 00:05:14 -0700[diff] [blame]8625 ADD_EXECUTABLE(qu8-vmulc-bench bench/qu8-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
8626 SET_TARGET_PROPERTIES(qu8-vmulc-bench PROPERTIES
8627 CXX_STANDARD 11
8628 CXX_STANDARD_REQUIRED YES
8629 CXX_EXTENSIONS YES)
8630 TARGET_INCLUDE_DIRECTORIES(qu8-vmulc-bench PRIVATE . include src)
8631 TARGET_LINK_LIBRARIES(qu8-vmulc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8632
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8633 ADD_EXECUTABLE(rounding-bench bench/rounding.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]8634 SET_TARGET_PROPERTIES(rounding-bench PROPERTIES
8635 CXX_STANDARD 11
8636 CXX_STANDARD_REQUIRED YES
8637 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8638 TARGET_INCLUDE_DIRECTORIES(rounding-bench PRIVATE . include src)
8639 TARGET_LINK_LIBRARIES(rounding-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan54074372021-09-08 23:28:46 -0700[diff] [blame]8640
8641 ADD_EXECUTABLE(x8-lut-bench bench/x8-lut.cc $<TARGET_OBJECTS:all_microkernels>)
8642 SET_TARGET_PROPERTIES(x8-lut-bench PROPERTIES
8643 CXX_STANDARD 11
8644 CXX_STANDARD_REQUIRED YES
8645 CXX_EXTENSIONS YES)
8646 TARGET_INCLUDE_DIRECTORIES(x8-lut-bench PRIVATE . include src)
8647 TARGET_LINK_LIBRARIES(x8-lut-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Alan Kellyfda06cb2021-12-15 03:30:32 -0800[diff] [blame]8648
Alan Kelly1945f0b2021-12-24 01:26:45 -0800[diff] [blame]8649 ADD_EXECUTABLE(x16-transpose-bench bench/x16-transpose.cc $<TARGET_OBJECTS:all_microkernels>)
8650 SET_TARGET_PROPERTIES(x16-transpose-bench PROPERTIES
8651 CXX_STANDARD 11
8652 CXX_STANDARD_REQUIRED YES
8653 CXX_EXTENSIONS YES)
8654 TARGET_INCLUDE_DIRECTORIES(x16-transpose-bench PRIVATE . include src)
8655 TARGET_LINK_LIBRARIES(x16-transpose-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8656
Alan Kellyfda06cb2021-12-15 03:30:32 -0800[diff] [blame]8657 ADD_EXECUTABLE(x32-transpose-bench bench/x32-transpose.cc $<TARGET_OBJECTS:all_microkernels>)
8658 SET_TARGET_PROPERTIES(x32-transpose-bench PROPERTIES
8659 CXX_STANDARD 11
8660 CXX_STANDARD_REQUIRED YES
8661 CXX_EXTENSIONS YES)
8662 TARGET_INCLUDE_DIRECTORIES(x32-transpose-bench PRIVATE . include src)
8663 TARGET_LINK_LIBRARIES(x32-transpose-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8664ENDIF()