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gerrit-public.fairphone.software / platform / external / XNNPACK / 37c8351bde8285ee215c74b445b908e8adcc4949 / . / BUILD.bazel
blob: 05afef9855082bb5b2d8c5387c879d3d62d4366c [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]19 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]20 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]23MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]26 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]27 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]32ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]39MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]40 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]41 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]42 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]47OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]48 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]49 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]53OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]54 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]57 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]58 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]59 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
62 "src/operators/fully-connected-nc.c",
63 "src/operators/global-average-pooling-ncw.c",
64 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]65 "src/operators/leaky-relu-nc.c",
66 "src/operators/max-pooling-nhwc.c",
67 "src/operators/prelu-nc.c",
68 "src/operators/resize-bilinear-nhwc.c",
69 "src/operators/sigmoid-nc.c",
70 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]71 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]72 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]73]
74
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]75SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]76 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]77 "src/subgraph/add2.c",
78 "src/subgraph/argmax-pooling-2d.c",
79 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]80 "src/subgraph/bankers-rounding.c",
81 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]82 "src/subgraph/clamp.c",
83 "src/subgraph/convolution-2d.c",
84 "src/subgraph/deconvolution-2d.c",
85 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]86 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]87 "src/subgraph/fully-connected.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]88 "src/subgraph/floor.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]89 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]90 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]91 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]92 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]93 "src/subgraph/maximum2.c",
94 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]95 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]96 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]97 "src/subgraph/prelu.c",
98 "src/subgraph/sigmoid.c",
99 "src/subgraph/softmax.c",
100 "src/subgraph/static-constant-pad.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]101 "src/subgraph/square.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]102 "src/subgraph/squared-difference.c",
103 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]104 "src/subgraph/unpooling-2d.c",
105]
106
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]107TABLE_SRCS = [
108 "src/tables/exp2-k-over-64.c",
109 "src/tables/exp2-k-over-2048.c",
110]
111
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]112SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]113 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]114 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]115 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]116 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
117 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]118 "src/f32-clamp/gen/scalar-x1.c",
119 "src/f32-clamp/gen/scalar-x2.c",
120 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]121 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]122 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]123 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
124 "src/f32-dwconv-chw/3x3p1-scalar.c",
125 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
126 "src/f32-dwconv-chw/5x5p2-scalar.c",
127 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]128 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
129 "src/f32-dwconv/gen/up1x4-scalar.c",
130 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
131 "src/f32-dwconv/gen/up1x9-scalar.c",
132 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
133 "src/f32-dwconv/gen/up1x25-scalar.c",
134 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
135 "src/f32-dwconv/gen/up2x4-scalar.c",
136 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
137 "src/f32-dwconv/gen/up2x9-scalar.c",
138 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
139 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]140 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
142 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
143 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]144 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]150 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
151 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]152 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]153 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
154 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]155 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
156 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
157 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]158 "src/f32-gemm/gen/1x4-scalar.c",
159 "src/f32-gemm/gen/2x4-scalar.c",
160 "src/f32-gemm/gen/4x2-scalar.c",
161 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]162 "src/f32-gemm/gen/1x4-relu-scalar.c",
163 "src/f32-gemm/gen/2x4-relu-scalar.c",
164 "src/f32-gemm/gen/4x2-relu-scalar.c",
165 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]166 "src/f32-gemm/gen/1x4-minmax-scalar.c",
167 "src/f32-gemm/gen/2x4-minmax-scalar.c",
168 "src/f32-gemm/gen/4x2-minmax-scalar.c",
169 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]170 "src/f32-hswish/gen/scalar-x1.c",
171 "src/f32-hswish/gen/scalar-x2.c",
172 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]173 "src/f32-ibilinear/gen/scalar-c1.c",
174 "src/f32-ibilinear/gen/scalar-c2.c",
175 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]176 "src/f32-igemm/gen/1x4-scalar.c",
177 "src/f32-igemm/gen/2x4-scalar.c",
178 "src/f32-igemm/gen/4x2-scalar.c",
179 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]180 "src/f32-igemm/gen/1x4-relu-scalar.c",
181 "src/f32-igemm/gen/2x4-relu-scalar.c",
182 "src/f32-igemm/gen/4x2-relu-scalar.c",
183 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]184 "src/f32-igemm/gen/1x4-minmax-scalar.c",
185 "src/f32-igemm/gen/2x4-minmax-scalar.c",
186 "src/f32-igemm/gen/4x2-minmax-scalar.c",
187 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]188 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
189 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
190 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]191 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
192 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
193 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
194 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]195 "src/f32-prelu/gen/scalar-2x1.c",
196 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]197 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
200 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
201 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
202 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
203 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
204 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
205 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
206 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
207 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
208 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]209 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]210 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
211 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
212 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
213 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
214 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
215 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
216 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
217 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
218 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]219 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
220 "src/f32-spmm/gen/1x1-minmax-scalar.c",
221 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
222 "src/f32-spmm/gen/2x1-minmax-scalar.c",
223 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
224 "src/f32-spmm/gen/4x1-minmax-scalar.c",
225 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
226 "src/f32-spmm/gen/8x1-minmax-scalar.c",
227 "src/f32-spmm/gen/8x2-minmax-scalar.c",
228 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]229 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
236 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
237 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
238 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
239 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
240 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]241 "src/f32-vbinary/gen/vmax-scalar-x1.c",
242 "src/f32-vbinary/gen/vmax-scalar-x2.c",
243 "src/f32-vbinary/gen/vmax-scalar-x4.c",
244 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
245 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
246 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
247 "src/f32-vbinary/gen/vmin-scalar-x1.c",
248 "src/f32-vbinary/gen/vmin-scalar-x2.c",
249 "src/f32-vbinary/gen/vmin-scalar-x4.c",
250 "src/f32-vbinary/gen/vminc-scalar-x1.c",
251 "src/f32-vbinary/gen/vminc-scalar-x2.c",
252 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]253 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
259 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
260 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
261 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
262 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
263 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
264 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]265 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
266 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
267 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
268 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
269 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
270 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]271 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
272 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
273 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
274 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
275 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
276 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]277 "src/f32-vlrelu/gen/scalar-x1.c",
278 "src/f32-vlrelu/gen/scalar-x2.c",
279 "src/f32-vlrelu/gen/scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]280 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
281 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
282 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]283 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
284 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
285 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
286 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
287 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
288 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
289 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
290 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
291 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
292 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
293 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
294 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]295 "src/f32-vunary/gen/vabs-scalar-x1.c",
296 "src/f32-vunary/gen/vabs-scalar-x2.c",
297 "src/f32-vunary/gen/vabs-scalar-x4.c",
298 "src/f32-vunary/gen/vneg-scalar-x1.c",
299 "src/f32-vunary/gen/vneg-scalar-x2.c",
300 "src/f32-vunary/gen/vneg-scalar-x4.c",
301 "src/f32-vunary/gen/vsqr-scalar-x1.c",
302 "src/f32-vunary/gen/vsqr-scalar-x2.c",
303 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]304 "src/math/expminus-scalar-lut2048-p1.c",
305 "src/math/expminus-scalar-lut64-p2.c",
306 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]307 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]308 "src/math/roundne-scalar-nearbyint.c",
309 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]310 "src/math/roundd-scalar-addsub.c",
311 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]312 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]313 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]314 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]315 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]316 "src/math/roundz-scalar-addsub.c",
317 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]318 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]319 "src/math/sigmoid-scalar-lut2048-p1-div.c",
320 "src/math/sigmoid-scalar-lut64-p2-div.c",
321 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]322 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
323 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]324 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]325 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
326 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]327 "src/q8-gemm/2x2-minmax-scalar.c",
328 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]329 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]330 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]331 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]332 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]333 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]334 "src/x32-fill/scalar-float.c",
335 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]336 "src/x32-packx/x2-scalar.c",
337 "src/x32-packx/x3-scalar.c",
338 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]339 "src/x32-pad/scalar-int.c",
340 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]341 "src/x32-unpool/scalar.c",
342 "src/x32-zip/x2-scalar.c",
343 "src/x32-zip/x3-scalar.c",
344 "src/x32-zip/x4-scalar.c",
345 "src/x32-zip/xm-scalar.c",
346 "src/x8-lut/scalar.c",
347 "src/x8-zip/x2-scalar.c",
348 "src/x8-zip/x3-scalar.c",
349 "src/x8-zip/x4-scalar.c",
350 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]351 "src/requantization/precise-scalar.c",
352 "src/requantization/fp32-scalar.c",
353 "src/requantization/q31-scalar.c",
354 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]355]
356
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]357WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]358 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
359 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]360 "src/f32-clamp/gen/wasm-x1.c",
361 "src/f32-clamp/gen/wasm-x2.c",
362 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]363 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
364 "src/f32-dwconv/gen/up1x4-wasm.c",
365 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
366 "src/f32-dwconv/gen/up1x9-wasm.c",
367 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
368 "src/f32-dwconv/gen/up1x25-wasm.c",
369 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
370 "src/f32-dwconv/gen/up2x4-wasm.c",
371 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
372 "src/f32-dwconv/gen/up2x9-wasm.c",
373 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
374 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]375 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
376 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
377 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
378 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]379 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
380 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]381 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
382 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
383 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
384 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]385 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
386 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]387 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
388 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]389 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
390 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
391 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]392 "src/f32-gemm/gen/1x4-wasm.c",
393 "src/f32-gemm/gen/2x4-wasm.c",
394 "src/f32-gemm/gen/4x2-wasm.c",
395 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]396 "src/f32-gemm/gen/1x4-relu-wasm.c",
397 "src/f32-gemm/gen/2x4-relu-wasm.c",
398 "src/f32-gemm/gen/4x2-relu-wasm.c",
399 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]400 "src/f32-gemm/gen/1x4-minmax-wasm.c",
401 "src/f32-gemm/gen/2x4-minmax-wasm.c",
402 "src/f32-gemm/gen/4x2-minmax-wasm.c",
403 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]404 "src/f32-hswish/gen/wasm-x1.c",
405 "src/f32-hswish/gen/wasm-x2.c",
406 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]407 "src/f32-igemm/gen/1x4-wasm.c",
408 "src/f32-igemm/gen/2x4-wasm.c",
409 "src/f32-igemm/gen/4x2-wasm.c",
410 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]411 "src/f32-igemm/gen/1x4-relu-wasm.c",
412 "src/f32-igemm/gen/2x4-relu-wasm.c",
413 "src/f32-igemm/gen/4x2-relu-wasm.c",
414 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]415 "src/f32-igemm/gen/1x4-minmax-wasm.c",
416 "src/f32-igemm/gen/2x4-minmax-wasm.c",
417 "src/f32-igemm/gen/4x2-minmax-wasm.c",
418 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]419 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
420 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
421 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700[diff] [blame]422 "src/f32-prelu/gen/wasm-2x1.c",
423 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]424 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
425 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
426 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
427 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
428 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
429 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
430 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
431 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
432 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
433 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
434 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
435 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]436 "src/f32-vbinary/gen/vmax-wasm-x1.c",
437 "src/f32-vbinary/gen/vmax-wasm-x2.c",
438 "src/f32-vbinary/gen/vmax-wasm-x4.c",
439 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
440 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
441 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
442 "src/f32-vbinary/gen/vmin-wasm-x1.c",
443 "src/f32-vbinary/gen/vmin-wasm-x2.c",
444 "src/f32-vbinary/gen/vmin-wasm-x4.c",
445 "src/f32-vbinary/gen/vminc-wasm-x1.c",
446 "src/f32-vbinary/gen/vminc-wasm-x2.c",
447 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]448 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
449 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
450 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
451 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
452 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
453 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
454 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
455 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
456 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
457 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
458 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
459 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
460 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
461 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
462 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
463 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
464 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
465 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]466 "src/f32-vlrelu/gen/wasm-x1.c",
467 "src/f32-vlrelu/gen/wasm-x2.c",
468 "src/f32-vlrelu/gen/wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]469 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
470 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
471 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]472]
473
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]474WASMSIMD_UKERNELS = [
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]475 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
476 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
477 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
478 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
479 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
480 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700[diff] [blame]481 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-arm.c",
482 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
483 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-arm.c",
484 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
485 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-arm.c",
486 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
487 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-arm.c",
488 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
489 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-arm.c",
490 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
491 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-arm.c",
492 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
493 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-x86.c",
494 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
495 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-x86.c",
496 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
497 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-x86.c",
498 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
499 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-x86.c",
500 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
501 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-x86.c",
502 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
503 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-x86.c",
504 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]505 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
506 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
507 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
508 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-arm.c",
509 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat-arm.c",
510 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-x86.c",
511 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]512 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
513 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
514 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
515 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
516 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
517 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
518 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
519 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
520 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
521 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
522 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
523 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
524 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
525 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
526 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
527 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
528 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
529 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
530 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
531 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
532 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
533 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
534 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
535 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
536 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
537 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
538 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
539 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
540 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
541 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
542 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-arm.c",
543 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-arm.c",
544 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
545 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-arm.c",
546 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-arm.c",
547 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
548 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-arm.c",
549 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-arm.c",
550 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
551 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-arm.c",
552 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-arm.c",
553 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
554 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-arm.c",
555 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-arm.c",
556 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
557 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-x86.c",
558 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-x86.c",
559 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
560 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-x86.c",
561 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-x86.c",
562 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
563 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-x86.c",
564 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-x86.c",
565 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
566 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-x86.c",
567 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-x86.c",
568 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
569 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-x86.c",
570 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-x86.c",
571 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]572 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
573 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
574 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
575 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-arm.c",
576 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat-arm.c",
577 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-x86.c",
578 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]579 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
580 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
581 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
582 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
583 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
584 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
585 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
586 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
587 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
588 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
589 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
590 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
591 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
592 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
593 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
594 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
595 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
596 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
597 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
598 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
599 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
600 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
601 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
602 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
603 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
604 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
605 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
606 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
607 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
608 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhan9baec802020-06-25 21:34:35 -0700[diff] [blame]609 "src/f32-hswish/gen/wasmsimd-arm-x4.c",
610 "src/f32-hswish/gen/wasmsimd-arm-x8.c",
Marat Dukhanc303fe62020-06-26 10:09:25 -0700[diff] [blame]611 "src/f32-hswish/gen/wasmsimd-arm-x16.c",
Marat Dukhan9baec802020-06-25 21:34:35 -0700[diff] [blame]612 "src/f32-hswish/gen/wasmsimd-x86-x4.c",
613 "src/f32-hswish/gen/wasmsimd-x86-x8.c",
Marat Dukhanc303fe62020-06-26 10:09:25 -0700[diff] [blame]614 "src/f32-hswish/gen/wasmsimd-x86-x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -0700[diff] [blame]615 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
616 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
617 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
618 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]619 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
620 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
621 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
622 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]623 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
624 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
625 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
626 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]627 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
628 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
629 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
630 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]631 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
632 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
633 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
634 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]635 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
636 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
637 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
638 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]639 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
640 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
641 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
642 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]643 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
644 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
645 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
646 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]647 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
648 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
649 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
650 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]651 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
652 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
653 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
654 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]655 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
656 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
657 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
658 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
659 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
660 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
661 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
662 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]663 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
664 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
665 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
666 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]667 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
668 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]669 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
670 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]671 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
672 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
673 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
674 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]675 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
676 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
677 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
678 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Marat Dukhan72b399a2020-06-28 22:41:38 -0700[diff] [blame]679 "src/f32-vrnd/gen/vrndne-wasmsimd-x4.c",
680 "src/f32-vrnd/gen/vrndne-wasmsimd-x8.c",
681 "src/f32-vrnd/gen/vrndz-wasmsimd-x4.c",
682 "src/f32-vrnd/gen/vrndz-wasmsimd-x8.c",
683 "src/f32-vrnd/gen/vrndu-wasmsimd-x4.c",
684 "src/f32-vrnd/gen/vrndu-wasmsimd-x8.c",
685 "src/f32-vrnd/gen/vrndd-wasmsimd-x4.c",
686 "src/f32-vrnd/gen/vrndd-wasmsimd-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -0700[diff] [blame^]687 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
688 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
689 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
690 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
691 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
692 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhand3f3d872020-06-24 13:08:25 -0700[diff] [blame]693 "src/math/roundne-wasmsimd-addsub.c",
694 "src/math/roundd-wasmsimd-addsub.c",
695 "src/math/roundu-wasmsimd-addsub.c",
696 "src/math/roundz-wasmsimd-addsub.c",
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]697 "src/requantization/fp32-wasmsimd.c",
698]
699
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]700PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]701 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]702 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]703 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]704 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
705 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]706 "src/f32-clamp/gen/psimd-x4.c",
707 "src/f32-clamp/gen/psimd-x8.c",
Erich Elsen0a1970e2020-06-10 09:24:59 -0700[diff] [blame]708 "src/f32-conv-hwc2chw/3x3s2p1c3x4-psimd-2x2.c",
Erich Elsene6214af2020-06-10 22:17:22 -0700[diff] [blame]709 "src/f32-dwconv-chw/3x3p1-psimd.c",
Erich Elsenfd7a6e32020-06-11 12:04:44 -0700[diff] [blame]710 "src/f32-dwconv-chw/3x3s2p1-psimd.c",
Erich Elsen28928892020-06-12 08:08:19 -0700[diff] [blame]711 "src/f32-dwconv-chw/5x5p2-psimd.c",
Erich Elsen7465a892020-06-13 14:02:04 -0700[diff] [blame]712 "src/f32-dwconv-chw/5x5s2p2-psimd.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]713 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
714 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
715 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
716 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
717 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
718 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
719 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
720 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
721 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
722 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
723 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
724 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Erich Elsen6f278b52020-06-10 16:13:11 -0700[diff] [blame]725 "src/f32-gavgpool-cw/psimd-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]726 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
727 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]728 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
729 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
730 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
731 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
732 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
733 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
734 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
735 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
736 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
737 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
738 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
739 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
740 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
741 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
742 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
743 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
744 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
745 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
746 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]747 "src/f32-hswish/gen/psimd-x4.c",
748 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]749 "src/f32-ibilinear/gen/psimd-c4.c",
750 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]751 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
752 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
753 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
754 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
755 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
756 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
757 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
758 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
759 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
760 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]761 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]762 "src/f32-spmm/gen/4x1-minmax-psimd.c",
763 "src/f32-spmm/gen/8x1-minmax-psimd.c",
764 "src/f32-spmm/gen/16x1-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]765 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
766 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]767 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]768 "src/f32-prelu/gen/psimd-2x4.c",
769 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]770 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]771 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
772 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
773 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
774 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
775 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
776 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
777 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
778 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]779 "src/f32-vbinary/gen/vmax-psimd-x4.c",
780 "src/f32-vbinary/gen/vmax-psimd-x8.c",
781 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
782 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
783 "src/f32-vbinary/gen/vmin-psimd-x4.c",
784 "src/f32-vbinary/gen/vmin-psimd-x8.c",
785 "src/f32-vbinary/gen/vminc-psimd-x4.c",
786 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]787 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
788 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
789 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
790 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
791 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
792 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
793 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
794 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]795 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
796 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
797 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
798 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]799 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
800 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
801 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
802 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]803 "src/f32-vlrelu/gen/psimd-x4.c",
804 "src/f32-vlrelu/gen/psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]805 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
806 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]807 "src/f32-vunary/gen/vabs-psimd-x4.c",
808 "src/f32-vunary/gen/vabs-psimd-x8.c",
809 "src/f32-vunary/gen/vneg-psimd-x4.c",
810 "src/f32-vunary/gen/vneg-psimd-x8.c",
811 "src/f32-vunary/gen/vsqr-psimd-x4.c",
812 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]813 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]814 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]815 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]816 "src/x32-unpool/psimd.c",
817 "src/x32-zip/x2-psimd.c",
818 "src/x32-zip/x3-psimd.c",
819 "src/x32-zip/x4-psimd.c",
820 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]821 "src/requantization/precise-psimd.c",
822 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]823]
824
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]825PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]826 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
827 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
828 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
829 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
830 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
831 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
832 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
833 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
834 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
835 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
836 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
837 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]838 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
839 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
840 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
841 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
842 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
843 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]844 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
845 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
846 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
847 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
848 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
849 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
850 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
851 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]852 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]853 "src/math/roundd-psimd-addsub.c",
854 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]855 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]856 "src/math/sigmoid-psimd-p5-div.c",
857]
858
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]859# ISA-specific micro-kernels
860NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]861 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
862 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]863 "src/f32-clamp/gen/neon-x4.c",
864 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]865 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
866 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]867 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
868 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]869 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
870 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]871 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
872 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]873 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
874 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
875 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
876 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]877 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
878 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
879 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
880 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]881 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
882 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
883 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
884 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]885 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]886 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
887 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]888 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
889 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
890 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
891 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
892 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
893 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
894 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
895 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
896 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
897 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
898 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
899 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
900 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
901 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
902 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
903 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
904 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
905 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
906 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
907 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
908 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
909 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
910 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
911 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
912 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
913 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
914 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
915 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
916 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
917 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
918 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]919 "src/f32-hswish/gen/neon-x4.c",
920 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]921 "src/f32-ibilinear/gen/neon-c4.c",
922 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]923 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
924 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
925 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
926 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
927 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
928 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
929 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
930 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
931 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
932 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
933 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
934 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
935 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
936 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
937 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
938 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]939 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
940 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
941 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]942 "src/f32-ppmm/gen/4x8-minmax-neon.c",
943 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]944 "src/f32-prelu/gen/neon-2x4.c",
945 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]946 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
947 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
948 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
949 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
950 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
951 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
952 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
953 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
954 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
955 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
956 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
957 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
958 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
959 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
960 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
961 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
962 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
963 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
964 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
965 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
966 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
967 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
968 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
969 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]970 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]971 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]972 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
973 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
974 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
975 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
976 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
977 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
978 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
979 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
980 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
981 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
982 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
983 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
984 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
985 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
986 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
987 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
988 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
989 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]990 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
991 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
992 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
993 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]994 "src/f32-vbinary/gen/vmax-neon-x4.c",
995 "src/f32-vbinary/gen/vmax-neon-x8.c",
996 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
997 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
998 "src/f32-vbinary/gen/vmin-neon-x4.c",
999 "src/f32-vbinary/gen/vmin-neon-x8.c",
1000 "src/f32-vbinary/gen/vminc-neon-x4.c",
1001 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1002 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1003 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1004 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1005 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1006 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1007 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1008 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1009 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1010 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1011 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1012 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1013 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1014 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1015 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1016 "src/f32-vlrelu/gen/neon-x4.c",
1017 "src/f32-vlrelu/gen/neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1018 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1019 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1020 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1021 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1022 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1023 "src/f32-vrnd/gen/vrndz-neon-x8.c",
1024 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1025 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1026 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1027 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1028 "src/f32-vunary/gen/vabs-neon-x4.c",
1029 "src/f32-vunary/gen/vabs-neon-x8.c",
1030 "src/f32-vunary/gen/vneg-neon-x4.c",
1031 "src/f32-vunary/gen/vneg-neon-x8.c",
1032 "src/f32-vunary/gen/vsqr-neon-x4.c",
1033 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1034 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
1035 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1036 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1037 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
1038 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1039 "src/q8-gemm/4x8-minmax-neon.c",
1040 "src/q8-gemm/8x8-minmax-neon.c",
1041 "src/q8-igemm/4x8-minmax-neon.c",
1042 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1043 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1044 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1045 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1046 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1047 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1048 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1049 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1050 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1051 "src/x32-zip/x2-neon.c",
1052 "src/x32-zip/x3-neon.c",
1053 "src/x32-zip/x4-neon.c",
1054 "src/x32-zip/xm-neon.c",
1055 "src/x8-zip/x2-neon.c",
1056 "src/x8-zip/x3-neon.c",
1057 "src/x8-zip/x4-neon.c",
1058 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1059 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1060 "src/math/roundd-neon-addsub.c",
1061 "src/math/roundd-neon-cvt.c",
1062 "src/math/roundu-neon-addsub.c",
1063 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1064 "src/math/roundz-neon-addsub.c",
1065 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]1066 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1067 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
1068 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
1069 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
1070 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1071 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1072 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1073 "src/requantization/precise-neon.c",
1074 "src/requantization/fp32-neon.c",
1075 "src/requantization/q31-neon.c",
1076 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1077]
1078
1079NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1080 "src/f32-ibilinear/gen/neonfma-c4.c",
1081 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1082 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1083 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1084 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1085 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1086 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1087 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
1088 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
1089 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1090 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1091 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1092 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1093 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1094 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1095 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1096 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1097 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1098 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1099 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1100 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1101 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1102 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1103 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1104 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1105 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1106 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1107 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1108 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1109 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1110 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1111 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
1112 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1113 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1114 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1115 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1116 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1117 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1118 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1119 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1120 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1121 "src/f32-hswish/gen/neonfma-x4.c",
1122 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1123 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1124 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1125 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1126 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1127 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1128 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1129 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1130 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1131 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1132 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1133 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1134 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
1135 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1136 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1137 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
1138 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
1139 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
1140 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
1141 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1142 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
1143 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
1144 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1145 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
1146 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1147 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1148 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1149 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
1150 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
1151 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
1152 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
1153 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
1154 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
1155 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
1156 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
1157 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
1158 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
1159 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
1160 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
1161 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
1162 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
1163 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
1164 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
1165 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
1166 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
1167 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
1168 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
1169 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
1170 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
1171 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
1172 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
1173 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
1174 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
1175 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
1176 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
1177 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
1178 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
1179 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
1180 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
1181 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
1182 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
1183 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
1184 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
1185 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
1186 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
1187 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
1188 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
1189 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
1190 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
1191 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
1192 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
1193 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
1194 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
1195 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
1196 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
1197 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
1198 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
1199 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
1200 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
1201 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
1202 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1203 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
1204 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]1205 "src/math/exp-neonfma-lut64-p2.c",
1206 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]1207 "src/math/expminus-neonfma-lut2048-p1.c",
1208 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]1209 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1210 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
1211 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
1212 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
1213 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
1214 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
1215 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
1216 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
1217 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
1218 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
1219 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
1220 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
1221 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
1222 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
1223 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
1224 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
1225 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
1226 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
1227 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1228]
1229
1230AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1231 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
1232 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
1233 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
1234 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
1235 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
1236 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1237 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1238 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1239 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1240 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1241 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
1242 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1243 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
1244 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
1245 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
1246 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
1247 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
1248 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1249 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1250 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1251 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1252 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1253 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1254 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1255 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1256 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1257 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1258 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1259 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1260 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1261 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1262 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1263 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1264 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1265 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1266 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1267 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1268 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1269 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1270 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1271 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1272 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
1273 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
1274 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
1275 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
1276 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
1277 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
1278 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1279 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1280 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1281 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1282 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1283 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1284 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1285 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1286 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1287 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1288 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1289 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1290 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1291 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1292 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1293 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1294 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1295 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1296 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1297 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1298 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1299 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1300 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1301 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1302 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1303 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1304 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1305 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1306 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1307 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1308 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1309 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1310 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1311 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1312]
1313
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1314NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1315 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1316 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1317 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1318 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1319 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1320 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1321 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1322 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1323 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1324 "src/math/roundd-neonv8.c",
1325 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1326 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1327]
1328
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1329AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1330 "src/f16-clamp/gen/neonfp16arith-x16.c",
1331 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1332 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1333 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1334 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1335 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1336 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1337 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1338 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1339 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1340 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1341 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1342 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1343 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1344 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1345 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1346 "src/f16-hswish/gen/neonfp16arith-x16.c",
1347 "src/f16-hswish/gen/neonfp16arith-x8.c",
1348 "src/f16-prelu/gen/neonfp16arith-2x16.c",
1349 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1350 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
1351 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
1352 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1353 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1354 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1355 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1356 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
1357 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
1358 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
1359 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
1360 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1361 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1362 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
1363 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
1364 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1365 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1366 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1367 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1368 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1369 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1370 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1371 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1372 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1373 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1374 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1375 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1376 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1377 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1378 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1379 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1380 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1381 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1382 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1383 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1384 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1385 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1386 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1387 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1388 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1389 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1390 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1391 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1392 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1393 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1394 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1395 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1396 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1397 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1398 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1399 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1400 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1401 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1402 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1403 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1404 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1405 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1406 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1407 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1408 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1409 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1410 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1411 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1412]
1413
1414SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1415 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1416 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1417 "src/f32-clamp/gen/sse-x4.c",
1418 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1419 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1420 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1421 "src/f32-dwconv-chw/3x3p1-sse.c",
1422 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1423 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1424 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1425 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1426 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1427 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1428 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1429 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1430 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1431 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1432 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1433 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1434 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1435 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1436 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1437 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1438 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1439 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1440 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1441 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1442 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1443 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1444 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1445 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1446 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1447 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1448 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1449 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1450 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1451 "src/f32-hswish/gen/sse-x4.c",
1452 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1453 "src/f32-ibilinear/gen/sse-c4.c",
1454 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1455 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1456 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1457 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1458 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1459 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1460 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1461 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1462 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1463 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1464 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1465 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -0700[diff] [blame]1466 "src/f32-prelu/gen/sse-2x4.c",
1467 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1468 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1469 "src/f32-spmm/gen/4x1-minmax-sse.c",
1470 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]1471 "src/f32-spmm/gen/16x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1472 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1473 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1474 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1475 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1476 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1477 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1478 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1479 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1480 "src/f32-vbinary/gen/vmax-sse-x4.c",
1481 "src/f32-vbinary/gen/vmax-sse-x8.c",
1482 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1483 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1484 "src/f32-vbinary/gen/vmin-sse-x4.c",
1485 "src/f32-vbinary/gen/vmin-sse-x8.c",
1486 "src/f32-vbinary/gen/vminc-sse-x4.c",
1487 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1488 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1489 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1490 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1491 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1492 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1493 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
1494 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1495 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1496 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1497 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1498 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1499 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1500 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1501 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1502 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1503 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1504 "src/f32-vlrelu/gen/sse-x4.c",
1505 "src/f32-vlrelu/gen/sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1506 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1507 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1508 "src/f32-vunary/gen/vabs-sse-x4.c",
1509 "src/f32-vunary/gen/vabs-sse-x8.c",
1510 "src/f32-vunary/gen/vneg-sse-x4.c",
1511 "src/f32-vunary/gen/vneg-sse-x8.c",
1512 "src/f32-vunary/gen/vsqr-sse-x4.c",
1513 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1514 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1515 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1516 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1517 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1518 "src/math/roundd-sse-addsub.c",
1519 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1520 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1521]
1522
1523SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1524 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1525 "src/f32-argmaxpool/4x-sse2-c4.c",
1526 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1527 "src/f32-prelu/gen/sse2-2x4.c",
1528 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1529 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1530 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1531 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1532 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1533 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1534 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1535 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1536 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1537 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1538 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1539 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1540 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1541 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1542 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1543 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1544 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1545 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1546 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhan0d3f4672020-06-25 16:42:58 -0700[diff] [blame]1547 "src/f32-vlrelu/gen/sse2-x4.c",
1548 "src/f32-vlrelu/gen/sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1549 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1550 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1551 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1552 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1553 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1554 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1555 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1556 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1557 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1558 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1559 "src/q8-igemm/4x4c2-minmax-sse2.c",
1560 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1561 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1562 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1563 "src/q8-gemm/2x4c8-minmax-sse2.c",
1564 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1565 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1566 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1567 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1568 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1569 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1570 "src/x32-zip/x2-sse2.c",
1571 "src/x32-zip/x3-sse2.c",
1572 "src/x32-zip/x4-sse2.c",
1573 "src/x32-zip/xm-sse2.c",
1574 "src/x8-zip/x2-sse2.c",
1575 "src/x8-zip/x3-sse2.c",
1576 "src/x8-zip/x4-sse2.c",
1577 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1578 "src/math/exp-sse2-p5.c",
1579 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1580 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1581 "src/math/roundd-sse2-cvt.c",
1582 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1583 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1584 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1585 "src/requantization/precise-sse2.c",
1586 "src/requantization/fp32-sse2.c",
1587 "src/requantization/q31-sse2.c",
1588 "src/requantization/gemmlowp-sse2.c",
1589]
1590
1591SSSE3_UKERNELS = [
1592 "src/requantization/precise-ssse3.c",
1593 "src/requantization/q31-ssse3.c",
1594 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1595]
1596
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1597SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1598 "src/f32-prelu/gen/sse41-2x4.c",
1599 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1600 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1601 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1602 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1603 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1604 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1605 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhan0d3f4672020-06-25 16:42:58 -0700[diff] [blame]1606 "src/f32-vlrelu/gen/sse41-x4.c",
1607 "src/f32-vlrelu/gen/sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1608 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1609 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1610 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1611 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1612 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1613 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1614 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1615 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1616 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1617 "src/math/roundd-sse41.c",
1618 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1619 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1620 "src/requantization/precise-sse4.c",
1621 "src/requantization/q31-sse4.c",
1622 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1623]
1624
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1625AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1626 "src/f32-clamp/gen/avx-x8.c",
1627 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1628 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1629 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1630 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1631 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1632 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1633 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1634 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1635 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1636 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1637 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1638 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1639 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1640 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1641 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1642 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1643 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1644 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1645 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1646 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1647 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1648 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1649 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1650 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1651 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1652 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1653 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1654 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1655 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1656 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1657 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1658 "src/f32-hswish/gen/avx-x8.c",
1659 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1660 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1661 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1662 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1663 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1664 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1665 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1666 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1667 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1668 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1669 "src/f32-prelu/gen/avx-2x8.c",
1670 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1671 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1672 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1673 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1674 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1675 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1676 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1677 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1678 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1679 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1680 "src/f32-vbinary/gen/vmax-avx-x8.c",
1681 "src/f32-vbinary/gen/vmax-avx-x16.c",
1682 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1683 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1684 "src/f32-vbinary/gen/vmin-avx-x8.c",
1685 "src/f32-vbinary/gen/vmin-avx-x16.c",
1686 "src/f32-vbinary/gen/vminc-avx-x8.c",
1687 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1688 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1689 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1690 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1691 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1692 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1693 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
1694 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1695 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1696 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1697 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1698 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
1699 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1700 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1701 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1702 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1703 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1704 "src/f32-vlrelu/gen/avx-x8.c",
1705 "src/f32-vlrelu/gen/avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1706 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1707 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1708 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1709 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1710 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1711 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1712 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1713 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1714 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1715 "src/f32-vunary/gen/vabs-avx-x8.c",
1716 "src/f32-vunary/gen/vabs-avx-x16.c",
1717 "src/f32-vunary/gen/vneg-avx-x8.c",
1718 "src/f32-vunary/gen/vneg-avx-x16.c",
1719 "src/f32-vunary/gen/vsqr-avx-x8.c",
1720 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1721]
1722
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1723FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1724 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
1725 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
1726 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
1727 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
1728 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
1729 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
1730 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
1731 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
1732 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
1733 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
1734 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
1735 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
1736 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1737 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1738 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
1739 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
1740 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
1741 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
1742 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
1743 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
1744 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
1745 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
1746 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
1747 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
1748 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
1749 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
1750 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
1751 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
1752 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
1753 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
1754 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
1755 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1756 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1757 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1758 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1759 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1760 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1761 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1762 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
1763 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1764 "src/f32-hswish/gen/fma3-x8.c",
1765 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1766 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1767 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1768 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1769 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1770 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1771 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
1772 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
1773 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1774 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1775 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1776 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1777 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1778 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1779 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1780]
1781
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1782AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1783 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
1784 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
1785 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
1786 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
1787 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
1788 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
1789 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
1790 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
1791 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
1792 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
1793 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
1794 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
1795 "src/f32-raddextexp/gen/avx2-p5-x64.c",
1796 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
1797 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
1798 "src/f32-raddextexp/gen/avx2-p5-x72.c",
1799 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
1800 "src/f32-raddextexp/gen/avx2-p5-x80.c",
1801 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
1802 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
1803 "src/f32-raddextexp/gen/avx2-p5-x96.c",
1804 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
1805 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
1806 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
1807 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
1808 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1809 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1810 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1811 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1812 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1813 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1814 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1815 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1816 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1817 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1818 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1819 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1820 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1821 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1822 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1823 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1824 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1825 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1826 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1827 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1828 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1829 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1830 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1831 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1832 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1833 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1834 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1835 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1836 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1837 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1838 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1839 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1840 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1841 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1842 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1843 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1844 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1845 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1846 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1847 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1848 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1849 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1850 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1851 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1852 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1853 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1854 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1855 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1856 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1857 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1858 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1859 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1860 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1861 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1862 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1863 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1864 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1865 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1866 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1867 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1868 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1869 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1870 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1871 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1872 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1873 "src/math/exp-avx2-p5.c",
1874 "src/math/exp-avx2-perm-p3.c",
1875 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1876 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1877 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1878 "src/math/sigmoid-avx2-rr2-p5-div.c",
1879 "src/math/sigmoid-avx2-rr1-p5-div.c",
1880 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1881 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1882 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1883 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1884]
1885
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1886AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1887 "src/f32-clamp/gen/avx512f-x16.c",
1888 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1889 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1890 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1891 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1892 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1893 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1894 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1895 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1896 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1897 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1898 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1899 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1900 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1901 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1902 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1903 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1904 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1905 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1906 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1907 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1908 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1909 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1910 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1911 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1912 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1913 "src/f32-hswish/gen/avx512f-x16.c",
1914 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1915 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1916 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1917 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1918 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1919 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1920 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1921 "src/f32-prelu/gen/avx512f-2x16.c",
1922 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1923 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1924 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1925 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1926 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1927 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1928 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1929 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1930 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1931 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1932 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1933 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1934 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1935 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1936 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1937 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1938 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1939 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1940 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1941 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1942 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1943 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1944 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1945 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1946 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1947 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1948 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1949 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1950 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1951 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1952 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1953 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1954 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1955 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1956 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1957 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1958 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1959 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1960 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1961 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1962 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1963 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1964 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1965 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1966 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1967 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1968 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1969 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1970 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1971 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1972 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1973 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1974 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1975 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1976 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1977 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1978 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1979 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1980 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1981 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
1982 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1983 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1984 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
1985 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
1986 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
1987 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1988 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1989 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1990 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1991 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1992 "src/f32-vlrelu/gen/avx512f-x16.c",
1993 "src/f32-vlrelu/gen/avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1994 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1995 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1996 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1997 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1998 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1999 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
2000 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
2001 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
2002 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
2003 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
2004 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
2005 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
2006 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
2007 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
2008 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
2009 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
2010 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
2011 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
2012 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
2013 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
2014 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
2015 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
2016 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
2017 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
2018 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]2019 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
2020 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
2021 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
2022 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
2023 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
2024 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
2025 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
2026 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]2027 "src/f32-vunary/gen/vabs-avx512f-x16.c",
2028 "src/f32-vunary/gen/vabs-avx512f-x32.c",
2029 "src/f32-vunary/gen/vneg-avx512f-x16.c",
2030 "src/f32-vunary/gen/vneg-avx512f-x32.c",
2031 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
2032 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2033 "src/math/exp-avx512f-p5-scalef.c",
2034 "src/math/exp-avx512f-p5.c",
2035 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]2036 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]2037 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2038]
2039
2040AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]2041 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]2042 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2043 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
2044 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
2045 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
2046 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]2047 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
2048 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
2049 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
2050 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2051 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
2052 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
2053 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
2054 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2055]
2056
2057AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]2058 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2059 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
2060 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]2061 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2062 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
2063 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]2064 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
2065 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
2066 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]2067 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]2068 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
2069 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
2070 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]2071 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2072 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
2073 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]2074 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2075 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2076 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2077 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2078 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2079 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2080 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2081 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2082 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2083 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2084 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
2085 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
2086 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2087 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2088 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2089 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2090 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2091 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2092 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2093 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
2094 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]2095 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2096 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2097 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2098 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2099 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2100 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2101 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2102 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2103 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2104 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2105 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
2106 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
2107 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2108 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2109 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2110 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2111 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
2112 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2113 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2114 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
2115 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
2116 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2117 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2118 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2119 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2120 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2121 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2122 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2123 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2124 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2125 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2126 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2127 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2128 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2129 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2130 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2131 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2132]
2133
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2134INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2135 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2136 "src/xnnpack/argmaxpool.h",
2137 "src/xnnpack/avgpool.h",
2138 "src/xnnpack/clamp.h",
2139 "src/xnnpack/common.h",
2140 "src/xnnpack/conv.h",
2141 "src/xnnpack/dwconv.h",
2142 "src/xnnpack/gavgpool.h",
2143 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]2144 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2145 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]2146 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2147 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]2148 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2149 "src/xnnpack/lut.h",
2150 "src/xnnpack/math.h",
2151 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2152 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2153 "src/xnnpack/packx.h",
2154 "src/xnnpack/pad.h",
2155 "src/xnnpack/params.h",
2156 "src/xnnpack/pavgpool.h",
2157 "src/xnnpack/ppmm.h",
2158 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2159 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2160 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2161 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2162 "src/xnnpack/rmax.h",
2163 "src/xnnpack/scalar-utils.h",
2164 "src/xnnpack/spmm.h",
2165 "src/xnnpack/unpool.h",
2166 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2167 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2168 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]2169 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2170 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2171 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2172 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2173 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2174]
2175
2176INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2177 "include/xnnpack.h",
2178 "src/xnnpack/allocator.h",
2179 "src/xnnpack/compute.h",
2180 "src/xnnpack/im2col.h",
2181 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2182 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2183 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2184 "src/xnnpack/operator.h",
2185 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2186 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2187 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2188 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]2189 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2190]
2191
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2192ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2193 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2194]
2195
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2196MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2197 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2198 "include/xnnpack.h",
2199]
2200
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2201MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2202 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2203 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2204 "src/xnnpack/requantization.h",
2205 "include/xnnpack.h",
2206]
2207
2208OPERATOR_TEST_PARAMS_HDRS = [
2209 "src/xnnpack/params.h",
2210 "src/xnnpack/common.h",
2211]
2212
2213WEIGHTS_PACK_HDRS = [
2214 "src/xnnpack/pack.h",
2215 "src/xnnpack/operator.h",
2216 "src/xnnpack/compute.h",
2217]
2218
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2219LOGGING_COPTS = select({
2220 # No logging in optimized mode
2221 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
2222 # Full logging in debug mode
2223 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
2224 # Error-only logging in default (fastbuild) mode
2225 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
2226})
2227
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2228LOGGING_SRCS = select({
2229 # No logging in optimized mode
2230 ":optimized_build": [],
2231 "//conditions:default": [
2232 "src/operator-strings.c",
2233 "src/subgraph-strings.c",
2234 ],
2235})
2236
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2237LOGGING_HDRS = [
2238 "src/xnnpack/log.h",
2239]
2240
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2241xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2242 name = "tables",
2243 srcs = TABLE_SRCS,
2244 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2245 gcc_copts = xnnpack_gcc_std_copts(),
2246 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2247)
2248
2249xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2250 name = "scalar_ukernels",
2251 srcs = SCALAR_UKERNELS,
2252 hdrs = INTERNAL_HDRS,
2253 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2254 gcc_copts = xnnpack_gcc_std_copts(),
2255 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2256 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2257 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2258 "@FP16",
2259 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2260 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2261 ],
2262)
2263
2264xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2265 name = "scalar_ukernels_test_mode",
2266 srcs = SCALAR_UKERNELS,
2267 hdrs = INTERNAL_HDRS,
2268 aarch32_copts = ["-marm"],
2269 copts = [
2270 "-UNDEBUG",
2271 "-DXNN_TEST_MODE=1",
2272 ],
2273 gcc_copts = xnnpack_gcc_std_copts(),
2274 msvc_copts = xnnpack_msvc_std_copts(),
2275 deps = [
2276 ":tables",
2277 "@FP16",
2278 "@FXdiv",
2279 "@pthreadpool",
2280 ],
2281)
2282
2283xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2284 name = "wasm_ukernels",
2285 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2286 gcc_copts = xnnpack_gcc_std_copts(),
2287 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2288 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -0700[diff] [blame]2289 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2290 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2291 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2292 "@FP16",
2293 "@FXdiv",
2294 "@pthreadpool",
2295 ],
2296)
2297
2298xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2299 name = "wasm_ukernels_test_mode",
2300 hdrs = INTERNAL_HDRS,
2301 copts = [
2302 "-UNDEBUG",
2303 "-DXNN_TEST_MODE=1",
2304 ],
2305 gcc_copts = xnnpack_gcc_std_copts(),
2306 msvc_copts = xnnpack_msvc_std_copts(),
2307 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]2308 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2309 deps = [
2310 ":tables",
2311 "@FP16",
2312 "@FXdiv",
2313 "@pthreadpool",
2314 ],
2315)
2316
2317xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2318 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2319 hdrs = INTERNAL_HDRS,
2320 aarch32_copts = [
2321 "-marm",
2322 "-mfpu=neon",
2323 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2324 gcc_copts = xnnpack_gcc_std_copts(),
2325 gcc_x86_copts = ["-msse2"],
2326 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2327 optimized_copts = [
2328 "-O3",
2329 "-ffast-math",
2330 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2331 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2332 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2333 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2334 "@FP16",
2335 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2336 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2337 ],
2338)
2339
2340xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2341 name = "psimd_fastmath_ukernels_test_mode",
2342 hdrs = INTERNAL_HDRS,
2343 aarch32_copts = [
2344 "-marm",
2345 "-mfpu=neon",
2346 ],
2347 copts = [
2348 "-UNDEBUG",
2349 "-DXNN_TEST_MODE=1",
2350 ],
2351 gcc_copts = xnnpack_gcc_std_copts(),
2352 gcc_x86_copts = ["-msse2"],
2353 msvc_copts = xnnpack_msvc_std_copts(),
2354 optimized_copts = [
2355 "-O3",
2356 "-ffast-math",
2357 ],
2358 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2359 deps = [
2360 ":tables",
2361 "@FP16",
2362 "@psimd",
2363 "@pthreadpool",
2364 ],
2365)
2366
2367xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2368 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2369 hdrs = INTERNAL_HDRS,
2370 aarch32_copts = [
2371 "-marm",
2372 "-mfpu=neon",
2373 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2374 gcc_copts = xnnpack_gcc_std_copts(),
2375 gcc_x86_copts = ["-msse2"],
2376 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2377 optimized_copts = [
2378 "-O3",
2379 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2380 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2381 deps = [
2382 ":tables",
2383 "@FP16",
2384 "@psimd",
2385 "@pthreadpool",
2386 ],
2387)
2388
2389xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2390 name = "psimd_accmath_ukernels_test_mode",
2391 hdrs = INTERNAL_HDRS,
2392 aarch32_copts = [
2393 "-marm",
2394 "-mfpu=neon",
2395 ],
2396 copts = [
2397 "-UNDEBUG",
2398 "-DXNN_TEST_MODE=1",
2399 ],
2400 gcc_copts = xnnpack_gcc_std_copts(),
2401 gcc_x86_copts = ["-msse2"],
2402 msvc_copts = xnnpack_msvc_std_copts(),
2403 optimized_copts = [
2404 "-O3",
2405 ],
2406 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2407 deps = [
2408 ":tables",
2409 "@FP16",
2410 "@psimd",
2411 "@pthreadpool",
2412 ],
2413)
2414
2415xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2416 name = "neon_ukernels",
2417 hdrs = INTERNAL_HDRS,
2418 aarch32_copts = [
2419 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2420 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2421 "-mfpu=neon",
2422 ],
2423 aarch32_srcs = NEON_UKERNELS,
2424 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2425 gcc_copts = xnnpack_gcc_std_copts(),
2426 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2427 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2428 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2429 "@FP16",
2430 "@pthreadpool",
2431 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2432)
2433
2434xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2435 name = "neon_ukernels_test_mode",
2436 hdrs = INTERNAL_HDRS,
2437 aarch32_copts = [
2438 "-marm",
2439 "-march=armv7-a",
2440 "-mfpu=neon",
2441 ],
2442 aarch32_srcs = NEON_UKERNELS,
2443 aarch64_srcs = NEON_UKERNELS,
2444 copts = [
2445 "-UNDEBUG",
2446 "-DXNN_TEST_MODE=1",
2447 ],
2448 gcc_copts = xnnpack_gcc_std_copts(),
2449 msvc_copts = xnnpack_msvc_std_copts(),
2450 deps = [
2451 ":tables",
2452 "@FP16",
2453 "@pthreadpool",
2454 ],
2455)
2456
2457xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2458 name = "neonfma_ukernels",
2459 hdrs = INTERNAL_HDRS,
2460 aarch32_copts = [
2461 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2462 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2463 "-mfpu=neon-vfpv4",
2464 ],
2465 aarch32_srcs = NEONFMA_UKERNELS,
2466 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2467 apple_aarch32_copts = [
2468 "-mcpu=swift",
2469 "-mtune=generic",
2470 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2471 gcc_copts = xnnpack_gcc_std_copts(),
2472 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2473 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2474 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2475 "@FP16",
2476 "@pthreadpool",
2477 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2478)
2479
2480xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2481 name = "neonfma_ukernels_test_mode",
2482 hdrs = INTERNAL_HDRS,
2483 aarch32_copts = [
2484 "-marm",
2485 "-march=armv7-a",
2486 "-mfpu=neon-vfpv4",
2487 ],
2488 aarch32_srcs = NEONFMA_UKERNELS,
2489 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2490 apple_aarch32_copts = [
2491 "-mcpu=swift",
2492 "-mtune=generic",
2493 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2494 copts = [
2495 "-UNDEBUG",
2496 "-DXNN_TEST_MODE=1",
2497 ],
2498 gcc_copts = xnnpack_gcc_std_copts(),
2499 msvc_copts = xnnpack_msvc_std_copts(),
2500 deps = [
2501 ":tables",
2502 "@FP16",
2503 "@pthreadpool",
2504 ],
2505)
2506
2507xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2508 name = "neonv8_ukernels",
2509 hdrs = INTERNAL_HDRS,
2510 aarch32_copts = [
2511 "-marm",
2512 "-march=armv8-a",
2513 "-mfpu=neon-fp-armv8",
2514 ],
2515 aarch32_srcs = NEONV8_UKERNELS,
2516 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2517 apple_aarch32_copts = [
2518 "-mcpu=cyclone",
2519 "-mtune=generic",
2520 ],
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2521 gcc_copts = xnnpack_gcc_std_copts(),
2522 msvc_copts = xnnpack_msvc_std_copts(),
2523 deps = [
2524 ":tables",
2525 "@FP16",
2526 "@pthreadpool",
2527 ],
2528)
2529
2530xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2531 name = "neonv8_ukernels_test_mode",
2532 hdrs = INTERNAL_HDRS,
2533 aarch32_copts = [
2534 "-marm",
2535 "-march=armv8-a",
2536 "-mfpu=neon-fp-armv8",
2537 ],
2538 aarch32_srcs = NEONV8_UKERNELS,
2539 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2540 apple_aarch32_copts = [
2541 "-mcpu=cyclone",
2542 "-mtune=generic",
2543 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2544 copts = [
2545 "-UNDEBUG",
2546 "-DXNN_TEST_MODE=1",
2547 ],
2548 gcc_copts = xnnpack_gcc_std_copts(),
2549 msvc_copts = xnnpack_msvc_std_copts(),
2550 deps = [
2551 ":tables",
2552 "@FP16",
2553 "@pthreadpool",
2554 ],
2555)
2556
2557xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2558 name = "neonfp16arith_ukernels",
2559 hdrs = INTERNAL_HDRS,
2560 aarch64_copts = ["-march=armv8.2-a+fp16"],
2561 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2562 gcc_copts = xnnpack_gcc_std_copts(),
2563 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2564 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2565 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2566 "@FP16",
2567 "@pthreadpool",
2568 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2569)
2570
2571xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2572 name = "neonfp16arith_ukernels_test_mode",
2573 hdrs = INTERNAL_HDRS,
2574 aarch64_copts = ["-march=armv8.2-a+fp16"],
2575 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2576 copts = [
2577 "-UNDEBUG",
2578 "-DXNN_TEST_MODE=1",
2579 ],
2580 gcc_copts = xnnpack_gcc_std_copts(),
2581 msvc_copts = xnnpack_msvc_std_copts(),
2582 deps = [
2583 ":tables",
2584 "@FP16",
2585 "@pthreadpool",
2586 ],
2587)
2588
2589xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2590 name = "sse2_ukernels",
2591 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2592 gcc_copts = xnnpack_gcc_std_copts(),
2593 gcc_x86_copts = ["-msse2"],
2594 msvc_copts = xnnpack_msvc_std_copts(),
2595 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2596 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2597 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2598 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2599 "@FP16",
2600 "@pthreadpool",
2601 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2602)
2603
2604xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2605 name = "sse2_ukernels_test_mode",
2606 hdrs = INTERNAL_HDRS,
2607 copts = [
2608 "-UNDEBUG",
2609 "-DXNN_TEST_MODE=1",
2610 ],
2611 gcc_copts = xnnpack_gcc_std_copts(),
2612 gcc_x86_copts = ["-msse2"],
2613 msvc_copts = xnnpack_msvc_std_copts(),
2614 msvc_x86_32_copts = ["/arch:SSE2"],
2615 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2616 deps = [
2617 ":tables",
2618 "@FP16",
2619 "@pthreadpool",
2620 ],
2621)
2622
2623xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2624 name = "ssse3_ukernels",
2625 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2626 gcc_copts = xnnpack_gcc_std_copts(),
2627 gcc_x86_copts = ["-mssse3"],
2628 msvc_copts = xnnpack_msvc_std_copts(),
2629 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2630 x86_srcs = SSSE3_UKERNELS,
2631 deps = [
2632 ":tables",
2633 "@FP16",
2634 "@pthreadpool",
2635 ],
2636)
2637
2638xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2639 name = "ssse3_ukernels_test_mode",
2640 hdrs = INTERNAL_HDRS,
2641 copts = [
2642 "-UNDEBUG",
2643 "-DXNN_TEST_MODE=1",
2644 ],
2645 gcc_copts = xnnpack_gcc_std_copts(),
2646 gcc_x86_copts = ["-mssse3"],
2647 msvc_copts = xnnpack_msvc_std_copts(),
2648 msvc_x86_32_copts = ["/arch:SSE2"],
2649 x86_srcs = SSSE3_UKERNELS,
2650 deps = [
2651 ":tables",
2652 "@FP16",
2653 "@pthreadpool",
2654 ],
2655)
2656
2657xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2658 name = "sse41_ukernels",
2659 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2660 gcc_copts = xnnpack_gcc_std_copts(),
2661 gcc_x86_copts = ["-msse4.1"],
2662 msvc_copts = xnnpack_msvc_std_copts(),
2663 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2664 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2665 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2666 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2667 "@FP16",
2668 "@pthreadpool",
2669 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2670)
2671
2672xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2673 name = "sse41_ukernels_test_mode",
2674 hdrs = INTERNAL_HDRS,
2675 copts = [
2676 "-UNDEBUG",
2677 "-DXNN_TEST_MODE=1",
2678 ],
2679 gcc_copts = xnnpack_gcc_std_copts(),
2680 gcc_x86_copts = ["-msse4.1"],
2681 msvc_copts = xnnpack_msvc_std_copts(),
2682 msvc_x86_32_copts = ["/arch:SSE2"],
2683 x86_srcs = SSE41_UKERNELS,
2684 deps = [
2685 ":tables",
2686 "@FP16",
2687 "@pthreadpool",
2688 ],
2689)
2690
2691xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2692 name = "avx_ukernels",
2693 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2694 gcc_copts = xnnpack_gcc_std_copts(),
2695 gcc_x86_copts = ["-mavx"],
2696 msvc_copts = xnnpack_msvc_std_copts(),
2697 msvc_x86_32_copts = ["/arch:AVX"],
2698 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2699 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2700 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2701 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2702 "@FP16",
2703 "@pthreadpool",
2704 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2705)
2706
2707xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2708 name = "avx_ukernels_test_mode",
2709 hdrs = INTERNAL_HDRS,
2710 copts = [
2711 "-UNDEBUG",
2712 "-DXNN_TEST_MODE=1",
2713 ],
2714 gcc_copts = xnnpack_gcc_std_copts(),
2715 gcc_x86_copts = ["-mavx"],
2716 msvc_copts = xnnpack_msvc_std_copts(),
2717 msvc_x86_32_copts = ["/arch:AVX"],
2718 msvc_x86_64_copts = ["/arch:AVX"],
2719 x86_srcs = AVX_UKERNELS,
2720 deps = [
2721 ":tables",
2722 "@FP16",
2723 "@pthreadpool",
2724 ],
2725)
2726
2727xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2728 name = "fma3_ukernels",
2729 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2730 gcc_copts = xnnpack_gcc_std_copts(),
2731 gcc_x86_copts = ["-mfma"],
2732 msvc_copts = xnnpack_msvc_std_copts(),
2733 msvc_x86_32_copts = ["/arch:AVX"],
2734 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2735 x86_srcs = FMA3_UKERNELS,
2736 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2737 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2738 "@FP16",
2739 "@pthreadpool",
2740 ],
2741)
2742
2743xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2744 name = "fma3_ukernels_test_mode",
2745 hdrs = INTERNAL_HDRS,
2746 copts = [
2747 "-UNDEBUG",
2748 "-DXNN_TEST_MODE=1",
2749 ],
2750 gcc_copts = xnnpack_gcc_std_copts(),
2751 gcc_x86_copts = ["-mfma"],
2752 msvc_copts = xnnpack_msvc_std_copts(),
2753 msvc_x86_32_copts = ["/arch:AVX"],
2754 msvc_x86_64_copts = ["/arch:AVX"],
2755 x86_srcs = FMA3_UKERNELS,
2756 deps = [
2757 ":tables",
2758 "@FP16",
2759 "@pthreadpool",
2760 ],
2761)
2762
2763xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2764 name = "avx2_ukernels",
2765 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2766 gcc_copts = xnnpack_gcc_std_copts(),
2767 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2768 "-mfma",
2769 "-mavx2",
2770 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2771 msvc_copts = xnnpack_msvc_std_copts(),
2772 msvc_x86_32_copts = ["/arch:AVX2"],
2773 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2774 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2775 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2776 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2777 "@FP16",
2778 "@pthreadpool",
2779 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2780)
2781
2782xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2783 name = "avx2_ukernels_test_mode",
2784 hdrs = INTERNAL_HDRS,
2785 copts = [
2786 "-UNDEBUG",
2787 "-DXNN_TEST_MODE=1",
2788 ],
2789 gcc_copts = xnnpack_gcc_std_copts(),
2790 gcc_x86_copts = [
2791 "-mfma",
2792 "-mavx2",
2793 ],
2794 msvc_copts = xnnpack_msvc_std_copts(),
2795 msvc_x86_32_copts = ["/arch:AVX2"],
2796 msvc_x86_64_copts = ["/arch:AVX2"],
2797 x86_srcs = AVX2_UKERNELS,
2798 deps = [
2799 ":tables",
2800 "@FP16",
2801 "@pthreadpool",
2802 ],
2803)
2804
2805xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2806 name = "avx512f_ukernels",
2807 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2808 gcc_copts = xnnpack_gcc_std_copts(),
2809 gcc_x86_copts = ["-mavx512f"],
2810 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2811 msvc_copts = xnnpack_msvc_std_copts(),
2812 msvc_x86_32_copts = ["/arch:AVX512"],
2813 msvc_x86_64_copts = ["/arch:AVX512"],
2814 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2815 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2816 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2817 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2818 "@FP16",
2819 "@pthreadpool",
2820 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2821)
2822
2823xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2824 name = "avx512f_ukernels_test_mode",
2825 hdrs = INTERNAL_HDRS,
2826 copts = [
2827 "-UNDEBUG",
2828 "-DXNN_TEST_MODE=1",
2829 ],
2830 gcc_copts = xnnpack_gcc_std_copts(),
2831 gcc_x86_copts = ["-mavx512f"],
2832 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2833 msvc_copts = xnnpack_msvc_std_copts(),
2834 msvc_x86_32_copts = ["/arch:AVX512"],
2835 msvc_x86_64_copts = ["/arch:AVX512"],
2836 msys_copts = ["-fno-asynchronous-unwind-tables"],
2837 x86_srcs = AVX512F_UKERNELS,
2838 deps = [
2839 ":tables",
2840 "@FP16",
2841 "@pthreadpool",
2842 ],
2843)
2844
2845xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2846 name = "asm_ukernels",
2847 hdrs = ["src/xnnpack/assembly.h"],
2848 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2849 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2850 aarch64_srcs = AARCH64_ASM_UKERNELS,
2851)
2852
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2853xnnpack_cc_library(
2854 name = "logging_utils",
2855 srcs = LOGGING_SRCS,
2856 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2857 copts = LOGGING_COPTS + [
2858 "-Isrc",
2859 "-Iinclude",
2860 ] + select({
2861 ":debug_build": [],
2862 "//conditions:default": xnnpack_min_size_copts(),
2863 }),
2864 gcc_copts = xnnpack_gcc_std_copts(),
2865 msvc_copts = xnnpack_msvc_std_copts(),
2866 visibility = xnnpack_visibility(),
2867 deps = [
2868 "@FP16",
2869 "@clog",
2870 "@pthreadpool",
2871 ],
2872)
2873
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2874xnnpack_aggregate_library(
2875 name = "ukernels",
2876 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2877 ":neon_ukernels",
2878 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2879 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2880 ":asm_ukernels",
2881 ],
2882 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2883 ":neon_ukernels",
2884 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2885 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2886 ":neonfp16arith_ukernels",
2887 ":asm_ukernels",
2888 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2889 generic_deps = [
2890 ":scalar_ukernels",
2891 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2892 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2893 ":psimd_fastmath_ukernels",
2894 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2895 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2896 wasm_deps = [
2897 ":wasm_ukernels",
2898 ],
2899 wasmsimd_deps = [
2900 ":wasm_ukernels",
2901 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2902 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2903 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2904 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2905 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2906 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2907 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2908 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2909 ":avx512f_ukernels",
2910 ],
2911)
2912
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2913xnnpack_aggregate_library(
2914 name = "ukernels_test_mode",
2915 aarch32_deps = [
2916 ":neon_ukernels_test_mode",
2917 ":neonfma_ukernels_test_mode",
2918 ":neonv8_ukernels_test_mode",
2919 ":asm_ukernels",
2920 ],
2921 aarch64_deps = [
2922 ":neon_ukernels_test_mode",
2923 ":neonfma_ukernels_test_mode",
2924 ":neonv8_ukernels_test_mode",
2925 ":neonfp16arith_ukernels_test_mode",
2926 ":asm_ukernels",
2927 ],
2928 generic_deps = [
2929 ":scalar_ukernels_test_mode",
2930 ],
2931 psimd_deps = [
2932 ":psimd_fastmath_ukernels_test_mode",
2933 ":psimd_accmath_ukernels_test_mode",
2934 ],
2935 wasm_deps = [
2936 ":wasm_ukernels_test_mode",
2937 ],
2938 wasmsimd_deps = [
2939 ":wasm_ukernels_test_mode",
2940 ],
2941 x86_deps = [
2942 ":sse2_ukernels_test_mode",
2943 ":ssse3_ukernels_test_mode",
2944 ":sse41_ukernels_test_mode",
2945 ":avx_ukernels_test_mode",
2946 ":fma3_ukernels_test_mode",
2947 ":avx2_ukernels_test_mode",
2948 ":avx512f_ukernels_test_mode",
2949 ],
2950)
2951
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2952# This target must be compatible with Android NDK r17 and compile with Clang 6.
2953# It is similar to :ukernels target, but excludes microkernels which require
2954# NEON FP16 arithmetics, NEON Dot Product, and newer intrinsics.
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2955xnnpack_aggregate_library(
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2956 name = "ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2957 aarch32_deps = [
2958 ":neon_ukernels",
2959 ":neonfma_ukernels",
2960 ":neonv8_ukernels",
2961 ":asm_ukernels",
2962 ],
2963 aarch64_deps = [
2964 ":neon_ukernels",
2965 ":neonfma_ukernels",
2966 ":neonv8_ukernels",
2967 ":asm_ukernels",
2968 ],
2969 generic_deps = [
2970 ":scalar_ukernels",
2971 ],
2972 psimd_deps = [
2973 ":psimd_fastmath_ukernels",
2974 ":psimd_accmath_ukernels",
2975 ],
2976 wasm_deps = [
2977 ":wasm_ukernels",
2978 ],
2979 wasmsimd_deps = [
2980 ":wasm_ukernels",
2981 ],
2982 x86_deps = [
2983 ":sse2_ukernels",
2984 ":ssse3_ukernels",
2985 ":sse41_ukernels",
2986 ":avx_ukernels",
2987 ":fma3_ukernels",
2988 ":avx2_ukernels",
2989 ":avx512f_ukernels",
2990 ],
2991)
2992
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2993xnnpack_cc_library(
2994 name = "im2col",
2995 srcs = ["src/im2col.c"],
2996 hdrs = [
2997 "src/xnnpack/common.h",
2998 "src/xnnpack/im2col.h",
2999 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3000 gcc_copts = xnnpack_gcc_std_copts(),
3001 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3002)
3003
3004xnnpack_cc_library(
3005 name = "indirection",
3006 srcs = ["src/indirection.c"],
3007 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3008 gcc_copts = xnnpack_gcc_std_copts(),
3009 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3010 deps = [
3011 "@FP16",
3012 "@FXdiv",
3013 "@pthreadpool",
3014 ],
3015)
3016
3017xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3018 name = "indirection_test_mode",
3019 srcs = ["src/indirection.c"],
3020 hdrs = INTERNAL_HDRS,
3021 copts = [
3022 "-UNDEBUG",
3023 "-DXNN_TEST_MODE=1",
3024 ],
3025 gcc_copts = xnnpack_gcc_std_copts(),
3026 msvc_copts = xnnpack_msvc_std_copts(),
3027 deps = [
3028 "@FP16",
3029 "@FXdiv",
3030 "@pthreadpool",
3031 ],
3032)
3033
3034xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3035 name = "operator_run",
3036 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]3037 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3038 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3039 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3040 "//conditions:default": [],
3041 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3042 gcc_copts = xnnpack_gcc_std_copts(),
3043 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3044 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3045 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3046 "@FP16",
3047 "@FXdiv",
3048 "@clog",
3049 "@pthreadpool",
3050 ],
3051)
3052
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3053xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3054 name = "operator_run_test_mode",
3055 srcs = ["src/operator-run.c"],
3056 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3057 copts = LOGGING_COPTS + [
3058 "-UNDEBUG",
3059 "-DXNN_TEST_MODE=1",
3060 ] + select({
3061 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3062 "//conditions:default": [],
3063 }),
3064 gcc_copts = xnnpack_gcc_std_copts(),
3065 msvc_copts = xnnpack_msvc_std_copts(),
3066 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3067 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3068 "@FP16",
3069 "@FXdiv",
3070 "@clog",
3071 "@pthreadpool",
3072 ],
3073)
3074
3075xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3076 name = "memory_planner",
3077 srcs = ["src/memory-planner.c"],
3078 hdrs = INTERNAL_HDRS,
3079 defines = select({
3080 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3081 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3082 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3083 }),
3084 gcc_copts = xnnpack_gcc_std_copts(),
3085 msvc_copts = xnnpack_msvc_std_copts(),
3086 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3087 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3088 "@pthreadpool",
3089 ],
3090)
3091
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3092xnnpack_cc_library(
3093 name = "memory_planner_test_mode",
3094 srcs = ["src/memory-planner.c"],
3095 hdrs = INTERNAL_HDRS,
3096 copts = [
3097 "-UNDEBUG",
3098 "-DXNN_TEST_MODE=1",
3099 ],
3100 defines = select({
3101 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3102 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3103 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3104 }),
3105 gcc_copts = xnnpack_gcc_std_copts(),
3106 msvc_copts = xnnpack_msvc_std_copts(),
3107 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3108 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3109 "@pthreadpool",
3110 ],
3111)
3112
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3113cc_library(
3114 name = "enable_assembly",
3115 defines = select({
3116 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
3117 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]3118 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3119 }),
3120)
3121
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3122cc_library(
3123 name = "enable_sparse",
3124 defines = select({
3125 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
3126 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan8b283aa2020-06-18 16:48:57 -0700[diff] [blame]3127 "//conditions:default": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3128 }),
3129)
3130
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3131xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3132 name = "operators",
3133 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]3134 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3135 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3136 ],
3137 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3138 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3139 "-Isrc",
3140 "-Iinclude",
3141 ] + select({
3142 ":debug_build": [],
3143 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3144 }) + select({
3145 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3146 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3147 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3148 gcc_copts = xnnpack_gcc_std_copts(),
3149 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3150 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3151 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3152 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3153 "@FP16",
3154 "@FXdiv",
3155 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3156 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3157 ],
3158)
3159
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3160xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3161 name = "operators_test_mode",
3162 srcs = OPERATOR_SRCS + [
3163 "src/memory.c",
3164 "src/operator-delete.c",
3165 ],
3166 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3167 copts = LOGGING_COPTS + [
3168 "-Isrc",
3169 "-Iinclude",
3170 "-UNDEBUG",
3171 "-DXNN_TEST_MODE=1",
3172 ] + select({
3173 ":debug_build": [],
3174 "//conditions:default": xnnpack_min_size_copts(),
3175 }) + select({
3176 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3177 "//conditions:default": [],
3178 }),
3179 gcc_copts = xnnpack_gcc_std_copts(),
3180 msvc_copts = xnnpack_msvc_std_copts(),
3181 deps = [
3182 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3183 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3184 "@FP16",
3185 "@FXdiv",
3186 "@clog",
3187 "@pthreadpool",
3188 ],
3189)
3190
3191xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3192 name = "XNNPACK",
3193 srcs = [
3194 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]3195 "src/runtime.c",
3196 "src/subgraph.c",
3197 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3198 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3199 hdrs = ["include/xnnpack.h"],
3200 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3201 "-Isrc",
3202 "-Iinclude",
3203 ] + select({
3204 ":debug_build": [],
3205 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3206 }) + select({
3207 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3208 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3209 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3210 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3211 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3212 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3213 visibility = xnnpack_visibility(),
3214 deps = [
3215 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3216 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3217 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3218 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3219 ":operator_run",
3220 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3221 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3222 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]3223 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3224 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]3225 ] + select({
3226 ":emscripten": [],
3227 "//conditions:default": ["@cpuinfo"],
3228 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3229)
3230
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3231xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3232 name = "XNNPACK_test_mode",
3233 srcs = [
3234 "src/init.c",
3235 "src/runtime.c",
3236 "src/subgraph.c",
3237 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3238 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3239 hdrs = ["include/xnnpack.h"],
3240 copts = LOGGING_COPTS + [
3241 "-Isrc",
3242 "-Iinclude",
3243 "-UNDEBUG",
3244 "-DXNN_TEST_MODE=1",
3245 ] + select({
3246 ":debug_build": [],
3247 "//conditions:default": xnnpack_min_size_copts(),
3248 }) + select({
3249 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3250 "//conditions:default": [],
3251 }),
3252 gcc_copts = xnnpack_gcc_std_copts(),
3253 includes = ["include"],
3254 msvc_copts = xnnpack_msvc_std_copts(),
3255 visibility = xnnpack_visibility(),
3256 deps = [
3257 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3258 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3259 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3260 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3261 ":operator_run_test_mode",
3262 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3263 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3264 "@clog",
3265 "@FP16",
3266 "@pthreadpool",
3267 ] + select({
3268 ":emscripten": [],
3269 "//conditions:default": ["@cpuinfo"],
3270 }),
3271)
3272
3273xnnpack_cc_library(
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3274 name = "xnnpack_f32",
3275 srcs = [
3276 "src/init.c",
3277 "src/runtime.c",
3278 "src/subgraph.c",
3279 "src/tensor.c",
3280 ] + SUBGRAPH_SRCS,
3281 hdrs = ["include/xnnpack.h"],
3282 copts = LOGGING_COPTS + [
3283 "-Isrc",
3284 "-Iinclude",
3285 ] + select({
3286 ":debug_build": [],
3287 "//conditions:default": xnnpack_min_size_copts(),
3288 }) + select({
3289 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3290 "//conditions:default": [],
3291 }),
3292 defines = [
3293 "XNN_NO_Q8_OPERATORS",
3294 "XNN_NO_U8_OPERATORS",
3295 "XNN_NO_X8_OPERATORS",
3296 "XNN_NO_F16_OPERATORS",
3297 "XNN_NO_X16_OPERATORS",
3298 ],
3299 gcc_copts = xnnpack_gcc_std_copts(),
3300 includes = ["include"],
3301 msvc_copts = xnnpack_msvc_std_copts(),
3302 visibility = xnnpack_visibility(),
3303 deps = [
3304 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3305 ":enable_sparse",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3306 ":logging_utils",
3307 ":memory_planner",
3308 ":operator_run",
3309 ":operators",
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]3310 ":ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3311 "@clog",
3312 "@FP16",
3313 "@pthreadpool",
3314 ] + select({
3315 ":emscripten": [],
3316 "//conditions:default": ["@cpuinfo"],
3317 }),
3318)
3319
3320xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3321 name = "xnnpack_operators_nhwc_f32",
3322 srcs = [
3323 "src/init.c",
3324 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3325 hdrs = ["include/xnnpack.h"],
3326 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3327 "-Isrc",
3328 "-Iinclude",
3329 ] + select({
3330 ":debug_build": [],
3331 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3332 }) + select({
3333 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3334 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3335 }),
3336 defines = [
3337 "XNN_NO_Q8_OPERATORS",
3338 "XNN_NO_U8_OPERATORS",
3339 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]3340 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3341 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3342 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3343 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3344 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3345 visibility = xnnpack_visibility(),
3346 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3347 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3348 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3349 ":operator_run",
3350 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3351 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3352 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3353 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3354 ] + select({
3355 ":emscripten": [],
3356 "//conditions:default": ["@cpuinfo"],
3357 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3358)
3359
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3360xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3361 name = "bench_utils",
3362 srcs = ["bench/utils.cc"],
3363 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]3364 deps = [
3365 "@com_google_benchmark//:benchmark",
3366 "@cpuinfo",
3367 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3368)
3369
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3370######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3371
3372xnnpack_benchmark(
3373 name = "q8_gemm_bench",
3374 srcs = [
3375 "bench/gemm.h",
3376 "bench/q8-gemm.cc",
3377 "src/xnnpack/AlignedAllocator.h",
3378 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3379 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3380 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3381)
3382
3383xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3384 name = "f16_igemm_bench",
3385 srcs = [
3386 "bench/f16-igemm.cc",
3387 "bench/conv.h",
3388 "bench/google/conv.h",
3389 "src/xnnpack/AlignedAllocator.h",
3390 ] + MICROKERNEL_BENCHMARK_HDRS,
3391 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3392)
3393
3394xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3395 name = "f16_gemm_bench",
3396 srcs = [
3397 "bench/f16-gemm.cc",
3398 "bench/gemm.h",
3399 "src/xnnpack/AlignedAllocator.h",
3400 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3401 deps = MICROKERNEL_BENCHMARK_DEPS,
3402)
3403
3404xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3405 name = "f16_spmm_bench",
3406 srcs = [
3407 "bench/f16-spmm.cc",
3408 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3409 "src/xnnpack/AlignedAllocator.h",
3410 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3411 deps = MICROKERNEL_BENCHMARK_DEPS,
3412)
3413
3414xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3415 name = "f32_igemm_bench",
3416 srcs = [
3417 "bench/f32-igemm.cc",
3418 "bench/conv.h",
3419 "src/xnnpack/AlignedAllocator.h",
3420 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3421 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3422)
3423
3424xnnpack_benchmark(
3425 name = "f32_conv_hwc_bench",
3426 srcs = [
3427 "bench/f32-conv-hwc.cc",
3428 "bench/dconv.h",
3429 "src/xnnpack/AlignedAllocator.h",
3430 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3431 deps = MICROKERNEL_BENCHMARK_DEPS,
3432)
3433
3434xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3435 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3436 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3437 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3438 "bench/dconv.h",
3439 "src/xnnpack/AlignedAllocator.h",
3440 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3441 deps = MICROKERNEL_BENCHMARK_DEPS,
3442)
3443
3444xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3445 name = "f16_dwconv_bench",
3446 srcs = [
3447 "bench/f16-dwconv.cc",
3448 "bench/dwconv.h",
3449 "bench/google/dwconv.h",
3450 "src/xnnpack/AlignedAllocator.h",
3451 ] + MICROKERNEL_BENCHMARK_HDRS,
3452 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3453)
3454
3455xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3456 name = "f32_dwconv_bench",
3457 srcs = [
3458 "bench/f32-dwconv.cc",
3459 "bench/dwconv.h",
3460 "src/xnnpack/AlignedAllocator.h",
3461 ] + MICROKERNEL_BENCHMARK_HDRS,
3462 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3463)
3464
3465xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3466 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3467 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3468 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3469 "bench/dwconv.h",
3470 "src/xnnpack/AlignedAllocator.h",
3471 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3472 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3473)
3474
3475xnnpack_benchmark(
3476 name = "f32_gemm_bench",
3477 srcs = [
3478 "bench/f32-gemm.cc",
3479 "bench/gemm.h",
3480 "src/xnnpack/AlignedAllocator.h",
3481 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3482 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3483 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3484)
3485
3486xnnpack_benchmark(
Marat Dukhana11ca342020-06-25 23:45:07 -0700[diff] [blame]3487 name = "f32_hswish_bench",
3488 srcs = [
3489 "bench/f32-hswish.cc",
3490 "src/xnnpack/AlignedAllocator.h",
3491 ] + MICROKERNEL_BENCHMARK_HDRS,
3492 deps = MICROKERNEL_BENCHMARK_DEPS,
3493)
3494
3495xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3496 name = "f32_raddexpminusmax_bench",
3497 srcs = [
3498 "bench/f32-raddexpminusmax.cc",
3499 "src/xnnpack/AlignedAllocator.h",
3500 ] + MICROKERNEL_BENCHMARK_HDRS,
3501 deps = MICROKERNEL_BENCHMARK_DEPS,
3502)
3503
3504xnnpack_benchmark(
3505 name = "f32_raddextexp_bench",
3506 srcs = [
3507 "bench/f32-raddextexp.cc",
3508 "src/xnnpack/AlignedAllocator.h",
3509 ] + MICROKERNEL_BENCHMARK_HDRS,
3510 deps = MICROKERNEL_BENCHMARK_DEPS,
3511)
3512
3513xnnpack_benchmark(
3514 name = "f32_raddstoreexpminusmax_bench",
3515 srcs = [
3516 "bench/f32-raddstoreexpminusmax.cc",
3517 "src/xnnpack/AlignedAllocator.h",
3518 ] + MICROKERNEL_BENCHMARK_HDRS,
3519 deps = MICROKERNEL_BENCHMARK_DEPS,
3520)
3521
3522xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3523 name = "f32_rmax_bench",
3524 srcs = [
3525 "bench/f32-rmax.cc",
3526 "src/xnnpack/AlignedAllocator.h",
3527 ] + MICROKERNEL_BENCHMARK_HDRS,
3528 deps = MICROKERNEL_BENCHMARK_DEPS,
3529)
3530
3531xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3532 name = "f32_sigmoid_bench",
3533 srcs = [
3534 "bench/f32-sigmoid.cc",
3535 "src/xnnpack/AlignedAllocator.h",
3536 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3537 deps = MICROKERNEL_BENCHMARK_DEPS,
3538)
3539
3540xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3541 name = "f32_spmm_bench",
3542 srcs = [
3543 "bench/f32-spmm.cc",
3544 "bench/gemm.h",
3545 "src/xnnpack/AlignedAllocator.h",
3546 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3547 deps = MICROKERNEL_BENCHMARK_DEPS,
3548)
3549
3550xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3551 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3552 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3553 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3554 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3555 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3556 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3557)
3558
3559xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3560 name = "f32_vscaleexpminusmax_bench",
3561 srcs = [
3562 "bench/f32-vscaleexpminusmax.cc",
3563 "src/xnnpack/AlignedAllocator.h",
3564 ] + MICROKERNEL_BENCHMARK_HDRS,
3565 deps = MICROKERNEL_BENCHMARK_DEPS,
3566)
3567
3568xnnpack_benchmark(
3569 name = "f32_vscaleextexp_bench",
3570 srcs = [
3571 "bench/f32-vscaleextexp.cc",
3572 "src/xnnpack/AlignedAllocator.h",
3573 ] + MICROKERNEL_BENCHMARK_HDRS,
3574 deps = MICROKERNEL_BENCHMARK_DEPS,
3575)
3576
3577xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3578 name = "f32_im2col_gemm_bench",
3579 srcs = [
3580 "bench/f32-im2col-gemm.cc",
3581 "bench/conv.h",
3582 "src/xnnpack/AlignedAllocator.h",
3583 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3584 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3585)
3586
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3587xnnpack_benchmark(
3588 name = "requantization_bench",
3589 srcs = [
3590 "bench/requantization.cc",
3591 "src/xnnpack/requantization-stubs.h",
3592 "src/xnnpack/AlignedAllocator.h",
3593 ] + MICROKERNEL_BENCHMARK_HDRS,
3594 deps = MICROKERNEL_BENCHMARK_DEPS,
3595)
3596
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3597xnnpack_benchmark(
3598 name = "rounding_bench",
3599 srcs = [
3600 "bench/rounding.cc",
3601 "src/xnnpack/math-stubs.h",
3602 "src/xnnpack/AlignedAllocator.h",
3603 ] + MICROKERNEL_BENCHMARK_HDRS,
3604 deps = MICROKERNEL_BENCHMARK_DEPS,
3605)
3606
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3607########################### Benchmarks for operators ###########################
3608
3609xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3610 name = "average_pooling_bench",
3611 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3612 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3613 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3614 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3615)
3616
3617xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3618 name = "bankers_rounding_bench",
3619 srcs = ["bench/bankers-rounding.cc"],
3620 copts = xnnpack_optional_tflite_copts(),
3621 tags = ["nowin32"],
3622 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3623)
3624
3625xnnpack_benchmark(
3626 name = "ceiling_bench",
3627 srcs = ["bench/ceiling.cc"],
3628 copts = xnnpack_optional_tflite_copts(),
3629 tags = ["nowin32"],
3630 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3631)
3632
3633xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3634 name = "channel_shuffle_bench",
3635 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3636 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3637)
3638
3639xnnpack_benchmark(
3640 name = "convolution_bench",
3641 srcs = ["bench/convolution.cc"],
3642 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3643 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3644 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3645)
3646
3647xnnpack_benchmark(
3648 name = "deconvolution_bench",
3649 srcs = ["bench/deconvolution.cc"],
3650 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3651 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3652 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3653)
3654
3655xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3656 name = "floor_bench",
3657 srcs = ["bench/floor.cc"],
3658 copts = xnnpack_optional_tflite_copts(),
3659 tags = ["nowin32"],
3660 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3661)
3662
3663xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3664 name = "global_average_pooling_bench",
3665 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3666 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3667)
3668
3669xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]3670 name = "hardswish_bench",
3671 srcs = ["bench/hardswish.cc"],
3672 copts = xnnpack_optional_tflite_copts(),
3673 tags = ["nowin32"],
3674 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3675)
3676
3677xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3678 name = "max_pooling_bench",
3679 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3680 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3681)
3682
3683xnnpack_benchmark(
3684 name = "sigmoid_bench",
3685 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3686 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3687 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3688 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3689)
3690
3691xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3692 name = "prelu_bench",
3693 srcs = ["bench/prelu.cc"],
3694 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3695 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3696 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3697)
3698
3699xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3700 name = "softmax_bench",
3701 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3702 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3703 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3704 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3705)
3706
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3707xnnpack_benchmark(
3708 name = "truncation_bench",
3709 srcs = ["bench/truncation.cc"],
3710 deps = OPERATOR_BENCHMARK_DEPS,
3711)
3712
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3713############################# End-to-end benchmarks ############################
3714
3715cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3716 name = "fp32_mobilenet_v1",
3717 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3718 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3719 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3720 linkstatic = True,
3721 deps = [
3722 ":XNNPACK",
3723 "@pthreadpool",
3724 ],
3725)
3726
3727cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3728 name = "fp16_mobilenet_v1",
3729 srcs = ["models/fp16-mobilenet-v1.cc"],
3730 hdrs = ["models/models.h"],
3731 copts = xnnpack_std_cxxopts(),
3732 linkstatic = True,
3733 deps = [
3734 ":XNNPACK",
3735 "@FP16",
3736 "@pthreadpool",
3737 ],
3738)
3739
3740cc_library(
3741 name = "fp32_mobilenet_v2",
3742 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3743 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3744 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3745 linkstatic = True,
3746 deps = [
3747 ":XNNPACK",
3748 "@pthreadpool",
3749 ],
3750)
3751
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3752cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3753 name = "fp16_mobilenet_v2",
3754 srcs = ["models/fp16-mobilenet-v2.cc"],
3755 hdrs = ["models/models.h"],
3756 copts = xnnpack_std_cxxopts(),
3757 linkstatic = True,
3758 deps = [
3759 ":XNNPACK",
3760 "@FP16",
3761 "@pthreadpool",
3762 ],
3763)
3764
3765cc_library(
3766 name = "fp32_mobilenet_v3_large",
3767 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3768 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3769 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3770 linkstatic = True,
3771 deps = [
3772 ":XNNPACK",
3773 "@pthreadpool",
3774 ],
3775)
3776
3777cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3778 name = "fp32_mobilenet_v3_small",
3779 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3780 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3781 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3782 linkstatic = True,
3783 deps = [
3784 ":XNNPACK",
3785 "@pthreadpool",
3786 ],
3787)
3788
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3789xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3790 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3791 srcs = [
3792 "bench/f32-dwconv-e2e.cc",
3793 "bench/end2end.h",
3794 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3795 deps = MICROKERNEL_BENCHMARK_DEPS + [
3796 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3797 ":fp32_mobilenet_v1",
3798 ":fp32_mobilenet_v2",
3799 ":fp32_mobilenet_v3_large",
3800 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3801 ],
3802)
3803
3804xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3805 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3806 srcs = [
3807 "bench/f32-gemm-e2e.cc",
3808 "bench/end2end.h",
3809 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3810 deps = MICROKERNEL_BENCHMARK_DEPS + [
3811 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3812 ":fp32_mobilenet_v1",
3813 ":fp32_mobilenet_v2",
3814 ":fp32_mobilenet_v3_large",
3815 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3816 ],
3817)
3818
3819xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3820 name = "end2end_bench",
3821 srcs = ["bench/end2end.cc"],
3822 deps = [
3823 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3824 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3825 ":fp16_mobilenet_v1",
3826 ":fp16_mobilenet_v2",
3827 ":fp32_mobilenet_v1",
3828 ":fp32_mobilenet_v2",
3829 ":fp32_mobilenet_v3_large",
3830 ":fp32_mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3831 "@pthreadpool",
3832 ],
3833)
3834
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3835#################### Accuracy evaluation for math functions ####################
3836
3837xnnpack_benchmark(
3838 name = "f32_exp_eval",
3839 srcs = [
3840 "eval/f32-exp.cc",
3841 "src/xnnpack/AlignedAllocator.h",
3842 ] + ACCURACY_EVAL_HDRS,
3843 deps = ACCURACY_EVAL_DEPS,
3844)
3845
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3846xnnpack_benchmark(
3847 name = "f32_expminus_eval",
3848 srcs = [
3849 "eval/f32-expminus.cc",
3850 "src/xnnpack/AlignedAllocator.h",
3851 ] + ACCURACY_EVAL_HDRS,
3852 deps = ACCURACY_EVAL_DEPS,
3853)
3854
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3855xnnpack_benchmark(
3856 name = "f32_extexp_eval",
3857 srcs = [
3858 "eval/f32-extexp.cc",
3859 "src/xnnpack/AlignedAllocator.h",
3860 ] + ACCURACY_EVAL_HDRS,
3861 deps = ACCURACY_EVAL_DEPS,
3862)
3863
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3864xnnpack_unit_test(
3865 name = "f32_roundne_eval",
3866 srcs = [
3867 "eval/f32-roundne.cc",
3868 "src/xnnpack/AlignedAllocator.h",
3869 "src/xnnpack/math-stubs.h",
3870 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3871 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3872 deps = MICROKERNEL_TEST_DEPS,
3873)
3874
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3875xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3876 name = "f32_roundd_eval",
3877 srcs = [
3878 "eval/f32-roundd.cc",
3879 "src/xnnpack/AlignedAllocator.h",
3880 "src/xnnpack/math-stubs.h",
3881 ] + MICROKERNEL_TEST_HDRS,
3882 automatic = False,
3883 deps = MICROKERNEL_TEST_DEPS,
3884)
3885
3886xnnpack_unit_test(
3887 name = "f32_roundu_eval",
3888 srcs = [
3889 "eval/f32-roundu.cc",
3890 "src/xnnpack/AlignedAllocator.h",
3891 "src/xnnpack/math-stubs.h",
3892 ] + MICROKERNEL_TEST_HDRS,
3893 automatic = False,
3894 deps = MICROKERNEL_TEST_DEPS,
3895)
3896
3897xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3898 name = "f32_roundz_eval",
3899 srcs = [
3900 "eval/f32-roundz.cc",
3901 "src/xnnpack/AlignedAllocator.h",
3902 "src/xnnpack/math-stubs.h",
3903 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3904 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3905 deps = MICROKERNEL_TEST_DEPS,
3906)
3907
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3908xnnpack_benchmark(
3909 name = "f32_sigmoid_eval",
3910 srcs = [
3911 "eval/f32-sigmoid.cc",
3912 "src/xnnpack/AlignedAllocator.h",
3913 ] + ACCURACY_EVAL_HDRS,
3914 deps = ACCURACY_EVAL_DEPS,
3915)
3916
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3917######################### Unit tests for micro-kernels #########################
3918
3919xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3920 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3921 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3922 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3923 "test/gemm-microkernel-tester.h",
3924 "src/xnnpack/AlignedAllocator.h",
3925 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3926 deps = MICROKERNEL_TEST_DEPS,
3927)
3928
3929xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3930 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3931 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3932 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3933 "test/spmm-microkernel-tester.h",
3934 "src/xnnpack/AlignedAllocator.h",
3935 ] + MICROKERNEL_TEST_HDRS,
3936 deps = MICROKERNEL_TEST_DEPS,
3937)
3938
3939xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3940 name = "f32_argmaxpool_test",
3941 srcs = [
3942 "test/f32-argmaxpool.cc",
3943 "test/argmaxpool-microkernel-tester.h",
3944 "src/xnnpack/AlignedAllocator.h",
3945 ] + MICROKERNEL_TEST_HDRS,
3946 deps = MICROKERNEL_TEST_DEPS,
3947)
3948
3949xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3950 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3951 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3952 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3953 "test/avgpool-microkernel-tester.h",
3954 "src/xnnpack/AlignedAllocator.h",
3955 ] + MICROKERNEL_TEST_HDRS,
3956 deps = MICROKERNEL_TEST_DEPS,
3957)
3958
3959xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3960 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3961 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3962 "test/f32-ibilinear.cc",
3963 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3964 "src/xnnpack/AlignedAllocator.h",
3965 ] + MICROKERNEL_TEST_HDRS,
3966 deps = MICROKERNEL_TEST_DEPS,
3967)
3968
3969xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3970 name = "f16_clamp_test",
3971 srcs = [
3972 "test/f16-clamp.cc",
3973 "test/clamp-microkernel-tester.h",
3974 ] + MICROKERNEL_TEST_HDRS,
3975 deps = MICROKERNEL_TEST_DEPS,
3976)
3977
3978xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3979 name = "f32_clamp_test",
3980 srcs = [
3981 "test/f32-clamp.cc",
3982 "test/clamp-microkernel-tester.h",
3983 ] + MICROKERNEL_TEST_HDRS,
3984 deps = MICROKERNEL_TEST_DEPS,
3985)
3986
3987xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3988 name = "f32_igemm_test",
3989 srcs = [
3990 "test/f32-igemm.cc",
3991 "test/gemm-microkernel-tester.h",
3992 "src/xnnpack/AlignedAllocator.h",
3993 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3994 deps = MICROKERNEL_TEST_DEPS,
3995)
3996
3997xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3998 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3999 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]4000 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4001 "test/gemm-microkernel-tester.h",
4002 "src/xnnpack/AlignedAllocator.h",
4003 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4004 deps = MICROKERNEL_TEST_DEPS,
4005)
4006
4007xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]4008 name = "f32_igemm_minmax_test",
4009 srcs = [
4010 "test/f32-igemm-minmax.cc",
4011 "test/gemm-microkernel-tester.h",
4012 "src/xnnpack/AlignedAllocator.h",
4013 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4014 deps = MICROKERNEL_TEST_DEPS,
4015)
4016
4017xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]4018 name = "f16_igemm_minmax_test",
4019 srcs = [
4020 "test/f16-igemm-minmax.cc",
4021 "test/gemm-microkernel-tester.h",
4022 "src/xnnpack/AlignedAllocator.h",
4023 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4024 deps = MICROKERNEL_TEST_DEPS,
4025)
4026
4027xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4028 name = "f32_conv_hwc_test",
4029 srcs = [
4030 "test/f32-conv-hwc.cc",
4031 "test/conv-hwc-microkernel-tester.h",
4032 "src/xnnpack/AlignedAllocator.h",
4033 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4034 deps = MICROKERNEL_TEST_DEPS,
4035)
4036
4037xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4038 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4039 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4040 "test/f32-conv-hwc2chw.cc",
4041 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4042 "src/xnnpack/AlignedAllocator.h",
4043 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4044 deps = MICROKERNEL_TEST_DEPS,
4045)
4046
4047xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]4048 name = "f32_dwconv_test",
4049 srcs = [
4050 "test/f32-dwconv.cc",
4051 "test/dwconv-microkernel-tester.h",
4052 "src/xnnpack/AlignedAllocator.h",
4053 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4054 deps = MICROKERNEL_TEST_DEPS,
4055)
4056
4057xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]4058 name = "f16_dwconv_minmax_test",
4059 srcs = [
4060 "test/f16-dwconv-minmax.cc",
4061 "test/dwconv-microkernel-tester.h",
4062 "src/xnnpack/AlignedAllocator.h",
4063 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4064 deps = MICROKERNEL_TEST_DEPS,
4065)
4066
4067xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4068 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4069 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4070 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4071 "test/dwconv-microkernel-tester.h",
4072 "src/xnnpack/AlignedAllocator.h",
4073 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4074 deps = MICROKERNEL_TEST_DEPS,
4075)
4076
4077xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4078 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4079 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4080 "test/f32-dwconv-chw.cc",
4081 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4082 "src/xnnpack/AlignedAllocator.h",
4083 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4084 deps = MICROKERNEL_TEST_DEPS,
4085)
4086
4087xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]4088 name = "f16_gavgpool_minmax_test",
4089 srcs = [
4090 "test/f16-gavgpool-minmax.cc",
4091 "test/gavgpool-microkernel-tester.h",
4092 "src/xnnpack/AlignedAllocator.h",
4093 ] + MICROKERNEL_TEST_HDRS,
4094 deps = MICROKERNEL_TEST_DEPS,
4095)
4096
4097xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4098 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4099 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4100 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4101 "test/gavgpool-microkernel-tester.h",
4102 "src/xnnpack/AlignedAllocator.h",
4103 ] + MICROKERNEL_TEST_HDRS,
4104 deps = MICROKERNEL_TEST_DEPS,
4105)
4106
4107xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4108 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4109 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4110 "test/f32-gavgpool-cw.cc",
4111 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4112 "src/xnnpack/AlignedAllocator.h",
4113 ] + MICROKERNEL_TEST_HDRS,
4114 deps = MICROKERNEL_TEST_DEPS,
4115)
4116
4117xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]4118 name = "f32_gemm_test",
4119 srcs = [
4120 "test/f32-gemm.cc",
4121 "test/gemm-microkernel-tester.h",
4122 "src/xnnpack/AlignedAllocator.h",
4123 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4124 deps = MICROKERNEL_TEST_DEPS,
4125)
4126
4127xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]4128 name = "f32_gemm_relu_test",
4129 srcs = [
4130 "test/f32-gemm-relu.cc",
4131 "test/gemm-microkernel-tester.h",
4132 "src/xnnpack/AlignedAllocator.h",
4133 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4134 deps = MICROKERNEL_TEST_DEPS,
4135)
4136
4137xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4138 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4139 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4140 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4141 "test/gemm-microkernel-tester.h",
4142 "src/xnnpack/AlignedAllocator.h",
4143 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4144 deps = MICROKERNEL_TEST_DEPS,
4145)
4146
4147xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4148 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4149 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4150 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4151 "test/gemm-microkernel-tester.h",
4152 "src/xnnpack/AlignedAllocator.h",
4153 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4154 deps = MICROKERNEL_TEST_DEPS,
4155)
4156
4157xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4158 name = "f16_hswish_test",
4159 srcs = [
4160 "test/f16-hswish.cc",
4161 "test/hswish-microkernel-tester.h",
4162 ] + MICROKERNEL_TEST_HDRS,
4163 deps = MICROKERNEL_TEST_DEPS,
4164)
4165
4166xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4167 name = "f32_hswish_test",
4168 srcs = [
4169 "test/f32-hswish.cc",
4170 "test/hswish-microkernel-tester.h",
4171 ] + MICROKERNEL_TEST_HDRS,
4172 deps = MICROKERNEL_TEST_DEPS,
4173)
4174
4175xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4176 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4177 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4178 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4179 "test/maxpool-microkernel-tester.h",
4180 ] + MICROKERNEL_TEST_HDRS,
4181 deps = MICROKERNEL_TEST_DEPS,
4182)
4183
4184xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4185 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4186 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4187 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4188 "test/avgpool-microkernel-tester.h",
4189 "src/xnnpack/AlignedAllocator.h",
4190 ] + MICROKERNEL_TEST_HDRS,
4191 deps = MICROKERNEL_TEST_DEPS,
4192)
4193
4194xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4195 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4196 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4197 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4198 "test/gemm-microkernel-tester.h",
4199 "src/xnnpack/AlignedAllocator.h",
4200 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4201 deps = MICROKERNEL_TEST_DEPS,
4202)
4203
4204xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4205 name = "f16_prelu_test",
4206 srcs = [
4207 "test/f16-prelu.cc",
4208 "test/prelu-microkernel-tester.h",
4209 "src/xnnpack/AlignedAllocator.h",
4210 ] + MICROKERNEL_TEST_HDRS,
4211 deps = MICROKERNEL_TEST_DEPS,
4212)
4213
4214xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4215 name = "f32_prelu_test",
4216 srcs = [
4217 "test/f32-prelu.cc",
4218 "test/prelu-microkernel-tester.h",
4219 "src/xnnpack/AlignedAllocator.h",
4220 ] + MICROKERNEL_TEST_HDRS,
4221 deps = MICROKERNEL_TEST_DEPS,
4222)
4223
4224xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4225 name = "f32_raddexpminusmax_test",
4226 srcs = [
4227 "test/f32-raddexpminusmax.cc",
4228 "test/raddexpminusmax-microkernel-tester.h",
4229 ] + MICROKERNEL_TEST_HDRS,
4230 deps = MICROKERNEL_TEST_DEPS,
4231)
4232
4233xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4234 name = "f32_raddextexp_test",
4235 srcs = [
4236 "test/f32-raddextexp.cc",
4237 "test/raddextexp-microkernel-tester.h",
4238 ] + MICROKERNEL_TEST_HDRS,
4239 deps = MICROKERNEL_TEST_DEPS,
4240)
4241
4242xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4243 name = "f32_raddstoreexpminusmax_test",
4244 srcs = [
4245 "test/f32-raddstoreexpminusmax.cc",
4246 "test/raddstoreexpminusmax-microkernel-tester.h",
4247 ] + MICROKERNEL_TEST_HDRS,
4248 deps = MICROKERNEL_TEST_DEPS,
4249)
4250
4251xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4252 name = "f32_rmax_test",
4253 srcs = [
4254 "test/f32-rmax.cc",
4255 "test/rmax-microkernel-tester.h",
4256 ] + MICROKERNEL_TEST_HDRS,
4257 deps = MICROKERNEL_TEST_DEPS,
4258)
4259
4260xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4261 name = "f32_sigmoid_test",
4262 srcs = [
4263 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4264 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4265 ] + MICROKERNEL_TEST_HDRS,
4266 deps = MICROKERNEL_TEST_DEPS,
4267)
4268
4269xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4270 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4271 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4272 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4273 "test/spmm-microkernel-tester.h",
4274 "src/xnnpack/AlignedAllocator.h",
4275 ] + MICROKERNEL_TEST_HDRS,
4276 deps = MICROKERNEL_TEST_DEPS,
4277)
4278
4279xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]4280 name = "f16_vadd_minmax_test",
4281 srcs = [
4282 "test/f16-vadd-minmax.cc",
4283 "test/vbinary-microkernel-tester.h",
4284 ] + MICROKERNEL_TEST_HDRS,
4285 deps = MICROKERNEL_TEST_DEPS,
4286)
4287
4288xnnpack_unit_test(
4289 name = "f16_vaddc_minmax_test",
4290 srcs = [
4291 "test/f16-vaddc-minmax.cc",
4292 "test/vbinaryc-microkernel-tester.h",
4293 ] + MICROKERNEL_TEST_HDRS,
4294 deps = MICROKERNEL_TEST_DEPS,
4295)
4296
4297xnnpack_unit_test(
4298 name = "f16_vdiv_minmax_test",
4299 srcs = [
4300 "test/f16-vdiv-minmax.cc",
4301 "test/vbinary-microkernel-tester.h",
4302 ] + MICROKERNEL_TEST_HDRS,
4303 deps = MICROKERNEL_TEST_DEPS,
4304)
4305
4306xnnpack_unit_test(
4307 name = "f16_vdivc_minmax_test",
4308 srcs = [
4309 "test/f16-vdivc-minmax.cc",
4310 "test/vbinaryc-microkernel-tester.h",
4311 ] + MICROKERNEL_TEST_HDRS,
4312 deps = MICROKERNEL_TEST_DEPS,
4313)
4314
4315xnnpack_unit_test(
4316 name = "f16_vrdivc_minmax_test",
4317 srcs = [
4318 "test/f16-vrdivc-minmax.cc",
4319 "test/vbinaryc-microkernel-tester.h",
4320 ] + MICROKERNEL_TEST_HDRS,
4321 deps = MICROKERNEL_TEST_DEPS,
4322)
4323
4324xnnpack_unit_test(
4325 name = "f16_vmax_test",
4326 srcs = [
4327 "test/f16-vmax.cc",
4328 "test/vbinary-microkernel-tester.h",
4329 ] + MICROKERNEL_TEST_HDRS,
4330 deps = MICROKERNEL_TEST_DEPS,
4331)
4332
4333xnnpack_unit_test(
4334 name = "f16_vmaxc_test",
4335 srcs = [
4336 "test/f16-vmaxc.cc",
4337 "test/vbinaryc-microkernel-tester.h",
4338 ] + MICROKERNEL_TEST_HDRS,
4339 deps = MICROKERNEL_TEST_DEPS,
4340)
4341
4342xnnpack_unit_test(
4343 name = "f16_vmin_test",
4344 srcs = [
4345 "test/f16-vmin.cc",
4346 "test/vbinary-microkernel-tester.h",
4347 ] + MICROKERNEL_TEST_HDRS,
4348 deps = MICROKERNEL_TEST_DEPS,
4349)
4350
4351xnnpack_unit_test(
4352 name = "f16_vminc_test",
4353 srcs = [
4354 "test/f16-vminc.cc",
4355 "test/vbinaryc-microkernel-tester.h",
4356 ] + MICROKERNEL_TEST_HDRS,
4357 deps = MICROKERNEL_TEST_DEPS,
4358)
4359
4360xnnpack_unit_test(
4361 name = "f16_vmul_minmax_test",
4362 srcs = [
4363 "test/f16-vmul-minmax.cc",
4364 "test/vbinary-microkernel-tester.h",
4365 ] + MICROKERNEL_TEST_HDRS,
4366 deps = MICROKERNEL_TEST_DEPS,
4367)
4368
4369xnnpack_unit_test(
4370 name = "f16_vmulc_minmax_test",
4371 srcs = [
4372 "test/f16-vmulc-minmax.cc",
4373 "test/vbinaryc-microkernel-tester.h",
4374 ] + MICROKERNEL_TEST_HDRS,
4375 deps = MICROKERNEL_TEST_DEPS,
4376)
4377
4378xnnpack_unit_test(
4379 name = "f16_vsub_minmax_test",
4380 srcs = [
4381 "test/f16-vsub-minmax.cc",
4382 "test/vbinary-microkernel-tester.h",
4383 ] + MICROKERNEL_TEST_HDRS,
4384 deps = MICROKERNEL_TEST_DEPS,
4385)
4386
4387xnnpack_unit_test(
4388 name = "f16_vsubc_minmax_test",
4389 srcs = [
4390 "test/f16-vsubc-minmax.cc",
4391 "test/vbinaryc-microkernel-tester.h",
4392 ] + MICROKERNEL_TEST_HDRS,
4393 deps = MICROKERNEL_TEST_DEPS,
4394)
4395
4396xnnpack_unit_test(
4397 name = "f16_vrsubc_minmax_test",
4398 srcs = [
4399 "test/f16-vrsubc-minmax.cc",
4400 "test/vbinaryc-microkernel-tester.h",
4401 ] + MICROKERNEL_TEST_HDRS,
4402 deps = MICROKERNEL_TEST_DEPS,
4403)
4404
4405xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4406 name = "f32_vabs_test",
4407 srcs = [
4408 "test/f32-vabs.cc",
4409 "test/vunary-microkernel-tester.h",
4410 ] + MICROKERNEL_TEST_HDRS,
4411 deps = MICROKERNEL_TEST_DEPS,
4412)
4413
4414xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4415 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4416 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4417 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4418 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4419 ] + MICROKERNEL_TEST_HDRS,
4420 deps = MICROKERNEL_TEST_DEPS,
4421)
4422
4423xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4424 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4425 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4426 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4427 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4428 ] + MICROKERNEL_TEST_HDRS,
4429 deps = MICROKERNEL_TEST_DEPS,
4430)
4431
4432xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4433 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4434 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4435 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4436 "test/vbinary-microkernel-tester.h",
4437 ] + MICROKERNEL_TEST_HDRS,
4438 deps = MICROKERNEL_TEST_DEPS,
4439)
4440
4441xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4442 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4443 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4444 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4445 "test/vbinaryc-microkernel-tester.h",
4446 ] + MICROKERNEL_TEST_HDRS,
4447 deps = MICROKERNEL_TEST_DEPS,
4448)
4449
4450xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4451 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4452 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4453 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4454 "test/vbinaryc-microkernel-tester.h",
4455 ] + MICROKERNEL_TEST_HDRS,
4456 deps = MICROKERNEL_TEST_DEPS,
4457)
4458
4459xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4460 name = "f32_vmax_test",
4461 srcs = [
4462 "test/f32-vmax.cc",
4463 "test/vbinary-microkernel-tester.h",
4464 ] + MICROKERNEL_TEST_HDRS,
4465 deps = MICROKERNEL_TEST_DEPS,
4466)
4467
4468xnnpack_unit_test(
4469 name = "f32_vmaxc_test",
4470 srcs = [
4471 "test/f32-vmaxc.cc",
4472 "test/vbinaryc-microkernel-tester.h",
4473 ] + MICROKERNEL_TEST_HDRS,
4474 deps = MICROKERNEL_TEST_DEPS,
4475)
4476
4477xnnpack_unit_test(
4478 name = "f32_vmin_test",
4479 srcs = [
4480 "test/f32-vmin.cc",
4481 "test/vbinary-microkernel-tester.h",
4482 ] + MICROKERNEL_TEST_HDRS,
4483 deps = MICROKERNEL_TEST_DEPS,
4484)
4485
4486xnnpack_unit_test(
4487 name = "f32_vminc_test",
4488 srcs = [
4489 "test/f32-vminc.cc",
4490 "test/vbinaryc-microkernel-tester.h",
4491 ] + MICROKERNEL_TEST_HDRS,
4492 deps = MICROKERNEL_TEST_DEPS,
4493)
4494
4495xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4496 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4497 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4498 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4499 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4500 ] + MICROKERNEL_TEST_HDRS,
4501 deps = MICROKERNEL_TEST_DEPS,
4502)
4503
4504xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4505 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4506 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4507 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4508 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4509 ] + MICROKERNEL_TEST_HDRS,
4510 deps = MICROKERNEL_TEST_DEPS,
4511)
4512
4513xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4514 name = "f16_vmulcaddc_minmax_test",
4515 srcs = [
4516 "test/f16-vmulcaddc-minmax.cc",
4517 "test/vmulcaddc-microkernel-tester.h",
4518 "src/xnnpack/AlignedAllocator.h",
4519 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4520 deps = MICROKERNEL_TEST_DEPS,
4521)
4522
4523xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4524 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4525 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4526 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4527 "test/vmulcaddc-microkernel-tester.h",
4528 "src/xnnpack/AlignedAllocator.h",
4529 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4530 deps = MICROKERNEL_TEST_DEPS,
4531)
4532
4533xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]4534 name = "f32_vlrelu_test",
4535 srcs = [
4536 "test/f32-vlrelu.cc",
4537 "test/vunary-microkernel-tester.h",
4538 ] + MICROKERNEL_TEST_HDRS,
4539 deps = MICROKERNEL_TEST_DEPS,
4540)
4541
4542xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4543 name = "f32_vneg_test",
4544 srcs = [
4545 "test/f32-vneg.cc",
4546 "test/vunary-microkernel-tester.h",
4547 ] + MICROKERNEL_TEST_HDRS,
4548 deps = MICROKERNEL_TEST_DEPS,
4549)
4550
4551xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4552 name = "f32_vrndne_test",
4553 srcs = [
4554 "test/f32-vrndne.cc",
4555 "test/vunary-microkernel-tester.h",
4556 ] + MICROKERNEL_TEST_HDRS,
4557 deps = MICROKERNEL_TEST_DEPS,
4558)
4559
4560xnnpack_unit_test(
4561 name = "f32_vrndz_test",
4562 srcs = [
4563 "test/f32-vrndz.cc",
4564 "test/vunary-microkernel-tester.h",
4565 ] + MICROKERNEL_TEST_HDRS,
4566 deps = MICROKERNEL_TEST_DEPS,
4567)
4568
4569xnnpack_unit_test(
4570 name = "f32_vrndu_test",
4571 srcs = [
4572 "test/f32-vrndu.cc",
4573 "test/vunary-microkernel-tester.h",
4574 ] + MICROKERNEL_TEST_HDRS,
4575 deps = MICROKERNEL_TEST_DEPS,
4576)
4577
4578xnnpack_unit_test(
4579 name = "f32_vrndd_test",
4580 srcs = [
4581 "test/f32-vrndd.cc",
4582 "test/vunary-microkernel-tester.h",
4583 ] + MICROKERNEL_TEST_HDRS,
4584 deps = MICROKERNEL_TEST_DEPS,
4585)
4586
4587xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4588 name = "f32_vscale_test",
4589 srcs = [
4590 "test/f32-vscale.cc",
4591 "test/vscale-microkernel-tester.h",
4592 ] + MICROKERNEL_TEST_HDRS,
4593 deps = MICROKERNEL_TEST_DEPS,
4594)
4595
4596xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4597 name = "f32_vscaleexpminusmax_test",
4598 srcs = [
4599 "test/f32-vscaleexpminusmax.cc",
4600 "test/vscaleexpminusmax-microkernel-tester.h",
4601 ] + MICROKERNEL_TEST_HDRS,
4602 deps = MICROKERNEL_TEST_DEPS,
4603)
4604
4605xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4606 name = "f32_vscaleextexp_test",
4607 srcs = [
4608 "test/f32-vscaleextexp.cc",
4609 "test/vscaleextexp-microkernel-tester.h",
4610 ] + MICROKERNEL_TEST_HDRS,
4611 deps = MICROKERNEL_TEST_DEPS,
4612)
4613
4614xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4615 name = "f32_vsqr_test",
4616 srcs = [
4617 "test/f32-vsqr.cc",
4618 "test/vunary-microkernel-tester.h",
4619 ] + MICROKERNEL_TEST_HDRS,
4620 deps = MICROKERNEL_TEST_DEPS,
4621)
4622
4623xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4624 name = "f32_vsqrdiff_test",
4625 srcs = [
4626 "test/f32-vsqrdiff.cc",
4627 "test/vbinary-microkernel-tester.h",
4628 ] + MICROKERNEL_TEST_HDRS,
4629 deps = MICROKERNEL_TEST_DEPS,
4630)
4631
4632xnnpack_unit_test(
4633 name = "f32_vsqrdiffc_test",
4634 srcs = [
4635 "test/f32-vsqrdiffc.cc",
4636 "test/vbinaryc-microkernel-tester.h",
4637 ] + MICROKERNEL_TEST_HDRS,
4638 deps = MICROKERNEL_TEST_DEPS,
4639)
4640
4641xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4642 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4643 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4644 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4645 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4646 ] + MICROKERNEL_TEST_HDRS,
4647 deps = MICROKERNEL_TEST_DEPS,
4648)
4649
4650xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4651 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4652 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4653 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4654 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4655 ] + MICROKERNEL_TEST_HDRS,
4656 deps = MICROKERNEL_TEST_DEPS,
4657)
4658
4659xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4660 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4661 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4662 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4663 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4664 ] + MICROKERNEL_TEST_HDRS,
4665 deps = MICROKERNEL_TEST_DEPS,
4666)
4667
4668xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4669 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4670 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4671 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4672 "test/avgpool-microkernel-tester.h",
4673 "src/xnnpack/AlignedAllocator.h",
4674 ] + MICROKERNEL_TEST_HDRS,
4675 deps = MICROKERNEL_TEST_DEPS,
4676)
4677
4678xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4679 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4680 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4681 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4682 "test/gemm-microkernel-tester.h",
4683 "src/xnnpack/AlignedAllocator.h",
4684 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4685 deps = MICROKERNEL_TEST_DEPS,
4686)
4687
4688xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4689 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4690 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4691 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4692 "test/dwconv-microkernel-tester.h",
4693 "src/xnnpack/AlignedAllocator.h",
4694 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4695 deps = MICROKERNEL_TEST_DEPS,
4696)
4697
4698xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4699 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4700 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4701 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4702 "test/gavgpool-microkernel-tester.h",
4703 "src/xnnpack/AlignedAllocator.h",
4704 ] + MICROKERNEL_TEST_HDRS,
4705 deps = MICROKERNEL_TEST_DEPS,
4706)
4707
4708xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4709 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4710 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4711 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4712 "test/gemm-microkernel-tester.h",
4713 "src/xnnpack/AlignedAllocator.h",
4714 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4715 deps = MICROKERNEL_TEST_DEPS,
4716)
4717
4718xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4719 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4720 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4721 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4722 "test/vadd-microkernel-tester.h",
4723 ] + MICROKERNEL_TEST_HDRS,
4724 deps = MICROKERNEL_TEST_DEPS,
4725)
4726
4727xnnpack_unit_test(
4728 name = "u8_clamp_test",
4729 srcs = [
4730 "test/u8-clamp.cc",
4731 "test/clamp-microkernel-tester.h",
4732 ] + MICROKERNEL_TEST_HDRS,
4733 deps = MICROKERNEL_TEST_DEPS,
4734)
4735
4736xnnpack_unit_test(
4737 name = "u8_lut32norm_test",
4738 srcs = [
4739 "test/u8-lut32norm.cc",
4740 "test/lut-norm-microkernel-tester.h",
4741 ] + MICROKERNEL_TEST_HDRS,
4742 deps = MICROKERNEL_TEST_DEPS,
4743)
4744
4745xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4746 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4747 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4748 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4749 "test/maxpool-microkernel-tester.h",
4750 ] + MICROKERNEL_TEST_HDRS,
4751 deps = MICROKERNEL_TEST_DEPS,
4752)
4753
4754xnnpack_unit_test(
4755 name = "u8_rmax_test",
4756 srcs = [
4757 "test/u8-rmax.cc",
4758 "test/rmax-microkernel-tester.h",
4759 ] + MICROKERNEL_TEST_HDRS,
4760 deps = MICROKERNEL_TEST_DEPS,
4761)
4762
4763xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4764 name = "x32_fill_test",
4765 srcs = [
4766 "test/x32-fill.cc",
4767 "test/fill-microkernel-tester.h",
4768 ] + MICROKERNEL_TEST_HDRS,
4769 deps = MICROKERNEL_TEST_DEPS,
4770)
4771
4772xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4773 name = "x32_packx_test",
4774 srcs = [
4775 "test/x32-packx.cc",
4776 "test/pack-microkernel-tester.h",
4777 "src/xnnpack/AlignedAllocator.h",
4778 ] + MICROKERNEL_TEST_HDRS,
4779 deps = MICROKERNEL_TEST_DEPS,
4780)
4781
4782xnnpack_unit_test(
4783 name = "x32_pad_test",
4784 srcs = [
4785 "test/x32-pad.cc",
4786 "test/pad-microkernel-tester.h",
4787 ] + MICROKERNEL_TEST_HDRS,
4788 deps = MICROKERNEL_TEST_DEPS,
4789)
4790
4791xnnpack_unit_test(
4792 name = "x32_unpool_test",
4793 srcs = [
4794 "test/x32-unpool.cc",
4795 "test/unpool-microkernel-tester.h",
4796 ] + MICROKERNEL_TEST_HDRS,
4797 deps = MICROKERNEL_TEST_DEPS,
4798)
4799
4800xnnpack_unit_test(
4801 name = "x32_zip_test",
4802 srcs = [
4803 "test/x32-zip.cc",
4804 "test/zip-microkernel-tester.h",
4805 ] + MICROKERNEL_TEST_HDRS,
4806 deps = MICROKERNEL_TEST_DEPS,
4807)
4808
4809xnnpack_unit_test(
4810 name = "x8_lut_test",
4811 srcs = [
4812 "test/x8-lut.cc",
4813 "test/lut-microkernel-tester.h",
4814 ] + MICROKERNEL_TEST_HDRS,
4815 deps = MICROKERNEL_TEST_DEPS,
4816)
4817
4818xnnpack_unit_test(
4819 name = "x8_zip_test",
4820 srcs = [
4821 "test/x8-zip.cc",
4822 "test/zip-microkernel-tester.h",
4823 ] + MICROKERNEL_TEST_HDRS,
4824 deps = MICROKERNEL_TEST_DEPS,
4825)
4826
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4827xnnpack_unit_test(
4828 name = "requantization_test",
4829 srcs = [
4830 "src/xnnpack/requantization-stubs.h",
4831 "test/requantization.cc",
4832 "test/requantization-tester.h",
4833 ] + MICROKERNEL_TEST_HDRS,
4834 deps = MICROKERNEL_TEST_DEPS,
4835)
4836
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4837########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4838
4839xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4840 name = "operator_size_test",
4841 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4842 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4843)
4844
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4845xnnpack_binary(
4846 name = "subgraph_size_test",
4847 srcs = ["test/subgraph-size.c"],
4848 deps = [":XNNPACK"],
4849)
4850
4851########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4852
4853xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4854 name = "abs_nc_test",
4855 srcs = [
4856 "test/abs-nc.cc",
4857 "test/abs-operator-tester.h",
4858 ],
4859 deps = OPERATOR_TEST_DEPS,
4860)
4861
4862xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4863 name = "add_nd_test",
4864 srcs = [
4865 "test/add-nd.cc",
4866 "test/binary-elementwise-operator-tester.h",
4867 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4868 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4869)
4870
4871xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4872 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4873 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4874 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4875 "test/argmax-pooling-operator-tester.h",
4876 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4877 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4878)
4879
4880xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4881 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4882 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4883 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4884 "test/average-pooling-operator-tester.h",
4885 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4886 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4887)
4888
4889xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4890 name = "bankers_rounding_nc_test",
4891 srcs = [
4892 "test/bankers-rounding-nc.cc",
4893 "test/bankers-rounding-operator-tester.h",
4894 ],
4895 deps = OPERATOR_TEST_DEPS,
4896)
4897
4898xnnpack_unit_test(
4899 name = "ceiling_nc_test",
4900 srcs = [
4901 "test/ceiling-nc.cc",
4902 "test/ceiling-operator-tester.h",
4903 ],
4904 deps = OPERATOR_TEST_DEPS,
4905)
4906
4907xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4908 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4909 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4910 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4911 "test/channel-shuffle-operator-tester.h",
4912 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4913 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4914)
4915
4916xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4917 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4918 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4919 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4920 "test/clamp-operator-tester.h",
4921 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4922 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4923)
4924
4925xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4926 name = "constant_pad_nd_test",
4927 srcs = [
4928 "test/constant-pad-nd.cc",
4929 "test/constant-pad-operator-tester.h",
4930 ],
4931 deps = OPERATOR_TEST_DEPS,
4932)
4933
4934xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4935 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4936 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4937 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4938 "test/convolution-operator-tester.h",
4939 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4940 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4941)
4942
4943xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4944 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4945 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4946 "test/convolution-nchw.cc",
4947 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4948 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4949 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4950)
4951
4952xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]4953 name = "copy_nc_test",
4954 srcs = [
4955 "test/copy-nc.cc",
4956 "test/copy-operator-tester.h",
4957 ],
4958 deps = OPERATOR_TEST_DEPS,
4959)
4960
4961xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4962 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4963 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4964 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4965 "test/deconvolution-operator-tester.h",
4966 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4967 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4968)
4969
4970xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4971 name = "divide_nd_test",
4972 srcs = [
4973 "test/binary-elementwise-operator-tester.h",
4974 "test/divide-nd.cc",
4975 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4976 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4977)
4978
4979xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4980 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4981 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4982 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4983 "test/fully-connected-operator-tester.h",
4984 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4985 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4986)
4987
4988xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4989 name = "floor_nc_test",
4990 srcs = [
4991 "test/floor-nc.cc",
4992 "test/floor-operator-tester.h",
4993 ],
4994 deps = OPERATOR_TEST_DEPS,
4995)
4996
4997xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4998 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4999 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5000 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5001 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -0700[diff] [blame]5002 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5003 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5004)
5005
5006xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5007 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5008 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5009 "test/global-average-pooling-ncw.cc",
5010 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5011 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5012 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5013)
5014
5015xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5016 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5017 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5018 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5019 "test/hardswish-operator-tester.h",
5020 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5021 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5022)
5023
5024xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5025 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5026 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5027 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5028 "test/leaky-relu-operator-tester.h",
5029 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5030 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5031)
5032
5033xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5034 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5035 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5036 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5037 "test/max-pooling-operator-tester.h",
5038 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5039 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5040)
5041
5042xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5043 name = "maximum_nd_test",
5044 srcs = [
5045 "test/binary-elementwise-operator-tester.h",
5046 "test/maximum-nd.cc",
5047 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5048 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5049)
5050
5051xnnpack_unit_test(
5052 name = "minimum_nd_test",
5053 srcs = [
5054 "test/binary-elementwise-operator-tester.h",
5055 "test/minimum-nd.cc",
5056 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5057 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5058)
5059
5060xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5061 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]5062 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]5063 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5064 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]5065 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5066 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]5067)
5068
5069xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]5070 name = "negate_nc_test",
5071 srcs = [
5072 "test/negate-nc.cc",
5073 "test/negate-operator-tester.h",
5074 ],
5075 deps = OPERATOR_TEST_DEPS,
5076)
5077
5078xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5079 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5080 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5081 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5082 "test/prelu-operator-tester.h",
5083 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5084 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5085)
5086
5087xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5088 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5089 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5090 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5091 "test/resize-bilinear-operator-tester.h",
5092 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5093 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5094)
5095
5096xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5097 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5098 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5099 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5100 "test/sigmoid-operator-tester.h",
5101 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5102 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5103)
5104
5105xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5106 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5107 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5108 "test/softmax-nc.cc",
5109 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5110 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5111 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5112)
5113
5114xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]5115 name = "square_nc_test",
5116 srcs = [
5117 "test/square-nc.cc",
5118 "test/square-operator-tester.h",
5119 ],
5120 deps = OPERATOR_TEST_DEPS,
5121)
5122
5123xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]5124 name = "squared_difference_nd_test",
5125 srcs = [
5126 "test/binary-elementwise-operator-tester.h",
5127 "test/squared-difference-nd.cc",
5128 ],
5129 deps = OPERATOR_TEST_DEPS,
5130)
5131
5132xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5133 name = "subtract_nd_test",
5134 srcs = [
5135 "test/binary-elementwise-operator-tester.h",
5136 "test/subtract-nd.cc",
5137 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5138 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5139)
5140
5141xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5142 name = "truncation_nc_test",
5143 srcs = [
5144 "test/truncation-nc.cc",
5145 "test/truncation-operator-tester.h",
5146 ],
5147 deps = OPERATOR_TEST_DEPS,
5148)
5149
5150xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5151 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5152 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5153 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5154 "test/unpooling-operator-tester.h",
5155 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5156 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5157)
5158
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5159############################### Misc unit tests ###############################
5160
5161xnnpack_unit_test(
5162 name = "memory_planner_test",
5163 srcs = [
5164 "test/memory-planner-test.cc",
5165 ],
5166 deps = [
5167 ":XNNPACK",
5168 ":memory_planner",
5169 ],
5170)
5171
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5172############################# Build configurations #############################
5173
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5174# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5175config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5176 name = "xnn_enable_assembly_explicit_true",
5177 define_values = {"xnn_enable_assembly": "true"},
5178)
5179
5180# Disables usage of assembly kernels.
5181config_setting(
5182 name = "xnn_enable_assembly_explicit_false",
5183 define_values = {"xnn_enable_assembly": "false"},
5184)
5185
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]5186# Enables usage of sparse inference.
5187config_setting(
5188 name = "xnn_enable_sparse_explicit_true",
5189 define_values = {"xnn_enable_sparse": "true"},
5190)
5191
5192# Disables usage of sparse inference.
5193config_setting(
5194 name = "xnn_enable_sparse_explicit_false",
5195 define_values = {"xnn_enable_sparse": "false"},
5196)
5197
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]5198# Disables usage of HMP-aware optimizations.
5199config_setting(
5200 name = "xnn_enable_hmp_explicit_false",
5201 define_values = {"xnn_enable_hmp": "false"},
5202)
5203
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5204# Enable usage of optimized memory allocation
5205config_setting(
5206 name = "xnn_enable_memopt_explicit_true",
5207 define_values = {"xnnpack_enable_memopt": "true"},
5208)
5209
5210# Disable usage of optimized memory allocation
5211config_setting(
5212 name = "xnn_enable_memopt_explicit_false",
5213 define_values = {"xnnpack_enable_memopt": "false"},
5214)
5215
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5216# Builds with -c dbg
5217config_setting(
5218 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5219 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5220 "compilation_mode": "dbg",
5221 },
5222)
5223
5224# Builds with -c opt
5225config_setting(
5226 name = "optimized_build",
5227 values = {
5228 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5229 },
5230)
5231
5232config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5233 name = "linux_k8",
5234 values = {"cpu": "k8"},
5235)
5236
5237config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5238 name = "linux_arm",
5239 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]5240)
5241
5242config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -0700[diff] [blame]5243 name = "linux_armeabi",
5244 values = {"cpu": "armeabi"},
5245)
5246
5247config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]5248 name = "linux_armhf",
5249 values = {"cpu": "armhf"},
5250)
5251
5252config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -0700[diff] [blame]5253 name = "linux_armv7a",
5254 values = {"cpu": "armv7a"},
5255)
5256
5257config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5258 name = "linux_aarch64",
5259 values = {"cpu": "aarch64"},
5260)
5261
5262config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5263 name = "android",
5264 values = {"crosstool_top": "//external:android/crosstool"},
5265)
5266
5267config_setting(
5268 name = "android_armv7",
5269 values = {
5270 "crosstool_top": "//external:android/crosstool",
5271 "cpu": "armeabi-v7a",
5272 },
5273)
5274
5275config_setting(
5276 name = "android_arm64",
5277 values = {
5278 "crosstool_top": "//external:android/crosstool",
5279 "cpu": "arm64-v8a",
5280 },
5281)
5282
5283config_setting(
5284 name = "android_x86",
5285 values = {
5286 "crosstool_top": "//external:android/crosstool",
5287 "cpu": "x86",
5288 },
5289)
5290
5291config_setting(
5292 name = "android_x86_64",
5293 values = {
5294 "crosstool_top": "//external:android/crosstool",
5295 "cpu": "x86_64",
5296 },
5297)
5298
5299config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5300 name = "windows_x86_64",
5301 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5302)
5303
5304config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5305 name = "windows_x86_64_clang",
5306 values = {
5307 "compiler": "clang-cl",
5308 "cpu": "x64_windows",
5309 },
5310)
5311
5312config_setting(
5313 name = "windows_x86_64_mingw",
5314 values = {
5315 "compiler": "mingw-gcc",
5316 "cpu": "x64_windows",
5317 },
5318)
5319
5320config_setting(
5321 name = "windows_x86_64_msys",
5322 values = {
5323 "compiler": "msys-gcc",
5324 "cpu": "x64_windows",
5325 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5326)
5327
5328config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]5329 name = "macos_x86_64",
5330 values = {
5331 "apple_platform_type": "macos",
5332 "cpu": "darwin",
5333 },
5334)
5335
5336config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5337 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5338 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5339)
5340
5341config_setting(
5342 name = "emscripten_wasm",
5343 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5344 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5345 "cpu": "wasm",
5346 },
5347)
5348
5349config_setting(
5350 name = "emscripten_wasmsimd",
5351 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5352 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5353 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]5354 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5355 },
5356)
5357
5358config_setting(
5359 name = "emscripten_asmjs",
5360 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5361 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5362 "cpu": "asmjs",
5363 },
5364)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5365
5366config_setting(
5367 name = "ios_armv7",
5368 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5369 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5370 "cpu": "ios_armv7",
5371 },
5372)
5373
5374config_setting(
5375 name = "ios_arm64",
5376 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5377 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5378 "cpu": "ios_arm64",
5379 },
5380)
5381
5382config_setting(
5383 name = "ios_arm64e",
5384 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5385 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5386 "cpu": "ios_arm64e",
5387 },
5388)
5389
5390config_setting(
5391 name = "ios_x86",
5392 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5393 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5394 "cpu": "ios_i386",
5395 },
5396)
5397
5398config_setting(
5399 name = "ios_x86_64",
5400 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5401 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5402 "cpu": "ios_x86_64",
5403 },
5404)
5405
5406config_setting(
5407 name = "watchos_armv7k",
5408 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5409 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5410 "cpu": "watchos_armv7k",
5411 },
5412)
5413
5414config_setting(
5415 name = "watchos_arm64_32",
5416 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5417 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5418 "cpu": "watchos_arm64_32",
5419 },
5420)
5421
5422config_setting(
5423 name = "watchos_x86",
5424 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5425 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5426 "cpu": "watchos_i386",
5427 },
5428)
5429
5430config_setting(
5431 name = "watchos_x86_64",
5432 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5433 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5434 "cpu": "watchos_x86_64",
5435 },
5436)
5437
5438config_setting(
5439 name = "tvos_arm64",
5440 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5441 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5442 "cpu": "tvos_arm64",
5443 },
5444)
5445
5446config_setting(
5447 name = "tvos_x86_64",
5448 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5449 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5450 "cpu": "tvos_x86_64",
5451 },
5452)