XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2019 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
| 8 | |
| 9 | #include <stdbool.h> |
| 10 | #include <stddef.h> |
| 11 | #include <stdint.h> |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 12 | #include <string.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 13 | |
| 14 | #include <pthread.h> |
| 15 | |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 16 | #ifndef __EMSCRIPTEN__ |
| 17 | #include <cpuinfo.h> |
| 18 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 19 | |
| 20 | #include <xnnpack.h> |
| 21 | #include <xnnpack/argmaxpool.h> |
| 22 | #include <xnnpack/avgpool.h> |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 23 | #include <xnnpack/bilinear.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 24 | #include <xnnpack/clamp.h> |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 25 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 26 | #include <xnnpack/conv.h> |
| 27 | #include <xnnpack/dwconv.h> |
| 28 | #include <xnnpack/gavgpool.h> |
| 29 | #include <xnnpack/gemm.h> |
| 30 | #include <xnnpack/hswish.h> |
| 31 | #include <xnnpack/igemm.h> |
| 32 | #include <xnnpack/log.h> |
| 33 | #include <xnnpack/lut.h> |
| 34 | #include <xnnpack/maxpool.h> |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 35 | #include <xnnpack/memory.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 36 | #include <xnnpack/pad.h> |
| 37 | #include <xnnpack/params.h> |
| 38 | #include <xnnpack/pavgpool.h> |
| 39 | #include <xnnpack/prelu.h> |
| 40 | #include <xnnpack/rmax.h> |
| 41 | #include <xnnpack/spmm.h> |
| 42 | #include <xnnpack/unpool.h> |
| 43 | #include <xnnpack/vadd.h> |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 44 | #include <xnnpack/vbinary.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 45 | #include <xnnpack/vmulcaddc.h> |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 46 | #include <xnnpack/vunary.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 47 | #include <xnnpack/zip.h> |
| 48 | |
| 49 | #ifndef XNN_ENABLE_ASSEMBLY |
| 50 | #define XNN_ENABLE_ASSEMBLY 1 |
| 51 | #endif |
| 52 | |
| 53 | static pthread_once_t init_guard = PTHREAD_ONCE_INIT; |
| 54 | |
| 55 | struct xnn_parameters xnn_params = { |
| 56 | .initialized = false |
| 57 | }; |
| 58 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 59 | #if XNN_ARCH_PNACL || XNN_ARCH_ASMJS || XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 60 | extern uint32_t xnn_stub_wasm_f32_sub(uint32_t a, uint32_t b); |
| 61 | #endif |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 62 | #if XNN_ARCH_PNACL || XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 63 | extern uint32_t xnn_stub_wasm_f32_min(uint32_t a, uint32_t b); |
| 64 | #endif |
| 65 | |
| 66 | static void init(void) { |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 67 | #if XNN_ARCH_ARM |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 68 | if (!cpuinfo_has_arm_neon()) { |
| 69 | xnn_log_error("XNNPACK initialization failed: NEON is not supported"); |
| 70 | return; |
| 71 | } |
| 72 | |
| 73 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 74 | #ifndef XNN_NO_Q8_OPERATORS |
| 75 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 76 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_4x8__neon, |
| 77 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_4x8__neon, |
| 78 | .mr = 4, |
| 79 | .nr = 8, |
| 80 | }; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 81 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 82 | #if XNN_ENABLE_ASSEMBLY |
| 83 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 84 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__aarch32_neon, |
| 85 | .cr = 8, |
| 86 | .mr = 9, |
| 87 | }; |
| 88 | #else |
| 89 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 90 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__neon, |
| 91 | .cr = 8, |
| 92 | .mr = 9, |
| 93 | }; |
| 94 | #endif |
| 95 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 96 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__neon, |
| 97 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__neon, |
| 98 | .mr = 9, |
| 99 | .qr = 8, |
| 100 | }; |
| 101 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 102 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__neon, |
| 103 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__neon, |
| 104 | .mr = 7, |
| 105 | }; |
| 106 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__neon; |
| 107 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 108 | |
| 109 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 110 | #ifndef XNN_NO_U8_OPERATORS |
| 111 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 112 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__neon_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 113 | .mr = 9, |
| 114 | .qr = 8, |
| 115 | }; |
| 116 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__neon; |
| 117 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__neon; |
| 118 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 119 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 120 | |
| 121 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 122 | #ifndef XNN_NO_X8_OPERATORS |
| 123 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 124 | xnn_params.x8.zip = (struct zip_parameters) { |
| 125 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__neon, |
| 126 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__neon, |
| 127 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__neon, |
| 128 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__neon, |
| 129 | }; |
| 130 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 131 | |
| 132 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 133 | #ifndef XNN_NO_F32_OPERATORS |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 134 | #if XNN_ENABLE_ASSEMBLY |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame] | 135 | switch (cpuinfo_get_core(0)->uarch) { |
| 136 | case cpuinfo_uarch_cortex_a53: |
| 137 | case cpuinfo_uarch_cortex_a55: |
| 138 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 139 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_cortex_a53, |
| 140 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 141 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 142 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 143 | .mr = 4, |
| 144 | .nr = 8, |
| 145 | }; |
| 146 | break; |
Frank Barchard | 4d281a5 | 2019-12-12 15:49:41 -0800 | [diff] [blame] | 147 | |
| 148 | case cpuinfo_uarch_cortex_a57: |
| 149 | case cpuinfo_uarch_cortex_a72: |
| 150 | case cpuinfo_uarch_cortex_a73: |
| 151 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 152 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_pld_cortex_a75, |
| 153 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 154 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 155 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 156 | .mr = 4, |
| 157 | .nr = 8, |
| 158 | }; |
| 159 | break; |
| 160 | |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame] | 161 | default: |
| 162 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 163 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_cortex_a75, |
| 164 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 165 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 166 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 167 | .mr = 4, |
| 168 | .nr = 8, |
| 169 | }; |
| 170 | break; |
| 171 | } |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 172 | #else // XNN_ENABLE_ASSEMBLY |
| 173 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 174 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__neon_lane_ld128, |
| 175 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 176 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 177 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 178 | .mr = 4, |
| 179 | .nr = 8, |
| 180 | }; |
| 181 | #endif // XNN_ENABLE_ASSEMBLY |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 182 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 183 | .gemm = NULL, |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 184 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__neon_lane_ld64, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 185 | .mr = 4, |
| 186 | .nr = 2, |
| 187 | }; |
| 188 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 189 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd, |
| 190 | .cr = 4, |
| 191 | .mr = 4, |
| 192 | }; |
| 193 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 194 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__neon, |
| 195 | .cr = 4, |
| 196 | .mr = 9, |
| 197 | }; |
| 198 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 199 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd, |
| 200 | .cr = 4, |
| 201 | .mr = 25, |
| 202 | }; |
| 203 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 204 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__neon, |
| 205 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__neon, |
| 206 | .mr = 9, |
| 207 | .qr = 8, |
| 208 | }; |
| 209 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 210 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__neon, |
| 211 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__neon, |
| 212 | .mr = 9, |
| 213 | .qr = 8, |
| 214 | }; |
| 215 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 216 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__neon, |
| 217 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__neon, |
| 218 | .mr = 7, |
| 219 | }; |
| 220 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 221 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 222 | .mr = 9, |
| 223 | .qr = 8, |
| 224 | }; |
| 225 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 226 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 227 | .mr = 4, |
| 228 | }; |
| 229 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 230 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 231 | .mr = 9, |
| 232 | }; |
| 233 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 234 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 235 | .mr = 9, |
| 236 | .qr = 8, |
| 237 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 238 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 239 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__neon_c8, |
| 240 | .pixel_tile = 1, |
| 241 | .channel_tile = 8, |
| 242 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 243 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__neon; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 244 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__neon_x8; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 245 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 246 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__neon_2x8, |
| 247 | .row_tile = 2, |
| 248 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 249 | }; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 250 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 251 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__neon_x8, |
| 252 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 253 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 254 | .element_tile = 8, |
| 255 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 256 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 257 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__scalar_x2, |
| 258 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__scalar_x2, |
| 259 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__scalar_x2, |
| 260 | .element_tile = 2, |
| 261 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 262 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 263 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__neon_x8, |
| 264 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 265 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 266 | .element_tile = 8, |
| 267 | }; |
| 268 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 269 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__neon_x8, |
| 270 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 271 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 272 | .element_tile = 8, |
| 273 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 274 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 275 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__neon_x8, |
| 276 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
| 277 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 278 | .element_tile = 8, |
| 279 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 280 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 281 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__neon_x8, |
| 282 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__neon_x8, |
| 283 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__neon_x8, |
| 284 | .element_tile = 8, |
| 285 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 286 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 287 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__neon_2x, |
| 288 | .channel_tile = 4, |
| 289 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 290 | }; |
| 291 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 292 | |
| 293 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 294 | #ifndef XNN_NO_X32_OPERATORS |
| 295 | xnn_params.x32.pad = (struct pad_parameters) { |
| 296 | .ukernel = xnn_x32_pad_x2__neon, |
| 297 | .mr = 2, |
| 298 | }; |
| 299 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 300 | xnn_params.x32.zip = (struct zip_parameters) { |
| 301 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__neon, |
| 302 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__neon, |
| 303 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__neon, |
| 304 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__neon, |
| 305 | }; |
| 306 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 307 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 308 | #elif XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 309 | |
| 310 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 311 | #ifndef XNN_NO_Q8_OPERATORS |
| 312 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 313 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_8x8__neon, |
| 314 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_8x8__neon, |
| 315 | .mr = 8, |
| 316 | .nr = 8, |
| 317 | }; |
| 318 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 319 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__neon, |
| 320 | .cr = 8, |
| 321 | .mr = 9, |
| 322 | }; |
| 323 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 324 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__neon, |
| 325 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__neon, |
| 326 | .mr = 9, |
| 327 | .qr = 8, |
| 328 | }; |
| 329 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 330 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__neon, |
| 331 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__neon, |
| 332 | .mr = 7, |
| 333 | }; |
| 334 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__neon; |
| 335 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 336 | |
| 337 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 338 | #ifndef XNN_NO_U8_OPERATORS |
| 339 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 340 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__neon_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 341 | .mr = 9, |
| 342 | .qr = 8, |
| 343 | }; |
| 344 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__neon; |
| 345 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 346 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__neon; |
| 347 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 348 | |
| 349 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 350 | #ifndef XNN_NO_X8_OPERATORS |
| 351 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 352 | xnn_params.x8.zip = (struct zip_parameters) { |
| 353 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__neon, |
| 354 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__neon, |
| 355 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__neon, |
| 356 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__neon, |
| 357 | }; |
| 358 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 359 | |
| 360 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 361 | #ifndef XNN_NO_F32_OPERATORS |
| 362 | #if XNN_ENABLE_ASSEMBLY |
| 363 | switch (cpuinfo_get_core(0)->uarch) { |
| 364 | case cpuinfo_uarch_kryo: |
| 365 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 366 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch64_neonfma_cortex_a57, |
| 367 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 368 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 369 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 370 | .mr = 4, |
| 371 | .nr = 8, |
| 372 | }; |
| 373 | break; |
| 374 | case cpuinfo_uarch_cortex_a57: |
| 375 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 376 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a57, |
| 377 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a57, |
| 378 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 379 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 380 | .mr = 6, |
| 381 | .nr = 8, |
| 382 | }; |
| 383 | break; |
| 384 | case cpuinfo_uarch_cortex_a72: |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 385 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 386 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 387 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 388 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 389 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 390 | .mr = 4, |
| 391 | .nr = 8, |
| 392 | }; |
| 393 | break; |
| 394 | case cpuinfo_uarch_cortex_a75: |
Frank Barchard | 263bb09 | 2019-10-28 15:28:46 -0700 | [diff] [blame] | 395 | case cpuinfo_uarch_cortex_a76: |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 396 | case cpuinfo_uarch_meerkat_m3: |
| 397 | case (cpuinfo_uarch_meerkat_m3 + 1): |
| 398 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 399 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a75, |
| 400 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a75, |
| 401 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 402 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 403 | .mr = 6, |
| 404 | .nr = 8, |
| 405 | }; |
| 406 | break; |
Frank Barchard | df06d80 | 2019-11-20 15:53:46 -0800 | [diff] [blame] | 407 | |
| 408 | case cpuinfo_uarch_mongoose_m1: |
| 409 | case cpuinfo_uarch_mongoose_m2: |
| 410 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 411 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8s4__neonfma, |
| 412 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8s4__neonfma, |
| 413 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8s4__neonfma, |
| 414 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__neonfma, |
| 415 | .mr = 6, |
| 416 | .nr = 8, |
| 417 | .log2_sr = 2, |
| 418 | }; |
| 419 | break; |
| 420 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 421 | case cpuinfo_uarch_cortex_a53: |
| 422 | case cpuinfo_uarch_cortex_a55: |
| 423 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Frank Barchard | bd1d5d9 | 2019-10-30 15:53:30 -0700 | [diff] [blame] | 424 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a53, |
| 425 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a53, |
| 426 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a53, |
| 427 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a53, |
| 428 | .mr = 6, |
| 429 | .nr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 430 | }; |
| 431 | break; |
| 432 | case cpuinfo_uarch_cortex_a73: |
| 433 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 434 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a73, |
| 435 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a73, |
| 436 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 437 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 438 | .mr = 6, |
| 439 | .nr = 8, |
| 440 | }; |
| 441 | break; |
| 442 | default: |
| 443 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Frank Barchard | 5cc1cc2 | 2019-12-16 15:36:12 -0800 | [diff] [blame] | 444 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch64_neonfma_cortex_a57, |
| 445 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 446 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 447 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
Frank Barchard | 5cc1cc2 | 2019-12-16 15:36:12 -0800 | [diff] [blame] | 448 | .mr = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 449 | .nr = 8, |
| 450 | }; |
| 451 | break; |
| 452 | } |
| 453 | #else // XNN_ENABLE_ASSEMBLY |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 454 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 455 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__neonfma_lane_ld64, |
| 456 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__neonfma_lane_ld64, |
| 457 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neonfma_lane_ld64, |
| 458 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neonfma_lane_ld64, |
Frank Barchard | 2af471b | 2019-10-16 19:10:32 -0700 | [diff] [blame] | 459 | .mr = 6, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 460 | .nr = 8, |
| 461 | }; |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 462 | #endif // XNN_ENABLE_ASSEMBLY |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 463 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 464 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 465 | .gemm = NULL, |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 466 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__neonfma_lane_ld64, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 467 | .mr = 4, |
| 468 | .nr = 2, |
| 469 | }; |
| 470 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 471 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd, |
| 472 | .cr = 4, |
| 473 | .mr = 4, |
| 474 | }; |
| 475 | switch (cpuinfo_get_core(0)->uarch) { |
| 476 | case cpuinfo_uarch_kryo: |
| 477 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 478 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__neonfma, |
| 479 | .cr = 4, |
| 480 | .mr = 9, |
| 481 | }; |
| 482 | break; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 483 | #if XNN_ENABLE_ASSEMBLY |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 484 | case cpuinfo_uarch_cortex_a53: |
| 485 | case cpuinfo_uarch_cortex_a55: |
| 486 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 487 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__aarch64_neonfma_cortex_a55, |
| 488 | .cr = 4, |
| 489 | .mr = 9, |
| 490 | }; |
| 491 | break; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 492 | #endif |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 493 | default: |
| 494 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 495 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x9__neonfma, |
| 496 | .cr = 8, |
| 497 | .mr = 9, |
| 498 | }; |
| 499 | break; |
| 500 | } |
| 501 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 502 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd, |
| 503 | .cr = 4, |
| 504 | .mr = 25, |
| 505 | }; |
| 506 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 507 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__neon, |
| 508 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__neon, |
| 509 | .mr = 9, |
| 510 | .qr = 8, |
| 511 | }; |
| 512 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 513 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__neon, |
| 514 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__neon, |
| 515 | .mr = 9, |
| 516 | .qr = 8, |
| 517 | }; |
| 518 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 519 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__neon, |
| 520 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__neon, |
| 521 | .mr = 7, |
| 522 | }; |
| 523 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 524 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 525 | .mr = 9, |
| 526 | .qr = 8, |
| 527 | }; |
| 528 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 529 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 530 | .mr = 4, |
| 531 | }; |
| 532 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 533 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 534 | .mr = 9, |
| 535 | }; |
| 536 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 537 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 538 | .mr = 9, |
| 539 | .qr = 8, |
| 540 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 541 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 542 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__neonfma_c8, |
| 543 | .pixel_tile = 1, |
| 544 | .channel_tile = 8, |
| 545 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 546 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__neon; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 547 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__neonfma_x8; |
Marat Dukhan | 14bec50 | 2019-11-18 11:35:31 -0800 | [diff] [blame] | 548 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__neon_frac_p9_p10_nr1recps_x16; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 549 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 550 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__neon_2x8, |
| 551 | .row_tile = 2, |
| 552 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 553 | }; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 554 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 555 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__neon_x8, |
| 556 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 557 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 558 | .element_tile = 8, |
| 559 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 560 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 561 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__neon_x8, |
| 562 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__neon_x8, |
| 563 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__neon_x8, |
| 564 | .element_tile = 8, |
| 565 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 566 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 567 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__neon_x8, |
| 568 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 569 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 570 | .element_tile = 8, |
| 571 | }; |
| 572 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 573 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__neon_x8, |
| 574 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 575 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 576 | .element_tile = 8, |
| 577 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 578 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 579 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__neon_x8, |
| 580 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
| 581 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 582 | .element_tile = 8, |
| 583 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 584 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 585 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__neon_x8, |
| 586 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__neon_x8, |
| 587 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__neon_x8, |
| 588 | .element_tile = 8, |
| 589 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 590 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 591 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__neonfma_2x, |
| 592 | .channel_tile = 4, |
| 593 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 594 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 595 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 596 | xnn_params.f32.spmm = (struct spmm_parameters) { |
Erich Elsen | 9cdade3 | 2019-10-16 05:26:59 -0700 | [diff] [blame] | 597 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x1__neonfma_pipelined, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 598 | .mr = 16, |
| 599 | .nr = 1, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 600 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 601 | xnn_params.f32.spmm2 = (struct spmm_parameters) { |
| 602 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x2__neonfma, |
| 603 | .mr = 16, |
| 604 | .nr = 2, |
| 605 | }; |
| 606 | xnn_params.f32.spmm4 = (struct spmm_parameters) { |
| 607 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x4__neonfma, |
| 608 | .mr = 16, |
| 609 | .nr = 4, |
| 610 | }; |
| 611 | xnn_params.f32.hwc2spchw_dconv3x3c3s2 = (struct hwc2spchw_dconv_parameters) { |
| 612 | .ukernel_with_symm_padding = |
| 613 | (xnn_conv_hwc2spchw_ukernel_function) xnn_f32_conv_hwc2spchw_ukernel_3x3s2p1c3x4__neonfma_2x2, |
| 614 | .output_channel_tile = 4, |
| 615 | .output_height_tile = 2, |
| 616 | .output_width_tile = 2, |
| 617 | }; |
| 618 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 619 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma, |
| 620 | .input_width_tile = 4, |
| 621 | .output_width_tile = 4, |
| 622 | .output_height_tile = 3, |
| 623 | }; |
| 624 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 625 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma, |
| 626 | .input_width_tile = 4, |
| 627 | .output_width_tile = 4, |
| 628 | .output_height_tile = 1, |
| 629 | }; |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 630 | xnn_params.f32.spchw_dwconv5x5 = (struct spchw_dwconv_parameters) { |
| 631 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma, |
| 632 | .input_width_tile = 4, |
| 633 | .output_width_tile = 4, |
Erich Elsen | 4ad5115 | 2019-11-19 13:11:53 -0800 | [diff] [blame] | 634 | .output_height_tile = 3, |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 635 | }; |
| 636 | xnn_params.f32.spchw_dwconv5x5s2 = (struct spchw_dwconv_parameters) { |
| 637 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma, |
| 638 | .input_width_tile = 4, |
| 639 | .output_width_tile = 4, |
| 640 | .output_height_tile = 1, |
| 641 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 642 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 643 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__neon_x4, |
| 644 | .channel_tile = 4, |
| 645 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 646 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 647 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 648 | |
| 649 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 650 | #ifndef XNN_NO_X32_OPERATORS |
| 651 | xnn_params.x32.pad = (struct pad_parameters) { |
| 652 | .ukernel = xnn_x32_pad_x2__neon, |
| 653 | .mr = 2, |
| 654 | }; |
| 655 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 656 | xnn_params.x32.zip = (struct zip_parameters) { |
| 657 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__neon, |
| 658 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__neon, |
| 659 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__neon, |
| 660 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__neon, |
| 661 | }; |
| 662 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 663 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 664 | #elif XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 665 | if (!cpuinfo_has_x86_sse2()) { |
| 666 | xnn_log_error("XNNPACK initialization failed: SSE2 is not supported"); |
| 667 | return; |
| 668 | } |
| 669 | |
| 670 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 671 | #ifndef XNN_NO_Q8_OPERATORS |
| 672 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 673 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_4x4c2__sse2, |
| 674 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_4x4c2__sse2, |
| 675 | .mr = 4, |
| 676 | .nr = 4, |
| 677 | .log2_kr = 1, |
| 678 | }; |
| 679 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 680 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__sse2, |
| 681 | .cr = 8, |
| 682 | .mr = 9, |
| 683 | }; |
| 684 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 685 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__sse2, |
| 686 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__sse2, |
| 687 | .mr = 9, |
| 688 | .qr = 8, |
| 689 | }; |
| 690 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 691 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__sse2, |
| 692 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__sse2, |
| 693 | .mr = 7, |
| 694 | }; |
| 695 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__sse2; |
| 696 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 697 | |
| 698 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 699 | #ifndef XNN_NO_U8_OPERATORS |
| 700 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 701 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__sse2_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 702 | .mr = 9, |
| 703 | .qr = 8, |
| 704 | }; |
| 705 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__sse2; |
| 706 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 707 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__sse2; |
| 708 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 709 | |
| 710 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 711 | #ifndef XNN_NO_X8_OPERATORS |
| 712 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 713 | xnn_params.x8.zip = (struct zip_parameters) { |
| 714 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__sse2, |
| 715 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__sse2, |
| 716 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__sse2, |
| 717 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__sse2, |
| 718 | }; |
| 719 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 720 | |
| 721 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 722 | #ifndef XNN_NO_F32_OPERATORS |
Marat Dukhan | 0f349c4 | 2019-11-27 11:58:54 -0800 | [diff] [blame] | 723 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 724 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 725 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_7x16__avx512f_broadcast, |
| 726 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_7x16__avx512f_broadcast, |
| 727 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__avx512f_broadcast, |
| 728 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__avx512f_broadcast, |
| 729 | .mr = 7, |
| 730 | .nr = 16, |
| 731 | }; |
| 732 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
Marat Dukhan | 2712132 | 2019-12-09 14:57:40 -0800 | [diff] [blame] | 733 | switch (cpuinfo_get_core(0)->uarch) { |
| 734 | case cpuinfo_uarch_zen: |
| 735 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 736 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x16s4__fma3_broadcast, |
| 737 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x16s4__fma3_broadcast, |
| 738 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16s4__fma3_broadcast, |
| 739 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16s4__fma3_broadcast, |
| 740 | .mr = 4, |
| 741 | .nr = 16, |
| 742 | .log2_sr = 2, |
| 743 | }; |
| 744 | break; |
| 745 | default: |
| 746 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 747 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_5x16__fma3_broadcast, |
| 748 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_5x16__fma3_broadcast, |
| 749 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__fma3_broadcast, |
| 750 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__fma3_broadcast, |
| 751 | .mr = 5, |
| 752 | .nr = 16, |
| 753 | }; |
| 754 | break; |
| 755 | } |
Marat Dukhan | 1025ea3 | 2019-11-21 16:01:08 -0800 | [diff] [blame] | 756 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 757 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | eccfd71 | 2019-12-08 16:49:27 -0800 | [diff] [blame] | 758 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_5x16__avx_broadcast, |
| 759 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_5x16__avx_broadcast, |
| 760 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__avx_broadcast, |
| 761 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__avx_broadcast, |
| 762 | .mr = 5, |
| 763 | .nr = 16, |
Marat Dukhan | 1025ea3 | 2019-11-21 16:01:08 -0800 | [diff] [blame] | 764 | }; |
| 765 | } else { |
| 766 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 767 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__sse_load1, |
| 768 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__sse_load1, |
| 769 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__sse_load1, |
| 770 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__sse_load1, |
| 771 | .mr = 4, |
| 772 | .nr = 8, |
| 773 | }; |
| 774 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 775 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 776 | .gemm = NULL, |
| 777 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2c4__sse, |
| 778 | .mr = 4, |
| 779 | .nr = 2, |
| 780 | .log2_kr = 2, |
| 781 | }; |
Marat Dukhan | 479f87e | 2019-11-27 15:17:06 -0800 | [diff] [blame] | 782 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 783 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 784 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__avx512f, |
| 785 | .cr = 16, |
| 786 | .mr = 4, |
| 787 | }; |
| 788 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 789 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__avx512f, |
| 790 | .cr = 16, |
| 791 | .mr = 9, |
| 792 | }; |
| 793 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 794 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x25__avx512f, |
| 795 | .cr = 16, |
| 796 | .mr = 25, |
| 797 | }; |
| 798 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
Marat Dukhan | 17ec5f3 | 2019-11-22 13:34:16 -0800 | [diff] [blame] | 799 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 800 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__fma3, |
| 801 | .cr = 16, |
| 802 | .mr = 4, |
| 803 | }; |
| 804 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 805 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__fma3, |
| 806 | .cr = 16, |
| 807 | .mr = 9, |
| 808 | }; |
| 809 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 810 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__fma3, |
| 811 | .cr = 8, |
| 812 | .mr = 25, |
| 813 | }; |
| 814 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 815 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 816 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__avx, |
| 817 | .cr = 16, |
| 818 | .mr = 4, |
| 819 | }; |
| 820 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 821 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__avx, |
| 822 | .cr = 16, |
| 823 | .mr = 9, |
| 824 | }; |
| 825 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 826 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__avx, |
| 827 | .cr = 8, |
| 828 | .mr = 25, |
| 829 | }; |
| 830 | } else { |
| 831 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 832 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x4__sse, |
| 833 | .cr = 8, |
| 834 | .mr = 4, |
| 835 | }; |
| 836 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 837 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x9__sse, |
| 838 | .cr = 8, |
| 839 | .mr = 9, |
| 840 | }; |
| 841 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 842 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__sse, |
| 843 | .cr = 8, |
| 844 | .mr = 25, |
| 845 | }; |
| 846 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 847 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 848 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__sse, |
| 849 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__sse, |
| 850 | .mr = 9, |
| 851 | .qr = 8, |
| 852 | }; |
| 853 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 854 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__sse, |
| 855 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__sse, |
| 856 | .mr = 9, |
| 857 | .qr = 8, |
| 858 | }; |
| 859 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 860 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__sse, |
| 861 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__sse, |
| 862 | .mr = 7, |
| 863 | }; |
| 864 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 865 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__sse_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 866 | .mr = 9, |
| 867 | .qr = 8, |
| 868 | }; |
| 869 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 870 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 871 | .mr = 4, |
| 872 | }; |
| 873 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 874 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 875 | .mr = 9, |
| 876 | }; |
| 877 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 878 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 879 | .mr = 9, |
| 880 | .qr = 8, |
| 881 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 882 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 883 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__sse_c8, |
| 884 | .pixel_tile = 1, |
| 885 | .channel_tile = 8, |
| 886 | }; |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 887 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 888 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__avx512f; |
| 889 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 890 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__avx; |
| 891 | } else { |
| 892 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__sse; |
| 893 | } |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 894 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 895 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__avx512f_x32; |
| 896 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
| 897 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__fma3_x16; |
| 898 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 899 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__avx_x16; |
| 900 | } else { |
| 901 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__sse_x8; |
| 902 | } |
Marat Dukhan | 7bee751 | 2019-11-18 15:15:48 -0800 | [diff] [blame] | 903 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__sse2_p5_div_x16; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 904 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 905 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__sse2_2x8, |
| 906 | .row_tile = 2, |
| 907 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 908 | }; |
Marat Dukhan | 9a88efe | 2019-12-10 15:54:24 -0800 | [diff] [blame] | 909 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 910 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 911 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__avx512f_x32, |
| 912 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx512f_x32, |
| 913 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx512f_x32, |
| 914 | .element_tile = 32, |
| 915 | }; |
| 916 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 917 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__avx512f_x32, |
| 918 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__avx512f_x32, |
| 919 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__avx512f_x32, |
| 920 | .element_tile = 32, |
| 921 | }; |
| 922 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 923 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__avx512f_x32, |
| 924 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx512f_x32, |
| 925 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx512f_x32, |
| 926 | .element_tile = 32, |
| 927 | }; |
| 928 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 929 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__avx512f_x32, |
| 930 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx512f_x32, |
| 931 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx512f_x32, |
| 932 | .element_tile = 32, |
| 933 | }; |
| 934 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 935 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__avx512f_x32, |
| 936 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx512f_x32, |
| 937 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx512f_x32, |
| 938 | .element_tile = 32, |
| 939 | }; |
| 940 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 941 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__avx512f_x32, |
| 942 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__avx512f_x32, |
| 943 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__avx512f_x32, |
| 944 | .element_tile = 32, |
| 945 | }; |
| 946 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 947 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 948 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__avx_x16, |
| 949 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx_x16, |
| 950 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx_x16, |
| 951 | .element_tile = 16, |
| 952 | }; |
| 953 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 954 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__avx_x16, |
| 955 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__avx_x16, |
| 956 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__avx_x16, |
| 957 | .element_tile = 16, |
| 958 | }; |
| 959 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 960 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__avx_x16, |
| 961 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx_x16, |
| 962 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx_x16, |
| 963 | .element_tile = 16, |
| 964 | }; |
| 965 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 966 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__avx_x16, |
| 967 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx_x16, |
| 968 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx_x16, |
| 969 | .element_tile = 16, |
| 970 | }; |
| 971 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 972 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__avx_x16, |
| 973 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx_x16, |
| 974 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx_x16, |
| 975 | .element_tile = 16, |
| 976 | }; |
| 977 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 978 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__avx_x16, |
| 979 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__avx_x16, |
| 980 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__avx_x16, |
| 981 | .element_tile = 16, |
| 982 | }; |
| 983 | } else { |
| 984 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 985 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__sse_x8, |
| 986 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__sse_x8, |
| 987 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__sse_x8, |
| 988 | .element_tile = 8, |
| 989 | }; |
| 990 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 991 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__sse_x8, |
| 992 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__sse_x8, |
| 993 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__sse_x8, |
| 994 | .element_tile = 8, |
| 995 | }; |
| 996 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 997 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__sse_x8, |
| 998 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__sse_x8, |
| 999 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__sse_x8, |
| 1000 | .element_tile = 8, |
| 1001 | }; |
| 1002 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1003 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__sse_x8, |
| 1004 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__sse_x8, |
| 1005 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__sse_x8, |
| 1006 | .element_tile = 8, |
| 1007 | }; |
| 1008 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 1009 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__sse_x8, |
| 1010 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__sse_x8, |
| 1011 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__sse_x8, |
| 1012 | .element_tile = 8, |
| 1013 | }; |
| 1014 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 1015 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__sse_x8, |
| 1016 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__sse_x8, |
| 1017 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__sse_x8, |
| 1018 | .element_tile = 8, |
| 1019 | }; |
| 1020 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1021 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1022 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__sse_2x, |
| 1023 | .channel_tile = 4, |
| 1024 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1025 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1026 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1027 | xnn_params.f32.spmm = (struct spmm_parameters) { |
| 1028 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_4x1__sse, |
| 1029 | .mr = 4, |
| 1030 | .nr = 1, |
| 1031 | }; |
| 1032 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 1033 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__sse, |
| 1034 | .input_width_tile = 4, |
| 1035 | .output_width_tile = 4, |
| 1036 | .output_height_tile = 1, |
| 1037 | }; |
| 1038 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 1039 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse, |
| 1040 | .input_width_tile = 4, |
| 1041 | .output_width_tile = 4, |
| 1042 | .output_height_tile = 1, |
| 1043 | }; |
| 1044 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 1045 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__sse_x4, |
| 1046 | .channel_tile = 4, |
| 1047 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1048 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1049 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1050 | |
| 1051 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1052 | #ifndef XNN_NO_X32_OPERATORS |
| 1053 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1054 | .ukernel = xnn_x32_pad_x2__sse2, |
| 1055 | .mr = 2, |
| 1056 | }; |
| 1057 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 1058 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1059 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__sse2, |
| 1060 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__sse2, |
| 1061 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__sse2, |
| 1062 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__sse2, |
| 1063 | }; |
| 1064 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1065 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1066 | #elif XNN_ARCH_PNACL || XNN_ARCH_WASMSIMD |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1067 | // Unlike most other architectures, on x86/x86-64 when floating-point instructions |
| 1068 | // have no NaN arguments, but produce NaN output, the output NaN has sign bit set. |
| 1069 | // We use it to distinguish x86/x86-64 from other architectures, by doing subtraction |
| 1070 | // of two infinities (must produce NaN per IEEE 754 standard). |
| 1071 | static volatile uint32_t minus_inf = UINT32_C(0xFF800000); |
| 1072 | const bool is_wasm_x86 = (int32_t) xnn_stub_wasm_f32_sub(minus_inf, minus_inf) < 0; |
| 1073 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1074 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1075 | #ifndef XNN_NO_Q8_OPERATORS |
| 1076 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 1077 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_2x2__scalar, |
| 1078 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_2x2__scalar, |
| 1079 | .mr = 2, |
| 1080 | .nr = 2, |
| 1081 | }; |
| 1082 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 1083 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up1x9__scalar, |
| 1084 | .cr = 1, |
| 1085 | .mr = 9, |
| 1086 | }; |
| 1087 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 1088 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__scalar, |
| 1089 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__scalar, |
| 1090 | .mr = 9, |
| 1091 | .qr = 8, |
| 1092 | }; |
| 1093 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 1094 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__scalar, |
| 1095 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__scalar, |
| 1096 | .mr = 7, |
| 1097 | }; |
| 1098 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__scalar; |
| 1099 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1100 | |
| 1101 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1102 | #ifndef XNN_NO_U8_OPERATORS |
| 1103 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1104 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1105 | .mr = 9, |
| 1106 | .qr = 8, |
| 1107 | }; |
| 1108 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__scalar; |
| 1109 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 1110 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__scalar; |
| 1111 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1112 | |
| 1113 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1114 | #ifndef XNN_NO_X8_OPERATORS |
| 1115 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 1116 | xnn_params.x8.zip = (struct zip_parameters) { |
| 1117 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__scalar, |
| 1118 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__scalar, |
| 1119 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__scalar, |
| 1120 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__scalar, |
| 1121 | }; |
| 1122 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1123 | |
| 1124 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1125 | #ifndef XNN_NO_F32_OPERATORS |
| 1126 | if (is_wasm_x86) { |
| 1127 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | cb80197 | 2019-10-23 02:10:33 -0700 | [diff] [blame] | 1128 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__psimd_splat, |
| 1129 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__psimd_splat, |
| 1130 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__psimd_splat, |
| 1131 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__psimd_splat, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1132 | .mr = 4, |
| 1133 | .nr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1134 | }; |
| 1135 | } else { |
| 1136 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | cd945c6 | 2019-10-25 11:59:50 -0700 | [diff] [blame] | 1137 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8s4__psimd, |
| 1138 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8s4__psimd, |
| 1139 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__psimd, |
| 1140 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__psimd, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1141 | .mr = 6, |
| 1142 | .nr = 8, |
Marat Dukhan | cd945c6 | 2019-10-25 11:59:50 -0700 | [diff] [blame] | 1143 | .log2_sr = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1144 | }; |
| 1145 | } |
| 1146 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 1147 | .gemm = NULL, |
| 1148 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2c4__psimd, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1149 | .mr = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1150 | .nr = 2, |
| 1151 | .log2_kr = 2, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1152 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1153 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1154 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1155 | .cr = 4, |
| 1156 | .mr = 4, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1157 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1158 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1159 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1160 | .cr = 4, |
| 1161 | .mr = 9, |
| 1162 | }; |
| 1163 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1164 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1165 | .cr = 4, |
| 1166 | .mr = 25, |
| 1167 | }; |
| 1168 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 1169 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__psimd, |
| 1170 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__psimd, |
| 1171 | .mr = 9, |
| 1172 | .qr = 8, |
| 1173 | }; |
| 1174 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 1175 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__psimd, |
| 1176 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__psimd, |
| 1177 | .mr = 9, |
| 1178 | .qr = 8, |
| 1179 | }; |
| 1180 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 1181 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__psimd, |
| 1182 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__psimd, |
| 1183 | .mr = 7, |
| 1184 | }; |
| 1185 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1186 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1187 | .mr = 9, |
| 1188 | .qr = 8, |
| 1189 | }; |
| 1190 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1191 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1192 | .mr = 4, |
| 1193 | }; |
| 1194 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1195 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1196 | .mr = 9, |
| 1197 | }; |
| 1198 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1199 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1200 | .mr = 9, |
| 1201 | .qr = 8, |
| 1202 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 1203 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 1204 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__psimd_c8, |
| 1205 | .pixel_tile = 1, |
| 1206 | .channel_tile = 8, |
| 1207 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1208 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__psimd; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 1209 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__psimd_x8; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1210 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 1211 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__psimd_2x8, |
| 1212 | .row_tile = 2, |
| 1213 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1214 | }; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1215 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 1216 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__psimd_x8, |
| 1217 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__psimd_x8, |
| 1218 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__psimd_x8, |
| 1219 | .element_tile = 8, |
| 1220 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 1221 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1222 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__psimd_x4, |
| 1223 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__psimd_x4, |
| 1224 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__psimd_x4, |
| 1225 | .element_tile = 4, |
| 1226 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 1227 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1228 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__psimd_x8, |
| 1229 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__psimd_x8, |
| 1230 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__psimd_x8, |
| 1231 | .element_tile = 8, |
| 1232 | }; |
| 1233 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1234 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__psimd_x8, |
| 1235 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__psimd_x8, |
| 1236 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__psimd_x8, |
| 1237 | .element_tile = 8, |
| 1238 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 1239 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 1240 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__psimd_x8, |
| 1241 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__psimd_x8, |
| 1242 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__psimd_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 1243 | .element_tile = 8, |
| 1244 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1245 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 1246 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__psimd_x8, |
| 1247 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__psimd_x8, |
| 1248 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__psimd_x8, |
| 1249 | .element_tile = 8, |
| 1250 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1251 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1252 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__psimd_2x, |
| 1253 | .channel_tile = 4, |
| 1254 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1255 | }; |
| 1256 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1257 | |
| 1258 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1259 | #ifndef XNN_NO_X32_OPERATORS |
| 1260 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1261 | .ukernel = xnn_x32_pad_x2__psimd, |
| 1262 | .mr = 2, |
| 1263 | }; |
| 1264 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 1265 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1266 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__psimd, |
| 1267 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__psimd, |
| 1268 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__psimd, |
| 1269 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__psimd, |
| 1270 | }; |
| 1271 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1272 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1273 | #elif XNN_ARCH_WASM || XNN_ARCH_ASMJS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1274 | // Unlike most other architectures, on x86/x86-64 when floating-point instructions |
| 1275 | // have no NaN arguments, but produce NaN output, the output NaN has sign bit set. |
| 1276 | // We use it to distinguish x86/x86-64 from other architectures, by doing subtraction |
| 1277 | // of two infinities (must produce NaN per IEEE 754 standard). |
| 1278 | static volatile uint32_t minus_inf = UINT32_C(0xFF800000); |
| 1279 | const bool is_wasm_x86 = (int32_t) xnn_stub_wasm_f32_sub(minus_inf, minus_inf) < 0; |
| 1280 | |
| 1281 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1282 | #ifndef XNN_NO_Q8_OPERATORS |
| 1283 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 1284 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_2x2__scalar, |
| 1285 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_2x2__scalar, |
| 1286 | .mr = 2, |
| 1287 | .nr = 2, |
| 1288 | }; |
| 1289 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 1290 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up1x9__scalar, |
| 1291 | .cr = 1, |
| 1292 | .mr = 9, |
| 1293 | }; |
| 1294 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 1295 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__scalar, |
| 1296 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__scalar, |
| 1297 | .mr = 9, |
| 1298 | .qr = 8, |
| 1299 | }; |
| 1300 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 1301 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__scalar, |
| 1302 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__scalar, |
| 1303 | .mr = 7, |
| 1304 | }; |
| 1305 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__scalar; |
| 1306 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1307 | |
| 1308 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1309 | #ifndef XNN_NO_U8_OPERATORS |
| 1310 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1311 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1312 | .mr = 9, |
| 1313 | .qr = 8, |
| 1314 | }; |
| 1315 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__scalar; |
| 1316 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 1317 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__scalar; |
| 1318 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1319 | |
| 1320 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1321 | #ifndef XNN_NO_X8_OPERATORS |
| 1322 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 1323 | xnn_params.x8.zip = (struct zip_parameters) { |
| 1324 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__scalar, |
| 1325 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__scalar, |
| 1326 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__scalar, |
| 1327 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__scalar, |
| 1328 | }; |
| 1329 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1330 | |
| 1331 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1332 | #ifndef XNN_NO_F32_OPERATORS |
| 1333 | if (is_wasm_x86) { |
| 1334 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 1335 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_2x4__scalar, |
| 1336 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_2x4__scalar, |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1337 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x4__wasm, |
| 1338 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x4__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1339 | .mr = 2, |
| 1340 | .nr = 4, |
| 1341 | }; |
| 1342 | } else { |
| 1343 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1344 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x4__wasm, |
| 1345 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x4__wasm, |
| 1346 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x4__wasm, |
| 1347 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x4__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1348 | .mr = 4, |
| 1349 | .nr = 4, |
| 1350 | }; |
| 1351 | } |
| 1352 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 1353 | .gemm = NULL, |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1354 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__wasm, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1355 | .mr = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1356 | .nr = 2, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1357 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1358 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1359 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x4__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1360 | .cr = 1, |
| 1361 | .mr = 4, |
| 1362 | }; |
| 1363 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1364 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x9__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1365 | .cr = 1, |
| 1366 | .mr = 9, |
| 1367 | }; |
| 1368 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1369 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x25__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1370 | .cr = 1, |
| 1371 | .mr = 25, |
| 1372 | }; |
| 1373 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1374 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__wasm, |
| 1375 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1376 | .mr = 9, |
| 1377 | .qr = 8, |
| 1378 | }; |
| 1379 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1380 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__wasm, |
| 1381 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1382 | .mr = 9, |
| 1383 | .qr = 8, |
| 1384 | }; |
| 1385 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1386 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__wasm, |
| 1387 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1388 | .mr = 7, |
| 1389 | }; |
| 1390 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1391 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__wasm_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1392 | .mr = 9, |
| 1393 | .qr = 8, |
| 1394 | }; |
| 1395 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1396 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1397 | .mr = 4, |
| 1398 | }; |
| 1399 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1400 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1401 | .mr = 9, |
| 1402 | }; |
| 1403 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1404 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1405 | .mr = 9, |
| 1406 | .qr = 8, |
| 1407 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 1408 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 1409 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__scalar_c2, |
| 1410 | .pixel_tile = 1, |
| 1411 | .channel_tile = 2, |
| 1412 | }; |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1413 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__wasm; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 1414 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__wasm_x4; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1415 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1416 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__wasm_2x4, |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 1417 | .row_tile = 4, |
| 1418 | .channel_tile = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1419 | }; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1420 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1421 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__wasm_x4, |
| 1422 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__wasm_x4, |
| 1423 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__wasm_x4, |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1424 | .element_tile = 8, |
| 1425 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 1426 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1427 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__wasm_x2, |
| 1428 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__wasm_x2, |
| 1429 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__wasm_x2, |
| 1430 | .element_tile = 2, |
| 1431 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 1432 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1433 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__wasm_x4, |
| 1434 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__wasm_x4, |
| 1435 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__wasm_x4, |
| 1436 | .element_tile = 8, |
| 1437 | }; |
| 1438 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1439 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__wasm_x4, |
| 1440 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__wasm_x4, |
| 1441 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__wasm_x4, |
| 1442 | .element_tile = 8, |
| 1443 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 1444 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1445 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__wasm_x4, |
| 1446 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__wasm_x4, |
| 1447 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__wasm_x4, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 1448 | .element_tile = 8, |
| 1449 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1450 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1451 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__wasm_x4, |
| 1452 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__wasm_x4, |
| 1453 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__wasm_x4, |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1454 | .element_tile = 8, |
| 1455 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1456 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1457 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c1__wasm_2x, |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1458 | .channel_tile = 1, |
| 1459 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1460 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1461 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1462 | xnn_params.f32.spmm = (struct spmm_parameters) { |
Marat Dukhan | bff791e | 2019-10-24 11:05:37 -0700 | [diff] [blame] | 1463 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x1__scalar, |
| 1464 | .mr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1465 | .nr = 1, |
| 1466 | }; |
Erich Elsen | c6afd9b | 2019-10-24 16:10:53 -0700 | [diff] [blame] | 1467 | xnn_params.f32.spmm2 = (struct spmm_parameters) { |
| 1468 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x2__scalar, |
| 1469 | .mr = 8, |
| 1470 | .nr = 2, |
| 1471 | }; |
| 1472 | xnn_params.f32.spmm4 = (struct spmm_parameters) { |
| 1473 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x4__scalar, |
| 1474 | .mr = 8, |
| 1475 | .nr = 4, |
| 1476 | }; |
Marat Dukhan | 14fe0b2 | 2019-10-23 21:20:07 -0700 | [diff] [blame] | 1477 | xnn_params.f32.hwc2spchw_dconv3x3c3s2 = (struct hwc2spchw_dconv_parameters) { |
| 1478 | .ukernel_with_symm_padding = |
| 1479 | (xnn_conv_hwc2spchw_ukernel_function) xnn_f32_conv_hwc2spchw_ukernel_3x3s2p1c3x4__scalar_1x1, |
| 1480 | .output_channel_tile = 4, |
| 1481 | .output_height_tile = 1, |
| 1482 | .output_width_tile = 1, |
| 1483 | }; |
| 1484 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 1485 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, |
| 1486 | .input_width_tile = 1, |
| 1487 | .output_width_tile = 1, |
| 1488 | .output_height_tile = 1, |
| 1489 | }; |
| 1490 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 1491 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, |
| 1492 | .input_width_tile = 1, |
| 1493 | .output_width_tile = 1, |
| 1494 | .output_height_tile = 1, |
| 1495 | }; |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 1496 | xnn_params.f32.spchw_dwconv5x5 = (struct spchw_dwconv_parameters) { |
| 1497 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, |
| 1498 | .input_width_tile = 1, |
| 1499 | .output_width_tile = 1, |
| 1500 | .output_height_tile = 1, |
| 1501 | }; |
| 1502 | xnn_params.f32.spchw_dwconv5x5s2 = (struct spchw_dwconv_parameters) { |
| 1503 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, |
| 1504 | .input_width_tile = 1, |
| 1505 | .output_width_tile = 1, |
| 1506 | .output_height_tile = 1, |
| 1507 | }; |
Marat Dukhan | 14fe0b2 | 2019-10-23 21:20:07 -0700 | [diff] [blame] | 1508 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 1509 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__scalar_x1, |
| 1510 | .channel_tile = 1, |
| 1511 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1512 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1513 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1514 | |
| 1515 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1516 | #ifndef XNN_NO_X32_OPERATORS |
| 1517 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1518 | .ukernel = xnn_x32_pad_x2__scalar, |
| 1519 | .mr = 2, |
| 1520 | }; |
| 1521 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__scalar; |
| 1522 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1523 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__scalar, |
| 1524 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__scalar, |
| 1525 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__scalar, |
| 1526 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__scalar, |
| 1527 | }; |
| 1528 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1529 | |
| 1530 | #else |
| 1531 | #error "Unsupported architecture" |
| 1532 | #endif |
| 1533 | xnn_params.initialized = true; |
| 1534 | } |
| 1535 | |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 1536 | enum xnn_status xnn_initialize(const struct xnn_allocator* allocator) { |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 1537 | #ifndef __EMSCRIPTEN__ |
| 1538 | if (!cpuinfo_initialize()) { |
| 1539 | return xnn_status_out_of_memory; |
| 1540 | } |
| 1541 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1542 | pthread_once(&init_guard, &init); |
| 1543 | if (xnn_params.initialized) { |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 1544 | if (allocator != NULL) { |
| 1545 | memcpy(&xnn_params.allocator, allocator, sizeof(struct xnn_allocator)); |
| 1546 | } else { |
| 1547 | xnn_params.allocator.allocate = &xnn_allocate; |
| 1548 | xnn_params.allocator.reallocate = &xnn_reallocate; |
| 1549 | xnn_params.allocator.deallocate = &xnn_deallocate; |
| 1550 | xnn_params.allocator.aligned_allocate = &xnn_aligned_allocate; |
| 1551 | xnn_params.allocator.aligned_deallocate = &xnn_aligned_deallocate; |
| 1552 | } |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1553 | return xnn_status_success; |
| 1554 | } else { |
| 1555 | return xnn_status_unsupported_hardware; |
| 1556 | } |
| 1557 | } |
| 1558 | |
| 1559 | enum xnn_status xnn_deinitialize(void) { |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 1560 | #ifndef __EMSCRIPTEN__ |
| 1561 | cpuinfo_deinitialize(); |
| 1562 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1563 | return xnn_status_success; |
| 1564 | } |