Marat Dukhan | 8137e4c | 2020-01-25 12:56:58 -0800 | [diff] [blame^] | 1 | // Auto-generated file. Do not edit! |
| 2 | // Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in |
| 3 | // Generator: tools/xngen |
| 4 | // |
| 5 | // Copyright 2020 Google LLC |
| 6 | // |
| 7 | // This source code is licensed under the BSD-style license found in the |
| 8 | // LICENSE file in the root directory of this source tree. |
| 9 | |
| 10 | #include <assert.h> |
| 11 | |
| 12 | #include <arm_neon.h> |
| 13 | |
| 14 | #include <xnnpack/common.h> |
| 15 | #include <xnnpack/raddstoreexpminusmax.h> |
| 16 | |
| 17 | |
| 18 | extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64]; |
| 19 | |
| 20 | void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x4( |
| 21 | size_t elements, |
| 22 | const float* input, |
| 23 | float* output, |
| 24 | float* sum, |
| 25 | float max) |
| 26 | { |
| 27 | assert(elements % sizeof(float) == 0); |
| 28 | |
| 29 | const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f); |
| 30 | // The smallest x for which expf(x) is normalized. |
| 31 | const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f); |
| 32 | const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f); |
| 33 | // Last 13 bits are zeroes |
| 34 | const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f); |
| 35 | const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f); |
| 36 | |
| 37 | const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f); |
| 38 | |
| 39 | const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F)); |
| 40 | |
| 41 | const float32x4_t vi_max = vdupq_n_f32(max); |
| 42 | |
| 43 | float32x4_t vacc = vmovq_n_f32(0.0f); |
| 44 | for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) { |
| 45 | // Load 4 inputs at a time. |
| 46 | const float32x4_t vi = vld1q_f32(input); input += 4; |
| 47 | |
| 48 | // Subtract maximum input x := i - i_max. This implies x <= 0. |
| 49 | const float32x4_t vx = vsubq_f32(vi, vi_max); |
| 50 | |
| 51 | // Compute reduced argument n := round(x * 64 / log(2)). |
| 52 | // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing |
| 53 | // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction. |
| 54 | // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e. |
| 55 | // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0] |
| 56 | // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the |
| 57 | // algorithm. |
| 58 | float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64); |
| 59 | |
| 60 | // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized, |
| 61 | // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where |
| 62 | // e := int(n / 64). We create s in two steps: |
| 63 | // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the |
| 64 | // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0. |
| 65 | // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized |
| 66 | // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0, |
| 67 | // and thus the adjusted exponent is not lower than -126. |
| 68 | // |
| 69 | // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent). |
| 70 | const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17); |
| 71 | |
| 72 | // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64). |
| 73 | const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask)); |
| 74 | const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0); |
| 75 | const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1); |
| 76 | float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]); |
| 77 | float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]); |
| 78 | vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1); |
| 79 | vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1); |
| 80 | const float32x4_t vl = vcombine_f32(vl_lo, vl_hi); |
| 81 | // Adjust exponent of the value l fetched from the table to get the final s value. |
| 82 | const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve)); |
| 83 | |
| 84 | // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number. |
| 85 | vn = vsubq_f32(vn, vmagic_bias); |
| 86 | |
| 87 | // Compute reduced argument t := x - n * log(2) / 64. |
| 88 | // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy. |
| 89 | float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi); |
| 90 | vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo); |
| 91 | |
| 92 | // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128]. |
| 93 | float32x4_t vp = vmulq_f32(vt, vc2); |
| 94 | vp = vmlaq_f32(vt, vt, vp); |
| 95 | |
| 96 | // Reconstruct the final f value: |
| 97 | // f = s * (1 + t * (1 + t * c2)) |
| 98 | // = s * (1 + t + t * (t * c2)) |
| 99 | // = s + s * (t + t * (t * c2)) |
| 100 | // = s + s * p |
| 101 | float32x4_t vf = vmlaq_f32(vs, vs, vp); |
| 102 | |
| 103 | // For inputs below denormal cutoff, replace output with +0.0f. |
| 104 | // Note that for NaN inputs, comparison result is false, and outputs are left unchanged. |
| 105 | vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff))); |
| 106 | |
| 107 | // Store 4 outputs at a time. |
| 108 | vst1q_f32(output, vf); output += 4; |
| 109 | |
| 110 | // Accumulate computed exponents. |
| 111 | vacc = vaddq_f32(vacc, vf); |
| 112 | } |
| 113 | #if XNN_ARCH_ARM64 |
| 114 | float vacc_lo = vaddvq_f32(vacc); |
| 115 | #else |
| 116 | float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc)); |
| 117 | #endif |
| 118 | if (elements != 0) { |
| 119 | assert(elements >= 1 * sizeof(float)); |
| 120 | assert(elements <= 3 * sizeof(float)); |
| 121 | // Load 4 inputs at a time. |
| 122 | const float32x4_t vi = vld1q_f32(input); input += 4; |
| 123 | |
| 124 | // Subtract maximum input x := i - i_max. This implies x <= 0. |
| 125 | const float32x4_t vx = vsubq_f32(vi, vi_max); |
| 126 | |
| 127 | // Compute reduced argument n := round(x * 64 / log(2)). |
| 128 | // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing |
| 129 | // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction. |
| 130 | // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e. |
| 131 | // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0] |
| 132 | // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the |
| 133 | // algorithm. |
| 134 | float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64); |
| 135 | |
| 136 | // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized, |
| 137 | // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where |
| 138 | // e := int(n / 64). We create s in two steps: |
| 139 | // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the |
| 140 | // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0. |
| 141 | // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized |
| 142 | // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0, |
| 143 | // and thus the adjusted exponent is not lower than -126. |
| 144 | // |
| 145 | // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent). |
| 146 | const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17); |
| 147 | |
| 148 | // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64). |
| 149 | const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask)); |
| 150 | const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0); |
| 151 | const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1); |
| 152 | float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]); |
| 153 | float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]); |
| 154 | vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1); |
| 155 | vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1); |
| 156 | const float32x4_t vl = vcombine_f32(vl_lo, vl_hi); |
| 157 | // Adjust exponent of the value l fetched from the table to get the final s value. |
| 158 | const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve)); |
| 159 | |
| 160 | // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number. |
| 161 | vn = vsubq_f32(vn, vmagic_bias); |
| 162 | |
| 163 | // Compute reduced argument t := x - n * log(2) / 64. |
| 164 | // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy. |
| 165 | float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi); |
| 166 | vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo); |
| 167 | |
| 168 | // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128]. |
| 169 | float32x4_t vp = vmulq_f32(vt, vc2); |
| 170 | vp = vmlaq_f32(vt, vt, vp); |
| 171 | |
| 172 | // Reconstruct the final f value: |
| 173 | // f = s * (1 + t * (1 + t * c2)) |
| 174 | // = s * (1 + t + t * (t * c2)) |
| 175 | // = s + s * (t + t * (t * c2)) |
| 176 | // = s + s * p |
| 177 | float32x4_t vf = vmlaq_f32(vs, vs, vp); |
| 178 | |
| 179 | // For inputs below denormal cutoff, replace output with +0.0f. |
| 180 | // Note that for NaN inputs, comparison result is false, and outputs are left unchanged. |
| 181 | vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff))); |
| 182 | |
| 183 | float32x2_t vf_lo = vget_low_f32(vf); |
| 184 | if (elements & (2 * sizeof(float))) { |
| 185 | // Store 2 outputs at a time. |
| 186 | vst1_f32(output, vf_lo); output += 2; |
| 187 | |
| 188 | // Accumulate 2 computed exponents. |
| 189 | #if XNN_ARCH_ARM64 |
| 190 | vacc_lo += vaddv_f32(vf_lo); |
| 191 | #else |
| 192 | vacc_lo = vadd_f32(vacc_lo, vf_lo); |
| 193 | #endif |
| 194 | |
| 195 | vf_lo = vget_high_f32(vf); |
| 196 | } |
| 197 | if (elements & (1 * sizeof(float))) { |
| 198 | // Store 1 output at a time. |
| 199 | vst1_lane_f32(output, vf_lo, 0); |
| 200 | |
| 201 | // Accumulate 1 computed exponent. |
| 202 | #if XNN_ARCH_ARM64 |
| 203 | vacc_lo += vget_lane_f32(vf_lo, 0); |
| 204 | #else |
| 205 | vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32))); |
| 206 | #endif |
| 207 | } |
| 208 | } |
| 209 | // Reduce 4 elements in the SIMD register |
| 210 | #if XNN_ARCH_ARM64 |
| 211 | *sum = vacc_lo; |
| 212 | #else |
| 213 | vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0); |
| 214 | #endif |
| 215 | } |