XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2019 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
| 8 | |
| 9 | #pragma once |
| 10 | |
| 11 | #include <stdbool.h> |
| 12 | #include <stddef.h> |
| 13 | #include <stdint.h> |
| 14 | |
| 15 | #include <pthreadpool.h> |
| 16 | |
| 17 | #ifdef __cplusplus |
| 18 | extern "C" { |
| 19 | #endif |
| 20 | |
Marat Dukhan | 5609a08 | 2019-10-07 10:56:58 -0700 | [diff] [blame] | 21 | /// The number of bytes XNNPACK may read beyond array bounds. |
| 22 | /// The caller must allocate at this this many extra bytes after the tensor data passed to XNNPACK. |
| 23 | /// |
| 24 | /// Note: XNNPACK reads, but never writes beyond array bounds. |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 25 | #define XNN_EXTRA_BYTES 16 |
| 26 | |
Marat Dukhan | 5609a08 | 2019-10-07 10:56:58 -0700 | [diff] [blame] | 27 | /// The convolution operator represents a depthwise convolution, and use HWGo layout for filters. |
Marat Dukhan | dd69f0b | 2019-10-04 19:40:03 -0700 | [diff] [blame] | 28 | #define XNN_FLAG_DEPTHWISE_CONVOLUTION 0x00000001 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 29 | |
Marat Dukhan | 5609a08 | 2019-10-07 10:56:58 -0700 | [diff] [blame] | 30 | /// The operator assumes NHWC layout for the input, regardless of the output layout. |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 31 | #define XNN_FLAG_INPUT_NHWC 0x00000002 |
| 32 | |
Marat Dukhan | 8440fde | 2019-10-24 12:46:13 -0700 | [diff] [blame^] | 33 | /// Match "SAME" padding in TensorFlow. Exact padding values are computed dynamically depending on input size. |
| 34 | #define XNN_FLAG_TENSORFLOW_SAME_PADDING 0x00000004 |
| 35 | |
Marat Dukhan | 5609a08 | 2019-10-07 10:56:58 -0700 | [diff] [blame] | 36 | /// Status code for any XNNPACK function call. |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 37 | enum xnn_status { |
Marat Dukhan | 5609a08 | 2019-10-07 10:56:58 -0700 | [diff] [blame] | 38 | /// The call succeeded, and all output arguments now contain valid data. |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 39 | xnn_status_success = 0, |
| 40 | xnn_status_uninitialized = 1, |
| 41 | xnn_status_invalid_parameter = 2, |
| 42 | xnn_status_invalid_state = 3, |
| 43 | xnn_status_unsupported_parameter = 4, |
| 44 | xnn_status_unsupported_hardware = 5, |
| 45 | xnn_status_out_of_memory = 6, |
| 46 | }; |
| 47 | |
Marat Dukhan | 5609a08 | 2019-10-07 10:56:58 -0700 | [diff] [blame] | 48 | /// Initialize XNNPACK library. |
| 49 | /// |
| 50 | /// XNNPACK must be successfully initialized before use. |
| 51 | /// During initialization, XNNPACK populates internal structures depending on host processor. It can be time-consuming. |
| 52 | /// |
| 53 | /// @retval xnn_status_success - XNNPACK is succesfully initialized and ready to use. |
| 54 | /// @retval xnn_status_out_of_memory - initialization failed due to out-of-memory condition. |
| 55 | /// @retval xnn_status_unsupported_hardware - initialization failed because the host processor does not satisfy the |
| 56 | /// minimum hardware requirements for XNNPACK. E.g. this may happen on x86 |
| 57 | /// processors without SSE2 extension, or on 32-bit ARM processors without |
| 58 | /// the NEON SIMD extension. |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 59 | enum xnn_status xnn_initialize(void); |
| 60 | |
Marat Dukhan | 5609a08 | 2019-10-07 10:56:58 -0700 | [diff] [blame] | 61 | /// Deinitialize XNNPACK library. |
| 62 | /// |
| 63 | /// To avoid memory and resource leaks, users must call xnn_deinitialize once for each successful xnn_initialize call. |
| 64 | /// |
| 65 | /// @retval xnn_status_success - deinitialization call succeeded. |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 66 | enum xnn_status xnn_deinitialize(void); |
| 67 | |
| 68 | typedef struct xnn_operator* xnn_operator_t; |
| 69 | |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 70 | enum xnn_status xnn_run_operator( |
| 71 | xnn_operator_t op, |
| 72 | pthreadpool_t threadpool); |
| 73 | |
| 74 | enum xnn_status xnn_delete_operator( |
| 75 | xnn_operator_t op); |
| 76 | |
| 77 | #ifndef XNN_NO_F32_OPERATORS |
| 78 | |
| 79 | enum xnn_status xnn_create_add_nc_f32( |
| 80 | size_t channels, |
| 81 | size_t a_stride, |
| 82 | size_t b_stride, |
| 83 | size_t sum_stride, |
| 84 | float sum_min, |
| 85 | float sum_max, |
| 86 | uint32_t flags, |
| 87 | xnn_operator_t* add_op_out); |
| 88 | |
| 89 | enum xnn_status xnn_setup_add_nc_f32( |
| 90 | xnn_operator_t add_op, |
| 91 | size_t batch_size, |
| 92 | const float* a, |
| 93 | const float* b, |
| 94 | float* sum, |
| 95 | pthreadpool_t threadpool); |
| 96 | |
| 97 | enum xnn_status xnn_create_argmax_pooling2d_nhwc_f32( |
| 98 | uint32_t input_padding_top, |
| 99 | uint32_t input_padding_right, |
| 100 | uint32_t input_padding_bottom, |
| 101 | uint32_t input_padding_left, |
| 102 | uint32_t pooling_height, |
| 103 | uint32_t pooling_width, |
| 104 | size_t channels, |
| 105 | size_t input_pixel_stride, |
| 106 | size_t output_pixel_stride, |
| 107 | float output_min, |
| 108 | float output_max, |
| 109 | uint32_t flags, |
| 110 | xnn_operator_t* argmax_pooling_op_out); |
| 111 | |
| 112 | enum xnn_status xnn_setup_argmax_pooling2d_nhwc_f32( |
| 113 | xnn_operator_t argmax_pooling_op, |
| 114 | size_t batch_size, |
| 115 | size_t input_height, |
| 116 | size_t input_width, |
| 117 | const float* input, |
| 118 | float* output, |
| 119 | uint32_t* index, |
| 120 | pthreadpool_t threadpool); |
| 121 | |
| 122 | enum xnn_status xnn_create_average_pooling2d_nhwc_f32( |
| 123 | uint32_t input_padding_top, |
| 124 | uint32_t input_padding_right, |
| 125 | uint32_t input_padding_bottom, |
| 126 | uint32_t input_padding_left, |
| 127 | uint32_t pooling_height, |
| 128 | uint32_t pooling_width, |
| 129 | uint32_t stride_height, |
| 130 | uint32_t stride_width, |
| 131 | size_t channels, |
| 132 | size_t input_pixel_stride, |
| 133 | size_t output_pixel_stride, |
| 134 | float output_min, |
| 135 | float output_max, |
| 136 | uint32_t flags, |
| 137 | xnn_operator_t* average_pooling_op_out); |
| 138 | |
| 139 | enum xnn_status xnn_setup_average_pooling2d_nhwc_f32( |
| 140 | xnn_operator_t average_pooling_op, |
| 141 | size_t batch_size, |
| 142 | size_t input_height, |
| 143 | size_t input_width, |
| 144 | const float* input, |
| 145 | float* output, |
| 146 | pthreadpool_t threadpool); |
| 147 | |
| 148 | enum xnn_status xnn_create_clamp_nc_f32( |
| 149 | size_t channels, |
| 150 | size_t input_stride, |
| 151 | size_t output_stride, |
| 152 | float output_min, |
| 153 | float output_max, |
| 154 | uint32_t flags, |
| 155 | xnn_operator_t* clamp_op_out); |
| 156 | |
| 157 | enum xnn_status xnn_setup_clamp_nc_f32( |
| 158 | xnn_operator_t clamp_op, |
| 159 | size_t batch_size, |
| 160 | const float* input, |
| 161 | float* output, |
| 162 | pthreadpool_t threadpool); |
| 163 | |
| 164 | enum xnn_status xnn_create_convolution2d_nhwc_f32( |
| 165 | uint32_t input_padding_top, |
| 166 | uint32_t input_padding_right, |
| 167 | uint32_t input_padding_bottom, |
| 168 | uint32_t input_padding_left, |
| 169 | uint32_t kernel_height, |
| 170 | uint32_t kernel_width, |
| 171 | uint32_t subsampling_height, |
| 172 | uint32_t subsampling_width, |
| 173 | uint32_t dilation_height, |
| 174 | uint32_t dilation_width, |
| 175 | uint32_t groups, |
| 176 | size_t group_input_channels, |
| 177 | size_t group_output_channels, |
| 178 | size_t input_pixel_stride, |
| 179 | size_t output_pixel_stride, |
| 180 | const float* kernel, |
| 181 | const float* bias, |
| 182 | float output_min, |
| 183 | float output_max, |
| 184 | uint32_t flags, |
| 185 | xnn_operator_t* convolution_op_out); |
| 186 | |
| 187 | enum xnn_status xnn_setup_convolution2d_nhwc_f32( |
| 188 | xnn_operator_t convolution_op, |
| 189 | size_t batch_size, |
| 190 | size_t input_height, |
| 191 | size_t input_width, |
| 192 | const float* input, |
| 193 | float* output, |
| 194 | pthreadpool_t threadpool); |
| 195 | |
| 196 | enum xnn_status xnn_create_deconvolution2d_nhwc_f32( |
| 197 | uint32_t output_padding_top, |
| 198 | uint32_t output_padding_right, |
| 199 | uint32_t output_padding_bottom, |
| 200 | uint32_t output_padding_left, |
| 201 | uint32_t adjustment_height, |
| 202 | uint32_t adjustment_width, |
| 203 | uint32_t kernel_height, |
| 204 | uint32_t kernel_width, |
| 205 | uint32_t stride_height, |
| 206 | uint32_t stride_width, |
| 207 | uint32_t dilation_height, |
| 208 | uint32_t dilation_width, |
| 209 | uint32_t groups, |
| 210 | size_t group_input_channels, |
| 211 | size_t group_output_channels, |
| 212 | size_t input_pixel_stride, |
| 213 | size_t output_pixel_stride, |
| 214 | const float* kernel, |
| 215 | const float* bias, |
| 216 | float output_min, |
| 217 | float output_max, |
| 218 | uint32_t flags, |
| 219 | xnn_operator_t* deconvolution_op_out); |
| 220 | |
| 221 | enum xnn_status xnn_setup_deconvolution2d_nhwc_f32( |
| 222 | xnn_operator_t deconvolution_op, |
| 223 | size_t batch_size, |
| 224 | size_t input_height, |
| 225 | size_t input_width, |
| 226 | const float* input, |
| 227 | float* output, |
| 228 | pthreadpool_t threadpool); |
| 229 | |
| 230 | enum xnn_status xnn_create_fully_connected_nc_f32( |
| 231 | size_t input_channels, |
| 232 | size_t output_channels, |
| 233 | size_t input_stride, |
| 234 | size_t output_stride, |
| 235 | const float* kernel, |
| 236 | const float* bias, |
| 237 | float output_min, |
| 238 | float output_max, |
| 239 | uint32_t flags, |
| 240 | xnn_operator_t* fully_connected_op_out); |
| 241 | |
| 242 | enum xnn_status xnn_setup_fully_connected_nc_f32( |
| 243 | xnn_operator_t fully_connected_op, |
| 244 | size_t batch_size, |
| 245 | const float* input, |
| 246 | float* output, |
| 247 | pthreadpool_t threadpool); |
| 248 | |
| 249 | enum xnn_status xnn_create_global_average_pooling_nwc_f32( |
| 250 | size_t channels, |
| 251 | size_t input_stride, |
| 252 | size_t output_stride, |
| 253 | float output_min, |
| 254 | float output_max, |
| 255 | uint32_t flags, |
| 256 | xnn_operator_t* global_average_pooling_op_out); |
| 257 | |
| 258 | enum xnn_status xnn_setup_global_average_pooling_nwc_f32( |
| 259 | xnn_operator_t global_average_pooling_op, |
| 260 | size_t batch_size, |
| 261 | size_t width, |
| 262 | const float* input, |
| 263 | float* output, |
| 264 | pthreadpool_t threadpool); |
| 265 | |
| 266 | enum xnn_status xnn_create_hardswish_nc_f32( |
| 267 | size_t channels, |
| 268 | size_t input_stride, |
| 269 | size_t output_stride, |
| 270 | uint32_t flags, |
| 271 | xnn_operator_t* hardswish_op_out); |
| 272 | |
| 273 | enum xnn_status xnn_setup_hardswish_nc_f32( |
| 274 | xnn_operator_t hardswish_op, |
| 275 | size_t batch_size, |
| 276 | const float* input, |
| 277 | float* output, |
| 278 | pthreadpool_t threadpool); |
| 279 | |
| 280 | enum xnn_status xnn_create_max_pooling2d_nhwc_f32( |
| 281 | uint32_t input_padding_top, |
| 282 | uint32_t input_padding_right, |
| 283 | uint32_t input_padding_bottom, |
| 284 | uint32_t input_padding_left, |
| 285 | uint32_t pooling_height, |
| 286 | uint32_t pooling_width, |
| 287 | uint32_t stride_height, |
| 288 | uint32_t stride_width, |
| 289 | uint32_t dilation_height, |
| 290 | uint32_t dilation_width, |
| 291 | size_t channels, |
| 292 | size_t input_pixel_stride, |
| 293 | size_t output_pixel_stride, |
| 294 | float output_min, |
| 295 | float output_max, |
| 296 | uint32_t flags, |
| 297 | xnn_operator_t* max_pooling_op_out); |
| 298 | |
| 299 | enum xnn_status xnn_setup_max_pooling2d_nhwc_f32( |
| 300 | xnn_operator_t max_pooling_op, |
| 301 | size_t batch_size, |
| 302 | size_t input_height, |
| 303 | size_t input_width, |
| 304 | const float* input, |
| 305 | float* output, |
| 306 | pthreadpool_t threadpool); |
| 307 | |
| 308 | enum xnn_status xnn_create_prelu_nc_f32( |
| 309 | size_t channels, |
| 310 | size_t input_stride, |
| 311 | size_t output_stride, |
| 312 | const float* negative_slope, |
| 313 | float output_min, |
| 314 | float output_max, |
| 315 | uint32_t flags, |
| 316 | xnn_operator_t* prelu_op_out); |
| 317 | |
| 318 | enum xnn_status xnn_setup_prelu_nc_f32( |
| 319 | xnn_operator_t prelu_op, |
| 320 | size_t batch_size, |
| 321 | const float* input, |
| 322 | float* output, |
| 323 | pthreadpool_t threadpool); |
| 324 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 325 | #ifndef XNN_NO_SPNCHW_OPERATORS |
| 326 | |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 327 | enum xnn_status xnn_create_convolution2d_spnchw_f32( |
| 328 | uint32_t input_padding_top, |
| 329 | uint32_t input_padding_right, |
| 330 | uint32_t input_padding_bottom, |
| 331 | uint32_t input_padding_left, |
| 332 | uint32_t kernel_height, |
| 333 | uint32_t kernel_width, |
| 334 | uint32_t subsampling_height, |
| 335 | uint32_t subsampling_width, |
| 336 | uint32_t dilation_height, |
| 337 | uint32_t dilation_width, |
| 338 | uint32_t groups, |
| 339 | size_t group_input_channels, |
| 340 | size_t group_output_channels, |
| 341 | const float* kernel, |
| 342 | const float* bias, |
| 343 | float output_min, |
| 344 | float output_max, |
| 345 | uint32_t flags, |
| 346 | xnn_operator_t* convolution_op_out); |
| 347 | |
| 348 | enum xnn_status xnn_setup_convolution2d_spnchw_f32( |
| 349 | xnn_operator_t convolution_op, |
| 350 | size_t batch_size, |
| 351 | size_t input_batch_stride, |
| 352 | size_t output_batch_stride, |
| 353 | size_t input_height, |
| 354 | size_t input_width, |
| 355 | const float* input, |
| 356 | float* output, |
| 357 | pthreadpool_t threadpool); |
| 358 | |
| 359 | enum xnn_status xnn_create_global_average_pooling_spnchw_f32( |
| 360 | size_t channels, |
| 361 | float output_min, |
| 362 | float output_max, |
| 363 | uint32_t flags, |
| 364 | xnn_operator_t* global_average_pooling_op_out); |
| 365 | |
| 366 | enum xnn_status xnn_setup_global_average_pooling_spnchw_f32( |
| 367 | xnn_operator_t global_average_pooling_op, |
| 368 | size_t batch_size, |
| 369 | size_t height, |
| 370 | size_t width, |
| 371 | const float* input, |
| 372 | float* output, |
| 373 | pthreadpool_t threadpool); |
| 374 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 375 | #endif // XNN_NO_SPNCHW_OPERATORS |
| 376 | |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 377 | #endif // XNN_NO_F32_OPERATORS |
| 378 | |
| 379 | #ifndef XNN_NO_X32_OPERATORS |
| 380 | |
| 381 | enum xnn_status xnn_create_channel_pad_nc_x32( |
| 382 | size_t input_channels, |
| 383 | size_t pad_before_channels, |
| 384 | size_t pad_after_channels, |
| 385 | size_t input_stride, |
| 386 | size_t output_stride, |
| 387 | const void* pad_value, |
| 388 | uint32_t flags, |
| 389 | xnn_operator_t* channel_pad_op_out); |
| 390 | |
| 391 | enum xnn_status xnn_setup_channel_pad_nc_x32( |
| 392 | xnn_operator_t channel_pad_op, |
| 393 | size_t batch_size, |
| 394 | const void* input, |
| 395 | void* output, |
| 396 | pthreadpool_t threadpool); |
| 397 | |
| 398 | enum xnn_status xnn_create_channel_shuffle_nc_x32( |
| 399 | size_t groups, |
| 400 | size_t group_channels, |
| 401 | size_t input_stride, |
| 402 | size_t output_stride, |
| 403 | uint32_t flags, |
| 404 | xnn_operator_t* channel_shuffle_op_out); |
| 405 | |
| 406 | enum xnn_status xnn_setup_channel_shuffle_nc_x32( |
| 407 | xnn_operator_t channel_shuffle_op, |
| 408 | size_t batch_size, |
| 409 | const void* input, |
| 410 | void* output, |
| 411 | pthreadpool_t threadpool); |
| 412 | |
| 413 | enum xnn_status xnn_create_unpooling2d_nhwc_x32( |
| 414 | uint32_t input_padding_top, |
| 415 | uint32_t input_padding_right, |
| 416 | uint32_t input_padding_bottom, |
| 417 | uint32_t input_padding_left, |
| 418 | uint32_t pooling_height, |
| 419 | uint32_t pooling_width, |
| 420 | size_t channels, |
| 421 | size_t input_pixel_stride, |
| 422 | size_t output_pixel_stride, |
| 423 | uint32_t flags, |
| 424 | xnn_operator_t* unpooling_op_out); |
| 425 | |
| 426 | enum xnn_status xnn_setup_unpooling2d_nhwc_x32( |
| 427 | xnn_operator_t unpooling_op, |
| 428 | size_t batch_size, |
| 429 | size_t input_height, |
| 430 | size_t input_width, |
| 431 | const void* input, |
| 432 | const uint32_t* index, |
| 433 | void* output, |
| 434 | pthreadpool_t threadpool); |
| 435 | |
| 436 | #endif // XNN_NO_X32_OPERATORS |
| 437 | |
| 438 | #ifndef XNN_NO_Q8_OPERATORS |
| 439 | |
| 440 | enum xnn_status xnn_create_add_nc_q8( |
| 441 | size_t channels, |
| 442 | size_t a_stride, |
| 443 | size_t b_stride, |
| 444 | size_t sum_stride, |
| 445 | uint8_t a_zero_point, |
| 446 | float a_scale, |
| 447 | uint8_t b_zero_point, |
| 448 | float b_scale, |
| 449 | uint8_t sum_zero_point, |
| 450 | float sum_scale, |
| 451 | uint8_t sum_min, |
| 452 | uint8_t sum_max, |
| 453 | uint32_t flags, |
| 454 | xnn_operator_t* add_op_out); |
| 455 | |
| 456 | enum xnn_status xnn_setup_add_nc_q8( |
| 457 | xnn_operator_t add_op, |
| 458 | size_t batch_size, |
| 459 | const uint8_t* a, |
| 460 | const uint8_t* b, |
| 461 | uint8_t* sum, |
| 462 | pthreadpool_t threadpool); |
| 463 | |
| 464 | enum xnn_status xnn_create_average_pooling2d_nhwc_q8( |
| 465 | uint32_t input_padding_top, |
| 466 | uint32_t input_padding_right, |
| 467 | uint32_t input_padding_bottom, |
| 468 | uint32_t input_padding_left, |
| 469 | uint32_t pooling_height, |
| 470 | uint32_t pooling_width, |
| 471 | uint32_t stride_height, |
| 472 | uint32_t stride_width, |
| 473 | size_t channels, |
| 474 | size_t input_pixel_stride, |
| 475 | size_t output_pixel_stride, |
| 476 | uint8_t input_zero_point, |
| 477 | float input_scale, |
| 478 | uint8_t output_zero_point, |
| 479 | float output_scale, |
| 480 | uint8_t output_min, |
| 481 | uint8_t output_max, |
| 482 | uint32_t flags, |
| 483 | xnn_operator_t* average_pooling_op_out); |
| 484 | |
| 485 | enum xnn_status xnn_setup_average_pooling2d_nhwc_q8( |
| 486 | xnn_operator_t average_pooling_op, |
| 487 | size_t batch_size, |
| 488 | size_t input_height, |
| 489 | size_t input_width, |
| 490 | const uint8_t* input, |
| 491 | uint8_t* output, |
| 492 | pthreadpool_t threadpool); |
| 493 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 494 | enum xnn_status xnn_create_convolution2d_nhwc_q8( |
| 495 | uint32_t input_padding_top, |
| 496 | uint32_t input_padding_right, |
| 497 | uint32_t input_padding_bottom, |
| 498 | uint32_t input_padding_left, |
| 499 | uint32_t kernel_height, |
| 500 | uint32_t kernel_width, |
| 501 | uint32_t subsampling_height, |
| 502 | uint32_t subsampling_width, |
| 503 | uint32_t dilation_height, |
| 504 | uint32_t dilation_width, |
| 505 | uint32_t groups, |
| 506 | size_t group_input_channels, |
| 507 | size_t group_output_channels, |
| 508 | size_t input_pixel_stride, |
| 509 | size_t output_pixel_stride, |
| 510 | uint8_t input_zero_point, |
| 511 | float input_scale, |
| 512 | uint8_t kernel_zero_point, |
| 513 | float kernel_scale, |
| 514 | const uint8_t* kernel, |
| 515 | const int32_t* bias, |
| 516 | uint8_t output_zero_point, |
| 517 | float output_scale, |
| 518 | uint8_t output_min, |
| 519 | uint8_t output_max, |
| 520 | uint32_t flags, |
| 521 | xnn_operator_t* convolution_op_out); |
| 522 | |
| 523 | enum xnn_status xnn_setup_convolution2d_nhwc_q8( |
| 524 | xnn_operator_t convolution_op, |
| 525 | size_t batch_size, |
| 526 | size_t input_height, |
| 527 | size_t input_width, |
| 528 | const uint8_t* input, |
| 529 | uint8_t* output, |
| 530 | pthreadpool_t threadpool); |
| 531 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 532 | enum xnn_status xnn_create_deconvolution2d_nhwc_q8( |
| 533 | uint32_t output_padding_top, |
| 534 | uint32_t output_padding_right, |
| 535 | uint32_t output_padding_bottom, |
| 536 | uint32_t output_padding_left, |
| 537 | uint32_t adjustment_height, |
| 538 | uint32_t adjustment_width, |
| 539 | uint32_t kernel_height, |
| 540 | uint32_t kernel_width, |
| 541 | uint32_t stride_height, |
| 542 | uint32_t stride_width, |
| 543 | uint32_t dilation_height, |
| 544 | uint32_t dilation_width, |
| 545 | uint32_t groups, |
| 546 | size_t group_input_channels, |
| 547 | size_t group_output_channels, |
| 548 | size_t input_pixel_stride, |
| 549 | size_t output_pixel_stride, |
| 550 | uint8_t input_zero_point, |
| 551 | float input_scale, |
| 552 | uint8_t kernel_zero_point, |
| 553 | float kernel_scale, |
| 554 | const uint8_t* kernel, |
| 555 | const int32_t* bias, |
| 556 | uint8_t output_zero_point, |
| 557 | float output_scale, |
| 558 | uint8_t output_min, |
| 559 | uint8_t output_max, |
| 560 | uint32_t flags, |
| 561 | xnn_operator_t* deconvolution_op_out); |
| 562 | |
| 563 | enum xnn_status xnn_setup_deconvolution2d_nhwc_q8( |
| 564 | xnn_operator_t deconvolution_op, |
| 565 | size_t batch_size, |
| 566 | size_t input_height, |
| 567 | size_t input_width, |
| 568 | const uint8_t* input, |
| 569 | uint8_t* output, |
| 570 | pthreadpool_t threadpool); |
| 571 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 572 | enum xnn_status xnn_create_fully_connected_nc_q8( |
| 573 | size_t input_channels, |
| 574 | size_t output_channels, |
| 575 | size_t input_stride, |
| 576 | size_t output_stride, |
| 577 | uint8_t input_zero_point, |
| 578 | float input_scale, |
| 579 | uint8_t kernel_zero_point, |
| 580 | float kernel_scale, |
| 581 | const uint8_t* kernel, |
| 582 | const int32_t* bias, |
| 583 | uint8_t output_zero_point, |
| 584 | float output_scale, |
| 585 | uint8_t output_min, |
| 586 | uint8_t output_max, |
| 587 | uint32_t flags, |
| 588 | xnn_operator_t* fully_connected_op_out); |
| 589 | |
| 590 | enum xnn_status xnn_setup_fully_connected_nc_q8( |
| 591 | xnn_operator_t fully_connected_op, |
| 592 | size_t batch_size, |
| 593 | const uint8_t* input, |
| 594 | uint8_t* output, |
| 595 | pthreadpool_t threadpool); |
| 596 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 597 | enum xnn_status xnn_create_global_average_pooling_nwc_q8( |
| 598 | size_t channels, |
| 599 | size_t input_stride, |
| 600 | size_t output_stride, |
| 601 | uint8_t input_zero_point, |
| 602 | float input_scale, |
| 603 | uint8_t output_zero_point, |
| 604 | float output_scale, |
| 605 | uint8_t output_min, |
| 606 | uint8_t output_max, |
| 607 | uint32_t flags, |
| 608 | xnn_operator_t* global_average_pooling_op_out); |
| 609 | |
| 610 | enum xnn_status xnn_setup_global_average_pooling_nwc_q8( |
| 611 | xnn_operator_t global_average_pooling_op, |
| 612 | size_t batch_size, |
| 613 | size_t width, |
| 614 | const uint8_t* input, |
| 615 | uint8_t* output, |
| 616 | pthreadpool_t threadpool); |
| 617 | |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 618 | enum xnn_status xnn_create_leaky_relu_nc_q8( |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 619 | size_t channels, |
| 620 | size_t input_stride, |
| 621 | size_t output_stride, |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 622 | float negative_slope, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 623 | uint8_t input_zero_point, |
| 624 | float input_scale, |
| 625 | uint8_t output_zero_point, |
| 626 | float output_scale, |
| 627 | uint8_t output_min, |
| 628 | uint8_t output_max, |
| 629 | uint32_t flags, |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 630 | xnn_operator_t* leaky_relu_op_out); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 631 | |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 632 | enum xnn_status xnn_setup_leaky_relu_nc_q8( |
| 633 | xnn_operator_t leaky_relu_op, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 634 | size_t batch_size, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 635 | const uint8_t* input, |
| 636 | uint8_t* output, |
| 637 | pthreadpool_t threadpool); |
| 638 | |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 639 | enum xnn_status xnn_create_sigmoid_nc_q8( |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 640 | size_t channels, |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 641 | size_t input_stride, |
| 642 | size_t output_stride, |
| 643 | uint8_t input_zero_point, |
| 644 | float input_scale, |
| 645 | uint8_t output_zero_point, |
| 646 | float output_scale, |
| 647 | uint8_t output_min, |
| 648 | uint8_t output_max, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 649 | uint32_t flags, |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 650 | xnn_operator_t* sigmoid_op_out); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 651 | |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 652 | enum xnn_status xnn_setup_sigmoid_nc_q8( |
| 653 | xnn_operator_t sigmoid_op, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 654 | size_t batch_size, |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 655 | const uint8_t* input, |
| 656 | uint8_t* output, |
| 657 | pthreadpool_t threadpool); |
| 658 | |
| 659 | enum xnn_status xnn_create_softargmax_nc_q8( |
| 660 | size_t channels, |
| 661 | size_t input_stride, |
| 662 | size_t output_stride, |
| 663 | float input_scale, |
| 664 | uint8_t output_zero_point, |
| 665 | float output_scale, |
| 666 | uint32_t flags, |
| 667 | xnn_operator_t* softargmax_op_out); |
| 668 | |
| 669 | enum xnn_status xnn_setup_softargmax_nc_q8( |
| 670 | xnn_operator_t softargmax_op, |
| 671 | size_t batch_size, |
| 672 | const uint8_t* input, |
| 673 | uint8_t* output, |
| 674 | pthreadpool_t threadpool); |
| 675 | |
| 676 | #endif // XNN_NO_Q8_OPERATORS |
| 677 | |
| 678 | #ifndef XNN_NO_U8_OPERATORS |
| 679 | |
| 680 | enum xnn_status xnn_create_clamp_nc_u8( |
| 681 | size_t channels, |
| 682 | size_t input_stride, |
| 683 | size_t output_stride, |
| 684 | uint8_t output_min, |
| 685 | uint8_t output_max, |
| 686 | uint32_t flags, |
| 687 | xnn_operator_t* clamp_op_out); |
| 688 | |
| 689 | enum xnn_status xnn_setup_clamp_nc_u8( |
| 690 | xnn_operator_t clamp_op, |
| 691 | size_t batch_size, |
| 692 | const uint8_t* input, |
| 693 | uint8_t* output, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 694 | pthreadpool_t threadpool); |
| 695 | |
| 696 | enum xnn_status xnn_create_max_pooling2d_nhwc_u8( |
| 697 | uint32_t input_padding_top, |
| 698 | uint32_t input_padding_right, |
| 699 | uint32_t input_padding_bottom, |
| 700 | uint32_t input_padding_left, |
| 701 | uint32_t pooling_height, |
| 702 | uint32_t pooling_width, |
| 703 | uint32_t stride_height, |
| 704 | uint32_t stride_width, |
| 705 | uint32_t dilation_height, |
| 706 | uint32_t dilation_width, |
| 707 | size_t channels, |
| 708 | size_t input_pixel_stride, |
| 709 | size_t output_pixel_stride, |
| 710 | uint8_t output_min, |
| 711 | uint8_t output_max, |
| 712 | uint32_t flags, |
| 713 | xnn_operator_t* max_pooling_op_out); |
| 714 | |
| 715 | enum xnn_status xnn_setup_max_pooling2d_nhwc_u8( |
| 716 | xnn_operator_t max_pooling_op, |
| 717 | size_t batch_size, |
| 718 | size_t input_height, |
| 719 | size_t input_width, |
| 720 | const uint8_t* input, |
| 721 | uint8_t* output, |
| 722 | pthreadpool_t threadpool); |
| 723 | |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 724 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 725 | |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 726 | #ifndef XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 727 | |
| 728 | enum xnn_status xnn_create_channel_shuffle_nc_x8( |
| 729 | size_t groups, |
| 730 | size_t group_channels, |
| 731 | size_t input_stride, |
| 732 | size_t output_stride, |
| 733 | uint32_t flags, |
| 734 | xnn_operator_t* channel_shuffle_op_out); |
| 735 | |
| 736 | enum xnn_status xnn_setup_channel_shuffle_nc_x8( |
| 737 | xnn_operator_t channel_shuffle_op, |
| 738 | size_t batch_size, |
| 739 | const void* input, |
| 740 | void* output, |
| 741 | pthreadpool_t threadpool); |
| 742 | |
Marat Dukhan | d620972 | 2019-10-07 12:54:25 -0700 | [diff] [blame] | 743 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 744 | |
| 745 | #ifdef __cplusplus |
| 746 | } // extern "C" |
| 747 | #endif |