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XNNPACK Teamb455b122019-09-27 18:10:33 -07001// Copyright (c) Facebook, Inc. and its affiliates.
2// All rights reserved.
3//
4// Copyright 2019 Google LLC
5//
6// This source code is licensed under the BSD-style license found in the
7// LICENSE file in the root directory of this source tree.
8
9#pragma once
10
11#include <stddef.h>
12#include <stdint.h>
13
14#include <pthreadpool.h>
15
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -070016#include <xnnpack/params.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070017#include <xnnpack/compute.h>
18
19
20enum xnn_ukernel_type {
21 xnn_ukernel_type_none = 0,
22 xnn_ukernel_type_add,
23 xnn_ukernel_type_argmax_pooling,
24 xnn_ukernel_type_average_pooling,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -080025 xnn_ukernel_type_binary_elementwise,
XNNPACK Teamb455b122019-09-27 18:10:33 -070026 xnn_ukernel_type_channel_shuffle,
Marat Dukhan1f29b802020-05-15 23:46:39 -070027 xnn_ukernel_type_conv2d_hwc2chw,
XNNPACK Teamb455b122019-09-27 18:10:33 -070028 xnn_ukernel_type_dwconv,
29 xnn_ukernel_type_gemm,
30 xnn_ukernel_type_global_average_pooling,
Marat Dukhan346a9e52019-11-15 09:06:30 -080031 xnn_ukernel_type_igemm,
XNNPACK Teamb455b122019-09-27 18:10:33 -070032 xnn_ukernel_type_lut,
33 xnn_ukernel_type_max_pooling,
34 xnn_ukernel_type_pad,
35 xnn_ukernel_type_pixelwise_average_pooling,
36 xnn_ukernel_type_prelu,
Marat Dukhanfd8e6892020-01-27 15:25:25 -080037 xnn_ukernel_type_softmax,
XNNPACK Teamb455b122019-09-27 18:10:33 -070038 xnn_ukernel_type_spmm,
39 xnn_ukernel_type_subconv2d,
Marat Dukhanc3065f52020-06-04 13:33:32 -070040 xnn_ukernel_type_unary_elementwise,
XNNPACK Teamb455b122019-09-27 18:10:33 -070041 xnn_ukernel_type_unpooling,
42 xnn_ukernel_type_vmulcaddc,
43};
44
45enum xnn_operator_type {
Marat Dukhan3b59de22020-06-03 20:15:19 -070046 xnn_operator_type_invalid = 0,
Marat Dukhan5020b962020-06-08 13:30:10 -070047 xnn_operator_type_abs_nc_f32,
Frank Barchard01898c02020-06-23 21:49:50 -070048 xnn_operator_type_add_nd_f16,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -080049 xnn_operator_type_add_nd_f32,
Marat Dukhanff209482020-09-03 14:26:53 -070050 xnn_operator_type_add_nd_qs8,
Marat Dukhanefc47b82019-11-18 09:25:38 -080051 xnn_operator_type_argmax_pooling_nhwc_f32,
52 xnn_operator_type_average_pooling_nhwc_f32,
Marat Dukhan08b7a972020-07-14 18:17:29 -070053 xnn_operator_type_average_pooling_nhwc_qu8,
Marat Dukhan64e52512020-06-09 13:41:16 -070054 xnn_operator_type_bankers_rounding_nc_f32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080055 xnn_operator_type_channel_shuffle_nc_x32,
56 xnn_operator_type_channel_shuffle_nc_x8,
57 xnn_operator_type_clamp_nc_f32,
58 xnn_operator_type_clamp_nc_u8,
Marat Dukhan64e52512020-06-09 13:41:16 -070059 xnn_operator_type_ceiling_nc_f32,
Marat Dukhan065b11e2020-05-22 09:49:41 -070060 xnn_operator_type_constant_pad_nd_x32,
Marat Dukhan4e21b272020-06-04 18:45:01 -070061 xnn_operator_type_convolution_nchw_f32,
Frank Barchard49b4dcc2020-06-26 14:07:19 -070062 xnn_operator_type_convolution_nhwc_f16,
Marat Dukhanefc47b82019-11-18 09:25:38 -080063 xnn_operator_type_convolution_nhwc_f32,
Marat Dukhan16f1e1a2020-08-04 16:38:22 -070064 xnn_operator_type_convolution_nhwc_qs8,
Marat Dukhan08b7a972020-07-14 18:17:29 -070065 xnn_operator_type_convolution_nhwc_qu8,
Marat Dukhan4e21b272020-06-04 18:45:01 -070066 xnn_operator_type_copy_nc_x32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080067 xnn_operator_type_deconvolution_nhwc_f32,
Marat Dukhan08b7a972020-07-14 18:17:29 -070068 xnn_operator_type_deconvolution_nhwc_qu8,
Marat Dukhan69180502019-12-06 15:00:31 -080069 xnn_operator_type_divide_nd_f32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080070 xnn_operator_type_fully_connected_nc_f32,
Marat Dukhan08b7a972020-07-14 18:17:29 -070071 xnn_operator_type_fully_connected_nc_qu8,
Marat Dukhan64e52512020-06-09 13:41:16 -070072 xnn_operator_type_floor_nc_f32,
Frank Barchard7e2cbb02020-06-12 01:22:13 -070073 xnn_operator_type_global_average_pooling_nwc_f16,
Marat Dukhanefc47b82019-11-18 09:25:38 -080074 xnn_operator_type_global_average_pooling_nwc_f32,
Marat Dukhan9e0b5392020-08-07 02:29:34 -070075 xnn_operator_type_global_average_pooling_nwc_qs8,
Marat Dukhan08b7a972020-07-14 18:17:29 -070076 xnn_operator_type_global_average_pooling_nwc_qu8,
Marat Dukhanefc47b82019-11-18 09:25:38 -080077 xnn_operator_type_global_average_pooling_ncw_f32,
Frank Barcharda96948e2020-09-11 15:34:18 -070078 xnn_operator_type_hardswish_nc_f16,
Marat Dukhanefc47b82019-11-18 09:25:38 -080079 xnn_operator_type_hardswish_nc_f32,
Marat Dukhan28813332020-06-10 18:05:38 -070080 xnn_operator_type_leaky_relu_nc_f32,
Marat Dukhan08b7a972020-07-14 18:17:29 -070081 xnn_operator_type_leaky_relu_nc_qu8,
Marat Dukhanefc47b82019-11-18 09:25:38 -080082 xnn_operator_type_max_pooling_nhwc_f32,
83 xnn_operator_type_max_pooling_nhwc_u8,
Marat Dukhan79e7f842019-12-05 14:35:50 -080084 xnn_operator_type_maximum_nd_f32,
85 xnn_operator_type_minimum_nd_f32,
Frank Barchard0ea6a772020-09-09 15:26:31 -070086 xnn_operator_type_multiply_nd_f16,
Marat Dukhanefc47b82019-11-18 09:25:38 -080087 xnn_operator_type_multiply_nd_f32,
Marat Dukhan5020b962020-06-08 13:30:10 -070088 xnn_operator_type_negate_nc_f32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080089 xnn_operator_type_prelu_nc_f32,
Artsiom Ablavatski97918102020-10-27 15:52:59 -070090 xnn_operator_type_resize_bilinear_nchw_f32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080091 xnn_operator_type_resize_bilinear_nhwc_f32,
92 xnn_operator_type_sigmoid_nc_f32,
Marat Dukhan08b7a972020-07-14 18:17:29 -070093 xnn_operator_type_sigmoid_nc_qu8,
Marat Dukhanfd8e6892020-01-27 15:25:25 -080094 xnn_operator_type_softmax_nc_f32,
Marat Dukhan08b7a972020-07-14 18:17:29 -070095 xnn_operator_type_softmax_nc_qu8,
Marat Dukhan5020b962020-06-08 13:30:10 -070096 xnn_operator_type_square_nc_f32,
Marat Dukhan6804bbd2020-06-30 19:26:11 -070097 xnn_operator_type_square_root_nc_f32,
Marat Dukhanf7399262020-06-05 10:58:44 -070098 xnn_operator_type_squared_difference_nd_f32,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -080099 xnn_operator_type_subtract_nd_f32,
Marat Dukhan64e52512020-06-09 13:41:16 -0700100 xnn_operator_type_truncation_nc_f32,
Marat Dukhanefc47b82019-11-18 09:25:38 -0800101 xnn_operator_type_unpooling_nhwc_x32,
XNNPACK Teamb455b122019-09-27 18:10:33 -0700102};
103
Marat Dukhan1f29b802020-05-15 23:46:39 -0700104struct xnn_ukernel_conv2d {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700105 union {
Marat Dukhan1f29b802020-05-15 23:46:39 -0700106 xnn_conv_hwc2chw_ukernel_function hwc2chw_function;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700107 xnn_conv_hwc_ukernel_function hwc_function;
108 };
109 uint8_t output_height_tile;
110 uint8_t output_channel_tile;
111};
112
113struct xnn_ukernel_dwconv {
114 union {
Marat Dukhanaefaef32020-04-09 07:09:34 -0700115 xnn_dwconv_unipass_ukernel_function unipass_function;
116 xnn_dwconv_multipass_ukernel_function multipass_function;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700117 };
Marat Dukhanaefaef32020-04-09 07:09:34 -0700118 uint8_t primary_tile;
119 uint8_t incremental_tile;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700120};
121
122// Direct 2D Depthwise Convolution
123struct xnn_ukernel_dwconv2d {
124 union {
Marat Dukhanbf715f92020-10-23 20:17:00 -0700125 xnn_dwconv2d_chw_ukernel_function chw_function;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700126 };
127 uint8_t input_width_tile;
128 uint8_t output_width_tile;
129};
130
131struct xnn_ukernel_gemm {
Marat Dukhan05702cf2020-03-26 15:41:33 -0700132 struct xnn_hmp_gemm_ukernel general_case;
133 struct xnn_hmp_gemm_ukernel mr1_case;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700134 uint8_t mr;
135 uint8_t nr;
136 uint8_t kr;
137};
138
139struct xnn_ukernel_igemm {
Marat Dukhan05702cf2020-03-26 15:41:33 -0700140 struct xnn_hmp_igemm_ukernel general_case;
141 struct xnn_hmp_igemm_ukernel mr1_case;
142 struct xnn_hmp_gemm_ukernel gemm_case;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700143 uint8_t mr;
144 uint8_t nr;
145 uint8_t kr;
146};
147
148struct xnn_ukernel_spmm {
149 xnn_spmm_ukernel_function function;
150 uint8_t mr;
151};
152
153struct xnn_ukernel_vmulcaddc {
154 xnn_vmulcaddc_ukernel_function function;
155 uint8_t mr;
156};
157
Frank Barchardc67dd7f2020-07-06 11:23:57 -0700158struct xnn_ukernel_vbinary {
Frank Barchard65beb1a2020-07-20 16:40:02 -0700159 xnn_vbinary_ukernel_function op_function;
160 xnn_vbinary_ukernel_function opc_function;
161 xnn_vbinary_ukernel_function ropc_function;
Frank Barchardc67dd7f2020-07-06 11:23:57 -0700162};
163
Frank Barchard62c5e232020-07-21 17:42:19 -0700164struct xnn_ukernel_vunary {
165 xnn_vunary_ukernel_function function;
166};
167
XNNPACK Teamb455b122019-09-27 18:10:33 -0700168struct xnn_ukernel {
169 enum xnn_ukernel_type type;
170 union {
Marat Dukhan1f29b802020-05-15 23:46:39 -0700171 struct xnn_ukernel_conv2d conv2d;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700172 struct xnn_ukernel_dwconv dwconv;
173 struct xnn_ukernel_dwconv2d dwconv2d;
174 struct xnn_ukernel_gemm gemm;
175 struct xnn_ukernel_igemm igemm;
176 struct xnn_ukernel_spmm spmm;
177 struct xnn_ukernel_vmulcaddc vmulcaddc;
Frank Barchardc67dd7f2020-07-06 11:23:57 -0700178 struct xnn_ukernel_vbinary vbinary;
Frank Barchard62c5e232020-07-21 17:42:19 -0700179 struct xnn_ukernel_vunary vunary;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700180 };
181};
182
183enum xnn_run_state {
184 xnn_run_state_invalid = 0,
185 xnn_run_state_ready,
186 xnn_run_state_skip,
187};
188
189struct subconvolution_params {
190 void* weights;
191 size_t w_stride;
192 const void** indirection_buffer;
193 void* output;
194 size_t slice_width;
195 size_t slice_height;
196 size_t indirection_y_stride;
197 size_t indirection_x_stride;
Marat Dukhan80fc9322019-09-29 21:06:36 -0700198 // scaled_kernel_size := kernel_size * mr * sizeof(void*).
XNNPACK Teamb455b122019-09-27 18:10:33 -0700199 size_t scaled_kernel_size;
200};
201
202struct xnn_operator {
203 size_t batch_size;
204 uint32_t padding_top;
205 uint32_t padding_right;
206 uint32_t padding_bottom;
207 uint32_t padding_left;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700208 uint32_t kernel_height;
209 uint32_t kernel_width;
210 uint32_t stride_height;
211 uint32_t stride_width;
212 uint32_t dilation_height;
213 uint32_t dilation_width;
214 uint32_t groups;
215 size_t group_channels;
216 size_t group_input_channels;
217 size_t group_output_channels;
218 size_t channels;
219
220 size_t pad_before_channels;
221 size_t pad_after_channels;
222 uint32_t pad_value;
223
224 size_t input_height;
225 size_t input_width;
226 size_t input_pixel_stride;
227 const void* input;
228 const void** indirection_buffer;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700229
230 size_t input2_pixel_stride;
231 const void* input2;
232
233 size_t output_height;
234 size_t output_width;
235 size_t output_pixel_stride;
236 void* output;
237
238 void* packed_weights;
239 // Total number of non-zero kernel elements when weights use sparse representation.
240 size_t num_nonzero_values;
241 // Total number of non-zero kernel blocks when weights use sparse representation.
242 size_t num_nonzero_blocks;
243 // Total number of output channel blocks when weights use sparse representation.
244 size_t num_output_channel_blocks;
245 // Input channel corresponding to the first non-zero kernel element.
246 size_t first_input_channel;
247
248 float input_scale;
249 float output_scale;
Marat Dukhan54e95a02020-08-06 23:55:13 -0700250 int32_t input_zero_point;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700251 uint8_t output_zero_point;
252 uint8_t output_min;
253 uint8_t output_max;
254
255 size_t valid_batch_size;
256 size_t last_input_height;
257 size_t last_input_width;
258 const void* last_input;
Marat Dukhan69722492019-11-11 19:55:50 -0800259 size_t last_output_height;
260 size_t last_output_width;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700261 void* last_output;
262
263 void* zero_buffer;
264 void* lookup_table;
265 void* pixelwise_buffer;
266 struct subconvolution_params* subconvolution_buffer;
Marat Dukhan8440fde2019-10-24 12:46:13 -0700267 uint32_t flags;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700268
269 union {
Marat Dukhan5020b962020-06-08 13:30:10 -0700270 union xnn_f32_abs_params f32_abs;
Marat Dukhan28813332020-06-10 18:05:38 -0700271 union xnn_f32_lrelu_params f32_lrelu;
Marat Dukhan5020b962020-06-08 13:30:10 -0700272 union xnn_f32_neg_params f32_neg;
Marat Dukhan64e52512020-06-09 13:41:16 -0700273 union xnn_f32_rnd_params f32_rnd;
Marat Dukhan5868d802020-03-19 17:18:45 -0700274 // Parameters for Global Average Pooling in CHW layout
Marat Dukhanc3065f52020-06-04 13:33:32 -0700275 union xnn_f32_gavgpool_params f32_gavgpool;
Frank Barcharda96948e2020-09-11 15:34:18 -0700276 struct xnn_f16_hswish_params f16_hswish;
Marat Dukhanc3065f52020-06-04 13:33:32 -0700277 union xnn_f32_hswish_params f32_hswish;
Frank Barchard01898c02020-06-23 21:49:50 -0700278 struct {
279 struct xnn_f16_minmax_params f16_minmax;
280 struct xnn_f16_scaleminmax_params f16_scaleminmax;
281 };
Marat Dukhan8452ff52020-04-08 20:44:58 -0700282 // Pixelwise Average Pooling normally use f32_minmax_params, but also initialize
283 // f32_scaleminmax_params in case it needs to switch to Global Average Pooling operation.
Marat Dukhan5868d802020-03-19 17:18:45 -0700284 struct {
Marat Dukhanc3065f52020-06-04 13:33:32 -0700285 union xnn_f32_minmax_params f32_minmax;
286 union xnn_f32_scaleminmax_params f32_scaleminmax;
Marat Dukhan5868d802020-03-19 17:18:45 -0700287 };
Marat Dukhanc3065f52020-06-04 13:33:32 -0700288 union xnn_f32_chw_params f32_chw;
Marat Dukhan16f1e1a2020-08-04 16:38:22 -0700289 union xnn_qs8_gemm_params qs8_gemm;
Marat Dukhan9e0b5392020-08-07 02:29:34 -0700290 // Average Pooling normally use qs8_avgpool_params, but also initialize qs8_gavgpool_params in case it needs to switch
291 // to Global Average Pooling operation.
292 struct {
293 union xnn_qs8_avgpool_params qs8_avgpool;
294 union xnn_qs8_avgpool_params qs8_gavgpool;
295 };
Marat Dukhanff209482020-09-03 14:26:53 -0700296 // Quantized Add parameters are sensitive to order of inputs, so we initialize an extra copy with the reversed order.
297 struct {
298 union xnn_qs8_add_params qs8_add;
299 union xnn_qs8_add_params qs8_radd;
300 };
Marat Dukhan08b7a972020-07-14 18:17:29 -0700301 union xnn_qu8_add_params qu8_add;
302 union xnn_qu8_gemm_params qu8_gemm;
303 // Average Pooling normally use qu8_avgpool_params, but also initialize qu8_gavgpool_params in case it needs to switch
Marat Dukhan5868d802020-03-19 17:18:45 -0700304 // to Global Average Pooling operation.
305 struct {
Marat Dukhan08b7a972020-07-14 18:17:29 -0700306 union xnn_qu8_avgpool_params qu8_avgpool;
307 union xnn_qu8_avgpool_params qu8_gavgpool;
Marat Dukhan5868d802020-03-19 17:18:45 -0700308 };
Marat Dukhanc3065f52020-06-04 13:33:32 -0700309 union xnn_u8_minmax_params u8_minmax;
310 } params;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700311 enum xnn_operator_type type;
312 struct xnn_ukernel ukernel;
313
314 struct compute_parameters compute;
315 struct compute_parameters compute2;
316 union {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700317 struct argmax_pooling_context argmax_pooling;
318 struct average_pooling_context average_pooling;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700319 struct channel_shuffle_context channel_shuffle;
Marat Dukhan1f29b802020-05-15 23:46:39 -0700320 struct conv2d_context conv2d;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700321 struct dwconv2d_context dwconv2d;
322 struct dwconv_context dwconv;
Marat Dukhanca2733c2019-11-15 23:21:17 -0800323 struct elementwise_binary_context elementwise_binary;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700324 struct gemm_context gemm;
Marat Dukhanefc47b82019-11-18 09:25:38 -0800325 struct global_average_pooling_nwc_context global_average_pooling_nwc;
326 struct global_average_pooling_ncw_context global_average_pooling_ncw;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700327 struct igemm_context igemm;
328 struct lut_contiguous_context lut_contiguous;
329 struct lut_strided_context lut_strided;
330 struct max_pooling_context max_pooling;
Marat Dukhan4662b192020-05-21 15:52:03 -0700331 struct pad_context pad;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700332 struct pixelwise_average_pooling_context pixelwise_average_pooling;
333 struct prelu_context prelu;
Marat Dukhan69722492019-11-11 19:55:50 -0800334 struct resize_bilinear_context resize_bilinear;
Artsiom Ablavatski97918102020-10-27 15:52:59 -0700335 struct resize_bilinear_chw_context resize_bilinear_chw;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700336 struct spmm_context spmm;
337 struct subconv_context subconv;
Marat Dukhan29954272020-02-13 17:56:11 -0800338 struct subgemm_context subgemm;
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800339 struct f32_three_pass_softmax_context f32_three_pass_softmax;
340 struct u8_softmax_context u8_softmax;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700341 struct univector_contiguous_context univector_contiguous;
342 struct univector_strided_context univector_strided;
343 struct unpooling_context unpooling;
344 struct vmulcaddc_context vmulcaddc;
345 } context;
346
347 enum xnn_run_state state;
Frank Barchard62c5e232020-07-21 17:42:19 -0700348};