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gerrit-public.fairphone.software / platform / external / XNNPACK / a6eb1e59f5decc8171a1f5cad077a65866dfa44d / . / CMakeLists.txt
blob: 0f928f214722e69a5534ae344125ee9014f38ed9 [file] [log] [blame]
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]1
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2# Copyright (c) Facebook, Inc. and its affiliates.
3# All rights reserved.
4#
5# Copyright 2019 Google LLC
6#
7# This source code is licensed under the BSD-style license found in the
8# LICENSE file in the root directory of this source tree.
9
10CMAKE_MINIMUM_REQUIRED(VERSION 3.5 FATAL_ERROR)
11
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]12# ---[ Project and semantic versioning.
13PROJECT(XNNPACK C CXX ASM)
14
15# ---[ Options.
16SET(XNNPACK_LIBRARY_TYPE "default" CACHE STRING "Type of library (shared, static, or default) to build")
17SET_PROPERTY(CACHE XNNPACK_LIBRARY_TYPE PROPERTY STRINGS default static shared)
Marat Dukhanefc184a2020-02-13 09:47:01 -0800[diff] [blame]18OPTION(XNNPACK_ENABLE_ASSEMBLY "Build XNNPACK with assembly micro-kernels" ON)
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]19OPTION(XNNPACK_ENABLE_MEMOPT "Build XNNPACK with optimized memory allocation scheme" ON)
Marat Dukhanb36582b2020-12-08 11:16:28 -0800[diff] [blame]20OPTION(XNNPACK_ENABLE_SPARSE "Build XNNPACK with graph rewriting for sparse inference" ON)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]21OPTION(XNNPACK_BUILD_TESTS "Build XNNPACK unit tests" ON)
22OPTION(XNNPACK_BUILD_BENCHMARKS "Build XNNPACK benchmarks" ON)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]23OPTION(XNNPACK_USE_SYSTEM_LIBS "Use system-provided dependency libraries" OFF)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]24
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]25# --- [ Determine target processor
26SET(XNNPACK_TARGET_PROCESSOR "${CMAKE_SYSTEM_PROCESSOR}")
Chester Liu25bab072020-12-24 17:07:10 +0800[diff] [blame]27IF(CMAKE_SYSTEM_NAME STREQUAL "Darwin" AND CMAKE_OSX_ARCHITECTURES MATCHES "^(x86_64|arm64|arm64e)$")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]28 SET(XNNPACK_TARGET_PROCESSOR "${CMAKE_OSX_ARCHITECTURES}")
29ENDIF()
30
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]31# ---[ CMake options
Marat Dukhanbcbae1e2020-04-13 10:54:18 -0700[diff] [blame]32INCLUDE(GNUInstallDirs)
33
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]34IF(XNNPACK_BUILD_TESTS)
35 ENABLE_TESTING()
36ENDIF()
37
Marat Dukhanefc184a2020-02-13 09:47:01 -0800[diff] [blame]38IF(XNNPACK_ENABLE_ASSEMBLY)
39 ADD_DEFINITIONS(-DXNN_ENABLE_ASSEMBLY=1)
40ELSE()
41 ADD_DEFINITIONS(-DXNN_ENABLE_ASSEMBLY=0)
42ENDIF()
43
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]44IF(XNNPACK_ENABLE_MEMOPT)
45 ADD_DEFINITIONS(-DXNN_ENABLE_MEMOPT=1)
46ELSE()
47 ADD_DEFINITIONS(-DXNN_ENABLE_MEMOPT=0)
48ENDIF()
49
Marat Dukhanb36582b2020-12-08 11:16:28 -0800[diff] [blame]50IF(XNNPACK_ENABLE_SPARSE)
51 ADD_DEFINITIONS(-DXNN_ENABLE_SPARSE=1)
52ELSE()
53 ADD_DEFINITIONS(-DXNN_ENABLE_SPARSE=0)
54ENDIF()
55
Marat Dukhan8a9be592020-05-09 21:49:19 -0700[diff] [blame]56IF(CMAKE_C_COMPILER_ID STREQUAL "MSVC")
Marat Dukhan1b555e02020-04-14 22:40:29 -0700[diff] [blame]57 # Disable "unary minus operator applied to unsigned type, result still unsigned" warning
58 ADD_COMPILE_OPTIONS("/wd4146")
59ENDIF()
60
Marat Dukhan8a9be592020-05-09 21:49:19 -0700[diff] [blame]61IF(CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
62 # Disable "note: parameter passing for argument of type ... changed/will change in ..."
63 ADD_COMPILE_OPTIONS("-Wno-psabi")
64ENDIF()
65
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]66# ---[ Build flags
67IF(NOT CMAKE_SYSTEM_PROCESSOR)
68 IF(IOS)
69 LIST(LENGTH IOS_ARCH IOS_ARCH_COUNT)
70 IF(IOS_ARCH_COUNT GREATER 1)
71 MESSAGE(FATAL_ERROR "Unsupported XNNPACK build with multiple iOS architectures (${IOS_ARCH}). "
72 "Specify a single architecture in IOS_ARCH and re-configure. ")
73 ENDIF()
Yasuhiro Matsumoto462be052020-02-29 13:41:14 +0900[diff] [blame]74 IF(NOT IOS_ARCH MATCHES "^(i386|x86_64|AMD64|armv7.*|arm64.*)$")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]75 MESSAGE(FATAL_ERROR "Unrecognized IOS_ARCH = ${IOS_ARCH}")
76 ENDIF()
77 ELSE()
78 MESSAGE(FATAL_ERROR "CMAKE_SYSTEM_PROCESSOR is not defined")
79 ENDIF()
Marat Dukhane3cb19b2021-05-07 03:38:49 -0700[diff] [blame]80ELSEIF(NOT XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86|x86_64|AMD64|armv[5-8].*|aarch64|arm64.*|riscv(32|64|128))$")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]81 MESSAGE(FATAL_ERROR "Unrecognized XNNPACK_TARGET_PROCESSOR = ${XNNPACK_TARGET_PROCESSOR}")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]82ENDIF()
83
84IF(NOT CMAKE_SYSTEM_NAME)
85 MESSAGE(FATAL_ERROR "CMAKE_SYSTEM_NAME not defined")
Marat Dukhan78583c72020-04-26 22:00:43 -0700[diff] [blame]86ELSEIF(NOT CMAKE_SYSTEM_NAME MATCHES "^(Darwin|Linux|Android|Windows|CYGWIN|MSYS)$")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]87 MESSAGE(FATAL_ERROR "Unrecognized CMAKE_SYSTEM_NAME = ${CMAKE_SYSTEM_NAME}")
88ENDIF()
89
90# ---[ Download deps
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]91IF(NOT XNNPACK_USE_SYSTEM_LIBS)
92 IF(NOT DEFINED CLOG_SOURCE_DIR)
93 MESSAGE(STATUS "Downloading clog to ${CMAKE_BINARY_DIR}/clog-source (define CLOG_SOURCE_DIR to avoid it)")
94 CONFIGURE_FILE(cmake/DownloadCLog.cmake "${CMAKE_BINARY_DIR}/clog-download/CMakeLists.txt")
95 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
96 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/clog-download")
97 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
98 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/clog-download")
99 SET(CLOG_SOURCE_DIR "${CMAKE_BINARY_DIR}/clog-source" CACHE STRING "clog source directory")
100 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]101
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]102 IF(NOT DEFINED CPUINFO_SOURCE_DIR)
103 MESSAGE(STATUS "Downloading cpuinfo to ${CMAKE_BINARY_DIR}/cpuinfo-source (define CPUINFO_SOURCE_DIR to avoid it)")
104 CONFIGURE_FILE(cmake/DownloadCpuinfo.cmake "${CMAKE_BINARY_DIR}/cpuinfo-download/CMakeLists.txt")
105 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
106 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/cpuinfo-download")
107 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
108 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/cpuinfo-download")
109 SET(CPUINFO_SOURCE_DIR "${CMAKE_BINARY_DIR}/cpuinfo-source" CACHE STRING "cpuinfo source directory")
110 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]111
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]112 IF(NOT DEFINED FP16_SOURCE_DIR)
113 MESSAGE(STATUS "Downloading FP16 to ${CMAKE_BINARY_DIR}/FP16-source (define FP16_SOURCE_DIR to avoid it)")
114 CONFIGURE_FILE(cmake/DownloadFP16.cmake "${CMAKE_BINARY_DIR}/FP16-download/CMakeLists.txt")
115 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
116 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FP16-download")
117 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
118 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FP16-download")
119 SET(FP16_SOURCE_DIR "${CMAKE_BINARY_DIR}/FP16-source" CACHE STRING "FP16 source directory")
120 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]121
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]122 IF(NOT DEFINED FXDIV_SOURCE_DIR)
123 MESSAGE(STATUS "Downloading FXdiv to ${CMAKE_BINARY_DIR}/FXdiv-source (define FXDIV_SOURCE_DIR to avoid it)")
124 CONFIGURE_FILE(cmake/DownloadFXdiv.cmake "${CMAKE_BINARY_DIR}/FXdiv-download/CMakeLists.txt")
125 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
126 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FXdiv-download")
127 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
128 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FXdiv-download")
129 SET(FXDIV_SOURCE_DIR "${CMAKE_BINARY_DIR}/FXdiv-source" CACHE STRING "FXdiv source directory")
130 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]131
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]132 IF(NOT DEFINED PTHREADPOOL_SOURCE_DIR)
133 MESSAGE(STATUS "Downloading pthreadpool to ${CMAKE_BINARY_DIR}/pthreadpool-source (define PTHREADPOOL_SOURCE_DIR to avoid it)")
134 CONFIGURE_FILE(cmake/DownloadPThreadPool.cmake "${CMAKE_BINARY_DIR}/pthreadpool-download/CMakeLists.txt")
135 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
136 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/pthreadpool-download")
137 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
138 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/pthreadpool-download")
139 SET(PTHREADPOOL_SOURCE_DIR "${CMAKE_BINARY_DIR}/pthreadpool-source" CACHE STRING "pthreadpool source directory")
140 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]141
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]142 IF(XNNPACK_BUILD_TESTS AND NOT DEFINED GOOGLETEST_SOURCE_DIR)
143 MESSAGE(STATUS "Downloading Google Test to ${CMAKE_BINARY_DIR}/googletest-source (define GOOGLETEST_SOURCE_DIR to avoid it)")
144 CONFIGURE_FILE(cmake/DownloadGoogleTest.cmake "${CMAKE_BINARY_DIR}/googletest-download/CMakeLists.txt")
145 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
146 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googletest-download")
147 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
148 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googletest-download")
149 SET(GOOGLETEST_SOURCE_DIR "${CMAKE_BINARY_DIR}/googletest-source" CACHE STRING "Google Test source directory")
150 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]151
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]152 IF(XNNPACK_BUILD_BENCHMARKS AND NOT DEFINED GOOGLEBENCHMARK_SOURCE_DIR)
153 MESSAGE(STATUS "Downloading Google Benchmark to ${CMAKE_BINARY_DIR}/googlebenchmark-source (define GOOGLEBENCHMARK_SOURCE_DIR to avoid it)")
154 CONFIGURE_FILE(cmake/DownloadGoogleBenchmark.cmake "${CMAKE_BINARY_DIR}/googlebenchmark-download/CMakeLists.txt")
155 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
156 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googlebenchmark-download")
157 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
158 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googlebenchmark-download")
159 SET(GOOGLEBENCHMARK_SOURCE_DIR "${CMAKE_BINARY_DIR}/googlebenchmark-source" CACHE STRING "Google Benchmark source directory")
160 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]161ENDIF()
162
163# ---[ XNNPACK library
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]164SET(OPERATOR_SRCS
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]165 src/operators/argmax-pooling-nhwc.c
166 src/operators/average-pooling-nhwc.c
167 src/operators/binary-elementwise-nd.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]168 src/operators/channel-shuffle-nc.c
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]169 src/operators/constant-pad-nd.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]170 src/operators/convolution-nchw.c
171 src/operators/convolution-nhwc.c
172 src/operators/deconvolution-nhwc.c
Marat Dukhan13b68f22020-11-12 11:55:19 -0800[diff] [blame]173 src/operators/depth-to-space-nchw2nhwc.c
Marat Dukhan0e521172020-11-25 13:10:04 -0800[diff] [blame]174 src/operators/depth-to-space-nhwc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]175 src/operators/fully-connected-nc.c
176 src/operators/global-average-pooling-ncw.c
177 src/operators/global-average-pooling-nwc.c
Marat Dukhanf6c991e2021-09-09 01:10:40 -0700[diff] [blame]178 src/operators/lut-elementwise-nc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]179 src/operators/max-pooling-nhwc.c
180 src/operators/prelu-nc.c
Artsiom Ablavatski97918102020-10-27 15:52:59 -0700[diff] [blame]181 src/operators/resize-bilinear-nchw.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]182 src/operators/resize-bilinear-nhwc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]183 src/operators/softmax-nc.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]184 src/operators/unary-elementwise-nc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]185 src/operators/unpooling-nhwc.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]186
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]187SET(SUBGRAPH_SRCS
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]188 src/subgraph/abs.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]189 src/subgraph/add2.c
190 src/subgraph/argmax-pooling-2d.c
191 src/subgraph/average-pooling-2d.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]192 src/subgraph/bankers-rounding.c
Im Sunghoonea2088b2020-06-15 03:17:07 +0900[diff] [blame]193 src/subgraph/ceiling.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]194 src/subgraph/clamp.c
195 src/subgraph/convolution-2d.c
196 src/subgraph/deconvolution-2d.c
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -0800[diff] [blame]197 src/subgraph/depth-to-space.c
Frank Barchard9cef5ea2020-11-18 14:52:08 -0800[diff] [blame]198 src/subgraph/depthwise-convolution-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]199 src/subgraph/divide.c
Marat Dukhana1600202020-12-01 22:17:16 -0800[diff] [blame]200 src/subgraph/elu.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]201 src/subgraph/floor.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]202 src/subgraph/fully-connected.c
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]203 src/subgraph/global-average-pooling-2d.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]204 src/subgraph/hardswish.c
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]205 src/subgraph/leaky-relu.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]206 src/subgraph/max-pooling-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]207 src/subgraph/maximum2.c
208 src/subgraph/minimum2.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]209 src/subgraph/multiply2.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]210 src/subgraph/negate.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]211 src/subgraph/prelu.c
212 src/subgraph/sigmoid.c
213 src/subgraph/softmax.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]214 src/subgraph/square-root.c
215 src/subgraph/square.c
216 src/subgraph/squared-difference.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]217 src/subgraph/static-constant-pad.c
Marat Dukhand27202d2020-07-09 23:43:40 -0700[diff] [blame]218 src/subgraph/static-reshape.c
Marat Dukhanaff24e22020-07-23 01:43:58 -0700[diff] [blame]219 src/subgraph/static-resize-bilinear-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]220 src/subgraph/subtract.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]221 src/subgraph/unpooling-2d.c)
222
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]223SET(LOGGING_SRCS
Marat Dukhanccd3a1d2021-03-29 16:03:12 -0700[diff] [blame]224 src/datatype-strings.c
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]225 src/operator-strings.c
226 src/subgraph-strings.c)
227
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]228SET(COLD_SRCS ${OPERATOR_SRCS} ${SUBGRAPH_SRCS} ${LOGGING_SRCS})
229LIST(APPEND COLD_SRCS
Marat Dukhan496389f2021-04-07 15:47:12 -0700[diff] [blame]230 src/allocator.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]231 src/init.c
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]232 src/memory-planner.c
Marat Dukhan98ca6352020-02-03 12:53:02 -0800[diff] [blame]233 src/operator-delete.c
234 src/runtime.c
235 src/subgraph.c
236 src/tensor.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]237
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]238SET(HOT_SRCS
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]239 src/indirection.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]240 src/operator-run.c
241 src/packing.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]242
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]243SET(TABLE_SRCS
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]244 src/tables/exp2-k-over-64.c
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700[diff] [blame]245 src/tables/exp2-k-over-2048.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]246 src/tables/exp2minus-k-over-4.c
247 src/tables/exp2minus-k-over-8.c
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]248 src/tables/exp2minus-k-over-16.c
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700[diff] [blame]249 src/tables/exp2minus-k-over-64.c
250 src/tables/exp2minus-k-over-2048.c)
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]251
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]252SET(PROD_SCALAR_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]253 src/f16-f32-vcvt/gen/vcvt-scalar-float-x1.c
254 src/f16-f32-vcvt/gen/vcvt-scalar-float-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]255 src/f32-argmaxpool/4x-scalar-c1.c
256 src/f32-argmaxpool/9p8x-scalar-c1.c
257 src/f32-argmaxpool/9x-scalar-c1.c
258 src/f32-avgpool/9p8x-minmax-scalar-c1.c
259 src/f32-avgpool/9x-minmax-scalar-c1.c
260 src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c
261 src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c
262 src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]263 src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]264 src/f32-dwconv/gen/up1x3-scalar-acc2.c
Frank Barchard66ae2572021-11-02 17:36:21 -0700[diff] [blame]265 src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]266 src/f32-dwconv/gen/up1x4-scalar-acc2.c
267 src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c
268 src/f32-dwconv/gen/up1x9-scalar-acc2.c
269 src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c
270 src/f32-dwconv/gen/up1x25-scalar-acc2.c
271 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c
272 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c
273 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c
274 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c
275 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c
276 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c
277 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c
278 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c
279 src/f32-gavgpool-cw/scalar-x1.c
280 src/f32-gavgpool/7p7x-minmax-scalar-c1.c
281 src/f32-gavgpool/7x-minmax-scalar-c1.c
282 src/f32-gemm/gen/1x4-minmax-scalar.c
283 src/f32-gemm/gen/1x4-relu-scalar.c
284 src/f32-gemm/gen/1x4-scalar.c
285 src/f32-gemm/gen/2x4-minmax-scalar.c
286 src/f32-gemm/gen/2x4-relu-scalar.c
287 src/f32-gemm/gen/2x4-scalar.c
288 src/f32-gemm/gen/4x2-minmax-scalar.c
289 src/f32-gemm/gen/4x2-relu-scalar.c
290 src/f32-gemm/gen/4x2-scalar.c
291 src/f32-gemm/gen/4x4-minmax-scalar.c
292 src/f32-gemm/gen/4x4-relu-scalar.c
293 src/f32-gemm/gen/4x4-scalar.c
294 src/f32-ibilinear-chw/gen/scalar-p4.c
295 src/f32-ibilinear/gen/scalar-c2.c
296 src/f32-igemm/gen/1x4-minmax-scalar.c
297 src/f32-igemm/gen/1x4-relu-scalar.c
298 src/f32-igemm/gen/1x4-scalar.c
299 src/f32-igemm/gen/2x4-minmax-scalar.c
300 src/f32-igemm/gen/2x4-relu-scalar.c
301 src/f32-igemm/gen/2x4-scalar.c
302 src/f32-igemm/gen/4x2-minmax-scalar.c
303 src/f32-igemm/gen/4x2-relu-scalar.c
304 src/f32-igemm/gen/4x2-scalar.c
305 src/f32-igemm/gen/4x4-minmax-scalar.c
306 src/f32-igemm/gen/4x4-relu-scalar.c
307 src/f32-igemm/gen/4x4-scalar.c
308 src/f32-maxpool/9p8x-minmax-scalar-c1.c
309 src/f32-pavgpool/9p8x-minmax-scalar-c1.c
310 src/f32-pavgpool/9x-minmax-scalar-c1.c
311 src/f32-prelu/gen/scalar-2x4.c
312 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c
313 src/f32-rmax/scalar.c
314 src/f32-spmm/gen/8x1-minmax-scalar.c
315 src/f32-spmm/gen/8x2-minmax-scalar.c
316 src/f32-spmm/gen/8x4-minmax-scalar.c
317 src/f32-vbinary/gen/vadd-minmax-scalar-x8.c
318 src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c
319 src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c
320 src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c
321 src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c
322 src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c
323 src/f32-vbinary/gen/vmax-scalar-x8.c
324 src/f32-vbinary/gen/vmaxc-scalar-x8.c
325 src/f32-vbinary/gen/vmin-scalar-x8.c
326 src/f32-vbinary/gen/vminc-scalar-x8.c
327 src/f32-vbinary/gen/vmul-minmax-scalar-x8.c
328 src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c
329 src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c
330 src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c
331 src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c
332 src/f32-vbinary/gen/vsqrdiff-scalar-x8.c
333 src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c
334 src/f32-vbinary/gen/vsub-minmax-scalar-x8.c
335 src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c
336 src/f32-vclamp/gen/vclamp-scalar-x4.c
337 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c
338 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c
339 src/f32-vhswish/gen/vhswish-scalar-x4.c
340 src/f32-vlrelu/gen/vlrelu-scalar-x4.c
341 src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c
342 src/f32-vrelu/gen/vrelu-scalar-x8.c
343 src/f32-vrnd/gen/vrndd-scalar-libm-x1.c
344 src/f32-vrnd/gen/vrndd-scalar-libm-x4.c
345 src/f32-vrnd/gen/vrndne-scalar-libm-x1.c
346 src/f32-vrnd/gen/vrndne-scalar-libm-x4.c
347 src/f32-vrnd/gen/vrndu-scalar-libm-x1.c
348 src/f32-vrnd/gen/vrndu-scalar-libm-x4.c
349 src/f32-vrnd/gen/vrndz-scalar-libm-x1.c
350 src/f32-vrnd/gen/vrndz-scalar-libm-x4.c
351 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c
352 src/f32-vsqrt/gen/scalar-sqrt-x1.c
353 src/f32-vunary/gen/vabs-scalar-x4.c
354 src/f32-vunary/gen/vneg-scalar-x4.c
355 src/f32-vunary/gen/vsqr-scalar-x4.c
356 src/params-init.c
357 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
358 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
359 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
360 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
361 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
362 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
363 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
364 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
365 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
366 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]367 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
368 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]369 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
370 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
371 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c
372 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c
373 src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c
374 src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c
375 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
376 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
377 src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c
378 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
379 src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c
380 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
381 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
382 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
383 src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c
384 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
385 src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c
386 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]387 src/qs8-vadd/gen/minmax-scalar-x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]388 src/qs8-vadd/gen/minmax-scalar-x4.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]389 src/qs8-vaddc/gen/minmax-scalar-x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]390 src/qs8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]391 src/qs8-vmul/gen/minmax-fp32-scalar-x4.c
392 src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]393 src/qu8-avgpool/9p8x-minmax-scalar-c1.c
394 src/qu8-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]395 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]396 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]397 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]398 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
399 src/qu8-gavgpool/7p7x-minmax-scalar-c1.c
400 src/qu8-gavgpool/7x-minmax-scalar-c1.c
401 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
402 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
403 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
404 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
405 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
406 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
407 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
408 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
409 src/qu8-vadd/gen/minmax-scalar-x1.c
410 src/qu8-vadd/gen/minmax-scalar-x4.c
411 src/qu8-vaddc/gen/minmax-scalar-x1.c
412 src/qu8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]413 src/qu8-vmul/gen/minmax-fp32-scalar-x4.c
414 src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]415 src/s8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]416 src/s8-vclamp/scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]417 src/u8-lut32norm/scalar.c
418 src/u8-maxpool/9p8x-minmax-scalar-c1.c
419 src/u8-rmax/scalar.c
420 src/u8-vclamp/scalar-x4.c
Marat Dukhan548542c2021-09-09 14:15:51 -0700[diff] [blame]421 src/x8-lut/gen/lut-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]422 src/x8-zip/x2-scalar.c
423 src/x8-zip/x3-scalar.c
424 src/x8-zip/x4-scalar.c
425 src/x8-zip/xm-scalar.c
426 src/x32-depthtospace2d-chw2hwc/scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]427 src/x32-packx/x2-scalar.c
428 src/x32-packx/x3-scalar.c
429 src/x32-packx/x4-scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]430 src/x32-unpool/scalar.c
431 src/x32-zip/x2-scalar.c
432 src/x32-zip/x3-scalar.c
433 src/x32-zip/x4-scalar.c
434 src/x32-zip/xm-scalar.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]435 src/xx-copy/memcpy.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]436 src/xx-fill/scalar-x16.c
437 src/xx-pad/scalar.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]438
439SET(ALL_SCALAR_MICROKERNEL_SRCS
Marat Dukhane2c00012021-10-17 22:02:35 -0700[diff] [blame]440 src/f16-f32-vcvt/gen/vcvt-scalar-float-x1.c
441 src/f16-f32-vcvt/gen/vcvt-scalar-float-x2.c
442 src/f16-f32-vcvt/gen/vcvt-scalar-float-x3.c
443 src/f16-f32-vcvt/gen/vcvt-scalar-float-x4.c
Ashkan Aliabadif866a452019-11-20 10:58:51 -0800[diff] [blame]444 src/f32-argmaxpool/4x-scalar-c1.c
445 src/f32-argmaxpool/9p8x-scalar-c1.c
446 src/f32-argmaxpool/9x-scalar-c1.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]447 src/f32-avgpool/9p8x-minmax-scalar-c1.c
448 src/f32-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]449 src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]450 src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]451 src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]452 src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c
453 src/f32-dwconv/gen/up1x3-minmax-scalar.c
454 src/f32-dwconv/gen/up1x3-scalar-acc2.c
455 src/f32-dwconv/gen/up1x3-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]456 src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]457 src/f32-dwconv/gen/up1x4-minmax-scalar.c
458 src/f32-dwconv/gen/up1x4-scalar-acc2.c
459 src/f32-dwconv/gen/up1x4-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]460 src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]461 src/f32-dwconv/gen/up1x9-minmax-scalar.c
462 src/f32-dwconv/gen/up1x9-scalar-acc2.c
463 src/f32-dwconv/gen/up1x9-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]464 src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]465 src/f32-dwconv/gen/up1x25-minmax-scalar.c
466 src/f32-dwconv/gen/up1x25-scalar-acc2.c
467 src/f32-dwconv/gen/up1x25-scalar.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]468 src/f32-dwconv/gen/up2x3-minmax-scalar-acc2.c
469 src/f32-dwconv/gen/up2x3-minmax-scalar.c
470 src/f32-dwconv/gen/up2x3-scalar-acc2.c
471 src/f32-dwconv/gen/up2x3-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]472 src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]473 src/f32-dwconv/gen/up2x4-minmax-scalar.c
474 src/f32-dwconv/gen/up2x4-scalar-acc2.c
475 src/f32-dwconv/gen/up2x4-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]476 src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]477 src/f32-dwconv/gen/up2x9-minmax-scalar.c
478 src/f32-dwconv/gen/up2x9-scalar-acc2.c
479 src/f32-dwconv/gen/up2x9-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]480 src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]481 src/f32-dwconv/gen/up2x25-minmax-scalar.c
482 src/f32-dwconv/gen/up2x25-scalar-acc2.c
483 src/f32-dwconv/gen/up2x25-scalar.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]484 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c
485 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c
486 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c
Marat Dukhan91249d22020-10-24 12:02:51 -0700[diff] [blame]487 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]488 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c
Marat Dukhan91249d22020-10-24 12:02:51 -0700[diff] [blame]489 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c
490 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c
491 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c
492 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c
493 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700[diff] [blame]494 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c
495 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c
496 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]497 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700[diff] [blame]498 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]499 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c
500 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c
501 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]502 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c
503 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c
504 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c
505 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]506 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]507 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c
508 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]509 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]510 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]511 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c
Marat Dukhan29c0c332020-10-28 22:11:00 -0700[diff] [blame]512 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c
513 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c
514 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c
515 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c
516 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c
517 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c
518 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c
519 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c
520 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c
521 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]522 src/f32-gavgpool-cw/scalar-x1.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]523 src/f32-gavgpool/7p7x-minmax-scalar-c1.c
524 src/f32-gavgpool/7x-minmax-scalar-c1.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]525 src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c
526 src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c
527 src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]528 src/f32-gemm/gen/1x4-minmax-scalar.c
529 src/f32-gemm/gen/1x4-relu-scalar.c
530 src/f32-gemm/gen/1x4-scalar.c
531 src/f32-gemm/gen/2x4-minmax-scalar.c
532 src/f32-gemm/gen/2x4-relu-scalar.c
533 src/f32-gemm/gen/2x4-scalar.c
534 src/f32-gemm/gen/4x2-minmax-scalar.c
535 src/f32-gemm/gen/4x2-relu-scalar.c
536 src/f32-gemm/gen/4x2-scalar.c
537 src/f32-gemm/gen/4x4-minmax-scalar.c
538 src/f32-gemm/gen/4x4-relu-scalar.c
539 src/f32-gemm/gen/4x4-scalar.c
Marat Dukhan9f426b42020-10-21 11:18:35 -0700[diff] [blame]540 src/f32-ibilinear-chw/gen/scalar-p1.c
541 src/f32-ibilinear-chw/gen/scalar-p2.c
542 src/f32-ibilinear-chw/gen/scalar-p4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]543 src/f32-ibilinear/gen/scalar-c1.c
544 src/f32-ibilinear/gen/scalar-c2.c
545 src/f32-ibilinear/gen/scalar-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]546 src/f32-igemm/gen/1x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]547 src/f32-igemm/gen/1x4-relu-scalar.c
548 src/f32-igemm/gen/1x4-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]549 src/f32-igemm/gen/2x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]550 src/f32-igemm/gen/2x4-relu-scalar.c
551 src/f32-igemm/gen/2x4-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]552 src/f32-igemm/gen/4x2-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]553 src/f32-igemm/gen/4x2-relu-scalar.c
554 src/f32-igemm/gen/4x2-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]555 src/f32-igemm/gen/4x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]556 src/f32-igemm/gen/4x4-relu-scalar.c
557 src/f32-igemm/gen/4x4-scalar.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]558 src/f32-maxpool/9p8x-minmax-scalar-c1.c
559 src/f32-pavgpool/9p8x-minmax-scalar-c1.c
560 src/f32-pavgpool/9x-minmax-scalar-c1.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]561 src/f32-ppmm/gen/2x4-minmax-scalar.c
562 src/f32-ppmm/gen/3x3-minmax-scalar.c
563 src/f32-ppmm/gen/4x2-minmax-scalar.c
564 src/f32-ppmm/gen/4x4-minmax-scalar.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]565 src/f32-prelu/gen/scalar-2x1.c
566 src/f32-prelu/gen/scalar-2x4.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]567 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]568 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]569 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]570 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c
571 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]572 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]573 src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]574 src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]575 src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]576 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c
577 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]578 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]579 src/f32-rmax/scalar.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]580 src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c
581 src/f32-spmm/gen/1x1-minmax-scalar.c
582 src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c
583 src/f32-spmm/gen/2x1-minmax-scalar.c
584 src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c
585 src/f32-spmm/gen/4x1-minmax-scalar.c
586 src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c
587 src/f32-spmm/gen/8x1-minmax-scalar.c
588 src/f32-spmm/gen/8x2-minmax-scalar.c
589 src/f32-spmm/gen/8x4-minmax-scalar.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]590 src/f32-vbinary/gen/vadd-minmax-scalar-x1.c
591 src/f32-vbinary/gen/vadd-minmax-scalar-x2.c
592 src/f32-vbinary/gen/vadd-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]593 src/f32-vbinary/gen/vadd-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]594 src/f32-vbinary/gen/vadd-relu-scalar-x1.c
595 src/f32-vbinary/gen/vadd-relu-scalar-x2.c
596 src/f32-vbinary/gen/vadd-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]597 src/f32-vbinary/gen/vadd-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]598 src/f32-vbinary/gen/vadd-scalar-x1.c
599 src/f32-vbinary/gen/vadd-scalar-x2.c
600 src/f32-vbinary/gen/vadd-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]601 src/f32-vbinary/gen/vadd-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]602 src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c
603 src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c
604 src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]605 src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]606 src/f32-vbinary/gen/vaddc-relu-scalar-x1.c
607 src/f32-vbinary/gen/vaddc-relu-scalar-x2.c
608 src/f32-vbinary/gen/vaddc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]609 src/f32-vbinary/gen/vaddc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]610 src/f32-vbinary/gen/vaddc-scalar-x1.c
611 src/f32-vbinary/gen/vaddc-scalar-x2.c
612 src/f32-vbinary/gen/vaddc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]613 src/f32-vbinary/gen/vaddc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]614 src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c
615 src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c
616 src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]617 src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]618 src/f32-vbinary/gen/vdiv-relu-scalar-x1.c
619 src/f32-vbinary/gen/vdiv-relu-scalar-x2.c
620 src/f32-vbinary/gen/vdiv-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]621 src/f32-vbinary/gen/vdiv-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]622 src/f32-vbinary/gen/vdiv-scalar-x1.c
623 src/f32-vbinary/gen/vdiv-scalar-x2.c
624 src/f32-vbinary/gen/vdiv-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]625 src/f32-vbinary/gen/vdiv-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]626 src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c
627 src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c
628 src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]629 src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]630 src/f32-vbinary/gen/vdivc-relu-scalar-x1.c
631 src/f32-vbinary/gen/vdivc-relu-scalar-x2.c
632 src/f32-vbinary/gen/vdivc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]633 src/f32-vbinary/gen/vdivc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]634 src/f32-vbinary/gen/vdivc-scalar-x1.c
635 src/f32-vbinary/gen/vdivc-scalar-x2.c
636 src/f32-vbinary/gen/vdivc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]637 src/f32-vbinary/gen/vdivc-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]638 src/f32-vbinary/gen/vmax-scalar-x1.c
639 src/f32-vbinary/gen/vmax-scalar-x2.c
640 src/f32-vbinary/gen/vmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]641 src/f32-vbinary/gen/vmax-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]642 src/f32-vbinary/gen/vmaxc-scalar-x1.c
643 src/f32-vbinary/gen/vmaxc-scalar-x2.c
644 src/f32-vbinary/gen/vmaxc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]645 src/f32-vbinary/gen/vmaxc-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]646 src/f32-vbinary/gen/vmin-scalar-x1.c
647 src/f32-vbinary/gen/vmin-scalar-x2.c
648 src/f32-vbinary/gen/vmin-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]649 src/f32-vbinary/gen/vmin-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]650 src/f32-vbinary/gen/vminc-scalar-x1.c
651 src/f32-vbinary/gen/vminc-scalar-x2.c
652 src/f32-vbinary/gen/vminc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]653 src/f32-vbinary/gen/vminc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]654 src/f32-vbinary/gen/vmul-minmax-scalar-x1.c
655 src/f32-vbinary/gen/vmul-minmax-scalar-x2.c
656 src/f32-vbinary/gen/vmul-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]657 src/f32-vbinary/gen/vmul-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]658 src/f32-vbinary/gen/vmul-relu-scalar-x1.c
659 src/f32-vbinary/gen/vmul-relu-scalar-x2.c
660 src/f32-vbinary/gen/vmul-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]661 src/f32-vbinary/gen/vmul-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]662 src/f32-vbinary/gen/vmul-scalar-x1.c
663 src/f32-vbinary/gen/vmul-scalar-x2.c
664 src/f32-vbinary/gen/vmul-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]665 src/f32-vbinary/gen/vmul-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]666 src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c
667 src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c
668 src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]669 src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]670 src/f32-vbinary/gen/vmulc-relu-scalar-x1.c
671 src/f32-vbinary/gen/vmulc-relu-scalar-x2.c
672 src/f32-vbinary/gen/vmulc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]673 src/f32-vbinary/gen/vmulc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]674 src/f32-vbinary/gen/vmulc-scalar-x1.c
675 src/f32-vbinary/gen/vmulc-scalar-x2.c
676 src/f32-vbinary/gen/vmulc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]677 src/f32-vbinary/gen/vmulc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]678 src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c
679 src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c
680 src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]681 src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]682 src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c
683 src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c
684 src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]685 src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]686 src/f32-vbinary/gen/vrdivc-scalar-x1.c
687 src/f32-vbinary/gen/vrdivc-scalar-x2.c
688 src/f32-vbinary/gen/vrdivc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]689 src/f32-vbinary/gen/vrdivc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]690 src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c
691 src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c
692 src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]693 src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]694 src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c
695 src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c
696 src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]697 src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]698 src/f32-vbinary/gen/vrsubc-scalar-x1.c
699 src/f32-vbinary/gen/vrsubc-scalar-x2.c
700 src/f32-vbinary/gen/vrsubc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]701 src/f32-vbinary/gen/vrsubc-scalar-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]702 src/f32-vbinary/gen/vsqrdiff-scalar-x1.c
703 src/f32-vbinary/gen/vsqrdiff-scalar-x2.c
704 src/f32-vbinary/gen/vsqrdiff-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]705 src/f32-vbinary/gen/vsqrdiff-scalar-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]706 src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c
707 src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c
708 src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]709 src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]710 src/f32-vbinary/gen/vsub-minmax-scalar-x1.c
711 src/f32-vbinary/gen/vsub-minmax-scalar-x2.c
712 src/f32-vbinary/gen/vsub-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]713 src/f32-vbinary/gen/vsub-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]714 src/f32-vbinary/gen/vsub-relu-scalar-x1.c
715 src/f32-vbinary/gen/vsub-relu-scalar-x2.c
716 src/f32-vbinary/gen/vsub-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]717 src/f32-vbinary/gen/vsub-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]718 src/f32-vbinary/gen/vsub-scalar-x1.c
719 src/f32-vbinary/gen/vsub-scalar-x2.c
720 src/f32-vbinary/gen/vsub-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]721 src/f32-vbinary/gen/vsub-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]722 src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c
723 src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c
724 src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]725 src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]726 src/f32-vbinary/gen/vsubc-relu-scalar-x1.c
727 src/f32-vbinary/gen/vsubc-relu-scalar-x2.c
728 src/f32-vbinary/gen/vsubc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]729 src/f32-vbinary/gen/vsubc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]730 src/f32-vbinary/gen/vsubc-scalar-x1.c
731 src/f32-vbinary/gen/vsubc-scalar-x2.c
732 src/f32-vbinary/gen/vsubc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]733 src/f32-vbinary/gen/vsubc-scalar-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]734 src/f32-vclamp/gen/vclamp-scalar-x1.c
735 src/f32-vclamp/gen/vclamp-scalar-x2.c
736 src/f32-vclamp/gen/vclamp-scalar-x4.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]737 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c
738 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c
739 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c
740 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c
741 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c
742 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c
743 src/f32-velu/gen/velu-scalar-rr2-p6-x1.c
744 src/f32-velu/gen/velu-scalar-rr2-p6-x2.c
745 src/f32-velu/gen/velu-scalar-rr2-p6-x3.c
746 src/f32-velu/gen/velu-scalar-rr2-p6-x4.c
747 src/f32-velu/gen/velu-scalar-rr2-p6-x5.c
748 src/f32-velu/gen/velu-scalar-rr2-p6-x6.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]749 src/f32-vhswish/gen/vhswish-scalar-x1.c
750 src/f32-vhswish/gen/vhswish-scalar-x2.c
751 src/f32-vhswish/gen/vhswish-scalar-x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]752 src/f32-vlrelu/gen/vlrelu-scalar-x1.c
753 src/f32-vlrelu/gen/vlrelu-scalar-x2.c
754 src/f32-vlrelu/gen/vlrelu-scalar-x4.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]755 src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c
756 src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c
757 src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]758 src/f32-vrelu/gen/vrelu-scalar-x1.c
759 src/f32-vrelu/gen/vrelu-scalar-x2.c
760 src/f32-vrelu/gen/vrelu-scalar-x4.c
761 src/f32-vrelu/gen/vrelu-scalar-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]762 src/f32-vrnd/gen/vrndd-scalar-libm-x1.c
763 src/f32-vrnd/gen/vrndd-scalar-libm-x2.c
764 src/f32-vrnd/gen/vrndd-scalar-libm-x4.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]765 src/f32-vrnd/gen/vrndne-scalar-libm-x1.c
766 src/f32-vrnd/gen/vrndne-scalar-libm-x2.c
767 src/f32-vrnd/gen/vrndne-scalar-libm-x4.c
768 src/f32-vrnd/gen/vrndu-scalar-libm-x1.c
769 src/f32-vrnd/gen/vrndu-scalar-libm-x2.c
770 src/f32-vrnd/gen/vrndu-scalar-libm-x4.c
771 src/f32-vrnd/gen/vrndz-scalar-libm-x1.c
772 src/f32-vrnd/gen/vrndz-scalar-libm-x2.c
773 src/f32-vrnd/gen/vrndz-scalar-libm-x4.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]774 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c
775 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c
776 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c
777 src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c
778 src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c
779 src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c
780 src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c
781 src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c
782 src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]783 src/f32-vsqrt/gen/scalar-sqrt-x1.c
784 src/f32-vsqrt/gen/scalar-sqrt-x2.c
785 src/f32-vsqrt/gen/scalar-sqrt-x4.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]786 src/f32-vunary/gen/vabs-scalar-x1.c
787 src/f32-vunary/gen/vabs-scalar-x2.c
788 src/f32-vunary/gen/vabs-scalar-x4.c
789 src/f32-vunary/gen/vneg-scalar-x1.c
790 src/f32-vunary/gen/vneg-scalar-x2.c
791 src/f32-vunary/gen/vneg-scalar-x4.c
792 src/f32-vunary/gen/vsqr-scalar-x1.c
793 src/f32-vunary/gen/vsqr-scalar-x2.c
794 src/f32-vunary/gen/vsqr-scalar-x4.c
Marat Dukhan46cc1e12021-11-04 21:16:49 -0700[diff] [blame]795 src/math/cvt-f32-f16-scalar.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]796 src/math/expm1minus-scalar-rr2-lut4-p4.c
797 src/math/expm1minus-scalar-rr2-lut8-p3.c
798 src/math/expm1minus-scalar-rr2-lut8-p4.c
Marat Dukhanc60742b2020-11-23 12:33:27 -0800[diff] [blame]799 src/math/expm1minus-scalar-rr2-lut16-p3.c
800 src/math/expm1minus-scalar-rr2-lut16-p4.c
801 src/math/expm1minus-scalar-rr2-p5.c
802 src/math/expm1minus-scalar-rr2-p6.c
Frank Barchard22136062020-11-24 18:44:46 -0800[diff] [blame]803 src/math/expminus-scalar-rr2-lut64-p2.c
804 src/math/expminus-scalar-rr2-lut2048-p1.c
805 src/math/expminus-scalar-rr2-p5.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]806 src/math/roundd-scalar-addsub.c
807 src/math/roundd-scalar-cvt.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]808 src/math/roundd-scalar-floor.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]809 src/math/roundne-scalar-addsub.c
810 src/math/roundne-scalar-nearbyint.c
811 src/math/roundne-scalar-rint.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]812 src/math/roundu-scalar-addsub.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]813 src/math/roundu-scalar-ceil.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]814 src/math/roundu-scalar-cvt.c
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]815 src/math/roundz-scalar-addsub.c
816 src/math/roundz-scalar-cvt.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]817 src/math/roundz-scalar-trunc.c
Marat Dukhanf8475d62020-09-17 15:01:43 -0700[diff] [blame]818 src/math/sigmoid-scalar-rr2-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]819 src/math/sigmoid-scalar-rr2-lut2048-p1-div.c
Marat Dukhanf8475d62020-09-17 15:01:43 -0700[diff] [blame]820 src/math/sigmoid-scalar-rr2-p5-div.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]821 src/params-init.c
Marat Dukhan57547062021-06-30 16:53:29 -0700[diff] [blame]822 src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c
823 src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
824 src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c
825 src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
826 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c
827 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
828 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c
829 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
830 src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c
831 src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c
832 src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c
833 src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c
Marat Dukhand6021542021-06-30 09:04:20 -0700[diff] [blame]834 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c
835 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
836 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c
837 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
838 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c
839 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
840 src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c
841 src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c
842 src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c
843 src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c
844 src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c
845 src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c
846 src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c
847 src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c
848 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c
849 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
850 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c
851 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
852 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c
853 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
854 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c
855 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
856 src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c
857 src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c
858 src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c
859 src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c
860 src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c
861 src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c
862 src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c
863 src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c
864 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c
865 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan85d772b2021-06-30 11:02:42 -0700[diff] [blame]866 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c
867 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
868 src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]869 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c
870 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
871 src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c
Marat Dukhan85d772b2021-06-30 11:02:42 -0700[diff] [blame]872 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c
873 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
874 src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]875 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c
876 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
877 src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c
Marat Dukhan85d772b2021-06-30 11:02:42 -0700[diff] [blame]878 src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c
879 src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c
880 src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]881 src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c
882 src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c
883 src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c
Marat Dukhan047b6202021-05-11 20:32:25 -0700[diff] [blame]884 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c
885 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c
886 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c
887 src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c
888 src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c
889 src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]890 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c
891 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]892 src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]893 src/qs8-gemm/gen/1x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]894 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c
895 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]896 src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]897 src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]898 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c
899 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]900 src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]901 src/qs8-gemm/gen/2x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]902 src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c
903 src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]904 src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]905 src/qs8-gemm/gen/2x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]906 src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c
907 src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]908 src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]909 src/qs8-gemm/gen/3x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]910 src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c
911 src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]912 src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]913 src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]914 src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c
915 src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]916 src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]917 src/qs8-gemm/gen/4x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]918 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c
919 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]920 src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]921 src/qs8-gemm/gen/4x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]922 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c
923 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]924 src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]925 src/qs8-igemm/gen/1x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]926 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c
927 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]928 src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]929 src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]930 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c
931 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]932 src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]933 src/qs8-igemm/gen/2x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]934 src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c
935 src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]936 src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]937 src/qs8-igemm/gen/2x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]938 src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c
939 src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]940 src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]941 src/qs8-igemm/gen/3x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]942 src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c
943 src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]944 src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]945 src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]946 src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c
947 src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]948 src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]949 src/qs8-igemm/gen/4x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]950 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c
951 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]952 src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]953 src/qs8-igemm/gen/4x4-minmax-rndnu-scalar.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]954 src/qs8-requantization/fp32-scalar-lrintf.c
955 src/qs8-requantization/fp32-scalar-magic.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]956 src/qs8-requantization/gemmlowp-scalar.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]957 src/qs8-requantization/rndna-scalar-signed64.c
958 src/qs8-requantization/rndna-scalar-unsigned32.c
959 src/qs8-requantization/rndna-scalar-unsigned64.c
Marat Dukhan062bee32021-05-27 20:31:07 -0700[diff] [blame]960 src/qs8-requantization/rndnu-scalar.c
Marat Dukhand481c282021-05-11 23:48:31 -0700[diff] [blame]961 src/qs8-vadd/gen/minmax-scalar-x1.c
962 src/qs8-vadd/gen/minmax-scalar-x2.c
963 src/qs8-vadd/gen/minmax-scalar-x4.c
964 src/qs8-vaddc/gen/minmax-scalar-x1.c
965 src/qs8-vaddc/gen/minmax-scalar-x2.c
966 src/qs8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan79993412021-08-02 15:02:57 -0700[diff] [blame]967 src/qs8-vmul/gen/minmax-fp32-scalar-x1.c
968 src/qs8-vmul/gen/minmax-fp32-scalar-x2.c
969 src/qs8-vmul/gen/minmax-fp32-scalar-x4.c
970 src/qs8-vmulc/gen/minmax-fp32-scalar-x1.c
971 src/qs8-vmulc/gen/minmax-fp32-scalar-x2.c
972 src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]973 src/qu8-avgpool/9p8x-minmax-scalar-c1.c
974 src/qu8-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan1f714282021-07-15 15:41:32 -0700[diff] [blame]975 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c
976 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
977 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c
978 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
979 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c
980 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
981 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c
982 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
983 src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c
984 src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c
985 src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c
986 src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]987 src/qu8-gavgpool/7p7x-minmax-scalar-c1.c
988 src/qu8-gavgpool/7x-minmax-scalar-c1.c
Marat Dukhan927d4742021-07-15 13:42:49 -0700[diff] [blame]989 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c
990 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
991 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c
992 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
993 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c
994 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
995 src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c
996 src/qu8-gemm/gen/2x4-minmax-fp32-scalar-magic.c
997 src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c
998 src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c
999 src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c
1000 src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c
1001 src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c
1002 src/qu8-gemm/gen/4x2-minmax-fp32-scalar-magic.c
1003 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c
1004 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan927d4742021-07-15 13:42:49 -0700[diff] [blame]1005 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c
1006 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
1007 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c
1008 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
1009 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c
1010 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
1011 src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c
1012 src/qu8-igemm/gen/2x4-minmax-fp32-scalar-magic.c
1013 src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c
1014 src/qu8-igemm/gen/3x2-minmax-fp32-scalar-magic.c
1015 src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c
1016 src/qu8-igemm/gen/3x4-minmax-fp32-scalar-magic.c
1017 src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c
1018 src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c
1019 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c
1020 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]1021 src/qu8-requantization/fp32-scalar-lrintf.c
1022 src/qu8-requantization/fp32-scalar-magic.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]1023 src/qu8-requantization/gemmlowp-scalar.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]1024 src/qu8-requantization/rndna-scalar-signed64.c
1025 src/qu8-requantization/rndna-scalar-unsigned32.c
1026 src/qu8-requantization/rndna-scalar-unsigned64.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]1027 src/qu8-vadd/gen/minmax-scalar-x1.c
1028 src/qu8-vadd/gen/minmax-scalar-x2.c
1029 src/qu8-vadd/gen/minmax-scalar-x4.c
1030 src/qu8-vaddc/gen/minmax-scalar-x1.c
1031 src/qu8-vaddc/gen/minmax-scalar-x2.c
1032 src/qu8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan79993412021-08-02 15:02:57 -0700[diff] [blame]1033 src/qu8-vmul/gen/minmax-fp32-scalar-x1.c
1034 src/qu8-vmul/gen/minmax-fp32-scalar-x2.c
1035 src/qu8-vmul/gen/minmax-fp32-scalar-x4.c
1036 src/qu8-vmulc/gen/minmax-fp32-scalar-x1.c
1037 src/qu8-vmulc/gen/minmax-fp32-scalar-x2.c
1038 src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]1039 src/s8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]1040 src/s8-vclamp/scalar-x4.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1041 src/u8-lut32norm/scalar.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1042 src/u8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1043 src/u8-rmax/scalar.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]1044 src/u8-vclamp/scalar-x4.c
Marat Dukhan548542c2021-09-09 14:15:51 -0700[diff] [blame]1045 src/x8-lut/gen/lut-scalar-x1.c
1046 src/x8-lut/gen/lut-scalar-x2.c
1047 src/x8-lut/gen/lut-scalar-x4.c
1048 src/x8-lut/gen/lut-scalar-x8.c
1049 src/x8-lut/gen/lut-scalar-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1050 src/x8-zip/x2-scalar.c
1051 src/x8-zip/x3-scalar.c
1052 src/x8-zip/x4-scalar.c
1053 src/x8-zip/xm-scalar.c
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800[diff] [blame]1054 src/x32-depthtospace2d-chw2hwc/scalar.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1055 src/x32-packx/x2-scalar.c
1056 src/x32-packx/x3-scalar.c
1057 src/x32-packx/x4-scalar.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1058 src/x32-unpool/scalar.c
1059 src/x32-zip/x2-scalar.c
1060 src/x32-zip/x3-scalar.c
1061 src/x32-zip/x4-scalar.c
Marat Dukhan048931b2020-11-24 20:53:54 -0800[diff] [blame]1062 src/x32-zip/xm-scalar.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]1063 src/xx-copy/memcpy.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]1064 src/xx-fill/scalar-x16.c
1065 src/xx-pad/scalar.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1066
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1067SET(PROD_NEON_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]1068 src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1069 src/f32-argmaxpool/4x-neon-c4.c
1070 src/f32-argmaxpool/9p8x-neon-c4.c
1071 src/f32-argmaxpool/9x-neon-c4.c
1072 src/f32-avgpool/9p8x-minmax-neon-c4.c
1073 src/f32-avgpool/9x-minmax-neon-c4.c
1074 src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1075 src/f32-dwconv/gen/up8x3-minmax-neon.c
Frank Barcharddbe781b2021-10-18 10:29:52 -0700[diff] [blame]1076 src/f32-dwconv/gen/up8x4-minmax-neon.c
1077 src/f32-dwconv/gen/up8x9-minmax-neon.c
1078 src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1079 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c
1080 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c
1081 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c
1082 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c
1083 src/f32-gavgpool-cw/neon-x4.c
1084 src/f32-gavgpool/7p7x-minmax-neon-c4.c
1085 src/f32-gavgpool/7x-minmax-neon-c4.c
1086 src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c
1087 src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c
1088 src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c
1089 src/f32-ibilinear-chw/gen/neon-p8.c
1090 src/f32-ibilinear/gen/neon-c8.c
1091 src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c
1092 src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c
1093 src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c
1094 src/f32-maxpool/9p8x-minmax-neon-c4.c
1095 src/f32-pavgpool/9p8x-minmax-neon-c4.c
1096 src/f32-pavgpool/9x-minmax-neon-c4.c
1097 src/f32-prelu/gen/neon-2x8.c
1098 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c
1099 src/f32-rmax/neon.c
1100 src/f32-spmm/gen/32x1-minmax-neon.c
1101 src/f32-vbinary/gen/vadd-minmax-neon-x8.c
1102 src/f32-vbinary/gen/vaddc-minmax-neon-x8.c
1103 src/f32-vbinary/gen/vmax-neon-x8.c
1104 src/f32-vbinary/gen/vmaxc-neon-x8.c
1105 src/f32-vbinary/gen/vmin-neon-x8.c
1106 src/f32-vbinary/gen/vminc-neon-x8.c
1107 src/f32-vbinary/gen/vmul-minmax-neon-x8.c
1108 src/f32-vbinary/gen/vmulc-minmax-neon-x8.c
1109 src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c
1110 src/f32-vbinary/gen/vsqrdiff-neon-x8.c
1111 src/f32-vbinary/gen/vsqrdiffc-neon-x8.c
1112 src/f32-vbinary/gen/vsub-minmax-neon-x8.c
1113 src/f32-vbinary/gen/vsubc-minmax-neon-x8.c
1114 src/f32-vclamp/gen/vclamp-neon-x8.c
1115 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c
1116 src/f32-vhswish/gen/vhswish-neon-x16.c
1117 src/f32-vlrelu/gen/vlrelu-neon-x8.c
1118 src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c
1119 src/f32-vrnd/gen/vrndd-neon-x8.c
1120 src/f32-vrnd/gen/vrndne-neon-x8.c
1121 src/f32-vrnd/gen/vrndu-neon-x8.c
1122 src/f32-vrnd/gen/vrndz-neon-x8.c
1123 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c
1124 src/f32-vunary/gen/vabs-neon-x8.c
1125 src/f32-vunary/gen/vneg-neon-x8.c
1126 src/f32-vunary/gen/vsqr-neon-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1127 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]1128 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c
1129 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1130 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
1131 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
1132 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
1133 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1134 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]1135 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c
1136 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1137 src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c
1138 src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c
Frank Barchard66ae2572021-11-02 17:36:21 -0700[diff] [blame]1139 src/qs8-gemm/gen/1x8s4c2-minmax-rndnu-neon-mlal-padal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1140 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard66ae2572021-11-02 17:36:21 -0700[diff] [blame]1141 src/qs8-gemm/gen/2x8s4c2-minmax-rndnu-neon-mlal-padal.c
1142 src/qs8-igemm/gen/1x8s4c2-minmax-rndnu-neon-mlal-padal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1143 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard66ae2572021-11-02 17:36:21 -0700[diff] [blame]1144 src/qs8-igemm/gen/2x8s4c2-minmax-rndnu-neon-mlal-padal.c
Marat Dukhan01debd92021-07-29 18:14:21 -0700[diff] [blame]1145 src/qs8-vadd/gen/minmax-neon-ld64-x16.c
1146 src/qs8-vadd/gen/minmax-neon-ld64-x32.c
1147 src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
1148 src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]1149 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1150 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1151 src/qu8-avgpool/9p8x-minmax-neon-c8.c
1152 src/qu8-avgpool/9x-minmax-neon-c8.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1153 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c
1154 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1155 src/qu8-gavgpool/7p7x-minmax-neon-c8.c
1156 src/qu8-gavgpool/7x-minmax-neon-c8.c
1157 src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
1158 src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1159 src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
1160 src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
1161 src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
1162 src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1163 src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
1164 src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]1165 src/qu8-vadd/gen/minmax-neon-ld64-x16.c
1166 src/qu8-vadd/gen/minmax-neon-ld64-x32.c
1167 src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
1168 src/qu8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]1169 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1170 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]1171 src/s8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]1172 src/s8-vclamp/neon-x64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1173 src/u8-maxpool/9p8x-minmax-neon-c16.c
1174 src/u8-rmax/neon.c
1175 src/u8-vclamp/neon-x64.c
1176 src/x8-zip/x2-neon.c
1177 src/x8-zip/x3-neon.c
1178 src/x8-zip/x4-neon.c
1179 src/x8-zip/xm-neon.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1180 src/x32-packx/x4-neon-st4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1181 src/x32-unpool/neon.c
1182 src/x32-zip/x2-neon.c
1183 src/x32-zip/x3-neon.c
1184 src/x32-zip/x4-neon.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]1185 src/x32-zip/xm-neon.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]1186 src/xx-fill/neon-x64.c
1187 src/xx-pad/neon.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1188
1189SET(ALL_NEON_MICROKERNEL_SRCS
Marat Dukhan322ed6f2021-10-16 17:44:16 -0700[diff] [blame]1190 src/f16-f32-vcvt/gen/vcvt-neon-int16-x8.c
1191 src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c
1192 src/f16-f32-vcvt/gen/vcvt-neon-int16-x24.c
1193 src/f16-f32-vcvt/gen/vcvt-neon-int16-x32.c
1194 src/f16-f32-vcvt/gen/vcvt-neon-int32-x8.c
1195 src/f16-f32-vcvt/gen/vcvt-neon-int32-x16.c
1196 src/f16-f32-vcvt/gen/vcvt-neon-int32-x24.c
1197 src/f16-f32-vcvt/gen/vcvt-neon-int32-x32.c
Marat Dukhanef25c6d2020-07-24 00:59:40 -0700[diff] [blame]1198 src/f32-argmaxpool/4x-neon-c4.c
1199 src/f32-argmaxpool/9p8x-neon-c4.c
1200 src/f32-argmaxpool/9x-neon-c4.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1201 src/f32-avgpool/9p8x-minmax-neon-c4.c
1202 src/f32-avgpool/9x-minmax-neon-c4.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]1203 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1204 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1205 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1206 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]1207 src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1208 src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1209 src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1210 src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c
Marat Dukhanc7634882020-12-07 15:11:12 -0800[diff] [blame]1211 src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1212 src/f32-dwconv/gen/up4x3-minmax-neon-acc2.c
1213 src/f32-dwconv/gen/up4x3-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1214 src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1215 src/f32-dwconv/gen/up4x4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1216 src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1217 src/f32-dwconv/gen/up4x9-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1218 src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1219 src/f32-dwconv/gen/up4x25-minmax-neon.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1220 src/f32-dwconv/gen/up8x3-minmax-neon-acc2.c
1221 src/f32-dwconv/gen/up8x3-minmax-neon.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1222 src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c
1223 src/f32-dwconv/gen/up8x4-minmax-neon.c
1224 src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c
1225 src/f32-dwconv/gen/up8x9-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1226 src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1227 src/f32-dwconv/gen/up8x25-minmax-neon.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1228 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c
1229 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c
1230 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c
Marat Dukhanc581e482020-10-24 01:28:11 -0700[diff] [blame]1231 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1232 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c
Marat Dukhanc581e482020-10-24 01:28:11 -0700[diff] [blame]1233 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c
1234 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c
1235 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c
1236 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c
1237 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]1238 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c
1239 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c
1240 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1241 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]1242 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1243 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c
1244 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c
1245 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1246 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c
1247 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c
1248 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c
1249 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1250 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1251 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c
1252 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1253 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1254 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1255 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1256 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1257 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c
1258 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]1259 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c
1260 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c
1261 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c
1262 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c
1263 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c
1264 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c
1265 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c
1266 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]1267 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]1268 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1269 src/f32-gavgpool-cw/neon-x4.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]1270 src/f32-gavgpool/7p7x-minmax-neon-c4.c
1271 src/f32-gavgpool/7x-minmax-neon-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1272 src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1273 src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c
1274 src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1275 src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1276 src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c
1277 src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c
1278 src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c
1279 src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c
1280 src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1281 src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c
1282 src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1283 src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c
1284 src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1285 src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c
1286 src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1287 src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c
1288 src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c
1289 src/f32-gemm/gen/1x8s4-minmax-neon.c
1290 src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c
1291 src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c
1292 src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c
1293 src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c
1294 src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c
1295 src/f32-gemm/gen/4x8s4-minmax-neon.c
1296 src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c
1297 src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c
1298 src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c
1299 src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c
1300 src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c
1301 src/f32-gemm/gen/6x8s4-minmax-neon.c
1302 src/f32-gemm/gen/8x8s4-minmax-neon.c
Artsiom Ablavatski2202c812021-01-22 14:16:43 -0800[diff] [blame]1303 src/f32-ibilinear-chw/gen/neon-p4.c
1304 src/f32-ibilinear-chw/gen/neon-p8.c
Frank Barchard8247e212021-02-03 18:12:33 -0800[diff] [blame]1305 src/f32-ibilinear/gen/neon-c4.c
1306 src/f32-ibilinear/gen/neon-c8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1307 src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1308 src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1309 src/f32-igemm/gen/1x8s4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1310 src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c
1311 src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1312 src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1313 src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c
1314 src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c
1315 src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c
1316 src/f32-igemm/gen/4x8s4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1317 src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c
1318 src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1319 src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c
1320 src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1321 src/f32-igemm/gen/6x8s4-minmax-neon.c
1322 src/f32-igemm/gen/8x8s4-minmax-neon.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1323 src/f32-maxpool/9p8x-minmax-neon-c4.c
1324 src/f32-pavgpool/9p8x-minmax-neon-c4.c
1325 src/f32-pavgpool/9x-minmax-neon-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1326 src/f32-ppmm/gen/4x8-minmax-neon.c
1327 src/f32-ppmm/gen/8x8-minmax-neon.c
Frank Barcharda5316982020-07-23 13:19:28 -0700[diff] [blame]1328 src/f32-prelu/gen/neon-1x4.c
1329 src/f32-prelu/gen/neon-1x8.c
1330 src/f32-prelu/gen/neon-1x16.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1331 src/f32-prelu/gen/neon-2x4.c
1332 src/f32-prelu/gen/neon-2x8.c
Frank Barcharda5316982020-07-23 13:19:28 -0700[diff] [blame]1333 src/f32-prelu/gen/neon-2x16.c
1334 src/f32-prelu/gen/neon-4x4.c
1335 src/f32-prelu/gen/neon-4x8.c
1336 src/f32-prelu/gen/neon-4x16.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1337 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1338 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1339 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1340 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c
1341 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1342 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1343 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c
1344 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1345 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1346 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c
1347 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1348 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c
1349 src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c
1350 src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c
1351 src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c
1352 src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c
1353 src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c
1354 src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c
1355 src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c
1356 src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c
1357 src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c
1358 src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c
1359 src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c
1360 src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1361 src/f32-rmax/neon.c
Marat Dukhan5b86c432020-12-06 19:15:03 -0800[diff] [blame]1362 src/f32-spmm/gen/4x1-minmax-neon-pipelined.c
1363 src/f32-spmm/gen/4x1-minmax-neon-x2.c
1364 src/f32-spmm/gen/4x1-minmax-neon.c
1365 src/f32-spmm/gen/8x1-minmax-neon-pipelined.c
1366 src/f32-spmm/gen/8x1-minmax-neon-x2.c
1367 src/f32-spmm/gen/8x1-minmax-neon.c
1368 src/f32-spmm/gen/12x1-minmax-neon.c
1369 src/f32-spmm/gen/16x1-minmax-neon-pipelined.c
1370 src/f32-spmm/gen/16x1-minmax-neon-x2.c
1371 src/f32-spmm/gen/16x1-minmax-neon.c
1372 src/f32-spmm/gen/32x1-minmax-neon-pipelined.c
1373 src/f32-spmm/gen/32x1-minmax-neon-x2.c
1374 src/f32-spmm/gen/32x1-minmax-neon.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1375 src/f32-vbinary/gen/vadd-minmax-neon-x4.c
1376 src/f32-vbinary/gen/vadd-minmax-neon-x8.c
1377 src/f32-vbinary/gen/vaddc-minmax-neon-x4.c
1378 src/f32-vbinary/gen/vaddc-minmax-neon-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1379 src/f32-vbinary/gen/vmax-neon-x4.c
1380 src/f32-vbinary/gen/vmax-neon-x8.c
1381 src/f32-vbinary/gen/vmaxc-neon-x4.c
1382 src/f32-vbinary/gen/vmaxc-neon-x8.c
1383 src/f32-vbinary/gen/vmin-neon-x4.c
1384 src/f32-vbinary/gen/vmin-neon-x8.c
1385 src/f32-vbinary/gen/vminc-neon-x4.c
1386 src/f32-vbinary/gen/vminc-neon-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1387 src/f32-vbinary/gen/vmul-minmax-neon-x4.c
1388 src/f32-vbinary/gen/vmul-minmax-neon-x8.c
1389 src/f32-vbinary/gen/vmulc-minmax-neon-x4.c
1390 src/f32-vbinary/gen/vmulc-minmax-neon-x8.c
1391 src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c
1392 src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]1393 src/f32-vbinary/gen/vsqrdiff-neon-x4.c
1394 src/f32-vbinary/gen/vsqrdiff-neon-x8.c
1395 src/f32-vbinary/gen/vsqrdiffc-neon-x4.c
1396 src/f32-vbinary/gen/vsqrdiffc-neon-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1397 src/f32-vbinary/gen/vsub-minmax-neon-x4.c
1398 src/f32-vbinary/gen/vsub-minmax-neon-x8.c
1399 src/f32-vbinary/gen/vsubc-minmax-neon-x4.c
1400 src/f32-vbinary/gen/vsubc-minmax-neon-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]1401 src/f32-vclamp/gen/vclamp-neon-x4.c
1402 src/f32-vclamp/gen/vclamp-neon-x8.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]1403 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c
1404 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c
1405 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c
1406 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c
1407 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c
1408 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c
1409 src/f32-velu/gen/velu-neon-rr2-p6-x4.c
1410 src/f32-velu/gen/velu-neon-rr2-p6-x8.c
1411 src/f32-velu/gen/velu-neon-rr2-p6-x12.c
1412 src/f32-velu/gen/velu-neon-rr2-p6-x16.c
1413 src/f32-velu/gen/velu-neon-rr2-p6-x20.c
1414 src/f32-velu/gen/velu-neon-rr2-p6-x24.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]1415 src/f32-vhswish/gen/vhswish-neon-x4.c
1416 src/f32-vhswish/gen/vhswish-neon-x8.c
1417 src/f32-vhswish/gen/vhswish-neon-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1418 src/f32-vlrelu/gen/vlrelu-neon-x4.c
1419 src/f32-vlrelu/gen/vlrelu-neon-x8.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1420 src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c
1421 src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]1422 src/f32-vrelu/gen/vrelu-neon-x4.c
1423 src/f32-vrelu/gen/vrelu-neon-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1424 src/f32-vrnd/gen/vrndd-neon-x4.c
1425 src/f32-vrnd/gen/vrndd-neon-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1426 src/f32-vrnd/gen/vrndne-neon-x4.c
1427 src/f32-vrnd/gen/vrndne-neon-x8.c
1428 src/f32-vrnd/gen/vrndu-neon-x4.c
1429 src/f32-vrnd/gen/vrndu-neon-x8.c
1430 src/f32-vrnd/gen/vrndz-neon-x4.c
1431 src/f32-vrnd/gen/vrndz-neon-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]1432 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c
1433 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c
1434 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c
1435 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c
1436 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c
1437 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c
1438 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c
1439 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c
1440 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c
1441 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c
1442 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c
1443 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c
1444 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c
1445 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c
1446 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c
1447 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c
1448 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c
1449 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]1450 src/f32-vunary/gen/vabs-neon-x4.c
1451 src/f32-vunary/gen/vabs-neon-x8.c
1452 src/f32-vunary/gen/vneg-neon-x4.c
1453 src/f32-vunary/gen/vneg-neon-x8.c
1454 src/f32-vunary/gen/vsqr-neon-x4.c
1455 src/f32-vunary/gen/vsqr-neon-x8.c
Marat Dukhan60f903b2021-09-30 09:43:13 -0700[diff] [blame]1456 src/math/cvt-f16-f32-neon-int16.c
1457 src/math/cvt-f16-f32-neon-int32.c
Marat Dukhana6eb1e52021-11-06 18:29:36 -0700[diff] [blame^]1458 src/math/cvt-f32-f16-neon.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]1459 src/math/expm1minus-neon-rr2-lut16-p3.c
1460 src/math/expm1minus-neon-rr2-p6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1461 src/math/roundd-neon-addsub.c
1462 src/math/roundd-neon-cvt.c
1463 src/math/roundne-neon-addsub.c
1464 src/math/roundu-neon-addsub.c
1465 src/math/roundu-neon-cvt.c
1466 src/math/roundz-neon-addsub.c
1467 src/math/roundz-neon-cvt.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1468 src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c
1469 src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c
1470 src/math/sigmoid-neon-rr2-p5-nr2recps.c
1471 src/math/sqrt-neon-nr1rsqrts.c
1472 src/math/sqrt-neon-nr2rsqrts.c
1473 src/math/sqrt-neon-nr3rsqrts.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1474 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c
1475 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1476 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1477 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c
1478 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1479 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1480 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c
1481 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c
1482 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c
1483 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1484 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1485 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c
1486 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c
1487 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c
1488 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1489 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
1490 src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
1491 src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
1492 src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
1493 src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1494 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1495 src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1496 src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c
1497 src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1498 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1499 src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1500 src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c
1501 src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1502 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1503 src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1504 src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c
1505 src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1506 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1507 src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1508 src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c
1509 src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1510 src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1511 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1512 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c
1513 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1514 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1515 src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1516 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1517 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c
1518 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1519 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1520 src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1521 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1522 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c
1523 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c
1524 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c
1525 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1526 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1527 src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1528 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1529 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c
1530 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c
1531 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c
1532 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1533 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1534 src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1535 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1536 src/qs8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1537 src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1538 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1539 src/qs8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1540 src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1541 src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1542 src/qs8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1543 src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1544 src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c
Frank Barchard2aa2e2a2021-09-16 14:59:13 -0700[diff] [blame]1545 src/qs8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1546 src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c
1547 src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c
1548 src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c
1549 src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c
1550 src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c
1551 src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c
1552 src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c
1553 src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1554 src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c
1555 src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1556 src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1557 src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1558 src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1559 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1560 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1561 src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-padal-dup.c
1562 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-padal-dup.c
1563 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhan2d3c97c2021-06-25 18:00:28 -0700[diff] [blame]1564 src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1565 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1566 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1567 src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1568 src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c
Frank Barchard494cd2b2021-10-28 17:36:37 -0700[diff] [blame]1569 src/qs8-gemm/gen/1x8s4c2-minmax-rndnu-neon-mlal-padal.c
Frank Barchard66ae2572021-11-02 17:36:21 -0700[diff] [blame]1570 src/qs8-gemm/gen/1x8s4c2-minmax-rndnu-neon-mull-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1571 src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1572 src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1573 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c
1574 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1575 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1576 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-padal-dup.c
1577 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1578 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-padal-dup.c
1579 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1580 src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c
1581 src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c
1582 src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1583 src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1584 src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1585 src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1586 src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1587 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1588 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1589 src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-padal-dup.c
1590 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-padal-dup.c
1591 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhan2d3c97c2021-06-25 18:00:28 -0700[diff] [blame]1592 src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1593 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1594 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1595 src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1596 src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c
Frank Barchard494cd2b2021-10-28 17:36:37 -0700[diff] [blame]1597 src/qs8-gemm/gen/2x8s4c2-minmax-rndnu-neon-mlal-padal.c
Frank Barchard66ae2572021-11-02 17:36:21 -0700[diff] [blame]1598 src/qs8-gemm/gen/2x8s4c2-minmax-rndnu-neon-mull-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1599 src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1600 src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1601 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-padal-dup.c
1602 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1603 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-padal-dup.c
1604 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1605 src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c
1606 src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c
1607 src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1608 src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1609 src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1610 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-padal-dup.c
1611 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1612 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-padal-dup.c
1613 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1614 src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c
1615 src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c
1616 src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1617 src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1618 src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1619 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-padal-dup.c
1620 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1621 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-padal-dup.c
1622 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1623 src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c
1624 src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c
1625 src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1626 src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1627 src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1628 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-padal-dup.c
1629 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1630 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-padal-dup.c
1631 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1632 src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c
1633 src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c
1634 src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1635 src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1636 src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1637 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c
1638 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1639 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1640 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-padal-dup.c
1641 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1642 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-padal-dup.c
1643 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1644 src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c
1645 src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c
1646 src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1647 src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1648 src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1649 src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c
1650 src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1651 src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhanac67ae82021-07-13 00:05:45 -0700[diff] [blame]1652 src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1653 src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1654 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1655 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1656 src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-padal-dup.c
1657 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-padal-dup.c
1658 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhancf055852021-06-26 09:05:09 -0700[diff] [blame]1659 src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1660 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1661 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1662 src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1663 src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c
Frank Barchard494cd2b2021-10-28 17:36:37 -0700[diff] [blame]1664 src/qs8-igemm/gen/1x8s4c2-minmax-rndnu-neon-mlal-padal.c
Frank Barchard66ae2572021-11-02 17:36:21 -0700[diff] [blame]1665 src/qs8-igemm/gen/1x8s4c2-minmax-rndnu-neon-mull-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1666 src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1667 src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1668 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c
1669 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1670 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1671 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-padal-dup.c
1672 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1673 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-padal-dup.c
1674 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1675 src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c
1676 src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c
1677 src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1678 src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1679 src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhanac67ae82021-07-13 00:05:45 -0700[diff] [blame]1680 src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1681 src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1682 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1683 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1684 src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-padal-dup.c
1685 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-padal-dup.c
1686 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhanc8f0d852021-06-29 18:15:05 -0700[diff] [blame]1687 src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1688 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c
1689 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1690 src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1691 src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c
Frank Barchard494cd2b2021-10-28 17:36:37 -0700[diff] [blame]1692 src/qs8-igemm/gen/2x8s4c2-minmax-rndnu-neon-mlal-padal.c
Frank Barchard66ae2572021-11-02 17:36:21 -0700[diff] [blame]1693 src/qs8-igemm/gen/2x8s4c2-minmax-rndnu-neon-mull-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1694 src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1695 src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1696 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-padal-dup.c
1697 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1698 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-padal-dup.c
1699 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1700 src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c
1701 src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c
1702 src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1703 src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1704 src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1705 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-padal-dup.c
1706 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1707 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-padal-dup.c
1708 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1709 src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c
1710 src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c
1711 src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1712 src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1713 src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1714 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-padal-dup.c
1715 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1716 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-padal-dup.c
1717 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1718 src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c
1719 src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c
1720 src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1721 src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1722 src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1723 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-padal-dup.c
1724 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1725 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-padal-dup.c
1726 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1727 src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c
1728 src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c
1729 src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1730 src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1731 src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1732 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c
1733 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1734 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barchard1d412472021-10-25 17:27:21 -0700[diff] [blame]1735 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-padal-dup.c
1736 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]1737 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-padal-dup.c
1738 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1739 src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c
1740 src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c
1741 src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1742 src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1743 src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]1744 src/qs8-requantization/fp32-neon.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]1745 src/qs8-requantization/gemmlowp-neon.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]1746 src/qs8-requantization/rndna-neon.c
Marat Dukhand3d818c2021-07-16 17:56:54 -0700[diff] [blame]1747 src/qs8-requantization/rndnu-neon-mull.c
1748 src/qs8-requantization/rndnu-neon-qdmulh.c
Marat Dukhanba7b2792020-09-02 14:26:45 -0700[diff] [blame]1749 src/qs8-vadd/gen/minmax-neon-ld64-x8.c
1750 src/qs8-vadd/gen/minmax-neon-ld64-x16.c
1751 src/qs8-vadd/gen/minmax-neon-ld64-x24.c
1752 src/qs8-vadd/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]1753 src/qs8-vadd/gen/minmax-neon-ld128-x16.c
1754 src/qs8-vadd/gen/minmax-neon-ld128-x32.c
Marat Dukhanba7b2792020-09-02 14:26:45 -0700[diff] [blame]1755 src/qs8-vaddc/gen/minmax-neon-ld64-x8.c
1756 src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
1757 src/qs8-vaddc/gen/minmax-neon-ld64-x24.c
1758 src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]1759 src/qs8-vaddc/gen/minmax-neon-ld128-x16.c
1760 src/qs8-vaddc/gen/minmax-neon-ld128-x32.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]1761 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x8.c
1762 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1763 src/qs8-vmul/gen/minmax-fp32-neon-ld128-x16.c
1764 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x8.c
1765 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
1766 src/qs8-vmulc/gen/minmax-fp32-neon-ld128-x16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]1767 src/qu8-avgpool/9p8x-minmax-neon-c8.c
1768 src/qu8-avgpool/9x-minmax-neon-c8.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1769 src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1770 src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]1771 src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1772 src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1773 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]1774 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1775 src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1776 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]1777 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1778 src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1779 src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]1780 src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1781 src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1782 src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul8.c
1783 src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1784 src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1785 src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul8.c
1786 src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1787 src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1788 src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul8.c
1789 src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1790 src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1791 src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul8.c
1792 src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]1793 src/qu8-gavgpool/7p7x-minmax-neon-c8.c
1794 src/qu8-gavgpool/7x-minmax-neon-c8.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]1795 src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]1796 src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]1797 src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1798 src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]1799 src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]1800 src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
1801 src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]1802 src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]1803 src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1804 src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]1805 src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]1806 src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]1807 src/qu8-requantization/fp32-neon.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]1808 src/qu8-requantization/gemmlowp-neon.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]1809 src/qu8-requantization/rndna-neon.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]1810 src/qu8-vadd/gen/minmax-neon-ld64-x8.c
1811 src/qu8-vadd/gen/minmax-neon-ld64-x16.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]1812 src/qu8-vadd/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]1813 src/qu8-vadd/gen/minmax-neon-ld128-x16.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]1814 src/qu8-vaddc/gen/minmax-neon-ld64-x8.c
1815 src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]1816 src/qu8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]1817 src/qu8-vaddc/gen/minmax-neon-ld128-x16.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]1818 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x8.c
1819 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1820 src/qu8-vmul/gen/minmax-fp32-neon-ld128-x16.c
1821 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x8.c
1822 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
1823 src/qu8-vmulc/gen/minmax-fp32-neon-ld128-x16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]1824 src/s8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]1825 src/s8-vclamp/neon-x64.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1826 src/u8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]1827 src/u8-rmax/neon.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]1828 src/u8-vclamp/neon-x64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1829 src/x8-zip/x2-neon.c
1830 src/x8-zip/x3-neon.c
1831 src/x8-zip/x4-neon.c
1832 src/x8-zip/xm-neon.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]1833 src/x32-packx/x4-neon-st4.c
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1834 src/x32-unpool/neon.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]1835 src/x32-zip/x2-neon.c
1836 src/x32-zip/x3-neon.c
1837 src/x32-zip/x4-neon.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]1838 src/x32-zip/xm-neon.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]1839 src/xx-fill/neon-x64.c
1840 src/xx-pad/neon.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1841
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]1842SET(PROD_NEONFP16_MICROKERNEL_SRCS
1843 src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c)
1844
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]1845SET(ALL_NEONFP16_MICROKERNEL_SRCS
1846 src/f16-f32-vcvt/gen/vcvt-neonfp16-x8.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]1847 src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]1848 src/f32-f16-vcvt/gen/vcvt-neonfp16-x8.c
1849 src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c
Marat Dukhan582e1842021-10-25 17:18:36 -0700[diff] [blame]1850 src/math/cvt-f16-f32-neonfp16.c
1851 src/math/cvt-f32-f16-neonfp16.c)
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]1852
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1853SET(PROD_NEONFMA_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1854 src/f32-dwconv/gen/up8x3-minmax-neonfma.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1855 src/f32-dwconv/gen/up8x4-minmax-neonfma.c
1856 src/f32-dwconv/gen/up8x9-minmax-neonfma.c
Frank Barcharddbe781b2021-10-18 10:29:52 -0700[diff] [blame]1857 src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1858 src/f32-gemm/gen/1x8s4-minmax-neonfma.c
1859 src/f32-gemm/gen/6x8s4-minmax-neonfma.c
1860 src/f32-ibilinear-chw/gen/neonfma-p8.c
1861 src/f32-ibilinear/gen/neonfma-c8.c
1862 src/f32-igemm/gen/1x8s4-minmax-neonfma.c
1863 src/f32-igemm/gen/6x8s4-minmax-neonfma.c
1864 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c
1865 src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c
1866 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c
1867 src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c
1868 src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c
1869 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c)
1870
1871SET(ALL_NEONFMA_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1872 src/f32-dwconv/gen/up4x3-minmax-neonfma-acc2.c
1873 src/f32-dwconv/gen/up4x3-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1874 src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c
1875 src/f32-dwconv/gen/up4x4-minmax-neonfma.c
1876 src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c
1877 src/f32-dwconv/gen/up4x9-minmax-neonfma.c
1878 src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c
1879 src/f32-dwconv/gen/up4x25-minmax-neonfma.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1880 src/f32-dwconv/gen/up8x3-minmax-neonfma-acc2.c
1881 src/f32-dwconv/gen/up8x3-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1882 src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c
1883 src/f32-dwconv/gen/up8x4-minmax-neonfma.c
1884 src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c
1885 src/f32-dwconv/gen/up8x9-minmax-neonfma.c
1886 src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c
1887 src/f32-dwconv/gen/up8x25-minmax-neonfma.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1888 src/f32-dwconv/gen/up16x3-minmax-neon-acc2.c
1889 src/f32-dwconv/gen/up16x3-minmax-neon.c
1890 src/f32-dwconv/gen/up16x3-minmax-neonfma-acc2.c
1891 src/f32-dwconv/gen/up16x3-minmax-neonfma.c
Frank Barchardc9f9d672021-10-18 12:51:59 -0700[diff] [blame]1892 src/f32-dwconv/gen/up16x4-minmax-neon-acc2.c
1893 src/f32-dwconv/gen/up16x4-minmax-neon.c
1894 src/f32-dwconv/gen/up16x4-minmax-neonfma-acc2.c
1895 src/f32-dwconv/gen/up16x4-minmax-neonfma.c
1896 src/f32-dwconv/gen/up16x9-minmax-neon-acc2.c
1897 src/f32-dwconv/gen/up16x9-minmax-neon.c
1898 src/f32-dwconv/gen/up16x9-minmax-neonfma-acc2.c
1899 src/f32-dwconv/gen/up16x9-minmax-neonfma.c
1900 src/f32-dwconv/gen/up16x25-minmax-neon-acc2.c
1901 src/f32-dwconv/gen/up16x25-minmax-neon.c
1902 src/f32-dwconv/gen/up16x25-minmax-neonfma-acc2.c
1903 src/f32-dwconv/gen/up16x25-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1904 src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c
1905 src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c
1906 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c
1907 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c
1908 src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c
1909 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c
1910 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c
1911 src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c
1912 src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c
1913 src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c
1914 src/f32-gemm/gen/1x8s4-minmax-neonfma.c
1915 src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c
1916 src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c
1917 src/f32-gemm/gen/4x8s4-minmax-neonfma.c
1918 src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c
1919 src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c
1920 src/f32-gemm/gen/6x8s4-minmax-neonfma.c
1921 src/f32-gemm/gen/8x8s4-minmax-neonfma.c
Artsiom Ablavatski2202c812021-01-22 14:16:43 -0800[diff] [blame]1922 src/f32-ibilinear-chw/gen/neonfma-p4.c
1923 src/f32-ibilinear-chw/gen/neonfma-p8.c
Frank Barchard8247e212021-02-03 18:12:33 -0800[diff] [blame]1924 src/f32-ibilinear/gen/neonfma-c4.c
1925 src/f32-ibilinear/gen/neonfma-c8.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1926 src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1927 src/f32-igemm/gen/1x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1928 src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1929 src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c
1930 src/f32-igemm/gen/4x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1931 src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c
1932 src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1933 src/f32-igemm/gen/6x8s4-minmax-neonfma.c
1934 src/f32-igemm/gen/8x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1935 src/f32-ppmm/gen/4x8-minmax-neonfma.c
1936 src/f32-ppmm/gen/8x8-minmax-neonfma.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1937 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1938 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1939 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1940 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c
1941 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1942 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1943 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c
1944 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1945 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1946 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c
1947 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1948 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c
1949 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c
1950 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c
1951 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c
1952 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c
1953 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c
1954 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c
1955 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c
1956 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c
1957 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c
1958 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c
1959 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c
1960 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -0800[diff] [blame]1961 src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c
1962 src/f32-spmm/gen/4x1-minmax-neonfma-x2.c
1963 src/f32-spmm/gen/4x1-minmax-neonfma.c
1964 src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c
1965 src/f32-spmm/gen/8x1-minmax-neonfma-x2.c
1966 src/f32-spmm/gen/8x1-minmax-neonfma.c
1967 src/f32-spmm/gen/12x1-minmax-neonfma.c
1968 src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c
1969 src/f32-spmm/gen/16x1-minmax-neonfma-x2.c
1970 src/f32-spmm/gen/16x1-minmax-neonfma.c
1971 src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c
1972 src/f32-spmm/gen/32x1-minmax-neonfma-x2.c
1973 src/f32-spmm/gen/32x1-minmax-neonfma.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]1974 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c
1975 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c
1976 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c
1977 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c
1978 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c
1979 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c
1980 src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c
1981 src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c
1982 src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c
1983 src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c
1984 src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c
1985 src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1986 src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c
1987 src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]1988 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c
1989 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c
1990 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c
1991 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c
1992 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c
1993 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c
1994 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c
1995 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c
1996 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c
1997 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c
1998 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c
1999 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c
2000 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c
2001 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c
2002 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c
2003 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c
2004 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c
2005 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c
2006 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c
2007 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c
2008 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c
2009 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c
2010 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c
2011 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c
2012 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c
2013 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c
2014 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c
2015 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c
2016 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c
2017 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c
2018 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c
2019 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c
2020 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c
2021 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c
2022 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c
2023 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c
2024 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c
2025 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c
2026 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c
2027 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c
2028 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c
2029 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c
2030 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c
2031 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c
2032 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c
2033 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c
2034 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c
2035 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c
2036 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c
2037 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c
2038 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c
2039 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c
2040 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c
2041 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]2042 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c
2043 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c
2044 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c
2045 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c
2046 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c
2047 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c
2048 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c
2049 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c
2050 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c
2051 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c
2052 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c
2053 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c
2054 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c
2055 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c
2056 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c
2057 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c
2058 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c
2059 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c
2060 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c
2061 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]2062 src/math/exp-neonfma-rr2-lut64-p2.c
2063 src/math/exp-neonfma-rr2-p5.c
Frank Barcharde7223ee2020-12-04 19:04:01 -0800[diff] [blame]2064 src/math/expm1minus-neonfma-rr1-lut16-p3.c
2065 src/math/expm1minus-neonfma-rr1-p6.c
Marat Dukhan9dd119a2020-11-20 18:20:04 -0800[diff] [blame]2066 src/math/expminus-neonfma-rr2-lut64-p2.c
2067 src/math/expminus-neonfma-rr2-lut2048-p1.c
2068 src/math/expminus-neonfma-rr2-p5.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2069 src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c
2070 src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c
2071 src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2072 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c
2073 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c
2074 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2075 src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c
2076 src/math/sigmoid-neonfma-rr1-p5-nr2fma.c
2077 src/math/sigmoid-neonfma-rr1-p5-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2078 src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c
2079 src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c
2080 src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2081 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c
2082 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c
2083 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2084 src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c
2085 src/math/sigmoid-neonfma-rr2-p5-nr2fma.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2086 src/math/sigmoid-neonfma-rr2-p5-nr2recps.c
2087 src/math/sqrt-neonfma-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2088 src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2089 src/math/sqrt-neonfma-nr2fma.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2090 src/math/sqrt-neonfma-nr2fma1adj.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2091 src/math/sqrt-neonfma-nr3fma.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2092
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2093SET(PROD_AARCH64_NEON_MICROKERNEL_SRCS
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2094 src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c
2095 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c
2096 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c
2097 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c
2098 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c
2099 src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c
2100 src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c
2101 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c
2102 src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c
2103 src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c
2104 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c
2105 src/f32-spmm/gen/32x2-minmax-neonfma.c
2106 src/f32-spmm/gen/32x4-minmax-neonfma.c
2107 src/f32-vbinary/gen/vdiv-minmax-neon-x8.c
2108 src/f32-vbinary/gen/vdivc-minmax-neon-x8.c
2109 src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c
Marat Dukhane4118ef2021-09-14 17:41:00 -0700[diff] [blame]2110 src/f32-vsqrt/gen/neon-sqrt-x4.c
2111 src/x8-lut/gen/lut-neon-tbx128x4-x64.c)
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2112
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2113SET(ALL_AARCH64_NEON_MICROKERNEL_SRCS
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]2114 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2115 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2116 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2117 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]2118 src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2119 src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2120 src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2121 src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]2122 src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2123 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c
2124 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c
2125 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c
Marat Dukhan1268a242020-10-24 00:36:32 -0700[diff] [blame]2126 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2127 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c
Marat Dukhan1268a242020-10-24 00:36:32 -0700[diff] [blame]2128 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c
2129 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c
2130 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c
2131 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c
2132 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]2133 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c
2134 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c
2135 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2136 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]2137 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2138 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c
2139 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c
2140 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2141 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c
2142 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c
2143 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c
2144 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2145 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2146 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c
2147 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2148 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2149 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2150 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2151 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2152 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c
2153 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]2154 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c
2155 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c
2156 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c
2157 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c
2158 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c
2159 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c
2160 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c
2161 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]2162 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2163 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2164 src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c
2165 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c
2166 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c
2167 src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c
2168 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c
2169 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c
2170 src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c
2171 src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c
2172 src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c
2173 src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c
2174 src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c
2175 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c
2176 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c
2177 src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c
2178 src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c
2179 src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c
2180 src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c
2181 src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c
2182 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c
2183 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2184 src/f32-spmm/gen/4x2-minmax-neonfma.c
2185 src/f32-spmm/gen/4x4-minmax-neonfma.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2186 src/f32-spmm/gen/8x2-minmax-neonfma.c
2187 src/f32-spmm/gen/8x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2188 src/f32-spmm/gen/12x2-minmax-neonfma.c
2189 src/f32-spmm/gen/12x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2190 src/f32-spmm/gen/16x2-minmax-neonfma.c
2191 src/f32-spmm/gen/16x4-minmax-neonfma.c
Frank Barchard846c0c62020-10-26 15:01:39 -0700[diff] [blame]2192 src/f32-spmm/gen/32x2-minmax-neonfma.c
2193 src/f32-spmm/gen/32x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2194 src/f32-vbinary/gen/vdiv-minmax-neon-x4.c
2195 src/f32-vbinary/gen/vdiv-minmax-neon-x8.c
2196 src/f32-vbinary/gen/vdivc-minmax-neon-x4.c
2197 src/f32-vbinary/gen/vdivc-minmax-neon-x8.c
2198 src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c
2199 src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2200 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c
2201 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c
2202 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c
2203 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c
2204 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c
2205 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c
2206 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c
2207 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c
2208 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c
2209 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c
2210 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c
2211 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c
2212 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c
2213 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c
2214 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c
2215 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c
2216 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c
2217 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]2218 src/f32-vsqrt/gen/neon-sqrt-x4.c
2219 src/f32-vsqrt/gen/neon-sqrt-x8.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2220 src/math/sigmoid-neonfma-rr1-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2221 src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2222 src/math/sigmoid-neonfma-rr1-p5-div.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2223 src/math/sigmoid-neonfma-rr2-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2224 src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2225 src/math/sigmoid-neonfma-rr2-p5-div.c
2226 src/x8-lut/gen/lut-neon-tbx128x4-x16.c
2227 src/x8-lut/gen/lut-neon-tbx128x4-x32.c
2228 src/x8-lut/gen/lut-neon-tbx128x4-x48.c
2229 src/x8-lut/gen/lut-neon-tbx128x4-x64.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2230
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2231SET(PROD_NEONV8_MICROKERNEL_SRCS
2232 src/f32-vrnd/gen/vrndd-neonv8-x8.c
2233 src/f32-vrnd/gen/vrndne-neonv8-x8.c
2234 src/f32-vrnd/gen/vrndu-neonv8-x8.c
2235 src/f32-vrnd/gen/vrndz-neonv8-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2236 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]2237 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c
2238 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2239 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2240 src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2241 src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2242 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2243 src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
2244 src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2245 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2246 src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2247 src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2248 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2249 src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]2250 src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2251 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2252 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2253 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2254 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2255
2256SET(ALL_NEONV8_MICROKERNEL_SRCS
2257 src/f32-vrnd/gen/vrndd-neonv8-x4.c
2258 src/f32-vrnd/gen/vrndd-neonv8-x8.c
2259 src/f32-vrnd/gen/vrndne-neonv8-x4.c
2260 src/f32-vrnd/gen/vrndne-neonv8-x8.c
2261 src/f32-vrnd/gen/vrndu-neonv8-x4.c
2262 src/f32-vrnd/gen/vrndu-neonv8-x8.c
2263 src/f32-vrnd/gen/vrndz-neonv8-x4.c
2264 src/f32-vrnd/gen/vrndz-neonv8-x8.c
2265 src/math/roundd-neonv8.c
2266 src/math/roundne-neonv8.c
2267 src/math/roundu-neonv8.c
2268 src/math/roundz-neonv8.c
2269 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c
2270 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c
2271 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2272 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c
2273 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c
2274 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2275 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c
2276 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c
2277 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c
2278 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c
2279 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2280 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c
2281 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c
2282 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c
2283 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c
2284 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2285 src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2286 src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2287 src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2288 src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
2289 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]2290 src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-padal-dup.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2291 src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2292 src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2293 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]2294 src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-padal-dup.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2295 src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
2296 src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2297 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]2298 src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-padal-dup.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2299 src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2300 src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2301 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]2302 src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-padal-dup.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2303 src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
2304 src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2305 src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2306 src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2307 src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2308 src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2309 src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2310 src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2311 src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2312 src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
2313 src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]2314 src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-padal-dup.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2315 src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2316 src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2317 src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]2318 src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-padal-dup.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2319 src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
2320 src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2321 src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]2322 src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-padal-dup.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2323 src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2324 src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2325 src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
Frank Barchard287952a2021-11-03 15:26:45 -0700[diff] [blame]2326 src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-padal-dup.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2327 src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
2328 src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2329 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c
2330 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2331 src/qs8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c
2332 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c
2333 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2334 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2335 src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2336 src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2337 src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2338 src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2339 src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2340 src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2341 src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2342 src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
2343 src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2344 src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2345 src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2346 src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2347 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c
2348 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2349 src/qu8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c
2350 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c
2351 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2352 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2353
2354SET(PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS
2355 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c
2356 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c
2357 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c
2358 src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c
2359 src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c
2360 src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c
2361 src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c
2362 src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c
2363 src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c
2364 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c
2365 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c
2366 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c
2367 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c
2368 src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c
2369 src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c)
2370
2371SET(ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]2372 src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c
2373 src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c
2374 src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c
2375 src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2376 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c
2377 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c
2378 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c
2379 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c
2380 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c
2381 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c
2382 src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c
2383 src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c
Frank Barchardc9f9d672021-10-18 12:51:59 -0700[diff] [blame]2384 src/f16-dwconv/gen/up32x4-minmax-neonfp16arith-acc2.c
2385 src/f16-dwconv/gen/up32x4-minmax-neonfp16arith.c
2386 src/f16-dwconv/gen/up32x9-minmax-neonfp16arith-acc2.c
2387 src/f16-dwconv/gen/up32x9-minmax-neonfp16arith.c
2388 src/f16-dwconv/gen/up32x25-minmax-neonfp16arith-acc2.c
2389 src/f16-dwconv/gen/up32x25-minmax-neonfp16arith.c
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]2390 src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c
2391 src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]2392 src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2393 src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2394 src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2395 src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2396 src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2397 src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2398 src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2399 src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2400 src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c
2401 src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c
2402 src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c
2403 src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c
2404 src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c
2405 src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c
2406 src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c
2407 src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2408 src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2409 src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2410 src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2411 src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2412 src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2413 src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2414 src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2415 src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2416 src/f16-prelu/gen/neonfp16arith-2x8.c
2417 src/f16-prelu/gen/neonfp16arith-2x16.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2418 src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2419 src/f16-spmm/gen/8x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2420 src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2421 src/f16-spmm/gen/16x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2422 src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2423 src/f16-spmm/gen/24x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2424 src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2425 src/f16-spmm/gen/32x1-minmax-neonfp16arith.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2426 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c
2427 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c
2428 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c
2429 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c
2430 src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c
2431 src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c
2432 src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c
2433 src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c
2434 src/f16-vbinary/gen/vmax-neonfp16arith-x8.c
2435 src/f16-vbinary/gen/vmax-neonfp16arith-x16.c
2436 src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c
2437 src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c
2438 src/f16-vbinary/gen/vmin-neonfp16arith-x8.c
2439 src/f16-vbinary/gen/vmin-neonfp16arith-x16.c
2440 src/f16-vbinary/gen/vminc-neonfp16arith-x8.c
2441 src/f16-vbinary/gen/vminc-neonfp16arith-x16.c
2442 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c
2443 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c
2444 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c
2445 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c
2446 src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c
2447 src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c
2448 src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c
2449 src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c
2450 src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c
2451 src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c
2452 src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c
2453 src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2454 src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c
2455 src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]2456 src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c
2457 src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2458 src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]2459 src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2460 src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c
2461 src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2462
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2463SET(PROD_NEONDOT_MICROKERNEL_SRCS
2464 src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c
2465 src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c
2466 src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c
2467 src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c
2468 src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c
2469 src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c
2470 src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c
2471 src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c
2472 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
2473 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
2474 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
2475 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
2476 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
2477 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
2478 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
Frank Barchard20255152021-08-11 14:01:45 -0700[diff] [blame]2479 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barchard8b698022021-08-26 11:17:32 -0700[diff] [blame]2480 src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
Frank Barchardde9c64a2021-08-17 18:32:50 -0700[diff] [blame]2481 src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
2482 src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c
2483 src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barchard8b698022021-08-26 11:17:32 -0700[diff] [blame]2484 src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
Frank Barchardde9c64a2021-08-17 18:32:50 -0700[diff] [blame]2485 src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
2486 src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c
2487 src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2488
2489SET(ALL_NEONDOT_MICROKERNEL_SRCS
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]2490 src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c
2491 src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c
2492 src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c
2493 src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c
2494 src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c
2495 src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c
2496 src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c
2497 src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c
2498 src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c
2499 src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c
2500 src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c
2501 src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c
2502 src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c
2503 src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c
2504 src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c
2505 src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c
Marat Dukhan18630de2021-06-02 22:20:01 -0700[diff] [blame]2506 src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c
2507 src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2508 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2509 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2510 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2511 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Marat Dukhan4486f872021-08-07 15:22:50 -0700[diff] [blame]2512 src/qs8-gemm/gen/6x8c4-minmax-rndnu-neondot.c
2513 src/qs8-gemm/gen/6x16c4-minmax-rndnu-neondot.c
2514 src/qs8-gemm/gen/8x8c4-minmax-rndnu-neondot.c
2515 src/qs8-gemm/gen/8x16c4-minmax-rndnu-neondot.c
Marat Dukhan18630de2021-06-02 22:20:01 -0700[diff] [blame]2516 src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c
2517 src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2518 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2519 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2520 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2521 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Marat Dukhan4486f872021-08-07 15:22:50 -0700[diff] [blame]2522 src/qs8-igemm/gen/6x8c4-minmax-rndnu-neondot.c
2523 src/qs8-igemm/gen/6x16c4-minmax-rndnu-neondot.c
2524 src/qs8-igemm/gen/8x8c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2525 src/qs8-igemm/gen/8x16c4-minmax-rndnu-neondot.c
2526 src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
2527 src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2528 src/qu8-gemm/gen/1x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2529 src/qu8-gemm/gen/2x8c4-minmax-rndnu-neondot.c
2530 src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2531 src/qu8-gemm/gen/2x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2532 src/qu8-gemm/gen/3x8c4-minmax-rndnu-neondot.c
2533 src/qu8-gemm/gen/3x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2534 src/qu8-gemm/gen/3x32c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2535 src/qu8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
2536 src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2537 src/qu8-gemm/gen/5x8c4-minmax-rndnu-neondot.c
2538 src/qu8-gemm/gen/5x16c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2539 src/qu8-gemm/gen/6x8c4-minmax-rndnu-neondot.c
2540 src/qu8-gemm/gen/6x16c4-minmax-rndnu-neondot.c
2541 src/qu8-gemm/gen/8x8c4-minmax-rndnu-neondot.c
2542 src/qu8-gemm/gen/8x16c4-minmax-rndnu-neondot.c
2543 src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
2544 src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2545 src/qu8-igemm/gen/1x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2546 src/qu8-igemm/gen/2x8c4-minmax-rndnu-neondot.c
2547 src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2548 src/qu8-igemm/gen/2x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2549 src/qu8-igemm/gen/3x8c4-minmax-rndnu-neondot.c
2550 src/qu8-igemm/gen/3x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2551 src/qu8-igemm/gen/3x32c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2552 src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
2553 src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2554 src/qu8-igemm/gen/5x8c4-minmax-rndnu-neondot.c
2555 src/qu8-igemm/gen/5x16c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2556 src/qu8-igemm/gen/6x8c4-minmax-rndnu-neondot.c
2557 src/qu8-igemm/gen/6x16c4-minmax-rndnu-neondot.c
2558 src/qu8-igemm/gen/8x8c4-minmax-rndnu-neondot.c
2559 src/qu8-igemm/gen/8x16c4-minmax-rndnu-neondot.c)
Benoit Jacoba9644732020-08-13 12:48:55 -0700[diff] [blame]2560
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2561SET(PROD_SSE_MICROKERNEL_SRCS
2562 src/f32-avgpool/9p8x-minmax-sse-c4.c
2563 src/f32-avgpool/9x-minmax-sse-c4.c
2564 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2565 src/f32-dwconv/gen/up8x3-minmax-sse.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2566 src/f32-dwconv/gen/up8x4-minmax-sse.c
2567 src/f32-dwconv/gen/up8x9-minmax-sse.c
2568 src/f32-dwconv/gen/up8x25-minmax-sse.c
2569 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c
2570 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c
2571 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c
2572 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c
2573 src/f32-gavgpool-cw/sse-x4.c
2574 src/f32-gavgpool/7p7x-minmax-sse-c4.c
2575 src/f32-gavgpool/7x-minmax-sse-c4.c
2576 src/f32-gemm/gen/1x8-minmax-sse-load1.c
2577 src/f32-gemm/gen/4x2c4-minmax-sse.c
2578 src/f32-gemm/gen/4x8-minmax-sse-load1.c
2579 src/f32-ibilinear-chw/gen/sse-p8.c
2580 src/f32-ibilinear/gen/sse-c8.c
2581 src/f32-igemm/gen/1x8-minmax-sse-load1.c
2582 src/f32-igemm/gen/4x2c4-minmax-sse.c
2583 src/f32-igemm/gen/4x8-minmax-sse-load1.c
2584 src/f32-maxpool/9p8x-minmax-sse-c4.c
2585 src/f32-pavgpool/9p8x-minmax-sse-c4.c
2586 src/f32-pavgpool/9x-minmax-sse-c4.c
2587 src/f32-rmax/sse.c
2588 src/f32-spmm/gen/32x1-minmax-sse.c
2589 src/f32-vbinary/gen/vadd-minmax-sse-x8.c
2590 src/f32-vbinary/gen/vaddc-minmax-sse-x8.c
2591 src/f32-vbinary/gen/vdiv-minmax-sse-x8.c
2592 src/f32-vbinary/gen/vdivc-minmax-sse-x8.c
2593 src/f32-vbinary/gen/vmax-sse-x8.c
2594 src/f32-vbinary/gen/vmaxc-sse-x8.c
2595 src/f32-vbinary/gen/vmin-sse-x8.c
2596 src/f32-vbinary/gen/vminc-sse-x8.c
2597 src/f32-vbinary/gen/vmul-minmax-sse-x8.c
2598 src/f32-vbinary/gen/vmulc-minmax-sse-x8.c
2599 src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c
2600 src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c
2601 src/f32-vbinary/gen/vsqrdiff-sse-x8.c
2602 src/f32-vbinary/gen/vsqrdiffc-sse-x8.c
2603 src/f32-vbinary/gen/vsub-minmax-sse-x8.c
2604 src/f32-vbinary/gen/vsubc-minmax-sse-x8.c
2605 src/f32-vclamp/gen/vclamp-sse-x8.c
2606 src/f32-vhswish/gen/vhswish-sse-x8.c
2607 src/f32-vlrelu/gen/vlrelu-sse-x8.c
2608 src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c
2609 src/f32-vsqrt/gen/sse-sqrt-x4.c
2610 src/f32-vunary/gen/vabs-sse-x8.c
2611 src/f32-vunary/gen/vneg-sse-x8.c
2612 src/f32-vunary/gen/vsqr-sse-x8.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]2613 src/x32-packx/x4-sse.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2614
2615SET(ALL_SSE_MICROKERNEL_SRCS
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2616 src/f32-avgpool/9p8x-minmax-sse-c4.c
2617 src/f32-avgpool/9x-minmax-sse-c4.c
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]2618 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c
2619 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2620 src/f32-dwconv/gen/up4x3-minmax-sse-acc2.c
2621 src/f32-dwconv/gen/up4x3-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2622 src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c
2623 src/f32-dwconv/gen/up4x4-minmax-sse.c
2624 src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c
2625 src/f32-dwconv/gen/up4x9-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2626 src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c
2627 src/f32-dwconv/gen/up4x25-minmax-sse.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2628 src/f32-dwconv/gen/up8x3-minmax-sse-acc2.c
2629 src/f32-dwconv/gen/up8x3-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2630 src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c
2631 src/f32-dwconv/gen/up8x4-minmax-sse.c
2632 src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c
2633 src/f32-dwconv/gen/up8x9-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2634 src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c
2635 src/f32-dwconv/gen/up8x25-minmax-sse.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2636 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c
2637 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c
2638 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c
Marat Dukhan470078a2020-10-23 22:36:52 -0700[diff] [blame]2639 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2640 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c
Marat Dukhan470078a2020-10-23 22:36:52 -0700[diff] [blame]2641 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c
2642 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c
2643 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c
2644 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c
2645 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c
Marat Dukhan0ff97182020-10-25 19:14:03 -0700[diff] [blame]2646 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c
2647 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c
2648 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2649 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c
Marat Dukhan0ff97182020-10-25 19:14:03 -0700[diff] [blame]2650 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2651 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c
2652 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c
2653 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c
Marat Dukhand0503892020-10-30 08:22:04 -0700[diff] [blame]2654 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c
2655 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c
2656 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c
2657 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c
2658 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c
2659 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c
2660 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c
2661 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c
2662 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c
2663 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c
2664 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c
2665 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c
2666 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c
Marat Dukhanccca2142020-10-30 17:32:45 -0700[diff] [blame]2667 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c
2668 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c
2669 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c
2670 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c
2671 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c
2672 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c
2673 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c
2674 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c
Marat Dukhanccca2142020-10-30 17:32:45 -0700[diff] [blame]2675 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c
Frank Barchard9cef5ea2020-11-18 14:52:08 -0800[diff] [blame]2676 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]2677 src/f32-gavgpool-cw/sse-x4.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]2678 src/f32-gavgpool/7p7x-minmax-sse-c4.c
2679 src/f32-gavgpool/7x-minmax-sse-c4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2680 src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c
2681 src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c
2682 src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2683 src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c
2684 src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c
2685 src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2686 src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c
2687 src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c
2688 src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2689 src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c
2690 src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c
2691 src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2692 src/f32-gemm/gen/1x8-minmax-sse-dup.c
2693 src/f32-gemm/gen/1x8-minmax-sse-load1.c
2694 src/f32-gemm/gen/1x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2695 src/f32-gemm/gen/3x8-minmax-sse-dup.c
2696 src/f32-gemm/gen/3x8-minmax-sse-load1.c
2697 src/f32-gemm/gen/3x8s4-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2698 src/f32-gemm/gen/4x2c4-minmax-sse.c
2699 src/f32-gemm/gen/4x8-minmax-sse-dup.c
2700 src/f32-gemm/gen/4x8-minmax-sse-load1.c
2701 src/f32-gemm/gen/4x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2702 src/f32-gemm/gen/5x8-minmax-sse-dup.c
2703 src/f32-gemm/gen/5x8-minmax-sse-load1.c
2704 src/f32-gemm/gen/5x8s4-minmax-sse.c
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -0700[diff] [blame]2705 src/f32-ibilinear-chw/gen/sse-p4.c
2706 src/f32-ibilinear-chw/gen/sse-p8.c
Frank Barchard4a352042021-04-13 15:52:08 -0700[diff] [blame]2707 src/f32-ibilinear/gen/sse-c4.c
2708 src/f32-ibilinear/gen/sse-c8.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2709 src/f32-igemm/gen/1x8-minmax-sse-dup.c
2710 src/f32-igemm/gen/1x8-minmax-sse-load1.c
2711 src/f32-igemm/gen/1x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2712 src/f32-igemm/gen/3x8-minmax-sse-dup.c
2713 src/f32-igemm/gen/3x8-minmax-sse-load1.c
2714 src/f32-igemm/gen/3x8s4-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2715 src/f32-igemm/gen/4x2c4-minmax-sse.c
2716 src/f32-igemm/gen/4x8-minmax-sse-dup.c
2717 src/f32-igemm/gen/4x8-minmax-sse-load1.c
2718 src/f32-igemm/gen/4x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2719 src/f32-igemm/gen/5x8-minmax-sse-dup.c
2720 src/f32-igemm/gen/5x8-minmax-sse-load1.c
2721 src/f32-igemm/gen/5x8s4-minmax-sse.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2722 src/f32-maxpool/9p8x-minmax-sse-c4.c
2723 src/f32-pavgpool/9p8x-minmax-sse-c4.c
2724 src/f32-pavgpool/9x-minmax-sse-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2725 src/f32-ppmm/gen/4x8-minmax-sse.c
Marat Dukhan39b5e942020-06-24 15:03:48 -0700[diff] [blame]2726 src/f32-prelu/gen/sse-2x4.c
2727 src/f32-prelu/gen/sse-2x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2728 src/f32-rmax/sse.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2729 src/f32-spmm/gen/4x1-minmax-sse.c
2730 src/f32-spmm/gen/8x1-minmax-sse.c
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]2731 src/f32-spmm/gen/16x1-minmax-sse.c
Frank Barchard846c0c62020-10-26 15:01:39 -0700[diff] [blame]2732 src/f32-spmm/gen/32x1-minmax-sse.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]2733 src/f32-vbinary/gen/vadd-minmax-sse-x4.c
2734 src/f32-vbinary/gen/vadd-minmax-sse-x8.c
2735 src/f32-vbinary/gen/vaddc-minmax-sse-x4.c
2736 src/f32-vbinary/gen/vaddc-minmax-sse-x8.c
2737 src/f32-vbinary/gen/vdiv-minmax-sse-x4.c
2738 src/f32-vbinary/gen/vdiv-minmax-sse-x8.c
2739 src/f32-vbinary/gen/vdivc-minmax-sse-x4.c
2740 src/f32-vbinary/gen/vdivc-minmax-sse-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]2741 src/f32-vbinary/gen/vmax-sse-x4.c
2742 src/f32-vbinary/gen/vmax-sse-x8.c
2743 src/f32-vbinary/gen/vmaxc-sse-x4.c
2744 src/f32-vbinary/gen/vmaxc-sse-x8.c
2745 src/f32-vbinary/gen/vmin-sse-x4.c
2746 src/f32-vbinary/gen/vmin-sse-x8.c
2747 src/f32-vbinary/gen/vminc-sse-x4.c
2748 src/f32-vbinary/gen/vminc-sse-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]2749 src/f32-vbinary/gen/vmul-minmax-sse-x4.c
2750 src/f32-vbinary/gen/vmul-minmax-sse-x8.c
2751 src/f32-vbinary/gen/vmulc-minmax-sse-x4.c
2752 src/f32-vbinary/gen/vmulc-minmax-sse-x8.c
2753 src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c
2754 src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c
2755 src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c
2756 src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]2757 src/f32-vbinary/gen/vsqrdiff-sse-x4.c
2758 src/f32-vbinary/gen/vsqrdiff-sse-x8.c
2759 src/f32-vbinary/gen/vsqrdiffc-sse-x4.c
2760 src/f32-vbinary/gen/vsqrdiffc-sse-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]2761 src/f32-vbinary/gen/vsub-minmax-sse-x4.c
2762 src/f32-vbinary/gen/vsub-minmax-sse-x8.c
2763 src/f32-vbinary/gen/vsubc-minmax-sse-x4.c
2764 src/f32-vbinary/gen/vsubc-minmax-sse-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]2765 src/f32-vclamp/gen/vclamp-sse-x4.c
2766 src/f32-vclamp/gen/vclamp-sse-x8.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]2767 src/f32-vhswish/gen/vhswish-sse-x4.c
2768 src/f32-vhswish/gen/vhswish-sse-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2769 src/f32-vlrelu/gen/vlrelu-sse-x4.c
2770 src/f32-vlrelu/gen/vlrelu-sse-x8.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2771 src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c
2772 src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]2773 src/f32-vrelu/gen/vrelu-sse-x4.c
2774 src/f32-vrelu/gen/vrelu-sse-x8.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]2775 src/f32-vsqrt/gen/sse-sqrt-x4.c
2776 src/f32-vsqrt/gen/sse-sqrt-x8.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]2777 src/f32-vunary/gen/vabs-sse-x4.c
2778 src/f32-vunary/gen/vabs-sse-x8.c
2779 src/f32-vunary/gen/vneg-sse-x4.c
2780 src/f32-vunary/gen/vneg-sse-x8.c
2781 src/f32-vunary/gen/vsqr-sse-x4.c
2782 src/f32-vunary/gen/vsqr-sse-x8.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]2783 src/math/roundd-sse-addsub.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2784 src/math/roundne-sse-addsub.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]2785 src/math/roundu-sse-addsub.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2786 src/math/roundz-sse-addsub.c
2787 src/math/sqrt-sse-hh1mac.c
2788 src/math/sqrt-sse-nr1mac.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2789 src/math/sqrt-sse-nr2mac.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]2790 src/x32-packx/x4-sse.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2791
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2792SET(PROD_SSE2_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]2793 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2794 src/f32-argmaxpool/4x-sse2-c4.c
2795 src/f32-argmaxpool/9p8x-sse2-c4.c
2796 src/f32-argmaxpool/9x-sse2-c4.c
2797 src/f32-prelu/gen/sse2-2x8.c
2798 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c
2799 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c
2800 src/f32-vlrelu/gen/vlrelu-sse2-x8.c
2801 src/f32-vrnd/gen/vrndd-sse2-x8.c
2802 src/f32-vrnd/gen/vrndne-sse2-x8.c
2803 src/f32-vrnd/gen/vrndu-sse2-x8.c
2804 src/f32-vrnd/gen/vrndz-sse2-x8.c
2805 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c
2806 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
2807 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
2808 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2809 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2810 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2811 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2812 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
2813 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
2814 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c
2815 src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c
2816 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2817 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2818 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2819 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2820 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
2821 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]2822 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
2823 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2824 src/qu8-avgpool/9p8x-minmax-sse2-c8.c
2825 src/qu8-avgpool/9x-minmax-sse2-c8.c
2826 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
2827 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
2828 src/qu8-gavgpool/7p7x-minmax-sse2-c8.c
2829 src/qu8-gavgpool/7x-minmax-sse2-c8.c
2830 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2831 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2832 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2833 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2834 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
2835 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]2836 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
2837 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]2838 src/s8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]2839 src/s8-vclamp/sse2-x64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2840 src/u8-maxpool/9p8x-minmax-sse2-c16.c
2841 src/u8-rmax/sse2.c
2842 src/u8-vclamp/sse2-x64.c
2843 src/x8-zip/x2-sse2.c
2844 src/x8-zip/x3-sse2.c
2845 src/x8-zip/x4-sse2.c
2846 src/x8-zip/xm-sse2.c
2847 src/x32-unpool/sse2.c
2848 src/x32-zip/x2-sse2.c
2849 src/x32-zip/x3-sse2.c
2850 src/x32-zip/x4-sse2.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]2851 src/x32-zip/xm-sse2.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]2852 src/xx-fill/sse2-x64.c
2853 src/xx-pad/sse2.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2854
2855SET(ALL_SSE2_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]2856 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x8.c
2857 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x16.c
2858 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x24.c
2859 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c
2860 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x8.c
2861 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x16.c
2862 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x24.c
2863 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x32.c
Ashkan Aliabadif866a452019-11-20 10:58:51 -0800[diff] [blame]2864 src/f32-argmaxpool/4x-sse2-c4.c
2865 src/f32-argmaxpool/9p8x-sse2-c4.c
2866 src/f32-argmaxpool/9x-sse2-c4.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2867 src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c
2868 src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c
2869 src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c
2870 src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c
2871 src/f32-gemm/gen/1x8-minmax-sse2-dup.c
2872 src/f32-gemm/gen/3x8-minmax-sse2-dup.c
2873 src/f32-gemm/gen/4x8-minmax-sse2-dup.c
2874 src/f32-gemm/gen/5x8-minmax-sse2-dup.c
2875 src/f32-igemm/gen/1x8-minmax-sse2-dup.c
2876 src/f32-igemm/gen/3x8-minmax-sse2-dup.c
2877 src/f32-igemm/gen/4x8-minmax-sse2-dup.c
2878 src/f32-igemm/gen/5x8-minmax-sse2-dup.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]2879 src/f32-prelu/gen/sse2-2x4.c
2880 src/f32-prelu/gen/sse2-2x8.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]2881 src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]2882 src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2883 src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]2884 src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c
2885 src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2886 src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]2887 src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c
2888 src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2889 src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]2890 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c
2891 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2892 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]2893 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c
2894 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c
2895 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c
2896 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c
2897 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c
2898 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c
2899 src/f32-velu/gen/velu-sse2-rr2-p6-x4.c
2900 src/f32-velu/gen/velu-sse2-rr2-p6-x8.c
2901 src/f32-velu/gen/velu-sse2-rr2-p6-x12.c
2902 src/f32-velu/gen/velu-sse2-rr2-p6-x16.c
2903 src/f32-velu/gen/velu-sse2-rr2-p6-x20.c
2904 src/f32-velu/gen/velu-sse2-rr2-p6-x24.c
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700[diff] [blame]2905 src/f32-vlrelu/gen/vlrelu-sse2-x4.c
2906 src/f32-vlrelu/gen/vlrelu-sse2-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]2907 src/f32-vrnd/gen/vrndd-sse2-x4.c
2908 src/f32-vrnd/gen/vrndd-sse2-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2909 src/f32-vrnd/gen/vrndne-sse2-x4.c
2910 src/f32-vrnd/gen/vrndne-sse2-x8.c
2911 src/f32-vrnd/gen/vrndu-sse2-x4.c
2912 src/f32-vrnd/gen/vrndu-sse2-x8.c
2913 src/f32-vrnd/gen/vrndz-sse2-x4.c
2914 src/f32-vrnd/gen/vrndz-sse2-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2915 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c
2916 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c
2917 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c
2918 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c
2919 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c
2920 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c
2921 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c
2922 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c
2923 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c
2924 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c
2925 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c
2926 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]2927 src/math/cvt-f16-f32-sse2-int16.c
2928 src/math/cvt-f16-f32-sse2-int32.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]2929 src/math/exp-sse2-rr2-lut64-p2.c
2930 src/math/exp-sse2-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]2931 src/math/expm1minus-sse2-rr2-lut16-p3.c
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]2932 src/math/expm1minus-sse2-rr2-p6.c
Frank Barchard22136062020-11-24 18:44:46 -0800[diff] [blame]2933 src/math/expminus-sse2-rr2-p5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2934 src/math/roundd-sse2-cvt.c
2935 src/math/roundne-sse2-cvt.c
2936 src/math/roundu-sse2-cvt.c
2937 src/math/roundz-sse2-cvt.c
2938 src/math/sigmoid-sse2-rr2-lut64-p2-div.c
2939 src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c
2940 src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c
2941 src/math/sigmoid-sse2-rr2-p5-div.c
2942 src/math/sigmoid-sse2-rr2-p5-nr1.c
2943 src/math/sigmoid-sse2-rr2-p5-nr2.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2944 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2945 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2946 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2947 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2948 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2949 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2950 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2951 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]2952 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c
2953 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2954 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2955 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2956 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2957 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
2958 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
2959 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
2960 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
2961 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
2962 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
2963 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
2964 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2965 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
2966 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
2967 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2968 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2969 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2970 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2971 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2972 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2973 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2974 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2975 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2976 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2977 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2978 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2979 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2980 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2981 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2982 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2983 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]2984 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2985 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2986 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2987 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2988 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2989 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2990 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2991 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2992 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2993 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c
2994 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c
2995 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c
2996 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c
2997 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]2998 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c
2999 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c
3000 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]3001 src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c
3002 src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c
3003 src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3004 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3005 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3006 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3007 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3008 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3009 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3010 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3011 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3012 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3013 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3014 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3015 src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3016 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3017 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3018 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3019 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3020 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3021 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3022 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3023 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3024 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3025 src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3026 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3027 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3028 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3029 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3030 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3031 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3032 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3033 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3034 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3035 src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3036 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3037 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3038 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3039 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3040 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3041 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3042 src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]3043 src/qs8-requantization/fp32-sse2.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3044 src/qs8-requantization/gemmlowp-sse2.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3045 src/qs8-requantization/rndna-sse2.c
Marat Dukhand9f3ad42020-08-10 12:30:58 -0700[diff] [blame]3046 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3047 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
3048 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c
3049 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]3050 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
3051 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
3052 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c
3053 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3054 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3055 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c
3056 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3057 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]3058 src/qu8-avgpool/9p8x-minmax-sse2-c8.c
3059 src/qu8-avgpool/9x-minmax-sse2-c8.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3060 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
3061 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
3062 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
3063 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]3064 src/qu8-gavgpool/7p7x-minmax-sse2-c8.c
3065 src/qu8-gavgpool/7x-minmax-sse2-c8.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3066 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
3067 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
3068 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3069 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
3070 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
3071 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
3072 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
3073 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3074 src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3075 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
3076 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
3077 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3078 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
3079 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
3080 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3081 src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3082 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
3083 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
3084 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3085 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
3086 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
3087 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
3088 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
3089 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3090 src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3091 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
3092 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
3093 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3094 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
3095 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
3096 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3097 src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]3098 src/qu8-requantization/fp32-sse2.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3099 src/qu8-requantization/gemmlowp-sse2.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3100 src/qu8-requantization/rndna-sse2.c
Marat Dukhan28c82b22021-07-21 13:48:45 -0700[diff] [blame]3101 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3102 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
3103 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
3104 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3105 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3106 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c
3107 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3108 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3109 src/s8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3110 src/s8-vclamp/sse2-x64.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3111 src/u8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3112 src/u8-rmax/sse2.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]3113 src/u8-vclamp/sse2-x64.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3114 src/x8-zip/x2-sse2.c
3115 src/x8-zip/x3-sse2.c
3116 src/x8-zip/x4-sse2.c
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]3117 src/x8-zip/xm-sse2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3118 src/x32-unpool/sse2.c
3119 src/x32-zip/x2-sse2.c
3120 src/x32-zip/x3-sse2.c
3121 src/x32-zip/x4-sse2.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]3122 src/x32-zip/xm-sse2.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]3123 src/xx-fill/sse2-x64.c
3124 src/xx-pad/sse2.c)
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3125
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3126SET(PROD_SSSE3_MICROKERNEL_SRCS
3127 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c
3128 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c
3129 src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c)
3130
3131SET(ALL_SSSE3_MICROKERNEL_SRCS
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3132 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c
3133 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c
3134 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c
Marat Dukhan98f2eeb2020-10-23 23:13:41 -0700[diff] [blame]3135 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3136 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c
Marat Dukhan98f2eeb2020-10-23 23:13:41 -0700[diff] [blame]3137 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c
3138 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c
3139 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c
3140 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c
3141 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]3142 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3143 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c
3144 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c
3145 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c
3146 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c
3147 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]3148 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c
3149 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c
3150 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]3151 src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c
3152 src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c
3153 src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3154 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3155 src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3156 src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3157 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3158 src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3159 src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3160 src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3161 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3162 src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3163 src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3164 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3165 src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3166 src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3167 src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3168 src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3169 src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3170 src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3171 src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3172 src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3173 src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3174 src/qs8-requantization/gemmlowp-ssse3.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3175 src/qs8-requantization/rndna-ssse3.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3176 src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c
3177 src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c
3178 src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c
3179 src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3180 src/qu8-requantization/gemmlowp-ssse3.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]3181 src/qu8-requantization/rndna-ssse3.c
3182 src/x8-lut/gen/lut-ssse3-x16.c
3183 src/x8-lut/gen/lut-ssse3-x32.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3184
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3185SET(PROD_SSE41_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]3186 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3187 src/f32-prelu/gen/sse41-2x8.c
3188 src/f32-vlrelu/gen/vlrelu-sse41-x8.c
3189 src/f32-vrnd/gen/vrndd-sse41-x8.c
3190 src/f32-vrnd/gen/vrndne-sse41-x8.c
3191 src/f32-vrnd/gen/vrndu-sse41-x8.c
3192 src/f32-vrnd/gen/vrndz-sse41-x8.c
3193 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c
3194 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
3195 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
3196 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3197 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3198 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3199 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3200 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
3201 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
3202 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c
3203 src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c
3204 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3205 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3206 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3207 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3208 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
3209 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3210 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
3211 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3212 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
3213 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
3214 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3215 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3216 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3217 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3218 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3219 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
3220 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3221 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3222 src/s8-maxpool/9p8x-minmax-sse41-c16.c
3223 src/s8-vclamp/sse41-x64.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3224
3225SET(ALL_SSE41_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]3226 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x8.c
3227 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c
3228 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x24.c
3229 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x32.c
3230 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x8.c
3231 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x16.c
3232 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x24.c
3233 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x32.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]3234 src/f32-prelu/gen/sse41-2x4.c
3235 src/f32-prelu/gen/sse41-2x8.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]3236 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c
3237 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c
3238 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c
3239 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c
3240 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c
3241 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c
3242 src/f32-velu/gen/velu-sse41-rr2-p6-x4.c
3243 src/f32-velu/gen/velu-sse41-rr2-p6-x8.c
3244 src/f32-velu/gen/velu-sse41-rr2-p6-x12.c
3245 src/f32-velu/gen/velu-sse41-rr2-p6-x16.c
3246 src/f32-velu/gen/velu-sse41-rr2-p6-x20.c
3247 src/f32-velu/gen/velu-sse41-rr2-p6-x24.c
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700[diff] [blame]3248 src/f32-vlrelu/gen/vlrelu-sse41-x4.c
3249 src/f32-vlrelu/gen/vlrelu-sse41-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]3250 src/f32-vrnd/gen/vrndd-sse41-x4.c
3251 src/f32-vrnd/gen/vrndd-sse41-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3252 src/f32-vrnd/gen/vrndne-sse41-x4.c
3253 src/f32-vrnd/gen/vrndne-sse41-x8.c
3254 src/f32-vrnd/gen/vrndu-sse41-x4.c
3255 src/f32-vrnd/gen/vrndu-sse41-x8.c
3256 src/f32-vrnd/gen/vrndz-sse41-x4.c
3257 src/f32-vrnd/gen/vrndz-sse41-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]3258 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c
3259 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c
3260 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c
3261 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c
3262 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c
3263 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c
3264 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c
3265 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c
3266 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c
3267 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c
3268 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c
3269 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]3270 src/math/cvt-f16-f32-sse41-int16.c
3271 src/math/cvt-f16-f32-sse41-int32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3272 src/math/roundd-sse41.c
3273 src/math/roundne-sse41.c
3274 src/math/roundu-sse41.c
3275 src/math/roundz-sse41.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3276 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3277 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3278 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3279 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3280 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3281 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3282 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3283 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3284 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3285 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3286 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3287 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
3288 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c
3289 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c
3290 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c
3291 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3292 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3293 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3294 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3295 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3296 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3297 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3298 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3299 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3300 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3301 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3302 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3303 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3304 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3305 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3306 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3307 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3308 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3309 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3310 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3311 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3312 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3313 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3314 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3315 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3316 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3317 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3318 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3319 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3320 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3321 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]3322 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
3323 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c
3324 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3325 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3326 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3327 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
3328 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c
3329 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3330 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3331 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3332 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
3333 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c
3334 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3335 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3336 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3337 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
3338 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c
3339 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c
3340 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c
3341 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c
3342 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c
3343 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c
3344 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c
3345 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c
3346 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c
3347 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]3348 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c
3349 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c
3350 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]3351 src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c
3352 src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c
3353 src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3354 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3355 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3356 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3357 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3358 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3359 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3360 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3361 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3362 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3363 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3364 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3365 src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3366 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3367 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3368 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3369 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3370 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3371 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3372 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3373 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3374 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3375 src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3376 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3377 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3378 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3379 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3380 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3381 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3382 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3383 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3384 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3385 src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3386 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3387 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3388 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3389 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3390 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3391 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3392 src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]3393 src/qs8-requantization/fp32-sse4.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3394 src/qs8-requantization/gemmlowp-sse4.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3395 src/qs8-requantization/rndna-sse4.c
Marat Dukhan0d979d52021-06-09 13:21:18 -0700[diff] [blame]3396 src/qs8-requantization/rndnu-sse4-sra.c
3397 src/qs8-requantization/rndnu-sse4-srl.c
Marat Dukhand9f3ad42020-08-10 12:30:58 -0700[diff] [blame]3398 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
3399 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
3400 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c
3401 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]3402 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
3403 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
3404 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c
3405 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]3406 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
3407 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
3408 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c
3409 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]3410 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
3411 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
3412 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c
3413 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3414 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c
3415 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
3416 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c
3417 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3418 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3419 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3420 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3421 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3422 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3423 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3424 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3425 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3426 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
3427 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
3428 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3429 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
3430 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
3431 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
3432 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
3433 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3434 src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3435 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
3436 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
3437 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3438 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
3439 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
3440 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3441 src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3442 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
3443 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
3444 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3445 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
3446 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
3447 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
3448 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
3449 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3450 src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3451 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
3452 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
3453 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3454 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
3455 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
3456 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3457 src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3458 src/qu8-requantization/gemmlowp-sse4.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]3459 src/qu8-requantization/rndna-sse4.c
3460 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
3461 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
3462 src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
3463 src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
3464 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
3465 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
3466 src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3467 src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
3468 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c
3469 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
3470 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3471 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3472 src/s8-maxpool/9p8x-minmax-sse41-c16.c
3473 src/s8-vclamp/sse41-x64.c)
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]3474
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3475SET(PROD_AVX_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]3476 src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3477 src/f32-dwconv/gen/up8x25-minmax-avx.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]3478 src/f32-dwconv/gen/up16x3-minmax-avx.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3479 src/f32-dwconv/gen/up16x4-minmax-avx.c
3480 src/f32-dwconv/gen/up16x9-minmax-avx.c
3481 src/f32-gemm/gen/1x16-minmax-avx-broadcast.c
3482 src/f32-gemm/gen/5x16-minmax-avx-broadcast.c
3483 src/f32-igemm/gen/1x16-minmax-avx-broadcast.c
3484 src/f32-igemm/gen/5x16-minmax-avx-broadcast.c
3485 src/f32-prelu/gen/avx-2x16.c
3486 src/f32-vbinary/gen/vadd-minmax-avx-x16.c
3487 src/f32-vbinary/gen/vaddc-minmax-avx-x16.c
3488 src/f32-vbinary/gen/vdiv-minmax-avx-x16.c
3489 src/f32-vbinary/gen/vdivc-minmax-avx-x16.c
3490 src/f32-vbinary/gen/vmax-avx-x16.c
3491 src/f32-vbinary/gen/vmaxc-avx-x16.c
3492 src/f32-vbinary/gen/vmin-avx-x16.c
3493 src/f32-vbinary/gen/vminc-avx-x16.c
3494 src/f32-vbinary/gen/vmul-minmax-avx-x16.c
3495 src/f32-vbinary/gen/vmulc-minmax-avx-x16.c
3496 src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c
3497 src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c
3498 src/f32-vbinary/gen/vsqrdiff-avx-x16.c
3499 src/f32-vbinary/gen/vsqrdiffc-avx-x16.c
3500 src/f32-vbinary/gen/vsub-minmax-avx-x16.c
3501 src/f32-vbinary/gen/vsubc-minmax-avx-x16.c
3502 src/f32-vclamp/gen/vclamp-avx-x16.c
3503 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c
3504 src/f32-vhswish/gen/vhswish-avx-x16.c
3505 src/f32-vlrelu/gen/vlrelu-avx-x16.c
3506 src/f32-vrnd/gen/vrndd-avx-x16.c
3507 src/f32-vrnd/gen/vrndne-avx-x16.c
3508 src/f32-vrnd/gen/vrndu-avx-x16.c
3509 src/f32-vrnd/gen/vrndz-avx-x16.c
3510 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c
3511 src/f32-vsqrt/gen/avx-sqrt-x8.c
3512 src/f32-vunary/gen/vabs-avx-x16.c
3513 src/f32-vunary/gen/vneg-avx-x16.c
3514 src/f32-vunary/gen/vsqr-avx-x16.c
Marat Dukhan28480592021-07-27 23:52:27 -0700[diff] [blame]3515 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
3516 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3517 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3518 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3519 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3520 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3521 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
3522 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
3523 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3524 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3525 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3526 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3527 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
3528 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3529 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
3530 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3531 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
3532 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
3533 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3534 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3535 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3536 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3537 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3538 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
3539 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]3540 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
3541 src/x8-lut/gen/lut-avx-x64.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3542
3543SET(ALL_AVX_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]3544 src/f16-f32-vcvt/gen/vcvt-avx-int16-x8.c
3545 src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c
3546 src/f16-f32-vcvt/gen/vcvt-avx-int16-x24.c
3547 src/f16-f32-vcvt/gen/vcvt-avx-int16-x32.c
3548 src/f16-f32-vcvt/gen/vcvt-avx-int32-x8.c
3549 src/f16-f32-vcvt/gen/vcvt-avx-int32-x16.c
3550 src/f16-f32-vcvt/gen/vcvt-avx-int32-x24.c
3551 src/f16-f32-vcvt/gen/vcvt-avx-int32-x32.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]3552 src/f32-dwconv/gen/up8x3-minmax-avx-acc2.c
3553 src/f32-dwconv/gen/up8x3-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3554 src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c
3555 src/f32-dwconv/gen/up8x4-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3556 src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c
3557 src/f32-dwconv/gen/up8x9-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3558 src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c
3559 src/f32-dwconv/gen/up8x25-minmax-avx.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]3560 src/f32-dwconv/gen/up16x3-minmax-avx-acc2.c
3561 src/f32-dwconv/gen/up16x3-minmax-avx.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3562 src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c
3563 src/f32-dwconv/gen/up16x4-minmax-avx.c
3564 src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c
3565 src/f32-dwconv/gen/up16x9-minmax-avx.c
3566 src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c
3567 src/f32-dwconv/gen/up16x25-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3568 src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3569 src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c
3570 src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3571 src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3572 src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3573 src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3574 src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3575 src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c
3576 src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c
3577 src/f32-gemm/gen/1x8-minmax-avx-broadcast.c
3578 src/f32-gemm/gen/1x16-minmax-avx-broadcast.c
3579 src/f32-gemm/gen/3x16-minmax-avx-broadcast.c
3580 src/f32-gemm/gen/4x8-minmax-avx-broadcast.c
3581 src/f32-gemm/gen/4x16-minmax-avx-broadcast.c
3582 src/f32-gemm/gen/5x8-minmax-avx-broadcast.c
3583 src/f32-gemm/gen/5x16-minmax-avx-broadcast.c
3584 src/f32-gemm/gen/6x8-minmax-avx-broadcast.c
3585 src/f32-gemm/gen/7x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3586 src/f32-igemm/gen/1x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3587 src/f32-igemm/gen/1x16-minmax-avx-broadcast.c
3588 src/f32-igemm/gen/3x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3589 src/f32-igemm/gen/4x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3590 src/f32-igemm/gen/4x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3591 src/f32-igemm/gen/5x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3592 src/f32-igemm/gen/5x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3593 src/f32-igemm/gen/6x8-minmax-avx-broadcast.c
3594 src/f32-igemm/gen/7x8-minmax-avx-broadcast.c
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]3595 src/f32-prelu/gen/avx-2x8.c
3596 src/f32-prelu/gen/avx-2x16.c
Marat Dukhana5977df2019-10-30 22:02:15 -0700[diff] [blame]3597 src/f32-rmax/avx.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3598 src/f32-vbinary/gen/vadd-minmax-avx-x8.c
3599 src/f32-vbinary/gen/vadd-minmax-avx-x16.c
3600 src/f32-vbinary/gen/vaddc-minmax-avx-x8.c
3601 src/f32-vbinary/gen/vaddc-minmax-avx-x16.c
3602 src/f32-vbinary/gen/vdiv-minmax-avx-x8.c
3603 src/f32-vbinary/gen/vdiv-minmax-avx-x16.c
3604 src/f32-vbinary/gen/vdivc-minmax-avx-x8.c
3605 src/f32-vbinary/gen/vdivc-minmax-avx-x16.c
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]3606 src/f32-vbinary/gen/vmax-avx-x8.c
3607 src/f32-vbinary/gen/vmax-avx-x16.c
3608 src/f32-vbinary/gen/vmaxc-avx-x8.c
3609 src/f32-vbinary/gen/vmaxc-avx-x16.c
3610 src/f32-vbinary/gen/vmin-avx-x8.c
3611 src/f32-vbinary/gen/vmin-avx-x16.c
3612 src/f32-vbinary/gen/vminc-avx-x8.c
3613 src/f32-vbinary/gen/vminc-avx-x16.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3614 src/f32-vbinary/gen/vmul-minmax-avx-x8.c
3615 src/f32-vbinary/gen/vmul-minmax-avx-x16.c
3616 src/f32-vbinary/gen/vmulc-minmax-avx-x8.c
3617 src/f32-vbinary/gen/vmulc-minmax-avx-x16.c
3618 src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c
3619 src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c
3620 src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c
3621 src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]3622 src/f32-vbinary/gen/vsqrdiff-avx-x8.c
3623 src/f32-vbinary/gen/vsqrdiff-avx-x16.c
3624 src/f32-vbinary/gen/vsqrdiffc-avx-x8.c
3625 src/f32-vbinary/gen/vsqrdiffc-avx-x16.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3626 src/f32-vbinary/gen/vsub-minmax-avx-x8.c
3627 src/f32-vbinary/gen/vsub-minmax-avx-x16.c
3628 src/f32-vbinary/gen/vsubc-minmax-avx-x8.c
3629 src/f32-vbinary/gen/vsubc-minmax-avx-x16.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]3630 src/f32-vclamp/gen/vclamp-avx-x8.c
3631 src/f32-vclamp/gen/vclamp-avx-x16.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]3632 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c
3633 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c
3634 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c
3635 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c
3636 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c
3637 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c
3638 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c
3639 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c
3640 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c
3641 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c
3642 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c
3643 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c
3644 src/f32-velu/gen/velu-avx-rr2-p6-x8.c
3645 src/f32-velu/gen/velu-avx-rr2-p6-x16.c
3646 src/f32-velu/gen/velu-avx-rr2-p6-x24.c
3647 src/f32-velu/gen/velu-avx-rr2-p6-x32.c
3648 src/f32-velu/gen/velu-avx-rr2-p6-x40.c
3649 src/f32-velu/gen/velu-avx-rr2-p6-x48.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]3650 src/f32-vhswish/gen/vhswish-avx-x8.c
3651 src/f32-vhswish/gen/vhswish-avx-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3652 src/f32-vlrelu/gen/vlrelu-avx-x8.c
3653 src/f32-vlrelu/gen/vlrelu-avx-x16.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]3654 src/f32-vrnd/gen/vrndd-avx-x8.c
3655 src/f32-vrnd/gen/vrndd-avx-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3656 src/f32-vrnd/gen/vrndne-avx-x8.c
3657 src/f32-vrnd/gen/vrndne-avx-x16.c
3658 src/f32-vrnd/gen/vrndu-avx-x8.c
3659 src/f32-vrnd/gen/vrndu-avx-x16.c
3660 src/f32-vrnd/gen/vrndz-avx-x8.c
3661 src/f32-vrnd/gen/vrndz-avx-x16.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]3662 src/f32-vscale/avx-x32.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]3663 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c
3664 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c
3665 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c
3666 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c
3667 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c
3668 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c
3669 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c
3670 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c
3671 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c
3672 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c
3673 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c
3674 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c
3675 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c
3676 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c
3677 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c
3678 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c
3679 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c
3680 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c
3681 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c
3682 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]3683 src/f32-vsqrt/gen/avx-sqrt-x8.c
3684 src/f32-vsqrt/gen/avx-sqrt-x16.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]3685 src/f32-vunary/gen/vabs-avx-x8.c
3686 src/f32-vunary/gen/vabs-avx-x16.c
3687 src/f32-vunary/gen/vneg-avx-x8.c
3688 src/f32-vunary/gen/vneg-avx-x16.c
3689 src/f32-vunary/gen/vsqr-avx-x8.c
Marat Dukhand08abcb2020-09-21 00:26:25 -0700[diff] [blame]3690 src/f32-vunary/gen/vsqr-avx-x16.c
Frank Barchard4a352042021-04-13 15:52:08 -0700[diff] [blame]3691 src/math/exp-avx-rr2-p5.c
3692 src/math/expm1minus-avx-rr2-lut4-p4-perm.c
3693 src/math/expm1minus-avx-rr2-lut16-p3.c
3694 src/math/expm1minus-avx-rr2-p6.c
3695 src/math/sigmoid-avx-rr2-lut64-p2-div.c
3696 src/math/sigmoid-avx-rr2-p5-div.c
3697 src/math/sigmoid-avx-rr2-p5-nr1.c
3698 src/math/sigmoid-avx-rr2-p5-nr2.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3699 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3700 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3701 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3702 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3703 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3704 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3705 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3706 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3707 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3708 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3709 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3710 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
3711 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c
3712 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c
3713 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c
3714 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3715 src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3716 src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3717 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3718 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3719 src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3720 src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3721 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3722 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3723 src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3724 src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3725 src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3726 src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3727 src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3728 src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3729 src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3730 src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3731 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3732 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3733 src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3734 src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3735 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3736 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3737 src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3738 src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3739 src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3740 src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3741 src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3742 src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3743 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3744 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]3745 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
3746 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c
3747 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3748 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3749 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3750 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
3751 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c
3752 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3753 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3754 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3755 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
3756 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c
3757 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3758 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3759 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3760 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
3761 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c
3762 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c
3763 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c
3764 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c
3765 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c
3766 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c
3767 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c
3768 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c
3769 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c
3770 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3771 src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3772 src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3773 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3774 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3775 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3776 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3777 src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3778 src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3779 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3780 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3781 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3782 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3783 src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3784 src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3785 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3786 src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3787 src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3788 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3789 src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3790 src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3791 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3792 src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3793 src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3794 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3795 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3796 src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3797 src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3798 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3799 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3800 src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3801 src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3802 src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3803 src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3804 src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3805 src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhane9c4b962021-04-02 16:56:55 -0700[diff] [blame]3806 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c
3807 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c
3808 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c
3809 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c
3810 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
3811 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c
3812 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c
3813 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c
3814 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
3815 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
3816 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c
3817 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c
3818 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
3819 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
3820 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3821 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3822 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c
3823 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
3824 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c
3825 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3826 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3827 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3828 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3829 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3830 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3831 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3832 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3833 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3834 src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
3835 src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
3836 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
3837 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3838 src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
3839 src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
3840 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
3841 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3842 src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
3843 src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
3844 src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
3845 src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
3846 src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
3847 src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
3848 src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
3849 src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
3850 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
3851 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3852 src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
3853 src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
3854 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
3855 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3856 src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
3857 src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
3858 src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
3859 src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
3860 src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]3861 src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
3862 src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c
3863 src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c
3864 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
3865 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c
3866 src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
3867 src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
3868 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3869 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
3870 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c
3871 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
3872 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]3873 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
3874 src/x8-lut/gen/lut-avx-x16.c
3875 src/x8-lut/gen/lut-avx-x32.c
3876 src/x8-lut/gen/lut-avx-x48.c
3877 src/x8-lut/gen/lut-avx-x64.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3878
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]3879SET(PROD_F16C_MICROKERNEL_SRCS
3880 src/f16-f32-vcvt/gen/vcvt-f16c-x16.c)
3881
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]3882SET(ALL_F16C_MICROKERNEL_SRCS
3883 src/f16-f32-vcvt/gen/vcvt-f16c-x8.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]3884 src/f16-f32-vcvt/gen/vcvt-f16c-x16.c
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]3885 src/f32-f16-vcvt/gen/vcvt-f16c-x8.c
3886 src/f32-f16-vcvt/gen/vcvt-f16c-x16.c
Marat Dukhan582e1842021-10-25 17:18:36 -0700[diff] [blame]3887 src/math/cvt-f16-f32-f16c.c
3888 src/math/cvt-f32-f16-f16c.c)
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]3889
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3890SET(PROD_XOP_MICROKERNEL_SRCS
Marat Dukhan28480592021-07-27 23:52:27 -0700[diff] [blame]3891 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
3892 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3893 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3894 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3895 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3896 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3897 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
3898 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
3899 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3900 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3901 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3902 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3903 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
3904 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
3905 src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
3906 src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
3907 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3908 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3909 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3910 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3911 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
3912 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c)
3913
3914SET(ALL_XOP_MICROKERNEL_SRCS
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3915 src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3916 src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3917 src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3918 src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3919 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3920 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3921 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3922 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
3923 src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c
3924 src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3925 src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3926 src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3927 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3928 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3929 src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3930 src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3931 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3932 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3933 src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3934 src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3935 src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3936 src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3937 src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3938 src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3939 src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3940 src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3941 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3942 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3943 src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3944 src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3945 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3946 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3947 src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3948 src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3949 src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3950 src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3951 src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3952 src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3953 src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]3954 src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
3955 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3956 src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3957 src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
3958 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3959 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3960 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
3961 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3962 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3963 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
3964 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c
3965 src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c
3966 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c
3967 src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c
3968 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3969 src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3970 src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3971 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3972 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3973 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3974 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3975 src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3976 src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3977 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3978 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3979 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3980 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3981 src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3982 src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3983 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3984 src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3985 src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3986 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3987 src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3988 src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3989 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3990 src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3991 src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3992 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3993 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3994 src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3995 src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3996 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3997 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3998 src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3999 src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4000 src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4001 src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4002 src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4003 src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]4004 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
4005 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c
4006 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c
4007 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c
4008 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
4009 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
4010 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4011 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4012 src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
4013 src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
4014 src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
4015 src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4016 src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
4017 src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
4018 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4019 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
4020 src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
4021 src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
4022 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4023 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
4024 src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
4025 src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
4026 src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
4027 src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
4028 src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
4029 src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
4030 src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
4031 src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
4032 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4033 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
4034 src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
4035 src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
4036 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4037 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
4038 src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
4039 src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
4040 src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
4041 src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
4042 src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]4043 src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
4044 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
4045 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c
4046 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
4047 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c)
Marat Dukhan1566fee2020-08-02 21:55:41 -0700[diff] [blame]4048
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4049SET(PROD_FMA3_MICROKERNEL_SRCS
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4050 src/f32-dwconv/gen/up8x25-minmax-fma3.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4051 src/f32-dwconv/gen/up16x3-minmax-fma3.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4052 src/f32-dwconv/gen/up16x4-minmax-fma3.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4053 src/f32-dwconv/gen/up16x9-minmax-fma3.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4054 src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c
4055 src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c
4056 src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c
4057 src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c
4058 src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c
4059 src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c
4060 src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c
4061 src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c
4062 src/f32-vhswish/gen/vhswish-fma3-x16.c)
4063
4064SET(ALL_FMA3_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4065 src/f32-dwconv/gen/up8x3-minmax-fma3-acc2.c
4066 src/f32-dwconv/gen/up8x3-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4067 src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c
4068 src/f32-dwconv/gen/up8x4-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4069 src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c
4070 src/f32-dwconv/gen/up8x9-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4071 src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c
4072 src/f32-dwconv/gen/up8x25-minmax-fma3.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4073 src/f32-dwconv/gen/up16x3-minmax-fma3-acc2.c
4074 src/f32-dwconv/gen/up16x3-minmax-fma3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4075 src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c
4076 src/f32-dwconv/gen/up16x4-minmax-fma3.c
4077 src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c
4078 src/f32-dwconv/gen/up16x9-minmax-fma3.c
4079 src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c
4080 src/f32-dwconv/gen/up16x25-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4081 src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4082 src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c
4083 src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c
4084 src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c
4085 src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4086 src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4087 src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c
4088 src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4089 src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4090 src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c
4091 src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4092 src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c
4093 src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c
4094 src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4095 src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c
4096 src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c
4097 src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c
4098 src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c
4099 src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c
4100 src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c
4101 src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c
4102 src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c
4103 src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c
4104 src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c
4105 src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c
4106 src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c
4107 src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c
4108 src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4109 src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4110 src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c
4111 src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c
4112 src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c
4113 src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4114 src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4115 src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c
4116 src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4117 src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4118 src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c
4119 src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4120 src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c
4121 src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c
4122 src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]4123 src/f32-vhswish/gen/vhswish-fma3-x8.c
4124 src/f32-vhswish/gen/vhswish-fma3-x16.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]4125 src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c
4126 src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c
4127 src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c
4128 src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c
4129 src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c
4130 src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c
4131 src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c
4132 src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]4133 src/math/sqrt-fma3-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4134 src/math/sqrt-fma3-nr1fma1adj.c
4135 src/math/sqrt-fma3-nr2fma.c)
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]4136
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4137SET(PROD_AVX2_MICROKERNEL_SRCS
4138 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c
4139 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c
4140 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4141 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4142 src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4143 src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4144 src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4145 src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4146 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4147 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4148 src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4149 src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4150 src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4151 src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4152 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
4153 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4154 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4155 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4156 src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4157 src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4158 src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4159 src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4160 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]4161 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4162 src/x8-lut/gen/lut-avx2-x128.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4163
4164SET(ALL_AVX2_MICROKERNEL_SRCS
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4165 src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c
4166 src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4167 src/f32-raddexpminusmax/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4168 src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4169 src/f32-raddexpminusmax/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4170 src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c
4171 src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4172 src/f32-raddexpminusmax/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4173 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c
4174 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c
4175 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4176 src/f32-raddexpminusmax/gen/avx2-p5-x96.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4177 src/f32-raddextexp/gen/avx2-p5-x64-acc2.c
4178 src/f32-raddextexp/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4179 src/f32-raddextexp/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4180 src/f32-raddextexp/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4181 src/f32-raddextexp/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4182 src/f32-raddextexp/gen/avx2-p5-x80-acc2.c
4183 src/f32-raddextexp/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4184 src/f32-raddextexp/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4185 src/f32-raddextexp/gen/avx2-p5-x96-acc2.c
4186 src/f32-raddextexp/gen/avx2-p5-x96-acc3.c
4187 src/f32-raddextexp/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4188 src/f32-raddextexp/gen/avx2-p5-x96.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4189 src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c
4190 src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4191 src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4192 src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4193 src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4194 src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c
4195 src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4196 src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4197 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c
4198 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c
4199 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4200 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]4201 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c
4202 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c
4203 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c
4204 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c
4205 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c
4206 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c
4207 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c
4208 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c
4209 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c
4210 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c
4211 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c
4212 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c
4213 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c
4214 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c
4215 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c
4216 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c
4217 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c
4218 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c
4219 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c
4220 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c
4221 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c
4222 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c
4223 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c
4224 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c
4225 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c
4226 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c
4227 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c
4228 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c
4229 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c
4230 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c
4231 src/f32-velu/gen/velu-avx2-rr1-p6-x8.c
4232 src/f32-velu/gen/velu-avx2-rr1-p6-x16.c
4233 src/f32-velu/gen/velu-avx2-rr1-p6-x24.c
4234 src/f32-velu/gen/velu-avx2-rr1-p6-x32.c
4235 src/f32-velu/gen/velu-avx2-rr1-p6-x40.c
4236 src/f32-velu/gen/velu-avx2-rr1-p6-x48.c
4237 src/f32-velu/gen/velu-avx2-rr1-p6-x56.c
4238 src/f32-velu/gen/velu-avx2-rr1-p6-x64.c
4239 src/f32-velu/gen/velu-avx2-rr1-p6-x72.c
4240 src/f32-velu/gen/velu-avx2-rr1-p6-x80.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4241 src/f32-vrelu/gen/vrelu-avx-x8.c
4242 src/f32-vrelu/gen/vrelu-avx-x16.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4243 src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c
4244 src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c
4245 src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c
4246 src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c
4247 src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c
4248 src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c
4249 src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c
4250 src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c
4251 src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c
4252 src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c
4253 src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c
4254 src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c
4255 src/f32-vscaleextexp/gen/avx2-p5-x8.c
4256 src/f32-vscaleextexp/gen/avx2-p5-x16.c
4257 src/f32-vscaleextexp/gen/avx2-p5-x24.c
4258 src/f32-vscaleextexp/gen/avx2-p5-x32.c
4259 src/f32-vscaleextexp/gen/avx2-p5-x40.c
4260 src/f32-vscaleextexp/gen/avx2-p5-x48.c
4261 src/f32-vscaleextexp/gen/avx2-p5-x56.c
4262 src/f32-vscaleextexp/gen/avx2-p5-x64.c
4263 src/f32-vscaleextexp/gen/avx2-p5-x72.c
4264 src/f32-vscaleextexp/gen/avx2-p5-x80.c
4265 src/f32-vscaleextexp/gen/avx2-p5-x88.c
4266 src/f32-vscaleextexp/gen/avx2-p5-x96.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]4267 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c
4268 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c
4269 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c
4270 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c
4271 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c
4272 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c
4273 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c
4274 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c
4275 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c
4276 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c
4277 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c
4278 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c
4279 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c
4280 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c
4281 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c
4282 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c
4283 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c
4284 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c
4285 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c
4286 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c
4287 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c
4288 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c
4289 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c
4290 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c
4291 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c
4292 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c
4293 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c
4294 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c
4295 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c
4296 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]4297 src/math/exp-avx2-rr2-lut8-p3-perm.c
4298 src/math/exp-avx2-rr2-lut8-p4-perm.c
4299 src/math/exp-avx2-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]4300 src/math/expm1minus-avx2-rr1-lut4-p4-perm.c
4301 src/math/expm1minus-avx2-rr1-lut8-p4-perm.c
4302 src/math/expm1minus-avx2-rr1-lut16-p3-gather.c
4303 src/math/expm1minus-avx2-rr1-p6.c
Frank Barcharde7223ee2020-12-04 19:04:01 -0800[diff] [blame]4304 src/math/expminus-avx2-rr2-p5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4305 src/math/extexp-avx2-p5.c
4306 src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c
4307 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c
4308 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c
4309 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c
4310 src/math/sigmoid-avx2-rr1-p5-div.c
4311 src/math/sigmoid-avx2-rr1-p5-nr1fma.c
4312 src/math/sigmoid-avx2-rr1-p5-nr2fma.c
4313 src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c
4314 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c
4315 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c
4316 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c
4317 src/math/sigmoid-avx2-rr2-p5-div.c
4318 src/math/sigmoid-avx2-rr2-p5-nr1fma.c
4319 src/math/sigmoid-avx2-rr2-p5-nr2fma.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4320 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
4321 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4322 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4323 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c
4324 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4325 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4326 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4327 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c
4328 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4329 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4330 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c
4331 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4332 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4333 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c
4334 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4335 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4336 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4337 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c
4338 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4339 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4340 src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4341 src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c
4342 src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c
4343 src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c
4344 src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4345 src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4346 src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4347 src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c
4348 src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4349 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4350 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4351 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4352 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4353 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4354 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c
4355 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4356 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4357 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16-vpmovsx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4358 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4359 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4360 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c
4361 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4362 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4363 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16-vpmovsx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4364 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4365 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4366 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4367 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4368 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4369 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4370 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c
4371 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4372 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4373 src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16-vpmovsx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4374 src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4375 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4376 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c
4377 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4378 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4379 src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16-vpmovsx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4380 src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4381 src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4382 src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4383 src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4384 src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4385 src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4386 src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4387 src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4388 src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4389 src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4390 src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4391 src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c
Marat Dukhane6dc0b62020-09-08 23:57:14 -0700[diff] [blame]4392 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
4393 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
4394 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c
4395 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c
4396 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
4397 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4398 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
Marat Dukhan902ef7f2021-07-02 16:11:06 -0700[diff] [blame]4399 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c
Marat Dukhan09c312b2021-07-09 00:45:04 -0700[diff] [blame]4400 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
4401 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
4402 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4403 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4404 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
4405 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan902ef7f2021-07-02 16:11:06 -0700[diff] [blame]4406 src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4407 src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c
4408 src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4409 src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4410 src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]4411 src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4412 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
4413 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
4414 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]4415 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4416 src/x8-lut/gen/lut-avx2-x32.c
4417 src/x8-lut/gen/lut-avx2-x64.c
4418 src/x8-lut/gen/lut-avx2-x96.c
4419 src/x8-lut/gen/lut-avx2-x128.c)
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]4420
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4421SET(PROD_AVX512F_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4422 src/f32-dwconv/gen/up16x3-minmax-avx512f.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4423 src/f32-dwconv/gen/up16x4-minmax-avx512f.c
4424 src/f32-dwconv/gen/up16x9-minmax-avx512f.c
4425 src/f32-dwconv/gen/up16x25-minmax-avx512f.c
4426 src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c
4427 src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c
4428 src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c
4429 src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c
4430 src/f32-prelu/gen/avx512f-2x16.c
4431 src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c
4432 src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c
4433 src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c
4434 src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c
4435 src/f32-vbinary/gen/vmax-avx512f-x32.c
4436 src/f32-vbinary/gen/vmaxc-avx512f-x32.c
4437 src/f32-vbinary/gen/vmin-avx512f-x32.c
4438 src/f32-vbinary/gen/vminc-avx512f-x32.c
4439 src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c
4440 src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c
4441 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c
4442 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c
4443 src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c
4444 src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c
4445 src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c
4446 src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c
4447 src/f32-vclamp/gen/vclamp-avx512f-x16.c
4448 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c
4449 src/f32-vhswish/gen/vhswish-avx512f-x16.c
4450 src/f32-vlrelu/gen/vlrelu-avx512f-x16.c
4451 src/f32-vrnd/gen/vrndd-avx512f-x16.c
4452 src/f32-vrnd/gen/vrndne-avx512f-x16.c
4453 src/f32-vrnd/gen/vrndu-avx512f-x16.c
4454 src/f32-vrnd/gen/vrndz-avx512f-x16.c
4455 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c
4456 src/f32-vunary/gen/vabs-avx512f-x16.c
4457 src/f32-vunary/gen/vneg-avx512f-x16.c
4458 src/f32-vunary/gen/vsqr-avx512f-x16.c)
4459
4460SET(ALL_AVX512F_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4461 src/f32-dwconv/gen/up16x3-minmax-avx512f-acc2.c
4462 src/f32-dwconv/gen/up16x3-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4463 src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c
4464 src/f32-dwconv/gen/up16x4-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4465 src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c
4466 src/f32-dwconv/gen/up16x9-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4467 src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c
4468 src/f32-dwconv/gen/up16x25-minmax-avx512f.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4469 src/f32-dwconv/gen/up32x3-minmax-avx512f-acc2.c
4470 src/f32-dwconv/gen/up32x3-minmax-avx512f.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4471 src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c
4472 src/f32-dwconv/gen/up32x4-minmax-avx512f.c
4473 src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c
4474 src/f32-dwconv/gen/up32x9-minmax-avx512f.c
4475 src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c
4476 src/f32-dwconv/gen/up32x25-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4477 src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c
4478 src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c
4479 src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c
4480 src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c
4481 src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c
4482 src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4483 src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c
4484 src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c
4485 src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c
4486 src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c
4487 src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c
4488 src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4489 src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c
4490 src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c
4491 src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c
4492 src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c
4493 src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c
4494 src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]4495 src/f32-prelu/gen/avx512f-2x16.c
4496 src/f32-prelu/gen/avx512f-2x32.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4497 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c
4498 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4499 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4500 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4501 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4502 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c
4503 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4504 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4505 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c
4506 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c
4507 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4508 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4509 src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c
4510 src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4511 src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4512 src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4513 src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4514 src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c
4515 src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4516 src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4517 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c
4518 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c
4519 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4520 src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4521 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c
4522 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4523 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4524 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4525 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4526 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c
4527 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4528 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4529 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c
4530 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c
4531 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4532 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4533 src/f32-rmax/avx512f.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4534 src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c
4535 src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c
4536 src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c
4537 src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c
4538 src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c
4539 src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c
4540 src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c
4541 src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]4542 src/f32-vbinary/gen/vmax-avx512f-x16.c
4543 src/f32-vbinary/gen/vmax-avx512f-x32.c
4544 src/f32-vbinary/gen/vmaxc-avx512f-x16.c
4545 src/f32-vbinary/gen/vmaxc-avx512f-x32.c
4546 src/f32-vbinary/gen/vmin-avx512f-x16.c
4547 src/f32-vbinary/gen/vmin-avx512f-x32.c
4548 src/f32-vbinary/gen/vminc-avx512f-x16.c
4549 src/f32-vbinary/gen/vminc-avx512f-x32.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4550 src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c
4551 src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c
4552 src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c
4553 src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c
4554 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c
4555 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c
4556 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c
4557 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]4558 src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c
4559 src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c
4560 src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c
4561 src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4562 src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c
4563 src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c
4564 src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c
4565 src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4566 src/f32-vclamp/gen/vclamp-avx512f-x16.c
4567 src/f32-vclamp/gen/vclamp-avx512f-x32.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]4568 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c
4569 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c
4570 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c
4571 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c
4572 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c
4573 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c
4574 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c
4575 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c
4576 src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c
4577 src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c
4578 src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c
4579 src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c
4580 src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c
4581 src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c
4582 src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c
4583 src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]4584 src/f32-vhswish/gen/vhswish-avx512f-x16.c
4585 src/f32-vhswish/gen/vhswish-avx512f-x32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4586 src/f32-vlrelu/gen/vlrelu-avx512f-x16.c
4587 src/f32-vlrelu/gen/vlrelu-avx512f-x32.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4588 src/f32-vrelu/gen/vrelu-avx512f-x16.c
4589 src/f32-vrelu/gen/vrelu-avx512f-x32.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4590 src/f32-vrnd/gen/vrndd-avx512f-x16.c
4591 src/f32-vrnd/gen/vrndd-avx512f-x32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4592 src/f32-vrnd/gen/vrndne-avx512f-x16.c
4593 src/f32-vrnd/gen/vrndne-avx512f-x32.c
4594 src/f32-vrnd/gen/vrndu-avx512f-x16.c
4595 src/f32-vrnd/gen/vrndu-avx512f-x32.c
4596 src/f32-vrnd/gen/vrndz-avx512f-x16.c
4597 src/f32-vrnd/gen/vrndz-avx512f-x32.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]4598 src/f32-vscale/avx512f-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4599 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c
4600 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c
4601 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c
4602 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c
4603 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c
4604 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c
4605 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c
4606 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c
4607 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c
4608 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c
4609 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c
4610 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c
4611 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c
4612 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c
4613 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c
4614 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c
4615 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c
4616 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c
4617 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c
4618 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c
4619 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c
4620 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c
4621 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c
4622 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]4623 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c
4624 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c
4625 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c
4626 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c
4627 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c
4628 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c
4629 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c
4630 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c
4631 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c
4632 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c
4633 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c
4634 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c
4635 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c
4636 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c
4637 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c
4638 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c
4639 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c
4640 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c
4641 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c
4642 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c
4643 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c
4644 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c
4645 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c
4646 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c
4647 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c
4648 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c
4649 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c
4650 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c
4651 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c
4652 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c
4653 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c
4654 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c
4655 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c
4656 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c
4657 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c
4658 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c
4659 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c
4660 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c
4661 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c
4662 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c
4663 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c
4664 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c
4665 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c
4666 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c
4667 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c
4668 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c
4669 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c
4670 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]4671 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c
4672 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c
4673 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c
4674 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c
4675 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c
4676 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c
4677 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c
4678 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]4679 src/f32-vunary/gen/vabs-avx512f-x16.c
4680 src/f32-vunary/gen/vabs-avx512f-x32.c
4681 src/f32-vunary/gen/vneg-avx512f-x16.c
4682 src/f32-vunary/gen/vneg-avx512f-x32.c
4683 src/f32-vunary/gen/vsqr-avx512f-x16.c
4684 src/f32-vunary/gen/vsqr-avx512f-x32.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]4685 src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c
4686 src/math/exp-avx512f-rr2-lut16-p3-perm.c
4687 src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c
4688 src/math/exp-avx512f-rr2-lut32-p2-perm2.c
4689 src/math/exp-avx512f-rr2-p5-scalef.c
4690 src/math/exp-avx512f-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]4691 src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c
4692 src/math/expm1minus-avx512f-rr1-p6.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]4693 src/math/extexp-avx512f-p5.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]4694 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]4695 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4696 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]4697 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]4698 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4699 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]4700 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]4701 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4702 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c
4703 src/math/sigmoid-avx512f-rr1-p5-scalef-div.c
4704 src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c
4705 src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c
4706 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c
4707 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c
4708 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c
4709 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c
4710 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c
4711 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]4712 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]4713 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4714 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c
4715 src/math/sigmoid-avx512f-rr2-p5-scalef-div.c
4716 src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c
4717 src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]4718 src/math/sqrt-avx512f-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4719 src/math/sqrt-avx512f-nr1fma1adj.c
4720 src/math/sqrt-avx512f-nr2fma.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]4721
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4722SET(PROD_AVX512SKX_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]4723 src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4724 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
4725 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
4726 src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
4727 src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
4728 src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
4729 src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
4730 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
4731 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
4732 src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
4733 src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
4734 src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
4735 src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
4736 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
4737 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
4738 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
4739 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
4740 src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
4741 src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
4742 src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
4743 src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
4744 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]4745 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
4746 src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4747
4748SET(ALL_AVX512SKX_MICROKERNEL_SRCS
Marat Dukhan79c76ab2021-09-26 20:26:39 -0700[diff] [blame]4749 src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c
4750 src/f16-f32-vcvt/gen/vcvt-avx512skx-x32.c
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]4751 src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c
4752 src/f32-f16-vcvt/gen/vcvt-avx512skx-x32.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4753 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
4754 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
4755 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
4756 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -0700[diff] [blame]4757 src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
4758 src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
4759 src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
4760 src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
4761 src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
4762 src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
4763 src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
4764 src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4765 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4766 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4767 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4768 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4769 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4770 src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4771 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4772 src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4773 src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4774 src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4775 src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4776 src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4777 src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4778 src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4779 src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4780 src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4781 src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
Marat Dukhan3cf2e222021-07-08 11:38:45 -0700[diff] [blame]4782 src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c
Marat Dukhane76049a2021-07-22 14:48:59 -0700[diff] [blame]4783 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
4784 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c
4785 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
4786 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c
Marat Dukhancfd606b2021-07-09 01:18:45 -0700[diff] [blame]4787 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
4788 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
4789 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
4790 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhan3cf2e222021-07-08 11:38:45 -0700[diff] [blame]4791 src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
4792 src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
4793 src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
4794 src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
4795 src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
4796 src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
4797 src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
Marat Dukhane76049a2021-07-22 14:48:59 -0700[diff] [blame]4798 src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
4799 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
4800 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c
4801 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
Marat Dukhan2b3c4102021-09-10 19:05:37 -0700[diff] [blame]4802 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c
4803 src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c
4804 src/x8-lut/gen/lut-avx512skx-vpshufb-x128.c
4805 src/x8-lut/gen/lut-avx512skx-vpshufb-x192.c
4806 src/x8-lut/gen/lut-avx512skx-vpshufb-x256.c)
Marat Dukhanbb00b1d2020-08-10 11:37:23 -0700[diff] [blame]4807
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]4808SET(AARCH32_ASM_MICROKERNEL_SRCS
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]4809 src/f32-gemm/4x4-aarch32-vfp-ld64.S
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]4810 src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4811 src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S
4812 src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]4813 src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4814 src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]4815 src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]4816 src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4817 src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S
Marat Dukhandc2e4372020-07-21 17:01:00 -0700[diff] [blame]4818 src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]4819 src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S
4820 src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S
4821 src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S
Marat Dukhandc2e4372020-07-21 17:01:00 -0700[diff] [blame]4822 src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]4823
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]4824SET(AARCH64_ASM_MICROKERNEL_SRCS
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]4825 src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4826 src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]4827 src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4828 src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]4829 src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard80fc5f42021-06-07 10:43:16 -0700[diff] [blame]4830 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S
Frank Barchard97374612021-06-07 11:51:07 -0700[diff] [blame]4831 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4832 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S
4833 src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4834 src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S
4835 src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S
4836 src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S
4837 src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S
4838 src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard80fc5f42021-06-07 10:43:16 -0700[diff] [blame]4839 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S
Frank Barchard97374612021-06-07 11:51:07 -0700[diff] [blame]4840 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4841 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S
4842 src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4843 src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S
4844 src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4845 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4846 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4847 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4848 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4849 src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4850 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S
4851 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4852 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4853 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4854 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4855 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4856 src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4857 src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4858 src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4859 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S
4860 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4861 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4862 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4863 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4864 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4865 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4866 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4867 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S
4868 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4869 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4870 src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S
4871 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S
4872 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4873 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S
4874 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S
4875 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4876 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4877 src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4878 src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4879 src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4880 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S
4881 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4882 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S
4883 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S
4884 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S
4885 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4886 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4887 src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4888 src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4889 src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S
4890 src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S
4891 src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4892 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S
4893 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S
4894 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4895 src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4896 src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4897 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barcharde3491242021-06-11 14:04:57 -0700[diff] [blame]4898 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard79cd5f92021-06-21 17:34:59 -0700[diff] [blame]4899 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4900 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
4901 src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S
4902 src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
4903 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barcharde3491242021-06-11 14:04:57 -0700[diff] [blame]4904 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard79cd5f92021-06-21 17:34:59 -0700[diff] [blame]4905 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4906 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4907 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4908 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4909 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4910 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]4911 src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S
4912 src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4913 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4914 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4915 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4916 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
4917 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S
Frank Barchard1663c0c2021-07-01 11:20:06 -0700[diff] [blame]4918 src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]4919 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
4920 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
4921 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
4922 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S
4923 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
4924 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4925 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4926 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4927 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4928 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
4929 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4930 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4931 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4932 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchard1663c0c2021-07-01 11:20:06 -0700[diff] [blame]4933 src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]4934 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
4935 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
4936 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
4937 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
4938 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4939 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4940 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4941 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4942 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]4943 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S
4944 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4945 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S
4946 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4947 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S
4948 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4949 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S
4950 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]4951 src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S
4952 src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4953 src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S
4954 src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4955 src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S
4956 src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4957 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4958 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4959 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4960 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
4961 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]4962 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S
4963 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4964 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S
4965 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4966 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4967 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S
4968 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4969 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S
4970 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S
4971 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull-padal.S
Frank Barchard1663c0c2021-07-01 11:20:06 -0700[diff] [blame]4972 src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4973 src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4974 src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]4975 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
4976 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]4977 src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S
4978 src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4979 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
4980 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]4981 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
4982 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S
4983 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
4984 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4985 src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S
4986 src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S
4987 src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S
Frank Barchard0ae35f22021-06-15 17:34:24 -0700[diff] [blame]4988 src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4989 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
4990 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S
4991 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barchard60729d02021-07-20 12:25:09 -0700[diff] [blame]4992 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4993 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4994 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4995 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4996 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]4997 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S
4998 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4999 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S
5000 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5001 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S
5002 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S
5003 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S
5004 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]5005 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
5006 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
5007 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
5008 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]5009 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S
5010 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S
5011 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S
5012 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5013 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S
5014 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S
5015 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S
5016 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S
Frank Barchard1663c0c2021-07-01 11:20:06 -0700[diff] [blame]5017 src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]5018 src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5019 src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]5020 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
5021 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5022 src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S
5023 src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5024 src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
5025 src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]5026 src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
5027 src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
5028 src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]5029 src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S
Frank Barchard0ae35f22021-06-15 17:34:24 -0700[diff] [blame]5030 src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S
Frank Barchard60729d02021-07-20 12:25:09 -0700[diff] [blame]5031 src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5032 src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
5033 src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5034 src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchardca4c68e2021-08-25 19:06:40 -0700[diff] [blame]5035 src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barcharddf8e6042021-09-03 13:56:29 -0700[diff] [blame]5036 src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5037 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]5038 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5039 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]5040 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]5041 src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]5042 src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchardca4c68e2021-08-25 19:06:40 -0700[diff] [blame]5043 src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barcharddf8e6042021-09-03 13:56:29 -0700[diff] [blame]5044 src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5045 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]5046 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S
5047 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]5048 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]5049 src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]5050 src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5051
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5052SET(PROD_MICROKERNEL_SRCS ${PROD_SCALAR_MICROKERNEL_SRCS})
5053SET(ALL_MICROKERNEL_SRCS ${ALL_SCALAR_MICROKERNEL_SRCS})
Chester Liu5c29c642020-12-30 09:55:57 +0800[diff] [blame]5054IF(CMAKE_SYSTEM_PROCESSOR MATCHES "^armv[5-8]" OR IOS_ARCH MATCHES "^armv7")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5055 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEON_MICROKERNEL_SRCS})
5056 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFMA_MICROKERNEL_SRCS})
5057 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONV8_MICROKERNEL_SRCS})
5058 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEON_MICROKERNEL_SRCS})
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]5059 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5060 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFMA_MICROKERNEL_SRCS})
5061 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONV8_MICROKERNEL_SRCS})
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]5062 IF(NOT IOS)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5063 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONDOT_MICROKERNEL_SRCS})
5064 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONDOT_MICROKERNEL_SRCS})
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]5065 ENDIF()
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5066 IF(XNNPACK_ENABLE_ASSEMBLY)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5067 LIST(APPEND PROD_MICROKERNEL_SRCS ${AARCH32_ASM_MICROKERNEL_SRCS})
5068 LIST(APPEND ALL_MICROKERNEL_SRCS ${AARCH32_ASM_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5069 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5070ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5071IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(aarch64|arm64)$" OR IOS_ARCH MATCHES "^arm64.*")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5072 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEON_MICROKERNEL_SRCS})
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]5073 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5074 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFMA_MICROKERNEL_SRCS})
5075 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONV8_MICROKERNEL_SRCS})
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]5076 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AARCH64_NEON_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5077 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS})
5078 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONDOT_MICROKERNEL_SRCS})
5079 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEON_MICROKERNEL_SRCS})
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]5080 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5081 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFMA_MICROKERNEL_SRCS})
5082 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONV8_MICROKERNEL_SRCS})
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]5083 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AARCH64_NEON_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5084 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS})
5085 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONDOT_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5086 IF(XNNPACK_ENABLE_ASSEMBLY)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5087 LIST(APPEND PROD_MICROKERNEL_SRCS ${AARCH64_ASM_MICROKERNEL_SRCS})
5088 LIST(APPEND ALL_MICROKERNEL_SRCS ${AARCH64_ASM_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5089 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5090ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5091IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86_64|AMD64)$" OR IOS_ARCH MATCHES "^(i386|x86_64|AMD64)$")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5092 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE_MICROKERNEL_SRCS})
5093 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE2_MICROKERNEL_SRCS})
5094 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSSE3_MICROKERNEL_SRCS})
5095 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE41_MICROKERNEL_SRCS})
5096 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX_MICROKERNEL_SRCS})
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]5097 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_F16C_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5098 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_XOP_MICROKERNEL_SRCS})
5099 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_FMA3_MICROKERNEL_SRCS})
5100 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX2_MICROKERNEL_SRCS})
5101 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX512F_MICROKERNEL_SRCS})
5102 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX512SKX_MICROKERNEL_SRCS})
5103 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE_MICROKERNEL_SRCS})
5104 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE2_MICROKERNEL_SRCS})
5105 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSSE3_MICROKERNEL_SRCS})
5106 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE41_MICROKERNEL_SRCS})
5107 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX_MICROKERNEL_SRCS})
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5108 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_F16C_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5109 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_XOP_MICROKERNEL_SRCS})
5110 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_FMA3_MICROKERNEL_SRCS})
5111 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX2_MICROKERNEL_SRCS})
5112 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX512F_MICROKERNEL_SRCS})
5113 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX512SKX_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5114ENDIF()
5115
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5116ADD_LIBRARY(all_microkernels OBJECT ${ALL_MICROKERNEL_SRCS} ${TABLE_SRCS})
Marat Dukhan599d3db2021-08-03 10:50:53 -0700[diff] [blame]5117ADD_LIBRARY(indirection OBJECT src/indirection.c)
5118ADD_LIBRARY(packing OBJECT src/packing.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5119
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5120IF(XNNPACK_LIBRARY_TYPE STREQUAL "default")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5121 ADD_LIBRARY(XNNPACK ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5122ELSEIF(XNNPACK_LIBRARY_TYPE STREQUAL "shared")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5123 ADD_LIBRARY(XNNPACK SHARED ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5124ELSEIF(XNNPACK_LIBRARY_TYPE STREQUAL "static")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5125 ADD_LIBRARY(XNNPACK STATIC ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5126ELSE()
5127 MESSAGE(FATAL_ERROR "Unsupported XNNPACK library type \"${XNNPACK_LIBRARY_TYPE}\". Must be \"static\", \"shared\", or \"default\"")
5128ENDIF()
5129SET_TARGET_PROPERTIES(XNNPACK PROPERTIES
5130 C_STANDARD 99
5131 C_EXTENSIONS YES)
Chester Liu5c29c642020-12-30 09:55:57 +0800[diff] [blame]5132IF(CMAKE_SYSTEM_PROCESSOR MATCHES "^armv[5-8]" OR IOS_ARCH MATCHES "^armv7")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5133 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -marm ")
5134 SET_PROPERTY(SOURCE ${ALL_NEON_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon ")
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]5135 SET_PROPERTY(SOURCE ${ALL_NEONFP16_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon-fp16 ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5136 SET_PROPERTY(SOURCE ${ALL_NEONFMA_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon-vfpv4 ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5137 IF(IOS)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5138 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mcpu=cyclone -mtune=generic ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5139 SET_PROPERTY(SOURCE ${AARCH32_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch ${IOS_ARCH} ")
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]5140 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5141 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8-a -mfpu=neon-fp-armv8 ")
5142 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+dotprod -mfpu=neon-fp-armv8 ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5143 ENDIF()
peterjc123ae2d0f62020-10-23 11:00:25 +0800[diff] [blame]5144 # Workground the neon detection bug in ARM v8
5145 # Related links:
5146 # https://github.com/android/ndk/issues/910
5147 # https://reviews.llvm.org/D58477
5148 IF(ANDROID_NDK_MAJOR AND ANDROID_NDK_MAJOR LESS 21)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5149 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfloat-abi=softfp ")
5150 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfloat-abi=softfp ")
peterjc123ae2d0f62020-10-23 11:00:25 +0800[diff] [blame]5151 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5152ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5153IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(aarch64|arm64)$" OR IOS_ARCH MATCHES "^arm64.*")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5154 SET_PROPERTY(SOURCE ${ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+fp16 ")
5155 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+dotprod ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5156 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+fp16+dotprod ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5157 IF(IOS)
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5158 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch ${IOS_ARCH} ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5159 ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5160 IF(XNNPACK_TARGET_PROCESSOR STREQUAL "arm64" AND CMAKE_HOST_SYSTEM_PROCESSOR STREQUAL "x86_64")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5161 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch arm64 ")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5162 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5163ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5164IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86|x86_64|AMD64)$" OR IOS_ARCH MATCHES "^(i386|x86_64|AMD64)$")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5165 IF(MSVC)
5166 IF(CMAKE_SYSTEM_PROCESSOR STREQUAL "x86" OR CMAKE_SIZEOF_VOID_P EQUAL 4)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5167 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE ")
5168 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
5169 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
5170 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5171 ENDIF()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5172 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5173 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5174 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
5175 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
5176 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX2 ")
5177 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX512 ")
5178 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX512 ")
peter65692c72021-08-17 23:41:05 +0800[diff] [blame]5179 IF(CMAKE_CXX_COMPILER_ID STREQUAL "Clang")
5180 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse ")
5181 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse2 ")
5182 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mssse3 ")
5183 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse4.1 ")
5184 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mavx ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5185 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mf16c ")
peter65692c72021-08-17 23:41:05 +0800[diff] [blame]5186 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mxop ")
5187 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mfma ")
5188 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mfma -clang:-mavx2 ")
5189 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mavx512f ")
5190 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRIDE PROPERTY COMPILE_FLAGS " -clang:-mavx512f -clang:-mavx512cd -clang:-mavx512bw -clang:-mavx512dq -clang:-mavx512vl ")
5191 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5192 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5193 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse ")
5194 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse2 ")
5195 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mssse3 ")
5196 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse4.1 ")
5197 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mavx ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5198 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mf16c ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5199 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mxop ")
5200 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfma ")
5201 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfma -mavx2 ")
5202 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mavx512f ")
5203 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRIDE PROPERTY COMPILE_FLAGS " -mavx512f -mavx512cd -mavx512bw -mavx512dq -mavx512vl ")
Marat Dukhan78583c72020-04-26 22:00:43 -0700[diff] [blame]5204 IF(MINGW OR CMAKE_SYSTEM_NAME MATCHES "^(CYGWIN|MSYS)$")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5205 # Work-around for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65782
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5206 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -fno-asynchronous-unwind-tables ")
5207 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -fno-asynchronous-unwind-tables ")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5208 ENDIF()
Yasuhiro Matsumoto081b77c2020-03-02 10:20:53 +0900[diff] [blame]5209 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5210ENDIF()
Marat Dukhan5fd403b2020-06-23 17:43:48 -0700[diff] [blame]5211TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE "XNN_LOG_LEVEL=$<$<CONFIG:Debug>:5>$<$<NOT:$<CONFIG:Debug>>:0>")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5212IF(MSVC)
Marat Dukhanf196d012020-04-15 11:50:03 -0700[diff] [blame]5213 # Even though MSVC has __restrict, it can't be used in all the same contexts as the C99 restrict keyword
5214 TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE "restrict=")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5215 TARGET_COMPILE_DEFINITIONS(all_microkernels PRIVATE "restrict=")
5216 TARGET_COMPILE_DEFINITIONS(packing PRIVATE "restrict=")
5217 TARGET_COMPILE_DEFINITIONS(indirection PRIVATE "restrict=")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5218 IF(${CMAKE_VERSION} VERSION_LESS "3.8.0")
peterjc12360a3b192020-10-22 12:01:20 +0800[diff] [blame]5219 IF(NOT CMAKE_BUILD_TYPE STREQUAL "Debug")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5220 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O2 ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5221 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O2 ")
5222 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O1 ")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5223 ENDIF()
5224 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5225 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O2 >")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5226 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O2 >")
5227 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O1 >")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5228 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5229ELSE()
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5230 IF(${CMAKE_VERSION} VERSION_LESS "3.8.0")
5231 IF(NOT CMAKE_BUILD_TYPE STREQUAL "Debug")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5232 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -O2 ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5233 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -O2 ")
5234 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -Os ")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5235 ENDIF()
5236 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5237 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -O2 >")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5238 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -O2 >")
5239 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -Os >")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5240 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5241ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5242
5243TARGET_INCLUDE_DIRECTORIES(XNNPACK PUBLIC include)
5244TARGET_INCLUDE_DIRECTORIES(XNNPACK PRIVATE src)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5245TARGET_INCLUDE_DIRECTORIES(all_microkernels PRIVATE include src)
5246TARGET_INCLUDE_DIRECTORIES(packing PRIVATE include src)
5247TARGET_INCLUDE_DIRECTORIES(indirection PRIVATE include src)
Marat Dukhan6ae741a2020-04-13 02:33:53 -0700[diff] [blame]5248IF(WIN32)
5249 # Target Windows 7+ API
5250 TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE _WIN32_WINNT=0x0601)
5251ENDIF()
Ashkan Aliabadid255a312019-12-03 12:44:34 -0800[diff] [blame]5252SET_TARGET_PROPERTIES(XNNPACK PROPERTIES PUBLIC_HEADER include/xnnpack.h)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5253
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5254# ---[ Find libm
5255FIND_LIBRARY(LIBM m)
5256IF(LIBM)
5257 TARGET_LINK_LIBRARIES(XNNPACK PRIVATE ${LIBM})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5258 TARGET_LINK_LIBRARIES(all_microkernels PRIVATE ${LIBM})
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5259ENDIF()
5260
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5261# ---[ Configure clog
5262IF(NOT TARGET clog)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5263 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5264 SET(CLOG_BUILD_TESTS OFF CACHE BOOL "")
5265 SET(CLOG_RUNTIME_TYPE "${CPUINFO_RUNTIME_TYPE}" CACHE STRING "")
5266 ADD_SUBDIRECTORY(
5267 "${CLOG_SOURCE_DIR}/deps/clog"
5268 "${CMAKE_BINARY_DIR}/clog")
5269 # We build static version of clog but a dynamic library may indirectly depend on it
5270 SET_PROPERTY(TARGET clog PROPERTY POSITION_INDEPENDENT_CODE ON)
5271 ELSE()
5272 ADD_LIBRARY(clog STATIC IMPORTED)
5273 FIND_LIBRARY(CLOG_LIBRARY clog)
5274 IF(NOT CLOG_LIBRARY)
5275 MESSAGE(FATAL_ERROR "Cannot find clog")
5276 ENDIF()
5277 SET_PROPERTY(TARGET clog PROPERTY IMPORTED_LOCATION "${CLOG_LIBRARY}")
5278 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5279ENDIF()
5280TARGET_LINK_LIBRARIES(XNNPACK PRIVATE clog)
5281
5282# ---[ Configure cpuinfo
5283IF(NOT TARGET cpuinfo)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5284 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5285 SET(CPUINFO_BUILD_TOOLS OFF CACHE BOOL "")
5286 SET(CPUINFO_BUILD_UNIT_TESTS OFF CACHE BOOL "")
5287 SET(CPUINFO_BUILD_MOCK_TESTS OFF CACHE BOOL "")
5288 SET(CPUINFO_BUILD_BENCHMARKS OFF CACHE BOOL "")
5289 ADD_SUBDIRECTORY(
5290 "${CPUINFO_SOURCE_DIR}"
5291 "${CMAKE_BINARY_DIR}/cpuinfo")
5292 ELSE()
5293 ADD_LIBRARY(cpuinfo SHARED IMPORTED)
5294 FIND_LIBRARY(CPUINFO_LIBRARY cpuinfo)
5295 IF(NOT CPUINFO_LIBRARY)
5296 MESSAGE(FATAL_ERROR "Cannot find cpuinfo")
5297 ENDIF()
5298 SET_PROPERTY(TARGET cpuinfo PROPERTY IMPORTED_LOCATION "${CPUINFO_LIBRARY}")
5299 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5300ENDIF()
5301TARGET_LINK_LIBRARIES(XNNPACK PRIVATE cpuinfo)
5302
5303# ---[ Configure pthreadpool
5304IF(NOT TARGET pthreadpool)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5305 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5306 SET(PTHREADPOOL_BUILD_TESTS OFF CACHE BOOL "")
5307 SET(PTHREADPOOL_BUILD_BENCHMARKS OFF CACHE BOOL "")
5308 SET(PTHREADPOOL_ALLOW_DEPRECATED_API OFF CACHE BOOL "")
5309 ADD_SUBDIRECTORY(
5310 "${PTHREADPOOL_SOURCE_DIR}"
5311 "${CMAKE_BINARY_DIR}/pthreadpool")
5312 ELSE()
5313 ADD_LIBRARY(pthreadpool SHARED IMPORTED)
5314 FIND_LIBRARY(PTHREADPOOL_LIBRARY pthreadpool)
5315 IF(NOT PTHREADPOOL_LIBRARY)
5316 MESSAGE(FATAL_ERROR "Cannot find pthreadpool")
5317 ENDIF()
5318 SET_PROPERTY(TARGET pthreadpool PROPERTY IMPORTED_LOCATION "${PTHREADPOOL_LIBRARY}")
5319 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5320ENDIF()
5321TARGET_LINK_LIBRARIES(XNNPACK PUBLIC pthreadpool)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5322TARGET_LINK_LIBRARIES(all_microkernels PRIVATE pthreadpool)
5323TARGET_LINK_LIBRARIES(packing PRIVATE pthreadpool)
5324TARGET_LINK_LIBRARIES(indirection PRIVATE pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5325
5326# ---[ Configure FXdiv
5327IF(NOT TARGET fxdiv)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5328 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5329 SET(FXDIV_BUILD_TESTS OFF CACHE BOOL "")
5330 SET(FXDIV_BUILD_BENCHMARKS OFF CACHE BOOL "")
5331 ADD_SUBDIRECTORY(
5332 "${FXDIV_SOURCE_DIR}"
5333 "${CMAKE_BINARY_DIR}/FXdiv")
5334 ELSE()
5335 FIND_FILE(FXDIV_HDR fxdiv.h PATH_SUFFIXES include)
5336 IF(NOT FXDIV_HDR)
5337 MESSAGE(FATAL_ERROR "Cannot find fxdiv")
5338 ENDIF()
5339 ADD_LIBRARY(fxdiv STATIC "${FXDIV_HDR}")
5340 SET_PROPERTY(TARGET fxdiv PROPERTY LINKER_LANGUAGE C)
5341 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5342ENDIF()
5343TARGET_LINK_LIBRARIES(XNNPACK PRIVATE fxdiv)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5344TARGET_LINK_LIBRARIES(all_microkernels PRIVATE fxdiv)
5345TARGET_LINK_LIBRARIES(indirection PRIVATE fxdiv)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5346
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5347# ---[ Configure FP16
5348IF(NOT TARGET fp16)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5349 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5350 SET(FP16_BUILD_TESTS OFF CACHE BOOL "")
5351 SET(FP16_BUILD_BENCHMARKS OFF CACHE BOOL "")
5352 ADD_SUBDIRECTORY(
5353 "${FP16_SOURCE_DIR}"
5354 "${CMAKE_BINARY_DIR}/FP16")
5355 ELSE()
5356 FIND_FILE(FP16_HDR fp16.h PATH_SUFFIXES include)
5357 IF(NOT FP16_HDR)
5358 MESSAGE(FATAL_ERROR "Cannot find fp16")
5359 ENDIF()
5360 ADD_LIBRARY(fp16 STATIC "${FP16_HDR}")
5361 SET_PROPERTY(TARGET fp16 PROPERTY LINKER_LANGUAGE C)
5362 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5363ENDIF()
5364TARGET_LINK_LIBRARIES(XNNPACK PRIVATE fp16)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5365TARGET_LINK_LIBRARIES(all_microkernels PRIVATE fp16)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5366
5367INSTALL(TARGETS XNNPACK
5368 LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR}
5369 ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR}
5370 PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_INCLUDEDIR})
5371
5372# ---[ XNNPACK unit tests
5373IF(XNNPACK_BUILD_TESTS)
5374 # ---[ Build google test
5375 IF(NOT TARGET gtest)
5376 SET(gtest_force_shared_crt ON CACHE BOOL "" FORCE)
5377 ADD_SUBDIRECTORY(
5378 "${GOOGLETEST_SOURCE_DIR}"
5379 "${CMAKE_BINARY_DIR}/googletest")
5380 ENDIF()
5381
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]5382 # ---[ Build size tests
5383
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5384 ADD_EXECUTABLE(operator-size-test test/operator-size.c)
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]5385 SET_TARGET_PROPERTIES(operator-size-test PROPERTIES
5386 C_STANDARD 99
5387 C_EXTENSIONS NO)
5388 TARGET_LINK_LIBRARIES(operator-size-test PRIVATE XNNPACK)
5389
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5390 ADD_EXECUTABLE(subgraph-size-test test/subgraph-size.c)
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]5391 SET_TARGET_PROPERTIES(subgraph-size-test PROPERTIES
5392 C_STANDARD 99
5393 C_EXTENSIONS NO)
5394 TARGET_LINK_LIBRARIES(subgraph-size-test PRIVATE XNNPACK)
5395
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5396 # ---[ Build operator-level unit tests
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5397 ADD_EXECUTABLE(abs-nc-test test/abs-nc.cc)
5398 SET_TARGET_PROPERTIES(abs-nc-test PROPERTIES
5399 CXX_STANDARD 11
5400 CXX_STANDARD_REQUIRED YES
5401 CXX_EXTENSIONS NO)
5402 TARGET_INCLUDE_DIRECTORIES(abs-nc-test PRIVATE src test)
5403 TARGET_LINK_LIBRARIES(abs-nc-test PRIVATE XNNPACK gtest gtest_main)
5404 ADD_TEST(abs-nc-test abs-nc-test)
5405
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]5406 ADD_EXECUTABLE(add-nd-test test/add-nd.cc)
5407 SET_TARGET_PROPERTIES(add-nd-test PROPERTIES
5408 CXX_STANDARD 11
5409 CXX_STANDARD_REQUIRED YES
5410 CXX_EXTENSIONS NO)
5411 TARGET_INCLUDE_DIRECTORIES(add-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5412 TARGET_LINK_LIBRARIES(add-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]5413 ADD_TEST(add-nd-test add-nd-test)
5414
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5415 ADD_EXECUTABLE(argmax-pooling-nhwc-test test/argmax-pooling-nhwc.cc)
5416 SET_TARGET_PROPERTIES(argmax-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5417 CXX_STANDARD 11
5418 CXX_STANDARD_REQUIRED YES
5419 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5420 TARGET_INCLUDE_DIRECTORIES(argmax-pooling-nhwc-test PRIVATE src test)
5421 TARGET_LINK_LIBRARIES(argmax-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5422 ADD_TEST(argmax-pooling-nhwc-test argmax-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5423
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5424 ADD_EXECUTABLE(average-pooling-nhwc-test test/average-pooling-nhwc.cc)
5425 SET_TARGET_PROPERTIES(average-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5426 CXX_STANDARD 11
5427 CXX_STANDARD_REQUIRED YES
5428 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5429 TARGET_INCLUDE_DIRECTORIES(average-pooling-nhwc-test PRIVATE src test)
5430 TARGET_LINK_LIBRARIES(average-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5431 ADD_TEST(average-pooling-nhwc-test average-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5432
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5433 ADD_EXECUTABLE(bankers-rounding-nc-test test/bankers-rounding-nc.cc)
5434 SET_TARGET_PROPERTIES(bankers-rounding-nc-test PROPERTIES
5435 CXX_STANDARD 11
5436 CXX_STANDARD_REQUIRED YES
5437 CXX_EXTENSIONS NO)
5438 TARGET_INCLUDE_DIRECTORIES(bankers-rounding-nc-test PRIVATE src test)
5439 TARGET_LINK_LIBRARIES(bankers-rounding-nc-test PRIVATE XNNPACK gtest gtest_main)
5440 ADD_TEST(bankers-rounding-nc-test bankers-rounding-nc-test)
5441
5442 ADD_EXECUTABLE(ceiling-nc-test test/ceiling-nc.cc)
5443 SET_TARGET_PROPERTIES(ceiling-nc-test PROPERTIES
5444 CXX_STANDARD 11
5445 CXX_STANDARD_REQUIRED YES
5446 CXX_EXTENSIONS NO)
5447 TARGET_INCLUDE_DIRECTORIES(ceiling-nc-test PRIVATE src test)
5448 TARGET_LINK_LIBRARIES(ceiling-nc-test PRIVATE XNNPACK gtest gtest_main)
5449 ADD_TEST(ceiling-nc-test ceiling-nc-test)
5450
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5451 ADD_EXECUTABLE(channel-shuffle-nc-test test/channel-shuffle-nc.cc)
5452 SET_TARGET_PROPERTIES(channel-shuffle-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5453 CXX_STANDARD 11
5454 CXX_STANDARD_REQUIRED YES
5455 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5456 TARGET_INCLUDE_DIRECTORIES(channel-shuffle-nc-test PRIVATE src test)
5457 TARGET_LINK_LIBRARIES(channel-shuffle-nc-test PRIVATE XNNPACK gtest gtest_main)
5458 ADD_TEST(channel-shuffle-nc-test channel-shuffle-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5459
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5460 ADD_EXECUTABLE(clamp-nc-test test/clamp-nc.cc)
5461 SET_TARGET_PROPERTIES(clamp-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5462 CXX_STANDARD 11
5463 CXX_STANDARD_REQUIRED YES
5464 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5465 TARGET_INCLUDE_DIRECTORIES(clamp-nc-test PRIVATE src test)
5466 TARGET_LINK_LIBRARIES(clamp-nc-test PRIVATE XNNPACK gtest gtest_main)
5467 ADD_TEST(clamp-nc-test clamp-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5468
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]5469 ADD_EXECUTABLE(constant-pad-nd-test test/constant-pad-nd.cc)
5470 SET_TARGET_PROPERTIES(constant-pad-nd-test PROPERTIES
5471 CXX_STANDARD 11
5472 CXX_STANDARD_REQUIRED YES
5473 CXX_EXTENSIONS NO)
5474 TARGET_INCLUDE_DIRECTORIES(constant-pad-nd-test PRIVATE src test)
5475 TARGET_LINK_LIBRARIES(constant-pad-nd-test PRIVATE XNNPACK gtest gtest_main)
5476 ADD_TEST(constant-pad-nd-test constant-pad-nd-test)
5477
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]5478 ADD_EXECUTABLE(convert-nc-test test/convert-nc.cc)
5479 SET_TARGET_PROPERTIES(convert-nc-test PROPERTIES
5480 CXX_STANDARD 11
5481 CXX_STANDARD_REQUIRED YES
5482 CXX_EXTENSIONS YES)
5483 TARGET_INCLUDE_DIRECTORIES(convert-nc-test PRIVATE src test)
5484 TARGET_LINK_LIBRARIES(convert-nc-test PRIVATE XNNPACK fp16 gtest gtest_main)
5485 ADD_TEST(convert-nc-test convert-nc-test)
5486
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5487 ADD_EXECUTABLE(convolution-nhwc-test test/convolution-nhwc.cc)
5488 SET_TARGET_PROPERTIES(convolution-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5489 CXX_STANDARD 11
5490 CXX_STANDARD_REQUIRED YES
Marat Dukhan258b6392021-06-29 19:18:09 -0700[diff] [blame]5491 CXX_EXTENSIONS YES)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5492 TARGET_INCLUDE_DIRECTORIES(convolution-nhwc-test PRIVATE src test)
Frank Barchard49b4dcc2020-06-26 14:07:19 -0700[diff] [blame]5493 TARGET_LINK_LIBRARIES(convolution-nhwc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5494 ADD_TEST(convolution-nhwc-test convolution-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5495
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5496 ADD_EXECUTABLE(convolution-nchw-test test/convolution-nchw.cc)
5497 SET_TARGET_PROPERTIES(convolution-nchw-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5498 CXX_STANDARD 11
5499 CXX_STANDARD_REQUIRED YES
Marat Dukhan258b6392021-06-29 19:18:09 -0700[diff] [blame]5500 CXX_EXTENSIONS YES)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5501 TARGET_INCLUDE_DIRECTORIES(convolution-nchw-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5502 TARGET_LINK_LIBRARIES(convolution-nchw-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5503 ADD_TEST(convolution-nchw-test convolution-nchw-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5504
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]5505 ADD_EXECUTABLE(copy-nc-test test/copy-nc.cc)
5506 SET_TARGET_PROPERTIES(copy-nc-test PROPERTIES
5507 CXX_STANDARD 11
5508 CXX_STANDARD_REQUIRED YES
5509 CXX_EXTENSIONS NO)
5510 TARGET_INCLUDE_DIRECTORIES(copy-nc-test PRIVATE src test)
5511 TARGET_LINK_LIBRARIES(copy-nc-test PRIVATE XNNPACK gtest gtest_main)
5512 ADD_TEST(copy-nc-test copy-nc-test)
5513
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5514 ADD_EXECUTABLE(deconvolution-nhwc-test test/deconvolution-nhwc.cc)
5515 SET_TARGET_PROPERTIES(deconvolution-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5516 CXX_STANDARD 11
5517 CXX_STANDARD_REQUIRED YES
5518 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5519 TARGET_INCLUDE_DIRECTORIES(deconvolution-nhwc-test PRIVATE src test)
5520 TARGET_LINK_LIBRARIES(deconvolution-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5521 ADD_TEST(deconvolution-nhwc-test deconvolution-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5522
Marat Dukhan188d1042020-11-24 23:39:40 -0800[diff] [blame]5523 ADD_EXECUTABLE(depth-to-space-nchw2nhwc-test test/depth-to-space-nchw2nhwc.cc)
5524 SET_TARGET_PROPERTIES(depth-to-space-nchw2nhwc-test PROPERTIES
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -0800[diff] [blame]5525 CXX_STANDARD 11
5526 CXX_STANDARD_REQUIRED YES
5527 CXX_EXTENSIONS NO)
Marat Dukhan188d1042020-11-24 23:39:40 -0800[diff] [blame]5528 TARGET_INCLUDE_DIRECTORIES(depth-to-space-nchw2nhwc-test PRIVATE src test)
5529 TARGET_LINK_LIBRARIES(depth-to-space-nchw2nhwc-test PRIVATE XNNPACK gtest gtest_main)
5530 ADD_TEST(depth-to-space-nchw2nhwc-test depth-to-space-nchw2nhwc-test)
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -0800[diff] [blame]5531
Marat Dukhan0e521172020-11-25 13:10:04 -0800[diff] [blame]5532 ADD_EXECUTABLE(depth-to-space-nhwc-test test/depth-to-space-nhwc.cc)
5533 SET_TARGET_PROPERTIES(depth-to-space-nhwc-test PROPERTIES
5534 CXX_STANDARD 11
5535 CXX_STANDARD_REQUIRED YES
5536 CXX_EXTENSIONS NO)
5537 TARGET_INCLUDE_DIRECTORIES(depth-to-space-nhwc-test PRIVATE src test)
5538 TARGET_LINK_LIBRARIES(depth-to-space-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5539 ADD_TEST(depth-to-space-nhwc-test depth-to-space-nhwc-test)
5540
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]5541 ADD_EXECUTABLE(divide-nd-test test/divide-nd.cc)
5542 SET_TARGET_PROPERTIES(divide-nd-test PROPERTIES
5543 CXX_STANDARD 11
5544 CXX_STANDARD_REQUIRED YES
5545 CXX_EXTENSIONS NO)
5546 TARGET_INCLUDE_DIRECTORIES(divide-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5547 TARGET_LINK_LIBRARIES(divide-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]5548 ADD_TEST(divide-nd-test divide-nd-test)
5549
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]5550 ADD_EXECUTABLE(elu-nc-test test/elu-nc.cc)
5551 SET_TARGET_PROPERTIES(elu-nc-test PROPERTIES
5552 CXX_STANDARD 11
5553 CXX_STANDARD_REQUIRED YES
5554 CXX_EXTENSIONS NO)
5555 TARGET_INCLUDE_DIRECTORIES(elu-nc-test PRIVATE src test)
5556 TARGET_LINK_LIBRARIES(elu-nc-test PRIVATE XNNPACK gtest gtest_main)
5557 ADD_TEST(elu-nc-test elu-nc-test)
5558
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5559 ADD_EXECUTABLE(fully-connected-nc-test test/fully-connected-nc.cc)
5560 SET_TARGET_PROPERTIES(fully-connected-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5561 CXX_STANDARD 11
5562 CXX_STANDARD_REQUIRED YES
5563 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5564 TARGET_INCLUDE_DIRECTORIES(fully-connected-nc-test PRIVATE src test)
Marat Dukhanddb3d162021-10-25 17:05:51 -0700[diff] [blame]5565 TARGET_LINK_LIBRARIES(fully-connected-nc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5566 ADD_TEST(fully-connected-nc-test fully-connected-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5567
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5568 ADD_EXECUTABLE(floor-nc-test test/floor-nc.cc)
5569 SET_TARGET_PROPERTIES(floor-nc-test PROPERTIES
5570 CXX_STANDARD 11
5571 CXX_STANDARD_REQUIRED YES
5572 CXX_EXTENSIONS NO)
5573 TARGET_INCLUDE_DIRECTORIES(floor-nc-test PRIVATE src test)
5574 TARGET_LINK_LIBRARIES(floor-nc-test PRIVATE XNNPACK gtest gtest_main)
5575 ADD_TEST(floor-nc-test floor-nc-test)
5576
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5577 ADD_EXECUTABLE(global-average-pooling-nwc-test test/global-average-pooling-nwc.cc)
5578 SET_TARGET_PROPERTIES(global-average-pooling-nwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5579 CXX_STANDARD 11
5580 CXX_STANDARD_REQUIRED YES
5581 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5582 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-nwc-test PRIVATE src test)
Marat Dukhanef61d022020-06-19 13:54:49 -0700[diff] [blame]5583 TARGET_LINK_LIBRARIES(global-average-pooling-nwc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5584 ADD_TEST(global-average-pooling-nwc-test global-average-pooling-nwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5585
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5586 ADD_EXECUTABLE(global-average-pooling-ncw-test test/global-average-pooling-ncw.cc)
5587 SET_TARGET_PROPERTIES(global-average-pooling-ncw-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5588 CXX_STANDARD 11
5589 CXX_STANDARD_REQUIRED YES
5590 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5591 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-ncw-test PRIVATE src test)
Marat Dukhan5fd403b2020-06-23 17:43:48 -0700[diff] [blame]5592 TARGET_LINK_LIBRARIES(global-average-pooling-ncw-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5593 ADD_TEST(global-average-pooling-ncw-test global-average-pooling-ncw-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5594
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5595 ADD_EXECUTABLE(hardswish-nc-test test/hardswish-nc.cc)
5596 SET_TARGET_PROPERTIES(hardswish-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5597 CXX_STANDARD 11
5598 CXX_STANDARD_REQUIRED YES
5599 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5600 TARGET_INCLUDE_DIRECTORIES(hardswish-nc-test PRIVATE src test)
Marat Dukhanae24dfc2020-09-23 17:12:45 -0700[diff] [blame]5601 TARGET_LINK_LIBRARIES(hardswish-nc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5602 ADD_TEST(hardswish-nc-test hardswish-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5603
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5604 ADD_EXECUTABLE(leaky-relu-nc-test test/leaky-relu-nc.cc)
5605 SET_TARGET_PROPERTIES(leaky-relu-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5606 CXX_STANDARD 11
5607 CXX_STANDARD_REQUIRED YES
5608 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5609 TARGET_INCLUDE_DIRECTORIES(leaky-relu-nc-test PRIVATE src test)
5610 TARGET_LINK_LIBRARIES(leaky-relu-nc-test PRIVATE XNNPACK gtest gtest_main)
5611 ADD_TEST(leaky-relu-nc-test leaky-relu-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5612
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5613 ADD_EXECUTABLE(max-pooling-nhwc-test test/max-pooling-nhwc.cc)
5614 SET_TARGET_PROPERTIES(max-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5615 CXX_STANDARD 11
5616 CXX_STANDARD_REQUIRED YES
5617 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5618 TARGET_INCLUDE_DIRECTORIES(max-pooling-nhwc-test PRIVATE src test)
5619 TARGET_LINK_LIBRARIES(max-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5620 ADD_TEST(max-pooling-nhwc-test max-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5621
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5622 ADD_EXECUTABLE(maximum-nd-test test/maximum-nd.cc)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5623 SET_TARGET_PROPERTIES(maximum-nd-test PROPERTIES
5624 CXX_STANDARD 11
5625 CXX_STANDARD_REQUIRED YES
5626 CXX_EXTENSIONS NO)
5627 TARGET_INCLUDE_DIRECTORIES(maximum-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5628 TARGET_LINK_LIBRARIES(maximum-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5629 ADD_TEST(maximum-nd-test maximum-nd-test)
5630
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5631 ADD_EXECUTABLE(minimum-nd-test test/minimum-nd.cc)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5632 SET_TARGET_PROPERTIES(minimum-nd-test PROPERTIES
5633 CXX_STANDARD 11
5634 CXX_STANDARD_REQUIRED YES
5635 CXX_EXTENSIONS NO)
5636 TARGET_INCLUDE_DIRECTORIES(minimum-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5637 TARGET_LINK_LIBRARIES(minimum-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5638 ADD_TEST(minimum-nd-test minimum-nd-test)
5639
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5640 ADD_EXECUTABLE(multiply-nd-test test/multiply-nd.cc)
5641 SET_TARGET_PROPERTIES(multiply-nd-test PROPERTIES
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]5642 CXX_STANDARD 11
5643 CXX_STANDARD_REQUIRED YES
5644 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5645 TARGET_INCLUDE_DIRECTORIES(multiply-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5646 TARGET_LINK_LIBRARIES(multiply-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5647 ADD_TEST(multiply-nd-test multiply-nd-test)
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]5648
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5649 ADD_EXECUTABLE(negate-nc-test test/negate-nc.cc)
5650 SET_TARGET_PROPERTIES(negate-nc-test PROPERTIES
5651 CXX_STANDARD 11
5652 CXX_STANDARD_REQUIRED YES
5653 CXX_EXTENSIONS NO)
5654 TARGET_INCLUDE_DIRECTORIES(negate-nc-test PRIVATE src test)
5655 TARGET_LINK_LIBRARIES(negate-nc-test PRIVATE XNNPACK gtest gtest_main)
5656 ADD_TEST(negate-nc-test negate-nc-test)
5657
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5658 ADD_EXECUTABLE(prelu-nc-test test/prelu-nc.cc)
5659 SET_TARGET_PROPERTIES(prelu-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5660 CXX_STANDARD 11
5661 CXX_STANDARD_REQUIRED YES
5662 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5663 TARGET_INCLUDE_DIRECTORIES(prelu-nc-test PRIVATE src test)
5664 TARGET_LINK_LIBRARIES(prelu-nc-test PRIVATE XNNPACK gtest gtest_main)
5665 ADD_TEST(prelu-nc-test prelu-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5666
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5667 ADD_EXECUTABLE(resize-bilinear-nhwc-test test/resize-bilinear-nhwc.cc)
5668 SET_TARGET_PROPERTIES(resize-bilinear-nhwc-test PROPERTIES
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5669 CXX_STANDARD 11
5670 CXX_STANDARD_REQUIRED YES
5671 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5672 TARGET_INCLUDE_DIRECTORIES(resize-bilinear-nhwc-test PRIVATE src test)
5673 TARGET_LINK_LIBRARIES(resize-bilinear-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5674 ADD_TEST(resize-bilinear-nhwc-test resize-bilinear-nhwc-test)
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5675
Artsiom Ablavatski97918102020-10-27 15:52:59 -0700[diff] [blame]5676 ADD_EXECUTABLE(resize-bilinear-nchw-test test/resize-bilinear-nchw.cc)
5677 SET_TARGET_PROPERTIES(resize-bilinear-nchw-test PROPERTIES
5678 CXX_STANDARD 11
5679 CXX_STANDARD_REQUIRED YES
5680 CXX_EXTENSIONS NO)
5681 TARGET_INCLUDE_DIRECTORIES(resize-bilinear-nchw-test PRIVATE src test)
5682 TARGET_LINK_LIBRARIES(resize-bilinear-nchw-test PRIVATE XNNPACK gtest gtest_main)
5683 ADD_TEST(resize-bilinear-nchw-test resize-bilinear-nchw-test)
5684
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5685 ADD_EXECUTABLE(sigmoid-nc-test test/sigmoid-nc.cc)
5686 SET_TARGET_PROPERTIES(sigmoid-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5687 CXX_STANDARD 11
5688 CXX_STANDARD_REQUIRED YES
5689 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5690 TARGET_INCLUDE_DIRECTORIES(sigmoid-nc-test PRIVATE src test)
5691 TARGET_LINK_LIBRARIES(sigmoid-nc-test PRIVATE XNNPACK gtest gtest_main)
5692 ADD_TEST(sigmoid-nc-test sigmoid-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5693
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5694 ADD_EXECUTABLE(softmax-nc-test test/softmax-nc.cc)
5695 SET_TARGET_PROPERTIES(softmax-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5696 CXX_STANDARD 11
5697 CXX_STANDARD_REQUIRED YES
5698 CXX_EXTENSIONS NO)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5699 TARGET_INCLUDE_DIRECTORIES(softmax-nc-test PRIVATE src test)
5700 TARGET_LINK_LIBRARIES(softmax-nc-test PRIVATE XNNPACK gtest gtest_main)
5701 ADD_TEST(softmax-nc-test softmax-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5702
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5703 ADD_EXECUTABLE(square-nc-test test/square-nc.cc)
5704 SET_TARGET_PROPERTIES(square-nc-test PROPERTIES
5705 CXX_STANDARD 11
5706 CXX_STANDARD_REQUIRED YES
5707 CXX_EXTENSIONS NO)
5708 TARGET_INCLUDE_DIRECTORIES(square-nc-test PRIVATE src test)
5709 TARGET_LINK_LIBRARIES(square-nc-test PRIVATE XNNPACK gtest gtest_main)
5710 ADD_TEST(square-nc-test square-nc-test)
5711
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]5712 ADD_EXECUTABLE(square-root-nc-test test/square-root-nc.cc)
5713 SET_TARGET_PROPERTIES(square-root-nc-test PROPERTIES
5714 CXX_STANDARD 11
5715 CXX_STANDARD_REQUIRED YES
5716 CXX_EXTENSIONS NO)
5717 TARGET_INCLUDE_DIRECTORIES(square-root-nc-test PRIVATE src test)
5718 TARGET_LINK_LIBRARIES(square-root-nc-test PRIVATE XNNPACK gtest gtest_main)
5719 ADD_TEST(square-root-nc-test square-root-nc-test)
5720
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]5721 ADD_EXECUTABLE(squared-difference-nd-test test/squared-difference-nd.cc)
5722 SET_TARGET_PROPERTIES(squared-difference-nd-test PROPERTIES
5723 CXX_STANDARD 11
5724 CXX_STANDARD_REQUIRED YES
5725 CXX_EXTENSIONS NO)
5726 TARGET_INCLUDE_DIRECTORIES(squared-difference-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5727 TARGET_LINK_LIBRARIES(squared-difference-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]5728 ADD_TEST(squared-difference-nd-test squared-difference-nd-test)
5729
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5730 ADD_EXECUTABLE(subtract-nd-test test/subtract-nd.cc)
5731 SET_TARGET_PROPERTIES(subtract-nd-test PROPERTIES
5732 CXX_STANDARD 11
5733 CXX_STANDARD_REQUIRED YES
5734 CXX_EXTENSIONS NO)
5735 TARGET_INCLUDE_DIRECTORIES(subtract-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5736 TARGET_LINK_LIBRARIES(subtract-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5737 ADD_TEST(subtract-nd-test subtract-nd-test)
5738
Marat Dukhan5de7bc02021-09-09 19:04:01 -0700[diff] [blame]5739 ADD_EXECUTABLE(tanh-nc-test test/tanh-nc.cc)
5740 SET_TARGET_PROPERTIES(tanh-nc-test PROPERTIES
5741 CXX_STANDARD 11
5742 CXX_STANDARD_REQUIRED YES
5743 CXX_EXTENSIONS NO)
5744 TARGET_INCLUDE_DIRECTORIES(tanh-nc-test PRIVATE src test)
5745 TARGET_LINK_LIBRARIES(tanh-nc-test PRIVATE XNNPACK gtest gtest_main)
5746 ADD_TEST(tanh-nc-test tanh-nc-test)
5747
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5748 ADD_EXECUTABLE(truncation-nc-test test/truncation-nc.cc)
5749 SET_TARGET_PROPERTIES(truncation-nc-test PROPERTIES
5750 CXX_STANDARD 11
5751 CXX_STANDARD_REQUIRED YES
5752 CXX_EXTENSIONS NO)
5753 TARGET_INCLUDE_DIRECTORIES(truncation-nc-test PRIVATE src test)
5754 TARGET_LINK_LIBRARIES(truncation-nc-test PRIVATE XNNPACK gtest gtest_main)
5755 ADD_TEST(truncation-nc-test truncation-nc-test)
5756
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5757 ADD_EXECUTABLE(unpooling-nhwc-test test/unpooling-nhwc.cc)
5758 SET_TARGET_PROPERTIES(unpooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5759 CXX_STANDARD 11
5760 CXX_STANDARD_REQUIRED YES
5761 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5762 TARGET_INCLUDE_DIRECTORIES(unpooling-nhwc-test PRIVATE src test)
5763 TARGET_LINK_LIBRARIES(unpooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5764 ADD_TEST(unpooling-nhwc-test unpooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5765
XNNPACK Teamab8c4c82020-10-09 08:05:51 -0700[diff] [blame]5766 ADD_EXECUTABLE(memory-planner-test test/memory-planner-test.cc)
5767 SET_TARGET_PROPERTIES(memory-planner-test PROPERTIES
5768 C_STANDARD 11
5769 CXX_STANDARD_REQUIRED YES
5770 C_EXTENSIONS NO)
5771 TARGET_INCLUDE_DIRECTORIES(memory-planner-test PRIVATE src test)
5772 TARGET_LINK_LIBRARIES(memory-planner-test PRIVATE XNNPACK gtest gtest_main)
5773 ADD_TEST(memory-planner-test memory-planner-test)
5774
5775 ADD_EXECUTABLE(subgraph-nchw-test test/subgraph-nchw.cc)
5776 SET_TARGET_PROPERTIES(subgraph-nchw-test PROPERTIES
5777 C_STANDARD 11
5778 CXX_STANDARD_REQUIRED YES
5779 C_EXTENSIONS NO)
5780 TARGET_INCLUDE_DIRECTORIES(subgraph-nchw-test PRIVATE src test)
5781 TARGET_LINK_LIBRARIES(subgraph-nchw-test PRIVATE XNNPACK gtest gtest_main)
5782 ADD_TEST(subgraph-nchw-test subgraph-nchw-test)
5783
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5784 # ---[ Build microkernel-level unit tests
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5785 ADD_EXECUTABLE(f16-f32-vcvt-test test/f16-f32-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
5786 SET_TARGET_PROPERTIES(f16-f32-vcvt-test PROPERTIES
5787 CXX_STANDARD 11
5788 CXX_STANDARD_REQUIRED YES
5789 CXX_EXTENSIONS YES)
5790 TARGET_INCLUDE_DIRECTORIES(f16-f32-vcvt-test PRIVATE include src test)
5791 TARGET_LINK_LIBRARIES(f16-f32-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
5792 ADD_TEST(f16-f32-vcvt-test f16-f32-vcvt-test)
5793
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5794 ADD_EXECUTABLE(f16-dwconv-minmax-test test/f16-dwconv-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]5795 SET_TARGET_PROPERTIES(f16-dwconv-minmax-test PROPERTIES
5796 CXX_STANDARD 11
5797 CXX_STANDARD_REQUIRED YES
5798 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5799 TARGET_INCLUDE_DIRECTORIES(f16-dwconv-minmax-test PRIVATE include src test)
5800 TARGET_LINK_LIBRARIES(f16-dwconv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]5801 ADD_TEST(f16-dwconv-minmax-test f16-dwconv-minmax-test)
5802
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5803 ADD_EXECUTABLE(f16-gavgpool-minmax-test test/f16-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]5804 SET_TARGET_PROPERTIES(f16-gavgpool-minmax-test PROPERTIES
5805 CXX_STANDARD 11
5806 CXX_STANDARD_REQUIRED YES
5807 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5808 TARGET_INCLUDE_DIRECTORIES(f16-gavgpool-minmax-test PRIVATE include src test)
5809 TARGET_LINK_LIBRARIES(f16-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]5810 ADD_TEST(f16-gavgpool-minmax-test f16-gavgpool-minmax-test)
5811
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5812 ADD_EXECUTABLE(f16-gemm-minmax-test test/f16-gemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5813 SET_TARGET_PROPERTIES(f16-gemm-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5814 CXX_STANDARD 11
5815 CXX_STANDARD_REQUIRED YES
5816 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5817 TARGET_INCLUDE_DIRECTORIES(f16-gemm-minmax-test PRIVATE include src test)
5818 TARGET_LINK_LIBRARIES(f16-gemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5819 ADD_TEST(f16-gemm-minmax-test f16-gemm-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5820
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5821 ADD_EXECUTABLE(f16-igemm-minmax-test test/f16-igemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]5822 SET_TARGET_PROPERTIES(f16-igemm-minmax-test PROPERTIES
5823 CXX_STANDARD 11
5824 CXX_STANDARD_REQUIRED YES
5825 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5826 TARGET_INCLUDE_DIRECTORIES(f16-igemm-minmax-test PRIVATE include src test)
5827 TARGET_LINK_LIBRARIES(f16-igemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]5828 ADD_TEST(f16-igemm-minmax-test f16-igemm-minmax-test)
5829
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5830 ADD_EXECUTABLE(f16-spmm-minmax-test test/f16-spmm-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5831 SET_TARGET_PROPERTIES(f16-spmm-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5832 CXX_STANDARD 11
5833 CXX_STANDARD_REQUIRED YES
5834 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5835 TARGET_INCLUDE_DIRECTORIES(f16-spmm-minmax-test PRIVATE include src test)
5836 TARGET_LINK_LIBRARIES(f16-spmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5837 ADD_TEST(f16-spmm-minmax-test f16-spmm-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5838
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5839 ADD_EXECUTABLE(f16-vadd-minmax-test test/f16-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5840 SET_TARGET_PROPERTIES(f16-vadd-minmax-test PROPERTIES
5841 CXX_STANDARD 11
5842 CXX_STANDARD_REQUIRED YES
5843 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5844 TARGET_INCLUDE_DIRECTORIES(f16-vadd-minmax-test PRIVATE include src test)
5845 TARGET_LINK_LIBRARIES(f16-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5846 ADD_TEST(f16-vadd-minmax-test f16-vadd-minmax-test)
5847
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5848 ADD_EXECUTABLE(f16-vaddc-minmax-test test/f16-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5849 SET_TARGET_PROPERTIES(f16-vaddc-minmax-test PROPERTIES
5850 CXX_STANDARD 11
5851 CXX_STANDARD_REQUIRED YES
5852 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5853 TARGET_INCLUDE_DIRECTORIES(f16-vaddc-minmax-test PRIVATE include src test)
5854 TARGET_LINK_LIBRARIES(f16-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5855 ADD_TEST(f16-vaddc-minmax-test f16-vaddc-minmax-test)
5856
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5857 ADD_EXECUTABLE(f16-vclamp-test test/f16-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5858 SET_TARGET_PROPERTIES(f16-vclamp-test PROPERTIES
5859 CXX_STANDARD 11
5860 CXX_STANDARD_REQUIRED YES
5861 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5862 TARGET_INCLUDE_DIRECTORIES(f16-vclamp-test PRIVATE include src test)
5863 TARGET_LINK_LIBRARIES(f16-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5864 ADD_TEST(f16-vclamp-test f16-vclamp-test)
5865
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5866 ADD_EXECUTABLE(f16-vdiv-minmax-test test/f16-vdiv-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5867 SET_TARGET_PROPERTIES(f16-vdiv-minmax-test PROPERTIES
5868 CXX_STANDARD 11
5869 CXX_STANDARD_REQUIRED YES
5870 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5871 TARGET_INCLUDE_DIRECTORIES(f16-vdiv-minmax-test PRIVATE include src test)
5872 TARGET_LINK_LIBRARIES(f16-vdiv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5873 ADD_TEST(f16-vdiv-minmax-test f16-vdiv-minmax-test)
5874
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5875 ADD_EXECUTABLE(f16-vdivc-minmax-test test/f16-vdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5876 SET_TARGET_PROPERTIES(f16-vdivc-minmax-test PROPERTIES
5877 CXX_STANDARD 11
5878 CXX_STANDARD_REQUIRED YES
5879 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5880 TARGET_INCLUDE_DIRECTORIES(f16-vdivc-minmax-test PRIVATE include src test)
5881 TARGET_LINK_LIBRARIES(f16-vdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5882 ADD_TEST(f16-vdivc-minmax-test f16-vdivc-minmax-test)
5883
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5884 ADD_EXECUTABLE(f16-vrdivc-minmax-test test/f16-vrdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5885 SET_TARGET_PROPERTIES(f16-vrdivc-minmax-test PROPERTIES
5886 CXX_STANDARD 11
5887 CXX_STANDARD_REQUIRED YES
5888 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5889 TARGET_INCLUDE_DIRECTORIES(f16-vrdivc-minmax-test PRIVATE include src test)
5890 TARGET_LINK_LIBRARIES(f16-vrdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5891 ADD_TEST(f16-vrdivc-minmax-test f16-vrdivc-minmax-test)
5892
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5893 ADD_EXECUTABLE(f16-vhswish-test test/f16-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5894 SET_TARGET_PROPERTIES(f16-vhswish-test PROPERTIES
5895 CXX_STANDARD 11
5896 CXX_STANDARD_REQUIRED YES
5897 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5898 TARGET_INCLUDE_DIRECTORIES(f16-vhswish-test PRIVATE include src test)
5899 TARGET_LINK_LIBRARIES(f16-vhswish-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5900 ADD_TEST(f16-vhswish-test f16-vhswish-test)
5901
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5902 ADD_EXECUTABLE(f16-vmax-test test/f16-vmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5903 SET_TARGET_PROPERTIES(f16-vmax-test PROPERTIES
5904 CXX_STANDARD 11
5905 CXX_STANDARD_REQUIRED YES
5906 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5907 TARGET_INCLUDE_DIRECTORIES(f16-vmax-test PRIVATE include src test)
5908 TARGET_LINK_LIBRARIES(f16-vmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5909 ADD_TEST(f16-vmax-test f16-vmax-test)
5910
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5911 ADD_EXECUTABLE(f16-vmaxc-test test/f16-vmaxc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5912 SET_TARGET_PROPERTIES(f16-vmaxc-test PROPERTIES
5913 CXX_STANDARD 11
5914 CXX_STANDARD_REQUIRED YES
5915 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5916 TARGET_INCLUDE_DIRECTORIES(f16-vmaxc-test PRIVATE include src test)
5917 TARGET_LINK_LIBRARIES(f16-vmaxc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5918 ADD_TEST(f16-vmaxc-test f16-vmaxc-test)
5919
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5920 ADD_EXECUTABLE(f16-vmin-test test/f16-vmin.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5921 SET_TARGET_PROPERTIES(f16-vmin-test PROPERTIES
5922 CXX_STANDARD 11
5923 CXX_STANDARD_REQUIRED YES
5924 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5925 TARGET_INCLUDE_DIRECTORIES(f16-vmin-test PRIVATE include src test)
5926 TARGET_LINK_LIBRARIES(f16-vmin-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5927 ADD_TEST(f16-vmin-test f16-vmin-test)
5928
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5929 ADD_EXECUTABLE(f16-vminc-test test/f16-vminc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5930 SET_TARGET_PROPERTIES(f16-vminc-test PROPERTIES
5931 CXX_STANDARD 11
5932 CXX_STANDARD_REQUIRED YES
5933 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5934 TARGET_INCLUDE_DIRECTORIES(f16-vminc-test PRIVATE include src test)
5935 TARGET_LINK_LIBRARIES(f16-vminc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5936 ADD_TEST(f16-vminc-test f16-vminc-test)
5937
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5938 ADD_EXECUTABLE(f16-vmul-minmax-test test/f16-vmul-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5939 SET_TARGET_PROPERTIES(f16-vmul-minmax-test PROPERTIES
5940 CXX_STANDARD 11
5941 CXX_STANDARD_REQUIRED YES
5942 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5943 TARGET_INCLUDE_DIRECTORIES(f16-vmul-minmax-test PRIVATE include src test)
5944 TARGET_LINK_LIBRARIES(f16-vmul-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5945 ADD_TEST(f16-vmul-minmax-test f16-vmul-minmax-test)
5946
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5947 ADD_EXECUTABLE(f16-vmulc-minmax-test test/f16-vmulc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5948 SET_TARGET_PROPERTIES(f16-vmulc-minmax-test PROPERTIES
5949 CXX_STANDARD 11
5950 CXX_STANDARD_REQUIRED YES
5951 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5952 TARGET_INCLUDE_DIRECTORIES(f16-vmulc-minmax-test PRIVATE include src test)
5953 TARGET_LINK_LIBRARIES(f16-vmulc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5954 ADD_TEST(f16-vmulc-minmax-test f16-vmulc-minmax-test)
5955
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5956 ADD_EXECUTABLE(f16-vmulcaddc-minmax-test test/f16-vmulcaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5957 SET_TARGET_PROPERTIES(f16-vmulcaddc-minmax-test PROPERTIES
5958 CXX_STANDARD 11
5959 CXX_STANDARD_REQUIRED YES
5960 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5961 TARGET_INCLUDE_DIRECTORIES(f16-vmulcaddc-minmax-test PRIVATE include src test)
5962 TARGET_LINK_LIBRARIES(f16-vmulcaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5963 ADD_TEST(f16-vmulcaddc-minmax-test f16-vmulcaddc-minmax-test)
5964
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5965 ADD_EXECUTABLE(f16-prelu-test test/f16-prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5966 SET_TARGET_PROPERTIES(f16-prelu-test PROPERTIES
5967 CXX_STANDARD 11
5968 CXX_STANDARD_REQUIRED YES
5969 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5970 TARGET_INCLUDE_DIRECTORIES(f16-prelu-test PRIVATE include src test)
5971 TARGET_LINK_LIBRARIES(f16-prelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5972 ADD_TEST(f16-prelu-test f16-prelu-test)
5973
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5974 ADD_EXECUTABLE(f16-vsub-minmax-test test/f16-vsub-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5975 SET_TARGET_PROPERTIES(f16-vsub-minmax-test PROPERTIES
5976 CXX_STANDARD 11
5977 CXX_STANDARD_REQUIRED YES
5978 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5979 TARGET_INCLUDE_DIRECTORIES(f16-vsub-minmax-test PRIVATE include src test)
5980 TARGET_LINK_LIBRARIES(f16-vsub-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5981 ADD_TEST(f16-vsub-minmax-test f16-vsub-minmax-test)
5982
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5983 ADD_EXECUTABLE(f16-vsubc-minmax-test test/f16-vsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5984 SET_TARGET_PROPERTIES(f16-vsubc-minmax-test PROPERTIES
5985 CXX_STANDARD 11
5986 CXX_STANDARD_REQUIRED YES
5987 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5988 TARGET_INCLUDE_DIRECTORIES(f16-vsubc-minmax-test PRIVATE include src test)
5989 TARGET_LINK_LIBRARIES(f16-vsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5990 ADD_TEST(f16-vsubc-minmax-test f16-vsubc-minmax-test)
5991
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5992 ADD_EXECUTABLE(f16-vrsubc-minmax-test test/f16-vrsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5993 SET_TARGET_PROPERTIES(f16-vrsubc-minmax-test PROPERTIES
5994 CXX_STANDARD 11
5995 CXX_STANDARD_REQUIRED YES
5996 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5997 TARGET_INCLUDE_DIRECTORIES(f16-vrsubc-minmax-test PRIVATE include src test)
5998 TARGET_LINK_LIBRARIES(f16-vrsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5999 ADD_TEST(f16-vrsubc-minmax-test f16-vrsubc-minmax-test)
6000
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6001 ADD_EXECUTABLE(f32-argmaxpool-test test/f32-argmaxpool.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6002 SET_TARGET_PROPERTIES(f32-argmaxpool-test PROPERTIES
6003 CXX_STANDARD 11
6004 CXX_STANDARD_REQUIRED YES
6005 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6006 TARGET_INCLUDE_DIRECTORIES(f32-argmaxpool-test PRIVATE include src test)
6007 TARGET_LINK_LIBRARIES(f32-argmaxpool-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6008 ADD_TEST(f32-argmaxpool-test f32-argmaxpool-test)
6009
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6010 ADD_EXECUTABLE(f32-avgpool-minmax-test test/f32-avgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6011 SET_TARGET_PROPERTIES(f32-avgpool-minmax-test PROPERTIES
6012 CXX_STANDARD 11
6013 CXX_STANDARD_REQUIRED YES
6014 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6015 TARGET_INCLUDE_DIRECTORIES(f32-avgpool-minmax-test PRIVATE include src test)
6016 TARGET_LINK_LIBRARIES(f32-avgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6017 ADD_TEST(f32-avgpool-minmax-test f32-avgpool-minmax-test)
6018
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6019 ADD_EXECUTABLE(f32-conv-hwc-test test/f32-conv-hwc.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6020 SET_TARGET_PROPERTIES(f32-conv-hwc-test PROPERTIES
6021 CXX_STANDARD 11
6022 CXX_STANDARD_REQUIRED YES
6023 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6024 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc-test PRIVATE include src test)
6025 TARGET_LINK_LIBRARIES(f32-conv-hwc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6026 ADD_TEST(f32-conv-hwc-test f32-conv-hwc-test)
6027
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6028 ADD_EXECUTABLE(f32-conv-hwc2chw-test test/f32-conv-hwc2chw.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6029 SET_TARGET_PROPERTIES(f32-conv-hwc2chw-test PROPERTIES
6030 CXX_STANDARD 11
6031 CXX_STANDARD_REQUIRED YES
6032 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6033 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc2chw-test PRIVATE include src test)
6034 TARGET_LINK_LIBRARIES(f32-conv-hwc2chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6035 ADD_TEST(f32-conv-hwc2chw-test f32-conv-hwc2chw-test)
6036
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6037 ADD_EXECUTABLE(f32-dwconv-test test/f32-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6038 SET_TARGET_PROPERTIES(f32-dwconv-test PROPERTIES
6039 CXX_STANDARD 11
6040 CXX_STANDARD_REQUIRED YES
6041 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6042 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-test PRIVATE include src test)
6043 TARGET_LINK_LIBRARIES(f32-dwconv-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6044 ADD_TEST(f32-dwconv-test f32-dwconv-test)
6045
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6046 ADD_EXECUTABLE(f32-dwconv2d-chw-test test/f32-dwconv2d-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6047 SET_TARGET_PROPERTIES(f32-dwconv2d-chw-test PROPERTIES
6048 CXX_STANDARD 11
6049 CXX_STANDARD_REQUIRED YES
6050 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6051 TARGET_INCLUDE_DIRECTORIES(f32-dwconv2d-chw-test PRIVATE include src test)
6052 TARGET_LINK_LIBRARIES(f32-dwconv2d-chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6053 ADD_TEST(f32-dwconv2d-chw-test f32-dwconv2d-chw-test)
6054
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6055 ADD_EXECUTABLE(f32-dwconv-minmax-test test/f32-dwconv-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6056 SET_TARGET_PROPERTIES(f32-dwconv-minmax-test PROPERTIES
6057 CXX_STANDARD 11
6058 CXX_STANDARD_REQUIRED YES
6059 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6060 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-minmax-test PRIVATE include src test)
6061 TARGET_LINK_LIBRARIES(f32-dwconv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6062 ADD_TEST(f32-dwconv-minmax-test f32-dwconv-minmax-test)
6063
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]6064 ADD_EXECUTABLE(f32-f16-vcvt-test test/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
6065 SET_TARGET_PROPERTIES(f32-f16-vcvt-test PROPERTIES
6066 CXX_STANDARD 11
6067 CXX_STANDARD_REQUIRED YES
6068 CXX_EXTENSIONS YES)
6069 TARGET_INCLUDE_DIRECTORIES(f32-f16-vcvt-test PRIVATE include src test)
6070 TARGET_LINK_LIBRARIES(f32-f16-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6071 ADD_TEST(f32-f16-vcvt-test f32-f16-vcvt-test)
6072
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6073 ADD_EXECUTABLE(f32-gavgpool-cw-test test/f32-gavgpool-cw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6074 SET_TARGET_PROPERTIES(f32-gavgpool-cw-test PROPERTIES
6075 CXX_STANDARD 11
6076 CXX_STANDARD_REQUIRED YES
6077 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6078 TARGET_INCLUDE_DIRECTORIES(f32-gavgpool-cw-test PRIVATE include src test)
6079 TARGET_LINK_LIBRARIES(f32-gavgpool-cw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6080 ADD_TEST(f32-gavgpool-cw-test f32-gavgpool-cw-test)
6081
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6082 ADD_EXECUTABLE(f32-gavgpool-minmax-test test/f32-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6083 SET_TARGET_PROPERTIES(f32-gavgpool-minmax-test PROPERTIES
6084 CXX_STANDARD 11
6085 CXX_STANDARD_REQUIRED YES
6086 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6087 TARGET_INCLUDE_DIRECTORIES(f32-gavgpool-minmax-test PRIVATE include src test)
6088 TARGET_LINK_LIBRARIES(f32-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6089 ADD_TEST(f32-gavgpool-minmax-test f32-gavgpool-minmax-test)
6090
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6091 ADD_EXECUTABLE(f32-gemm-test test/f32-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6092 SET_TARGET_PROPERTIES(f32-gemm-test PROPERTIES
6093 CXX_STANDARD 11
6094 CXX_STANDARD_REQUIRED YES
6095 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6096 TARGET_INCLUDE_DIRECTORIES(f32-gemm-test PRIVATE include src test)
6097 TARGET_LINK_LIBRARIES(f32-gemm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6098 ADD_TEST(f32-gemm-test f32-gemm-test)
6099
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6100 ADD_EXECUTABLE(f32-gemm-relu-test test/f32-gemm-relu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6101 SET_TARGET_PROPERTIES(f32-gemm-relu-test PROPERTIES
6102 CXX_STANDARD 11
6103 CXX_STANDARD_REQUIRED YES
6104 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6105 TARGET_INCLUDE_DIRECTORIES(f32-gemm-relu-test PRIVATE include src test)
6106 TARGET_LINK_LIBRARIES(f32-gemm-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6107 ADD_TEST(f32-gemm-relu-test f32-gemm-relu-test)
6108
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6109 ADD_EXECUTABLE(f32-gemm-minmax-test test/f32-gemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6110 SET_TARGET_PROPERTIES(f32-gemm-minmax-test PROPERTIES
6111 CXX_STANDARD 11
6112 CXX_STANDARD_REQUIRED YES
6113 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6114 TARGET_INCLUDE_DIRECTORIES(f32-gemm-minmax-test PRIVATE include src test)
6115 TARGET_LINK_LIBRARIES(f32-gemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6116 ADD_TEST(f32-gemm-minmax-test f32-gemm-minmax-test)
6117
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6118 ADD_EXECUTABLE(f32-gemminc-minmax-test test/f32-gemminc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6119 SET_TARGET_PROPERTIES(f32-gemminc-minmax-test PROPERTIES
6120 CXX_STANDARD 11
6121 CXX_STANDARD_REQUIRED YES
6122 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6123 TARGET_INCLUDE_DIRECTORIES(f32-gemminc-minmax-test PRIVATE include src test)
6124 TARGET_LINK_LIBRARIES(f32-gemminc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6125 ADD_TEST(f32-gemminc-minmax-test f32-gemminc-minmax-test)
6126
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6127 ADD_EXECUTABLE(f32-ibilinear-test test/f32-ibilinear.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6128 SET_TARGET_PROPERTIES(f32-ibilinear-test PROPERTIES
6129 CXX_STANDARD 11
6130 CXX_STANDARD_REQUIRED YES
6131 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6132 TARGET_INCLUDE_DIRECTORIES(f32-ibilinear-test PRIVATE include src test)
6133 TARGET_LINK_LIBRARIES(f32-ibilinear-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6134 ADD_TEST(f32-ibilinear-test f32-ibilinear-test)
6135
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6136 ADD_EXECUTABLE(f32-ibilinear-chw-test test/f32-ibilinear-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6137 SET_TARGET_PROPERTIES(f32-ibilinear-chw-test PROPERTIES
6138 CXX_STANDARD 11
6139 CXX_STANDARD_REQUIRED YES
6140 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6141 TARGET_INCLUDE_DIRECTORIES(f32-ibilinear-chw-test PRIVATE include src test)
6142 TARGET_LINK_LIBRARIES(f32-ibilinear-chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6143 ADD_TEST(f32-ibilinear-chw-test f32-ibilinear-chw-test)
6144
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6145 ADD_EXECUTABLE(f32-igemm-test test/f32-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6146 SET_TARGET_PROPERTIES(f32-igemm-test PROPERTIES
6147 CXX_STANDARD 11
6148 CXX_STANDARD_REQUIRED YES
6149 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6150 TARGET_INCLUDE_DIRECTORIES(f32-igemm-test PRIVATE include src test)
6151 TARGET_LINK_LIBRARIES(f32-igemm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6152 ADD_TEST(f32-igemm-test f32-igemm-test)
6153
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6154 ADD_EXECUTABLE(f32-igemm-relu-test test/f32-igemm-relu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6155 SET_TARGET_PROPERTIES(f32-igemm-relu-test PROPERTIES
6156 CXX_STANDARD 11
6157 CXX_STANDARD_REQUIRED YES
6158 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6159 TARGET_INCLUDE_DIRECTORIES(f32-igemm-relu-test PRIVATE include src test)
6160 TARGET_LINK_LIBRARIES(f32-igemm-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6161 ADD_TEST(f32-igemm-relu-test f32-igemm-relu-test)
6162
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6163 ADD_EXECUTABLE(f32-igemm-minmax-test test/f32-igemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6164 SET_TARGET_PROPERTIES(f32-igemm-minmax-test PROPERTIES
6165 CXX_STANDARD 11
6166 CXX_STANDARD_REQUIRED YES
6167 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6168 TARGET_INCLUDE_DIRECTORIES(f32-igemm-minmax-test PRIVATE include src test)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6169 IF(MINGW)
6170 # Work-around for "too many sections" error
6171 TARGET_COMPILE_OPTIONS(f32-igemm-minmax-test PRIVATE "$<$<NOT:$<OR:$<CONFIG:Release>,$<CONFIG:MinSizeRel>>>:-Wa,-mbig-obj>")
6172 ENDIF()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6173 TARGET_LINK_LIBRARIES(f32-igemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6174 ADD_TEST(f32-igemm-minmax-test f32-igemm-minmax-test)
6175
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6176 ADD_EXECUTABLE(f32-maxpool-minmax-test test/f32-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6177 SET_TARGET_PROPERTIES(f32-maxpool-minmax-test PROPERTIES
6178 CXX_STANDARD 11
6179 CXX_STANDARD_REQUIRED YES
6180 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6181 TARGET_INCLUDE_DIRECTORIES(f32-maxpool-minmax-test PRIVATE include src test)
6182 TARGET_LINK_LIBRARIES(f32-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6183 ADD_TEST(f32-maxpool-minmax-test f32-maxpool-minmax-test)
6184
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6185 ADD_EXECUTABLE(f32-pavgpool-minmax-test test/f32-pavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6186 SET_TARGET_PROPERTIES(f32-pavgpool-minmax-test PROPERTIES
6187 CXX_STANDARD 11
6188 CXX_STANDARD_REQUIRED YES
6189 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6190 TARGET_INCLUDE_DIRECTORIES(f32-pavgpool-minmax-test PRIVATE include src test)
6191 TARGET_LINK_LIBRARIES(f32-pavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6192 ADD_TEST(f32-pavgpool-minmax-test f32-pavgpool-minmax-test)
6193
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6194 ADD_EXECUTABLE(f32-ppmm-minmax-test test/f32-ppmm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6195 SET_TARGET_PROPERTIES(f32-ppmm-minmax-test PROPERTIES
6196 CXX_STANDARD 11
6197 CXX_STANDARD_REQUIRED YES
6198 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6199 TARGET_INCLUDE_DIRECTORIES(f32-ppmm-minmax-test PRIVATE include src test)
6200 TARGET_LINK_LIBRARIES(f32-ppmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6201 ADD_TEST(f32-ppmm-minmax-test f32-ppmm-minmax-test)
6202
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6203 ADD_EXECUTABLE(f32-prelu-test test/f32-prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6204 SET_TARGET_PROPERTIES(f32-prelu-test PROPERTIES
6205 CXX_STANDARD 11
6206 CXX_STANDARD_REQUIRED YES
6207 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6208 TARGET_INCLUDE_DIRECTORIES(f32-prelu-test PRIVATE include src test)
6209 TARGET_LINK_LIBRARIES(f32-prelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6210 ADD_TEST(f32-prelu-test f32-prelu-test)
6211
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6212 ADD_EXECUTABLE(f32-raddexpminusmax-test test/f32-raddexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6213 SET_TARGET_PROPERTIES(f32-raddexpminusmax-test PROPERTIES
6214 CXX_STANDARD 11
6215 CXX_STANDARD_REQUIRED YES
6216 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6217 TARGET_INCLUDE_DIRECTORIES(f32-raddexpminusmax-test PRIVATE include src test)
6218 TARGET_LINK_LIBRARIES(f32-raddexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6219 ADD_TEST(f32-raddexpminusmax-test f32-raddexpminusmax-test)
6220
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6221 ADD_EXECUTABLE(f32-raddextexp-test test/f32-raddextexp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6222 SET_TARGET_PROPERTIES(f32-raddextexp-test PROPERTIES
6223 CXX_STANDARD 11
6224 CXX_STANDARD_REQUIRED YES
6225 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6226 TARGET_INCLUDE_DIRECTORIES(f32-raddextexp-test PRIVATE include src test)
6227 TARGET_LINK_LIBRARIES(f32-raddextexp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6228 ADD_TEST(f32-raddextexp-test f32-raddextexp-test)
6229
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6230 ADD_EXECUTABLE(f32-raddstoreexpminusmax-test test/f32-raddstoreexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6231 SET_TARGET_PROPERTIES(f32-raddstoreexpminusmax-test PROPERTIES
6232 CXX_STANDARD 11
6233 CXX_STANDARD_REQUIRED YES
6234 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6235 TARGET_INCLUDE_DIRECTORIES(f32-raddstoreexpminusmax-test PRIVATE include src test)
6236 TARGET_LINK_LIBRARIES(f32-raddstoreexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6237 ADD_TEST(f32-raddstoreexpminusmax-test f32-raddstoreexpminusmax-test)
6238
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6239 ADD_EXECUTABLE(f32-rmax-test test/f32-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6240 SET_TARGET_PROPERTIES(f32-rmax-test PROPERTIES
6241 CXX_STANDARD 11
6242 CXX_STANDARD_REQUIRED YES
6243 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6244 TARGET_INCLUDE_DIRECTORIES(f32-rmax-test PRIVATE include src test)
6245 TARGET_LINK_LIBRARIES(f32-rmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6246 ADD_TEST(f32-rmax-test f32-rmax-test)
6247
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6248 ADD_EXECUTABLE(f32-spmm-minmax-test test/f32-spmm-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6249 SET_TARGET_PROPERTIES(f32-spmm-minmax-test PROPERTIES
6250 CXX_STANDARD 11
6251 CXX_STANDARD_REQUIRED YES
6252 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6253 TARGET_INCLUDE_DIRECTORIES(f32-spmm-minmax-test PRIVATE include src test)
6254 TARGET_LINK_LIBRARIES(f32-spmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6255 ADD_TEST(f32-spmm-minmax-test f32-spmm-minmax-test)
6256
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6257 ADD_EXECUTABLE(f32-vabs-test test/f32-vabs.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6258 SET_TARGET_PROPERTIES(f32-vabs-test PROPERTIES
6259 CXX_STANDARD 11
6260 CXX_STANDARD_REQUIRED YES
6261 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6262 TARGET_INCLUDE_DIRECTORIES(f32-vabs-test PRIVATE include src test)
6263 TARGET_LINK_LIBRARIES(f32-vabs-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6264 ADD_TEST(f32-vabs-test f32-vabs-test)
6265
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6266 ADD_EXECUTABLE(f32-vadd-test test/f32-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6267 SET_TARGET_PROPERTIES(f32-vadd-test PROPERTIES
6268 CXX_STANDARD 11
6269 CXX_STANDARD_REQUIRED YES
6270 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6271 TARGET_INCLUDE_DIRECTORIES(f32-vadd-test PRIVATE include src test)
6272 TARGET_LINK_LIBRARIES(f32-vadd-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6273 ADD_TEST(f32-vadd-test f32-vadd-test)
6274
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6275 ADD_EXECUTABLE(f32-vadd-minmax-test test/f32-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6276 SET_TARGET_PROPERTIES(f32-vadd-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6277 CXX_STANDARD 11
6278 CXX_STANDARD_REQUIRED YES
6279 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6280 TARGET_INCLUDE_DIRECTORIES(f32-vadd-minmax-test PRIVATE include src test)
6281 TARGET_LINK_LIBRARIES(f32-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6282 ADD_TEST(f32-vadd-minmax-test f32-vadd-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6283
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6284 ADD_EXECUTABLE(f32-vadd-relu-test test/f32-vadd-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6285 SET_TARGET_PROPERTIES(f32-vadd-relu-test PROPERTIES
6286 CXX_STANDARD 11
6287 CXX_STANDARD_REQUIRED YES
6288 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6289 TARGET_INCLUDE_DIRECTORIES(f32-vadd-relu-test PRIVATE include src test)
6290 TARGET_LINK_LIBRARIES(f32-vadd-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6291 ADD_TEST(f32-vadd-relu-test f32-vadd-relu-test)
6292
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6293 ADD_EXECUTABLE(f32-vaddc-test test/f32-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6294 SET_TARGET_PROPERTIES(f32-vaddc-test PROPERTIES
6295 CXX_STANDARD 11
6296 CXX_STANDARD_REQUIRED YES
6297 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6298 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-test PRIVATE include src test)
6299 TARGET_LINK_LIBRARIES(f32-vaddc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6300 ADD_TEST(f32-vaddc-test f32-vaddc-test)
6301
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6302 ADD_EXECUTABLE(f32-vaddc-minmax-test test/f32-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6303 SET_TARGET_PROPERTIES(f32-vaddc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6304 CXX_STANDARD 11
6305 CXX_STANDARD_REQUIRED YES
6306 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6307 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-minmax-test PRIVATE include src test)
6308 TARGET_LINK_LIBRARIES(f32-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6309 ADD_TEST(f32-vaddc-minmax-test f32-vaddc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6310
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6311 ADD_EXECUTABLE(f32-vaddc-relu-test test/f32-vaddc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6312 SET_TARGET_PROPERTIES(f32-vaddc-relu-test PROPERTIES
6313 CXX_STANDARD 11
6314 CXX_STANDARD_REQUIRED YES
6315 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6316 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-relu-test PRIVATE include src test)
6317 TARGET_LINK_LIBRARIES(f32-vaddc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6318 ADD_TEST(f32-vaddc-relu-test f32-vaddc-relu-test)
6319
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6320 ADD_EXECUTABLE(f32-vclamp-test test/f32-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6321 SET_TARGET_PROPERTIES(f32-vclamp-test PROPERTIES
6322 CXX_STANDARD 11
6323 CXX_STANDARD_REQUIRED YES
6324 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6325 TARGET_INCLUDE_DIRECTORIES(f32-vclamp-test PRIVATE include src test)
6326 TARGET_LINK_LIBRARIES(f32-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6327 ADD_TEST(f32-vclamp-test f32-vclamp-test)
6328
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6329 ADD_EXECUTABLE(f32-vhswish-test test/f32-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6330 SET_TARGET_PROPERTIES(f32-vhswish-test PROPERTIES
6331 CXX_STANDARD 11
6332 CXX_STANDARD_REQUIRED YES
6333 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6334 TARGET_INCLUDE_DIRECTORIES(f32-vhswish-test PRIVATE include src test)
6335 TARGET_LINK_LIBRARIES(f32-vhswish-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6336 ADD_TEST(f32-vhswish-test f32-vhswish-test)
6337
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6338 ADD_EXECUTABLE(f32-vdiv-test test/f32-vdiv.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6339 SET_TARGET_PROPERTIES(f32-vdiv-test PROPERTIES
6340 CXX_STANDARD 11
6341 CXX_STANDARD_REQUIRED YES
6342 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6343 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-test PRIVATE include src test)
6344 TARGET_LINK_LIBRARIES(f32-vdiv-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6345 ADD_TEST(f32-vdiv-test f32-vdiv-test)
6346
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6347 ADD_EXECUTABLE(f32-vdiv-minmax-test test/f32-vdiv-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6348 SET_TARGET_PROPERTIES(f32-vdiv-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6349 CXX_STANDARD 11
6350 CXX_STANDARD_REQUIRED YES
6351 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6352 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-minmax-test PRIVATE include src test)
6353 TARGET_LINK_LIBRARIES(f32-vdiv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6354 ADD_TEST(f32-vdiv-minmax-test f32-vdiv-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6355
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6356 ADD_EXECUTABLE(f32-vdiv-relu-test test/f32-vdiv-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6357 SET_TARGET_PROPERTIES(f32-vdiv-relu-test PROPERTIES
6358 CXX_STANDARD 11
6359 CXX_STANDARD_REQUIRED YES
6360 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6361 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-relu-test PRIVATE include src test)
6362 TARGET_LINK_LIBRARIES(f32-vdiv-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6363 ADD_TEST(f32-vdiv-relu-test f32-vdiv-relu-test)
6364
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6365 ADD_EXECUTABLE(f32-vdivc-test test/f32-vdivc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6366 SET_TARGET_PROPERTIES(f32-vdivc-test PROPERTIES
6367 CXX_STANDARD 11
6368 CXX_STANDARD_REQUIRED YES
6369 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6370 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-test PRIVATE include src test)
6371 TARGET_LINK_LIBRARIES(f32-vdivc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6372 ADD_TEST(f32-vdivc-test f32-vdivc-test)
6373
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6374 ADD_EXECUTABLE(f32-vdivc-minmax-test test/f32-vdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6375 SET_TARGET_PROPERTIES(f32-vdivc-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6376 CXX_STANDARD 11
6377 CXX_STANDARD_REQUIRED YES
6378 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6379 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-minmax-test PRIVATE include src test)
6380 TARGET_LINK_LIBRARIES(f32-vdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6381 ADD_TEST(f32-vdivc-minmax-test f32-vdivc-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6382
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6383 ADD_EXECUTABLE(f32-vdivc-relu-test test/f32-vdivc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6384 SET_TARGET_PROPERTIES(f32-vdivc-relu-test PROPERTIES
6385 CXX_STANDARD 11
6386 CXX_STANDARD_REQUIRED YES
6387 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6388 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-relu-test PRIVATE include src test)
6389 TARGET_LINK_LIBRARIES(f32-vdivc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6390 ADD_TEST(f32-vdivc-relu-test f32-vdivc-relu-test)
6391
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6392 ADD_EXECUTABLE(f32-vrdivc-test test/f32-vrdivc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6393 SET_TARGET_PROPERTIES(f32-vrdivc-test PROPERTIES
6394 CXX_STANDARD 11
6395 CXX_STANDARD_REQUIRED YES
6396 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6397 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-test PRIVATE include src test)
6398 TARGET_LINK_LIBRARIES(f32-vrdivc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6399 ADD_TEST(f32-vrdivc-test f32-vrdivc-test)
6400
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6401 ADD_EXECUTABLE(f32-vrdivc-minmax-test test/f32-vrdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6402 SET_TARGET_PROPERTIES(f32-vrdivc-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6403 CXX_STANDARD 11
6404 CXX_STANDARD_REQUIRED YES
6405 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6406 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-minmax-test PRIVATE include src test)
6407 TARGET_LINK_LIBRARIES(f32-vrdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6408 ADD_TEST(f32-vrdivc-minmax-test f32-vrdivc-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6409
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6410 ADD_EXECUTABLE(f32-vrdivc-relu-test test/f32-vrdivc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6411 SET_TARGET_PROPERTIES(f32-vrdivc-relu-test PROPERTIES
6412 CXX_STANDARD 11
6413 CXX_STANDARD_REQUIRED YES
6414 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6415 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-relu-test PRIVATE include src test)
6416 TARGET_LINK_LIBRARIES(f32-vrdivc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6417 ADD_TEST(f32-vrdivc-relu-test f32-vrdivc-relu-test)
6418
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6419 ADD_EXECUTABLE(f32-velu-test test/f32-velu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]6420 SET_TARGET_PROPERTIES(f32-velu-test PROPERTIES
6421 CXX_STANDARD 11
6422 CXX_STANDARD_REQUIRED YES
6423 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6424 TARGET_INCLUDE_DIRECTORIES(f32-velu-test PRIVATE include src test)
6425 TARGET_LINK_LIBRARIES(f32-velu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]6426 ADD_TEST(f32-velu-test f32-velu-test)
6427
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6428 ADD_EXECUTABLE(f32-vlrelu-test test/f32-vlrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]6429 SET_TARGET_PROPERTIES(f32-vlrelu-test PROPERTIES
6430 CXX_STANDARD 11
6431 CXX_STANDARD_REQUIRED YES
6432 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6433 TARGET_INCLUDE_DIRECTORIES(f32-vlrelu-test PRIVATE include src test)
6434 TARGET_LINK_LIBRARIES(f32-vlrelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]6435 ADD_TEST(f32-vlrelu-test f32-vlrelu-test)
6436
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6437 ADD_EXECUTABLE(f32-vmax-test test/f32-vmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6438 SET_TARGET_PROPERTIES(f32-vmax-test PROPERTIES
6439 CXX_STANDARD 11
6440 CXX_STANDARD_REQUIRED YES
6441 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6442 TARGET_INCLUDE_DIRECTORIES(f32-vmax-test PRIVATE include src test)
6443 TARGET_LINK_LIBRARIES(f32-vmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6444 ADD_TEST(f32-vmax-test f32-vmax-test)
6445
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6446 ADD_EXECUTABLE(f32-vmaxc-test test/f32-vmaxc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6447 SET_TARGET_PROPERTIES(f32-vmaxc-test PROPERTIES
6448 CXX_STANDARD 11
6449 CXX_STANDARD_REQUIRED YES
6450 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6451 TARGET_INCLUDE_DIRECTORIES(f32-vmaxc-test PRIVATE include src test)
6452 TARGET_LINK_LIBRARIES(f32-vmaxc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6453 ADD_TEST(f32-vmaxc-test f32-vmaxc-test)
6454
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6455 ADD_EXECUTABLE(f32-vmin-test test/f32-vmin.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6456 SET_TARGET_PROPERTIES(f32-vmin-test PROPERTIES
6457 CXX_STANDARD 11
6458 CXX_STANDARD_REQUIRED YES
6459 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6460 TARGET_INCLUDE_DIRECTORIES(f32-vmin-test PRIVATE include src test)
6461 TARGET_LINK_LIBRARIES(f32-vmin-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6462 ADD_TEST(f32-vmin-test f32-vmin-test)
6463
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6464 ADD_EXECUTABLE(f32-vminc-test test/f32-vminc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6465 SET_TARGET_PROPERTIES(f32-vminc-test PROPERTIES
6466 CXX_STANDARD 11
6467 CXX_STANDARD_REQUIRED YES
6468 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6469 TARGET_INCLUDE_DIRECTORIES(f32-vminc-test PRIVATE include src test)
6470 TARGET_LINK_LIBRARIES(f32-vminc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6471 ADD_TEST(f32-vminc-test f32-vminc-test)
6472
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6473 ADD_EXECUTABLE(f32-vmul-test test/f32-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6474 SET_TARGET_PROPERTIES(f32-vmul-test PROPERTIES
6475 CXX_STANDARD 11
6476 CXX_STANDARD_REQUIRED YES
6477 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6478 TARGET_INCLUDE_DIRECTORIES(f32-vmul-test PRIVATE include src test)
6479 TARGET_LINK_LIBRARIES(f32-vmul-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6480 ADD_TEST(f32-vmul-test f32-vmul-test)
6481
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6482 ADD_EXECUTABLE(f32-vmul-minmax-test test/f32-vmul-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6483 SET_TARGET_PROPERTIES(f32-vmul-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6484 CXX_STANDARD 11
6485 CXX_STANDARD_REQUIRED YES
6486 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6487 TARGET_INCLUDE_DIRECTORIES(f32-vmul-minmax-test PRIVATE include src test)
6488 TARGET_LINK_LIBRARIES(f32-vmul-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6489 ADD_TEST(f32-vmul-minmax-test f32-vmul-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6490
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6491 ADD_EXECUTABLE(f32-vmul-relu-test test/f32-vmul-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6492 SET_TARGET_PROPERTIES(f32-vmul-relu-test PROPERTIES
6493 CXX_STANDARD 11
6494 CXX_STANDARD_REQUIRED YES
6495 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6496 TARGET_INCLUDE_DIRECTORIES(f32-vmul-relu-test PRIVATE include src test)
6497 TARGET_LINK_LIBRARIES(f32-vmul-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6498 ADD_TEST(f32-vmul-relu-test f32-vmul-relu-test)
6499
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6500 ADD_EXECUTABLE(f32-vmulc-test test/f32-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6501 SET_TARGET_PROPERTIES(f32-vmulc-test PROPERTIES
6502 CXX_STANDARD 11
6503 CXX_STANDARD_REQUIRED YES
6504 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6505 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-test PRIVATE include src test)
6506 TARGET_LINK_LIBRARIES(f32-vmulc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6507 ADD_TEST(f32-vmulc-test f32-vmulc-test)
6508
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6509 ADD_EXECUTABLE(f32-vmulc-minmax-test test/f32-vmulc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6510 SET_TARGET_PROPERTIES(f32-vmulc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6511 CXX_STANDARD 11
6512 CXX_STANDARD_REQUIRED YES
6513 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6514 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-minmax-test PRIVATE include src test)
6515 TARGET_LINK_LIBRARIES(f32-vmulc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6516 ADD_TEST(f32-vmulc-minmax-test f32-vmulc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6517
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6518 ADD_EXECUTABLE(f32-vmulc-relu-test test/f32-vmulc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6519 SET_TARGET_PROPERTIES(f32-vmulc-relu-test PROPERTIES
6520 CXX_STANDARD 11
6521 CXX_STANDARD_REQUIRED YES
6522 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6523 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-relu-test PRIVATE include src test)
6524 TARGET_LINK_LIBRARIES(f32-vmulc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6525 ADD_TEST(f32-vmulc-relu-test f32-vmulc-relu-test)
6526
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6527 ADD_EXECUTABLE(f32-vmulcaddc-minmax-test test/f32-vmulcaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]6528 SET_TARGET_PROPERTIES(f32-vmulcaddc-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6529 CXX_STANDARD 11
6530 CXX_STANDARD_REQUIRED YES
6531 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6532 TARGET_INCLUDE_DIRECTORIES(f32-vmulcaddc-minmax-test PRIVATE include src test)
6533 TARGET_LINK_LIBRARIES(f32-vmulcaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]6534 ADD_TEST(f32-vmulcaddc-minmax-test f32-vmulcaddc-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6535
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6536 ADD_EXECUTABLE(f32-vneg-test test/f32-vneg.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6537 SET_TARGET_PROPERTIES(f32-vneg-test PROPERTIES
6538 CXX_STANDARD 11
6539 CXX_STANDARD_REQUIRED YES
6540 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6541 TARGET_INCLUDE_DIRECTORIES(f32-vneg-test PRIVATE include src test)
6542 TARGET_LINK_LIBRARIES(f32-vneg-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6543 ADD_TEST(f32-vneg-test f32-vneg-test)
6544
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6545 ADD_EXECUTABLE(f32-vrelu-test test/f32-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6546 SET_TARGET_PROPERTIES(f32-vrelu-test PROPERTIES
6547 CXX_STANDARD 11
6548 CXX_STANDARD_REQUIRED YES
6549 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6550 TARGET_INCLUDE_DIRECTORIES(f32-vrelu-test PRIVATE include src test)
6551 TARGET_LINK_LIBRARIES(f32-vrelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6552 ADD_TEST(f32-vrelu-test f32-vrelu-test)
6553
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6554 ADD_EXECUTABLE(f32-vrndne-test test/f32-vrndne.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6555 SET_TARGET_PROPERTIES(f32-vrndne-test PROPERTIES
6556 CXX_STANDARD 11
6557 CXX_STANDARD_REQUIRED YES
6558 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6559 TARGET_INCLUDE_DIRECTORIES(f32-vrndne-test PRIVATE include src test)
6560 TARGET_LINK_LIBRARIES(f32-vrndne-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6561 ADD_TEST(f32-vrndne-test f32-vrndne-test)
6562
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6563 ADD_EXECUTABLE(f32-vrndz-test test/f32-vrndz.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6564 SET_TARGET_PROPERTIES(f32-vrndz-test PROPERTIES
6565 CXX_STANDARD 11
6566 CXX_STANDARD_REQUIRED YES
6567 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6568 TARGET_INCLUDE_DIRECTORIES(f32-vrndz-test PRIVATE include src test)
6569 TARGET_LINK_LIBRARIES(f32-vrndz-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6570 ADD_TEST(f32-vrndz-test f32-vrndz-test)
6571
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6572 ADD_EXECUTABLE(f32-vrndu-test test/f32-vrndu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6573 SET_TARGET_PROPERTIES(f32-vrndu-test PROPERTIES
6574 CXX_STANDARD 11
6575 CXX_STANDARD_REQUIRED YES
6576 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6577 TARGET_INCLUDE_DIRECTORIES(f32-vrndu-test PRIVATE include src test)
6578 TARGET_LINK_LIBRARIES(f32-vrndu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6579 ADD_TEST(f32-vrndu-test f32-vrndu-test)
6580
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6581 ADD_EXECUTABLE(f32-vrndd-test test/f32-vrndd.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6582 SET_TARGET_PROPERTIES(f32-vrndd-test PROPERTIES
6583 CXX_STANDARD 11
6584 CXX_STANDARD_REQUIRED YES
6585 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6586 TARGET_INCLUDE_DIRECTORIES(f32-vrndd-test PRIVATE include src test)
6587 TARGET_LINK_LIBRARIES(f32-vrndd-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6588 ADD_TEST(f32-vrndd-test f32-vrndd-test)
6589
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6590 ADD_EXECUTABLE(f32-vscaleexpminusmax-test test/f32-vscaleexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]6591 SET_TARGET_PROPERTIES(f32-vscaleexpminusmax-test PROPERTIES
6592 CXX_STANDARD 11
6593 CXX_STANDARD_REQUIRED YES
6594 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6595 TARGET_INCLUDE_DIRECTORIES(f32-vscaleexpminusmax-test PRIVATE include src test)
6596 TARGET_LINK_LIBRARIES(f32-vscaleexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]6597 ADD_TEST(f32-vscaleexpminusmax-test f32-vscaleexpminusmax-test)
6598
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6599 ADD_EXECUTABLE(f32-vscaleextexp-test test/f32-vscaleextexp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan9f240d12020-04-13 10:42:30 -0700[diff] [blame]6600 SET_TARGET_PROPERTIES(f32-vscaleextexp-test PROPERTIES
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]6601 CXX_STANDARD 11
6602 CXX_STANDARD_REQUIRED YES
6603 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6604 TARGET_INCLUDE_DIRECTORIES(f32-vscaleextexp-test PRIVATE include src test)
6605 TARGET_LINK_LIBRARIES(f32-vscaleextexp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]6606 ADD_TEST(f32-vscaleextexp-test f32-vscaleextexp-test)
6607
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6608 ADD_EXECUTABLE(f32-vsigmoid-test test/f32-vsigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6609 SET_TARGET_PROPERTIES(f32-vsigmoid-test PROPERTIES
6610 CXX_STANDARD 11
6611 CXX_STANDARD_REQUIRED YES
6612 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6613 TARGET_INCLUDE_DIRECTORIES(f32-vsigmoid-test PRIVATE include src test)
6614 TARGET_LINK_LIBRARIES(f32-vsigmoid-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6615 ADD_TEST(f32-vsigmoid-test f32-vsigmoid-test)
6616
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6617 ADD_EXECUTABLE(f32-vsqr-test test/f32-vsqr.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6618 SET_TARGET_PROPERTIES(f32-vsqr-test PROPERTIES
6619 CXX_STANDARD 11
6620 CXX_STANDARD_REQUIRED YES
6621 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6622 TARGET_INCLUDE_DIRECTORIES(f32-vsqr-test PRIVATE include src test)
6623 TARGET_LINK_LIBRARIES(f32-vsqr-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6624 ADD_TEST(f32-vsqr-test f32-vsqr-test)
6625
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6626 ADD_EXECUTABLE(f32-vsqrdiff-test test/f32-vsqrdiff.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6627 SET_TARGET_PROPERTIES(f32-vsqrdiff-test PROPERTIES
6628 CXX_STANDARD 11
6629 CXX_STANDARD_REQUIRED YES
6630 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6631 TARGET_INCLUDE_DIRECTORIES(f32-vsqrdiff-test PRIVATE include src test)
6632 TARGET_LINK_LIBRARIES(f32-vsqrdiff-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6633 ADD_TEST(f32-vsqrdiff-test f32-vsqrdiff-test)
6634
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6635 ADD_EXECUTABLE(f32-vsqrdiffc-test test/f32-vsqrdiffc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6636 SET_TARGET_PROPERTIES(f32-vsqrdiffc-test PROPERTIES
6637 CXX_STANDARD 11
6638 CXX_STANDARD_REQUIRED YES
6639 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6640 TARGET_INCLUDE_DIRECTORIES(f32-vsqrdiffc-test PRIVATE include src test)
6641 TARGET_LINK_LIBRARIES(f32-vsqrdiffc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6642 ADD_TEST(f32-vsqrdiffc-test f32-vsqrdiffc-test)
6643
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6644 ADD_EXECUTABLE(f32-vsqrt-test test/f32-vsqrt.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]6645 SET_TARGET_PROPERTIES(f32-vsqrt-test PROPERTIES
6646 CXX_STANDARD 11
6647 CXX_STANDARD_REQUIRED YES
6648 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6649 TARGET_INCLUDE_DIRECTORIES(f32-vsqrt-test PRIVATE include src test)
6650 TARGET_LINK_LIBRARIES(f32-vsqrt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]6651 ADD_TEST(f32-vsqrt-test f32-vsqrt-test)
6652
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6653 ADD_EXECUTABLE(f32-vsub-test test/f32-vsub.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6654 SET_TARGET_PROPERTIES(f32-vsub-test PROPERTIES
6655 CXX_STANDARD 11
6656 CXX_STANDARD_REQUIRED YES
6657 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6658 TARGET_INCLUDE_DIRECTORIES(f32-vsub-test PRIVATE include src test)
6659 TARGET_LINK_LIBRARIES(f32-vsub-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6660 ADD_TEST(f32-vsub-test f32-vsub-test)
6661
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6662 ADD_EXECUTABLE(f32-vsub-minmax-test test/f32-vsub-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6663 SET_TARGET_PROPERTIES(f32-vsub-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6664 CXX_STANDARD 11
6665 CXX_STANDARD_REQUIRED YES
6666 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6667 TARGET_INCLUDE_DIRECTORIES(f32-vsub-minmax-test PRIVATE include src test)
6668 TARGET_LINK_LIBRARIES(f32-vsub-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6669 ADD_TEST(f32-vsub-minmax-test f32-vsub-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6670
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6671 ADD_EXECUTABLE(f32-vsub-relu-test test/f32-vsub-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6672 SET_TARGET_PROPERTIES(f32-vsub-relu-test PROPERTIES
6673 CXX_STANDARD 11
6674 CXX_STANDARD_REQUIRED YES
6675 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6676 TARGET_INCLUDE_DIRECTORIES(f32-vsub-relu-test PRIVATE include src test)
6677 TARGET_LINK_LIBRARIES(f32-vsub-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6678 ADD_TEST(f32-vsub-relu-test f32-vsub-relu-test)
6679
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6680 ADD_EXECUTABLE(f32-vsubc-test test/f32-vsubc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6681 SET_TARGET_PROPERTIES(f32-vsubc-test PROPERTIES
6682 CXX_STANDARD 11
6683 CXX_STANDARD_REQUIRED YES
6684 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6685 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-test PRIVATE include src test)
6686 TARGET_LINK_LIBRARIES(f32-vsubc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6687 ADD_TEST(f32-vsubc-test f32-vsubc-test)
6688
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6689 ADD_EXECUTABLE(f32-vsubc-minmax-test test/f32-vsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6690 SET_TARGET_PROPERTIES(f32-vsubc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6691 CXX_STANDARD 11
6692 CXX_STANDARD_REQUIRED YES
6693 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6694 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-minmax-test PRIVATE include src test)
6695 TARGET_LINK_LIBRARIES(f32-vsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6696 ADD_TEST(f32-vsubc-minmax-test f32-vsubc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6697
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6698 ADD_EXECUTABLE(f32-vsubc-relu-test test/f32-vsubc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6699 SET_TARGET_PROPERTIES(f32-vsubc-relu-test PROPERTIES
6700 CXX_STANDARD 11
6701 CXX_STANDARD_REQUIRED YES
6702 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6703 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-relu-test PRIVATE include src test)
6704 TARGET_LINK_LIBRARIES(f32-vsubc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6705 ADD_TEST(f32-vsubc-relu-test f32-vsubc-relu-test)
6706
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6707 ADD_EXECUTABLE(f32-vrsubc-test test/f32-vrsubc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6708 SET_TARGET_PROPERTIES(f32-vrsubc-test PROPERTIES
6709 CXX_STANDARD 11
6710 CXX_STANDARD_REQUIRED YES
6711 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6712 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-test PRIVATE include src test)
6713 TARGET_LINK_LIBRARIES(f32-vrsubc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6714 ADD_TEST(f32-vrsubc-test f32-vrsubc-test)
6715
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6716 ADD_EXECUTABLE(f32-vrsubc-minmax-test test/f32-vrsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6717 SET_TARGET_PROPERTIES(f32-vrsubc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6718 CXX_STANDARD 11
6719 CXX_STANDARD_REQUIRED YES
6720 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6721 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-minmax-test PRIVATE include src test)
6722 TARGET_LINK_LIBRARIES(f32-vrsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6723 ADD_TEST(f32-vrsubc-minmax-test f32-vrsubc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6724
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6725 ADD_EXECUTABLE(f32-vrsubc-relu-test test/f32-vrsubc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6726 SET_TARGET_PROPERTIES(f32-vrsubc-relu-test PROPERTIES
6727 CXX_STANDARD 11
6728 CXX_STANDARD_REQUIRED YES
6729 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6730 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-relu-test PRIVATE include src test)
6731 TARGET_LINK_LIBRARIES(f32-vrsubc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6732 ADD_TEST(f32-vrsubc-relu-test f32-vrsubc-relu-test)
6733
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6734 ADD_EXECUTABLE(qc8-dwconv-minmax-fp32-test test/qc8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]6735 SET_TARGET_PROPERTIES(qc8-dwconv-minmax-fp32-test PROPERTIES
6736 CXX_STANDARD 11
6737 CXX_STANDARD_REQUIRED YES
6738 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6739 TARGET_INCLUDE_DIRECTORIES(qc8-dwconv-minmax-fp32-test PRIVATE include src test)
6740 TARGET_LINK_LIBRARIES(qc8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]6741 ADD_TEST(qc8-dwconv-minmax-fp32-test qc8-dwconv-minmax-fp32-test)
6742
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6743 ADD_EXECUTABLE(qc8-gemm-minmax-fp32-test test/qc8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]6744 SET_TARGET_PROPERTIES(qc8-gemm-minmax-fp32-test PROPERTIES
6745 CXX_STANDARD 11
6746 CXX_STANDARD_REQUIRED YES
6747 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6748 TARGET_INCLUDE_DIRECTORIES(qc8-gemm-minmax-fp32-test PRIVATE include src test)
6749 TARGET_LINK_LIBRARIES(qc8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]6750 ADD_TEST(qc8-gemm-minmax-fp32-test qc8-gemm-minmax-fp32-test)
6751
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6752 ADD_EXECUTABLE(qc8-igemm-minmax-fp32-test test/qc8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane06c8132021-06-03 08:59:11 -0700[diff] [blame]6753 SET_TARGET_PROPERTIES(qc8-igemm-minmax-fp32-test PROPERTIES
6754 CXX_STANDARD 11
6755 CXX_STANDARD_REQUIRED YES
6756 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6757 TARGET_INCLUDE_DIRECTORIES(qc8-igemm-minmax-fp32-test PRIVATE include src test)
6758 TARGET_LINK_LIBRARIES(qc8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane06c8132021-06-03 08:59:11 -0700[diff] [blame]6759 ADD_TEST(qc8-igemm-minmax-fp32-test qc8-igemm-minmax-fp32-test)
6760
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6761 ADD_EXECUTABLE(qs8-dwconv-minmax-fp32-test test/qs8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]6762 SET_TARGET_PROPERTIES(qs8-dwconv-minmax-fp32-test PROPERTIES
6763 CXX_STANDARD 11
6764 CXX_STANDARD_REQUIRED YES
6765 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6766 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-minmax-fp32-test PRIVATE include src test)
6767 TARGET_LINK_LIBRARIES(qs8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]6768 ADD_TEST(qs8-dwconv-minmax-fp32-test qs8-dwconv-minmax-fp32-test)
6769
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6770 ADD_EXECUTABLE(qs8-dwconv-minmax-gemmlowp-test test/qs8-dwconv-minmax-gemmlowp.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan0a5d7b42021-05-25 15:34:29 -0700[diff] [blame]6771 SET_TARGET_PROPERTIES(qs8-dwconv-minmax-gemmlowp-test PROPERTIES
Marat Dukhanf62bbdc2020-08-04 13:59:04 -0700[diff] [blame]6772 CXX_STANDARD 11
6773 CXX_STANDARD_REQUIRED YES
6774 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6775 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-minmax-gemmlowp-test PRIVATE include src test)
6776 TARGET_LINK_LIBRARIES(qs8-dwconv-minmax-gemmlowp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0a5d7b42021-05-25 15:34:29 -0700[diff] [blame]6777 ADD_TEST(qs8-dwconv-minmax-gemmlowp-test qs8-dwconv-minmax-gemmlowp-test)
Marat Dukhanf62bbdc2020-08-04 13:59:04 -0700[diff] [blame]6778
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6779 ADD_EXECUTABLE(qs8-dwconv-minmax-rndnu-test test/qs8-dwconv-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]6780 SET_TARGET_PROPERTIES(qs8-dwconv-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6781 CXX_STANDARD 11
6782 CXX_STANDARD_REQUIRED YES
6783 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6784 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-minmax-rndnu-test PRIVATE include src test)
6785 TARGET_LINK_LIBRARIES(qs8-dwconv-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]6786 ADD_TEST(qs8-dwconv-minmax-rndnu-test qs8-dwconv-minmax-rndnu-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6787
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6788 ADD_EXECUTABLE(qs8-gavgpool-minmax-test test/qs8-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]6789 SET_TARGET_PROPERTIES(qs8-gavgpool-minmax-test PROPERTIES
6790 CXX_STANDARD 11
6791 CXX_STANDARD_REQUIRED YES
6792 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6793 TARGET_INCLUDE_DIRECTORIES(qs8-gavgpool-minmax-test PRIVATE include src test)
6794 TARGET_LINK_LIBRARIES(qs8-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]6795 ADD_TEST(qs8-gavgpool-test qs8-gavgpool-minmax-test)
6796
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6797 ADD_EXECUTABLE(qs8-gemm-minmax-fp32-test test/qs8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6798 SET_TARGET_PROPERTIES(qs8-gemm-minmax-fp32-test PROPERTIES
6799 CXX_STANDARD 11
6800 CXX_STANDARD_REQUIRED YES
6801 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6802 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-minmax-fp32-test PRIVATE include src test)
6803 TARGET_LINK_LIBRARIES(qs8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6804 ADD_TEST(qs8-gemm-minmax-fp32-test qs8-gemm-minmax-fp32-test)
6805
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6806 ADD_EXECUTABLE(qs8-gemm-minmax-gemmlowp-test test/qs8-gemm-minmax-gemmlowp.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanb07c26a2021-05-24 19:44:51 -0700[diff] [blame]6807 SET_TARGET_PROPERTIES(qs8-gemm-minmax-gemmlowp-test PROPERTIES
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]6808 CXX_STANDARD 11
6809 CXX_STANDARD_REQUIRED YES
6810 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6811 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-minmax-gemmlowp-test PRIVATE include src test)
6812 TARGET_LINK_LIBRARIES(qs8-gemm-minmax-gemmlowp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanb07c26a2021-05-24 19:44:51 -0700[diff] [blame]6813 ADD_TEST(qs8-gemm-minmax-gemmlowp-test qs8-gemm-minmax-gemmlowp-test)
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]6814
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6815 ADD_EXECUTABLE(qs8-gemm-minmax-rndnu-test test/qs8-gemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6816 SET_TARGET_PROPERTIES(qs8-gemm-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6817 CXX_STANDARD 11
6818 CXX_STANDARD_REQUIRED YES
6819 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6820 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-minmax-rndnu-test PRIVATE include src test)
6821 TARGET_LINK_LIBRARIES(qs8-gemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6822 ADD_TEST(qs8-gemm-minmax-rndnu-test qs8-gemm-minmax-rndnu-test)
6823
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6824 ADD_EXECUTABLE(qs8-igemm-minmax-fp32-test test/qs8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6825 SET_TARGET_PROPERTIES(qs8-igemm-minmax-fp32-test PROPERTIES
6826 CXX_STANDARD 11
6827 CXX_STANDARD_REQUIRED YES
6828 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6829 TARGET_INCLUDE_DIRECTORIES(qs8-igemm-minmax-fp32-test PRIVATE include src test)
6830 TARGET_LINK_LIBRARIES(qs8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6831 ADD_TEST(qs8-igemm-minmax-fp32-test qs8-igemm-minmax-fp32-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6832
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6833 ADD_EXECUTABLE(qs8-igemm-minmax-gemmlowp-test test/qs8-igemm-minmax-gemmlowp.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanb07c26a2021-05-24 19:44:51 -0700[diff] [blame]6834 SET_TARGET_PROPERTIES(qs8-igemm-minmax-gemmlowp-test PROPERTIES
Marat Dukhanf9480682020-07-31 14:50:24 -0700[diff] [blame]6835 CXX_STANDARD 11
6836 CXX_STANDARD_REQUIRED YES
6837 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6838 TARGET_INCLUDE_DIRECTORIES(qs8-igemm-minmax-gemmlowp-test PRIVATE include src test)
6839 TARGET_LINK_LIBRARIES(qs8-igemm-minmax-gemmlowp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanb07c26a2021-05-24 19:44:51 -0700[diff] [blame]6840 ADD_TEST(qs8-igemm-minmax-gemmlowp-test qs8-igemm-minmax-gemmlowp-test)
Marat Dukhanf9480682020-07-31 14:50:24 -0700[diff] [blame]6841
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6842 ADD_EXECUTABLE(qs8-igemm-minmax-rndnu-test test/qs8-igemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6843 SET_TARGET_PROPERTIES(qs8-igemm-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6844 CXX_STANDARD 11
6845 CXX_STANDARD_REQUIRED YES
6846 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6847 TARGET_INCLUDE_DIRECTORIES(qs8-igemm-minmax-rndnu-test PRIVATE include src test)
6848 TARGET_LINK_LIBRARIES(qs8-igemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6849 ADD_TEST(qs8-igemm-minmax-rndnu-test qs8-igemm-minmax-rndnu-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6850
Marat Dukhanf879d9e2021-08-06 01:09:30 -0700[diff] [blame]6851 ADD_EXECUTABLE(qs8-requantization-test test/qs8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
6852 SET_TARGET_PROPERTIES(qs8-requantization-test PROPERTIES
6853 CXX_STANDARD 11
6854 CXX_STANDARD_REQUIRED YES
6855 CXX_EXTENSIONS YES)
6856 TARGET_INCLUDE_DIRECTORIES(qs8-requantization-test PRIVATE include src test)
6857 TARGET_LINK_LIBRARIES(qs8-requantization-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6858 ADD_TEST(qs8-requantization-test qs8-requantization-test)
6859
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6860 ADD_EXECUTABLE(qs8-vadd-minmax-test test/qs8-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]6861 SET_TARGET_PROPERTIES(qs8-vadd-minmax-test PROPERTIES
6862 CXX_STANDARD 11
6863 CXX_STANDARD_REQUIRED YES
6864 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6865 TARGET_INCLUDE_DIRECTORIES(qs8-vadd-minmax-test PRIVATE include src test)
6866 TARGET_LINK_LIBRARIES(qs8-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]6867 ADD_TEST(qs8-vadd-minmax-test qs8-vadd-minmax-test)
6868
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6869 ADD_EXECUTABLE(qs8-vaddc-minmax-test test/qs8-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]6870 SET_TARGET_PROPERTIES(qs8-vaddc-minmax-test PROPERTIES
6871 CXX_STANDARD 11
6872 CXX_STANDARD_REQUIRED YES
6873 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6874 TARGET_INCLUDE_DIRECTORIES(qs8-vaddc-minmax-test PRIVATE include src test)
6875 TARGET_LINK_LIBRARIES(qs8-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]6876 ADD_TEST(qs8-vaddc-minmax-test qs8-vaddc-minmax-test)
6877
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]6878 ADD_EXECUTABLE(qs8-vmul-minmax-fp32-test test/qs8-vmul-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
6879 SET_TARGET_PROPERTIES(qs8-vmul-minmax-fp32-test PROPERTIES
6880 CXX_STANDARD 11
6881 CXX_STANDARD_REQUIRED YES
6882 CXX_EXTENSIONS YES)
6883 TARGET_INCLUDE_DIRECTORIES(qs8-vmul-minmax-fp32-test PRIVATE include src test)
6884 TARGET_LINK_LIBRARIES(qs8-vmul-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6885 ADD_TEST(qs8-vmul-minmax-fp32-test qs8-vmul-minmax-fp32-test)
6886
6887 ADD_EXECUTABLE(qs8-vmulc-minmax-fp32-test test/qs8-vmulc-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
6888 SET_TARGET_PROPERTIES(qs8-vmulc-minmax-fp32-test PROPERTIES
6889 CXX_STANDARD 11
6890 CXX_STANDARD_REQUIRED YES
6891 CXX_EXTENSIONS YES)
6892 TARGET_INCLUDE_DIRECTORIES(qs8-vmulc-minmax-fp32-test PRIVATE include src test)
6893 TARGET_LINK_LIBRARIES(qs8-vmulc-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6894 ADD_TEST(qs8-vmulc-minmax-fp32-test qs8-vmulc-minmax-fp32-test)
6895
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6896 ADD_EXECUTABLE(qu8-avgpool-minmax-test test/qu8-avgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6897 SET_TARGET_PROPERTIES(qu8-avgpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6898 CXX_STANDARD 11
6899 CXX_STANDARD_REQUIRED YES
6900 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6901 TARGET_INCLUDE_DIRECTORIES(qu8-avgpool-minmax-test PRIVATE include src test)
6902 TARGET_LINK_LIBRARIES(qu8-avgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6903 ADD_TEST(qu8-avgpool-minmax-test qu8-avgpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6904
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6905 ADD_EXECUTABLE(qu8-dwconv-minmax-fp32-test test/qu8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]6906 SET_TARGET_PROPERTIES(qu8-dwconv-minmax-fp32-test PROPERTIES
6907 CXX_STANDARD 11
6908 CXX_STANDARD_REQUIRED YES
6909 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6910 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-minmax-fp32-test PRIVATE include src test)
6911 TARGET_LINK_LIBRARIES(qu8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]6912 ADD_TEST(qu8-dwconv-minmax-fp32-test qu8-dwconv-minmax-fp32-test)
6913
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6914 ADD_EXECUTABLE(qu8-dwconv-minmax-rndnu-test test/qu8-dwconv-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]6915 SET_TARGET_PROPERTIES(qu8-dwconv-minmax-rndnu-test PROPERTIES
6916 CXX_STANDARD 11
6917 CXX_STANDARD_REQUIRED YES
6918 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6919 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-minmax-rndnu-test PRIVATE include src test)
6920 TARGET_LINK_LIBRARIES(qu8-dwconv-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]6921 ADD_TEST(qu8-dwconv-minmax-rndnu-test qu8-dwconv-minmax-rndnu-test)
6922
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6923 ADD_EXECUTABLE(qu8-gavgpool-minmax-test test/qu8-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6924 SET_TARGET_PROPERTIES(qu8-gavgpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6925 CXX_STANDARD 11
6926 CXX_STANDARD_REQUIRED YES
6927 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6928 TARGET_INCLUDE_DIRECTORIES(qu8-gavgpool-minmax-test PRIVATE include src test)
6929 TARGET_LINK_LIBRARIES(qu8-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6930 ADD_TEST(qu8-gavgpool-test qu8-gavgpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6931
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6932 ADD_EXECUTABLE(qu8-gemm-minmax-fp32-test test/qu8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]6933 SET_TARGET_PROPERTIES(qu8-gemm-minmax-fp32-test PROPERTIES
6934 CXX_STANDARD 11
6935 CXX_STANDARD_REQUIRED YES
6936 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6937 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-minmax-fp32-test PRIVATE include src test)
6938 TARGET_LINK_LIBRARIES(qu8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]6939 ADD_TEST(qu8-gemm-minmax-fp32-test qu8-gemm-minmax-fp32-test)
6940
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6941 ADD_EXECUTABLE(qu8-gemm-minmax-gemmlowp-test test/qu8-gemm-minmax-gemmlowp.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700[diff] [blame]6942 SET_TARGET_PROPERTIES(qu8-gemm-minmax-gemmlowp-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6943 CXX_STANDARD 11
6944 CXX_STANDARD_REQUIRED YES
6945 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6946 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-minmax-gemmlowp-test PRIVATE include src test)
6947 TARGET_LINK_LIBRARIES(qu8-gemm-minmax-gemmlowp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700[diff] [blame]6948 ADD_TEST(qu8-gemm-minmax-gemmlowp-test qu8-gemm-minmax-gemmlowp-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6949
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6950 ADD_EXECUTABLE(qu8-gemm-minmax-rndnu-test test/qu8-gemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]6951 SET_TARGET_PROPERTIES(qu8-gemm-minmax-rndnu-test PROPERTIES
6952 CXX_STANDARD 11
6953 CXX_STANDARD_REQUIRED YES
6954 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6955 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-minmax-rndnu-test PRIVATE include src test)
6956 TARGET_LINK_LIBRARIES(qu8-gemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]6957 ADD_TEST(qu8-gemm-minmax-rndnu-test qu8-gemm-minmax-rndnu-test)
6958
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6959 ADD_EXECUTABLE(qu8-igemm-minmax-fp32-test test/qu8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]6960 SET_TARGET_PROPERTIES(qu8-igemm-minmax-fp32-test PROPERTIES
6961 CXX_STANDARD 11
6962 CXX_STANDARD_REQUIRED YES
6963 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6964 TARGET_INCLUDE_DIRECTORIES(qu8-igemm-minmax-fp32-test PRIVATE include src test)
6965 TARGET_LINK_LIBRARIES(qu8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]6966 ADD_TEST(qu8-igemm-minmax-fp32-test qu8-igemm-minmax-fp32-test)
6967
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6968 ADD_EXECUTABLE(qu8-igemm-minmax-gemmlowp-test test/qu8-igemm-minmax-gemmlowp.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700[diff] [blame]6969 SET_TARGET_PROPERTIES(qu8-igemm-minmax-gemmlowp-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6970 CXX_STANDARD 11
6971 CXX_STANDARD_REQUIRED YES
6972 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6973 TARGET_INCLUDE_DIRECTORIES(qu8-igemm-minmax-gemmlowp-test PRIVATE include src test)
6974 TARGET_LINK_LIBRARIES(qu8-igemm-minmax-gemmlowp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700[diff] [blame]6975 ADD_TEST(qu8-igemm-minmax-gemmlowp-test qu8-igemm-minmax-gemmlowp-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6976
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6977 ADD_EXECUTABLE(qu8-igemm-minmax-rndnu-test test/qu8-igemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]6978 SET_TARGET_PROPERTIES(qu8-igemm-minmax-rndnu-test PROPERTIES
6979 CXX_STANDARD 11
6980 CXX_STANDARD_REQUIRED YES
6981 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6982 TARGET_INCLUDE_DIRECTORIES(qu8-igemm-minmax-rndnu-test PRIVATE include src test)
6983 TARGET_LINK_LIBRARIES(qu8-igemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]6984 ADD_TEST(qu8-igemm-minmax-rndnu-test qu8-igemm-minmax-rndnu-test)
6985
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6986 ADD_EXECUTABLE(qu8-requantization-test test/qu8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]6987 SET_TARGET_PROPERTIES(qu8-requantization-test PROPERTIES
6988 CXX_STANDARD 11
6989 CXX_STANDARD_REQUIRED YES
6990 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6991 TARGET_INCLUDE_DIRECTORIES(qu8-requantization-test PRIVATE include src test)
6992 TARGET_LINK_LIBRARIES(qu8-requantization-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]6993 ADD_TEST(qu8-requantization-test qu8-requantization-test)
6994
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6995 ADD_EXECUTABLE(qu8-vadd-minmax-test test/qu8-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6996 SET_TARGET_PROPERTIES(qu8-vadd-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6997 CXX_STANDARD 11
6998 CXX_STANDARD_REQUIRED YES
6999 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7000 TARGET_INCLUDE_DIRECTORIES(qu8-vadd-minmax-test PRIVATE include src test)
7001 TARGET_LINK_LIBRARIES(qu8-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7002 ADD_TEST(qu8-vadd-minmax-test qu8-vadd-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7003
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7004 ADD_EXECUTABLE(qu8-vaddc-minmax-test test/qu8-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]7005 SET_TARGET_PROPERTIES(qu8-vaddc-minmax-test PROPERTIES
7006 CXX_STANDARD 11
7007 CXX_STANDARD_REQUIRED YES
7008 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7009 TARGET_INCLUDE_DIRECTORIES(qu8-vaddc-minmax-test PRIVATE include src test)
7010 TARGET_LINK_LIBRARIES(qu8-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]7011 ADD_TEST(qu8-vaddc-minmax-test qu8-vaddc-minmax-test)
7012
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]7013 ADD_EXECUTABLE(qu8-vmul-minmax-fp32-test test/qu8-vmul-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
7014 SET_TARGET_PROPERTIES(qu8-vmul-minmax-fp32-test PROPERTIES
7015 CXX_STANDARD 11
7016 CXX_STANDARD_REQUIRED YES
7017 CXX_EXTENSIONS YES)
7018 TARGET_INCLUDE_DIRECTORIES(qu8-vmul-minmax-fp32-test PRIVATE include src test)
7019 TARGET_LINK_LIBRARIES(qu8-vmul-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7020 ADD_TEST(qu8-vmul-minmax-fp32-test qu8-vmul-minmax-fp32-test)
7021
7022 ADD_EXECUTABLE(qu8-vmulc-minmax-fp32-test test/qu8-vmulc-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
7023 SET_TARGET_PROPERTIES(qu8-vmulc-minmax-fp32-test PROPERTIES
7024 CXX_STANDARD 11
7025 CXX_STANDARD_REQUIRED YES
7026 CXX_EXTENSIONS YES)
7027 TARGET_INCLUDE_DIRECTORIES(qu8-vmulc-minmax-fp32-test PRIVATE include src test)
7028 TARGET_LINK_LIBRARIES(qu8-vmulc-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7029 ADD_TEST(qu8-vmulc-minmax-fp32-test qu8-vmulc-minmax-fp32-test)
7030
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]7031 ADD_EXECUTABLE(s8-maxpool-minmax-test test/s8-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
7032 SET_TARGET_PROPERTIES(s8-maxpool-minmax-test PROPERTIES
7033 CXX_STANDARD 11
7034 CXX_STANDARD_REQUIRED YES
7035 CXX_EXTENSIONS YES)
7036 TARGET_INCLUDE_DIRECTORIES(s8-maxpool-minmax-test PRIVATE include src test)
7037 TARGET_LINK_LIBRARIES(s8-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7038 ADD_TEST(s8-maxpool-minmax-test s8-maxpool-minmax-test)
7039
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]7040 ADD_EXECUTABLE(s8-vclamp-test test/s8-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
7041 SET_TARGET_PROPERTIES(s8-vclamp-test PROPERTIES
7042 CXX_STANDARD 11
7043 CXX_STANDARD_REQUIRED YES
7044 CXX_EXTENSIONS YES)
7045 TARGET_INCLUDE_DIRECTORIES(s8-vclamp-test PRIVATE include src test)
7046 TARGET_LINK_LIBRARIES(s8-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7047 ADD_TEST(s8-vclamp-test s8-vclamp-test)
7048
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7049 ADD_EXECUTABLE(u8-lut32norm-test test/u8-lut32norm.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7050 SET_TARGET_PROPERTIES(u8-lut32norm-test PROPERTIES
7051 CXX_STANDARD 11
7052 CXX_STANDARD_REQUIRED YES
7053 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7054 TARGET_INCLUDE_DIRECTORIES(u8-lut32norm-test PRIVATE include src test)
7055 TARGET_LINK_LIBRARIES(u8-lut32norm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7056 ADD_TEST(u8-lut32norm-test u8-lut32norm-test)
7057
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7058 ADD_EXECUTABLE(u8-maxpool-minmax-test test/u8-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]7059 SET_TARGET_PROPERTIES(u8-maxpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7060 CXX_STANDARD 11
7061 CXX_STANDARD_REQUIRED YES
7062 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7063 TARGET_INCLUDE_DIRECTORIES(u8-maxpool-minmax-test PRIVATE include src test)
7064 TARGET_LINK_LIBRARIES(u8-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]7065 ADD_TEST(u8-maxpool-minmax-test u8-maxpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7066
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7067 ADD_EXECUTABLE(u8-rmax-test test/u8-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7068 SET_TARGET_PROPERTIES(u8-rmax-test PROPERTIES
7069 CXX_STANDARD 11
7070 CXX_STANDARD_REQUIRED YES
7071 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7072 TARGET_INCLUDE_DIRECTORIES(u8-rmax-test PRIVATE include src test)
7073 TARGET_LINK_LIBRARIES(u8-rmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7074 ADD_TEST(u8-rmax-test u8-rmax-test)
7075
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7076 ADD_EXECUTABLE(u8-vclamp-test test/u8-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7077 SET_TARGET_PROPERTIES(u8-vclamp-test PROPERTIES
7078 CXX_STANDARD 11
7079 CXX_STANDARD_REQUIRED YES
7080 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7081 TARGET_INCLUDE_DIRECTORIES(u8-vclamp-test PRIVATE include src test)
7082 TARGET_LINK_LIBRARIES(u8-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7083 ADD_TEST(u8-vclamp-test u8-vclamp-test)
7084
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7085 ADD_EXECUTABLE(x32-packx-test test/x32-packx.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7086 SET_TARGET_PROPERTIES(x32-packx-test PROPERTIES
7087 CXX_STANDARD 11
7088 CXX_STANDARD_REQUIRED YES
7089 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7090 TARGET_INCLUDE_DIRECTORIES(x32-packx-test PRIVATE include src test)
7091 TARGET_LINK_LIBRARIES(x32-packx-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7092 ADD_TEST(x32-packx-test x32-packx-test)
7093
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7094 ADD_EXECUTABLE(x32-unpool-test test/x32-unpool.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7095 SET_TARGET_PROPERTIES(x32-unpool-test PROPERTIES
7096 CXX_STANDARD 11
7097 CXX_STANDARD_REQUIRED YES
7098 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7099 TARGET_INCLUDE_DIRECTORIES(x32-unpool-test PRIVATE include src test)
7100 TARGET_LINK_LIBRARIES(x32-unpool-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7101 ADD_TEST(x32-unpool-test x32-unpool-test)
7102
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7103 ADD_EXECUTABLE(x32-depthtospace2d-chw2hwc-test test/x32-depthtospace2d-chw2hwc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]7104 SET_TARGET_PROPERTIES(x32-depthtospace2d-chw2hwc-test PROPERTIES
Yury Kartynnike7841862020-11-04 18:22:18 -0800[diff] [blame]7105 CXX_STANDARD 11
7106 CXX_STANDARD_REQUIRED YES
7107 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7108 TARGET_INCLUDE_DIRECTORIES(x32-depthtospace2d-chw2hwc-test PRIVATE include src test)
7109 TARGET_LINK_LIBRARIES(x32-depthtospace2d-chw2hwc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]7110 ADD_TEST(x32-depthtospace2d-chw2hwc-test x32-depthtospace2d-chw2hwc-test)
Yury Kartynnike7841862020-11-04 18:22:18 -0800[diff] [blame]7111
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7112 ADD_EXECUTABLE(x32-zip-test test/x32-zip.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7113 SET_TARGET_PROPERTIES(x32-zip-test PROPERTIES
7114 CXX_STANDARD 11
7115 CXX_STANDARD_REQUIRED YES
7116 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7117 TARGET_INCLUDE_DIRECTORIES(x32-zip-test PRIVATE include src test)
7118 TARGET_LINK_LIBRARIES(x32-zip-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7119 ADD_TEST(x32-zip-test x32-zip-test)
7120
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7121 ADD_EXECUTABLE(x8-lut-test test/x8-lut.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7122 SET_TARGET_PROPERTIES(x8-lut-test PROPERTIES
7123 CXX_STANDARD 11
7124 CXX_STANDARD_REQUIRED YES
7125 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7126 TARGET_INCLUDE_DIRECTORIES(x8-lut-test PRIVATE include src test)
7127 TARGET_LINK_LIBRARIES(x8-lut-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7128 ADD_TEST(x8-lut-test x8-lut-test)
7129
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7130 ADD_EXECUTABLE(x8-zip-test test/x8-zip.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7131 SET_TARGET_PROPERTIES(x8-zip-test PROPERTIES
7132 CXX_STANDARD 11
7133 CXX_STANDARD_REQUIRED YES
7134 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7135 TARGET_INCLUDE_DIRECTORIES(x8-zip-test PRIVATE include src test)
7136 TARGET_LINK_LIBRARIES(x8-zip-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7137 ADD_TEST(x8-zip-test x8-zip-test)
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]7138
7139 ADD_EXECUTABLE(xx-fill-test test/xx-fill.cc $<TARGET_OBJECTS:all_microkernels>)
7140 SET_TARGET_PROPERTIES(xx-fill-test PROPERTIES
7141 CXX_STANDARD 11
7142 CXX_STANDARD_REQUIRED YES
7143 CXX_EXTENSIONS YES)
7144 TARGET_INCLUDE_DIRECTORIES(xx-fill-test PRIVATE include src test)
7145 TARGET_LINK_LIBRARIES(xx-fill-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7146 ADD_TEST(xx-fill-test xx-fill-test)
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]7147
7148 ADD_EXECUTABLE(xx-pad-test test/xx-pad.cc $<TARGET_OBJECTS:all_microkernels>)
7149 SET_TARGET_PROPERTIES(xx-pad-test PROPERTIES
7150 CXX_STANDARD 11
7151 CXX_STANDARD_REQUIRED YES
7152 CXX_EXTENSIONS YES)
7153 TARGET_INCLUDE_DIRECTORIES(xx-pad-test PRIVATE include src test)
7154 TARGET_LINK_LIBRARIES(xx-pad-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7155 ADD_TEST(xx-pad-test xx-pad-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7156ENDIF()
7157
7158# ---[ XNNPACK microbenchmarks
7159IF(XNNPACK_BUILD_BENCHMARKS)
7160 # ---[ Build google benchmark
7161 IF(NOT TARGET benchmark)
7162 SET(BENCHMARK_ENABLE_TESTING OFF CACHE BOOL "")
7163 ADD_SUBDIRECTORY(
7164 "${GOOGLEBENCHMARK_SOURCE_DIR}"
7165 "${CONFU_DEPENDENCIES_BINARY_DIR}/googlebenchmark")
7166 ENDIF()
7167
7168 ADD_LIBRARY(bench-utils bench/utils.cc)
7169 SET_TARGET_PROPERTIES(bench-utils PROPERTIES
7170 CXX_STANDARD 11
7171 CXX_STANDARD_REQUIRED YES
7172 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7173 TARGET_INCLUDE_DIRECTORIES(bench-utils PRIVATE .)
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]7174 TARGET_LINK_LIBRARIES(bench-utils PRIVATE benchmark cpuinfo)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7175
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7176 # ---[ Build accuracy microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7177 ADD_EXECUTABLE(f32-exp-ulp-eval eval/f32-exp-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7178 SET_TARGET_PROPERTIES(f32-exp-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7179 CXX_STANDARD 11
7180 CXX_STANDARD_REQUIRED YES
7181 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7182 TARGET_INCLUDE_DIRECTORIES(f32-exp-ulp-eval PRIVATE . src)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7183 TARGET_LINK_LIBRARIES(f32-exp-ulp-eval PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7184
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7185 ADD_EXECUTABLE(f32-expminus-ulp-eval eval/f32-expminus-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7186 SET_TARGET_PROPERTIES(f32-expminus-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7187 CXX_STANDARD 11
7188 CXX_STANDARD_REQUIRED YES
7189 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7190 TARGET_INCLUDE_DIRECTORIES(f32-expminus-ulp-eval PRIVATE . src)
7191 TARGET_LINK_LIBRARIES(f32-expminus-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7192
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7193 ADD_EXECUTABLE(f32-expm1minus-ulp-eval eval/f32-expm1minus-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7194 SET_TARGET_PROPERTIES(f32-expm1minus-ulp-eval PROPERTIES
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]7195 CXX_STANDARD 11
7196 CXX_STANDARD_REQUIRED YES
7197 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7198 TARGET_INCLUDE_DIRECTORIES(f32-expm1minus-ulp-eval PRIVATE . src)
7199 TARGET_LINK_LIBRARIES(f32-expm1minus-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]7200
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7201 ADD_EXECUTABLE(f32-extexp-ulp-eval eval/f32-extexp-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7202 SET_TARGET_PROPERTIES(f32-extexp-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7203 CXX_STANDARD 11
7204 CXX_STANDARD_REQUIRED YES
7205 CXX_EXTENSIONS YES)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7206 TARGET_INCLUDE_DIRECTORIES(f32-extexp-ulp-eval PRIVATE . src)
7207 TARGET_LINK_LIBRARIES(f32-extexp-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7208
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7209 ADD_EXECUTABLE(f32-sigmoid-ulp-eval eval/f32-sigmoid-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7210 SET_TARGET_PROPERTIES(f32-sigmoid-ulp-eval PROPERTIES
7211 CXX_STANDARD 11
7212 CXX_STANDARD_REQUIRED YES
7213 CXX_EXTENSIONS NO)
7214 TARGET_INCLUDE_DIRECTORIES(f32-sigmoid-ulp-eval PRIVATE . src)
7215 TARGET_LINK_LIBRARIES(f32-sigmoid-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
7216
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7217 ADD_EXECUTABLE(f32-sqrt-ulp-eval eval/f32-sqrt-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7218 SET_TARGET_PROPERTIES(f32-sqrt-ulp-eval PROPERTIES
7219 CXX_STANDARD 11
7220 CXX_STANDARD_REQUIRED YES
7221 CXX_EXTENSIONS NO)
7222 TARGET_INCLUDE_DIRECTORIES(f32-sqrt-ulp-eval PRIVATE . src)
7223 TARGET_LINK_LIBRARIES(f32-sqrt-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
7224
7225 # ---[ Build accuracy tests
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]7226 ADD_EXECUTABLE(f16-f32-cvt-eval eval/f16-f32-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
7227 SET_TARGET_PROPERTIES(f16-f32-cvt-eval PROPERTIES
7228 CXX_STANDARD 11
7229 CXX_STANDARD_REQUIRED YES
7230 CXX_EXTENSIONS NO)
7231 TARGET_INCLUDE_DIRECTORIES(f16-f32-cvt-eval PRIVATE include src)
7232 TARGET_LINK_LIBRARIES(f16-f32-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7233
Marat Dukhan582e1842021-10-25 17:18:36 -0700[diff] [blame]7234 ADD_EXECUTABLE(f32-f16-cvt-eval eval/f32-f16-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
7235 SET_TARGET_PROPERTIES(f32-f16-cvt-eval PROPERTIES
7236 CXX_STANDARD 11
7237 CXX_STANDARD_REQUIRED YES
7238 CXX_EXTENSIONS NO)
7239 TARGET_INCLUDE_DIRECTORIES(f32-f16-cvt-eval PRIVATE include src)
7240 TARGET_LINK_LIBRARIES(f32-f16-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7241
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7242 ADD_EXECUTABLE(f32-exp-eval eval/f32-exp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf7291fc2020-12-15 11:02:50 -0800[diff] [blame]7243 SET_TARGET_PROPERTIES(f32-exp-eval PROPERTIES
7244 CXX_STANDARD 11
7245 CXX_STANDARD_REQUIRED YES
7246 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7247 TARGET_INCLUDE_DIRECTORIES(f32-exp-eval PRIVATE include src)
7248 TARGET_LINK_LIBRARIES(f32-exp-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf7291fc2020-12-15 11:02:50 -0800[diff] [blame]7249
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7250 ADD_EXECUTABLE(f32-expm1minus-eval eval/f32-expm1minus.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7251 SET_TARGET_PROPERTIES(f32-expm1minus-eval PROPERTIES
7252 CXX_STANDARD 11
7253 CXX_STANDARD_REQUIRED YES
7254 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7255 TARGET_INCLUDE_DIRECTORIES(f32-expm1minus-eval PRIVATE include src)
7256 TARGET_LINK_LIBRARIES(f32-expm1minus-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7257
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7258 ADD_EXECUTABLE(f32-expminus-eval eval/f32-expminus.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand28a5a22020-12-14 15:27:22 -0800[diff] [blame]7259 SET_TARGET_PROPERTIES(f32-expminus-eval PROPERTIES
7260 CXX_STANDARD 11
7261 CXX_STANDARD_REQUIRED YES
7262 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7263 TARGET_INCLUDE_DIRECTORIES(f32-expminus-eval PRIVATE include src)
7264 TARGET_LINK_LIBRARIES(f32-expminus-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand28a5a22020-12-14 15:27:22 -0800[diff] [blame]7265
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7266 ADD_EXECUTABLE(f32-roundne-eval eval/f32-roundne.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf35d73b2020-05-11 19:15:04 -0700[diff] [blame]7267 SET_TARGET_PROPERTIES(f32-roundne-eval PROPERTIES
7268 CXX_STANDARD 11
7269 CXX_STANDARD_REQUIRED YES
7270 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7271 TARGET_INCLUDE_DIRECTORIES(f32-roundne-eval PRIVATE include src)
7272 TARGET_LINK_LIBRARIES(f32-roundne-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf35d73b2020-05-11 19:15:04 -0700[diff] [blame]7273
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7274 ADD_EXECUTABLE(f32-roundd-eval eval/f32-roundd.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7275 SET_TARGET_PROPERTIES(f32-roundd-eval PROPERTIES
7276 CXX_STANDARD 11
7277 CXX_STANDARD_REQUIRED YES
7278 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7279 TARGET_INCLUDE_DIRECTORIES(f32-roundd-eval PRIVATE include src)
7280 TARGET_LINK_LIBRARIES(f32-roundd-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7281
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7282 ADD_EXECUTABLE(f32-roundu-eval eval/f32-roundu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7283 SET_TARGET_PROPERTIES(f32-roundu-eval PROPERTIES
7284 CXX_STANDARD 11
7285 CXX_STANDARD_REQUIRED YES
7286 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7287 TARGET_INCLUDE_DIRECTORIES(f32-roundu-eval PRIVATE include src)
7288 TARGET_LINK_LIBRARIES(f32-roundu-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7289
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7290 ADD_EXECUTABLE(f32-roundz-eval eval/f32-roundz.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]7291 SET_TARGET_PROPERTIES(f32-roundz-eval PROPERTIES
7292 CXX_STANDARD 11
7293 CXX_STANDARD_REQUIRED YES
7294 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7295 TARGET_INCLUDE_DIRECTORIES(f32-roundz-eval PRIVATE include src)
7296 TARGET_LINK_LIBRARIES(f32-roundz-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]7297
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]7298 # ---[ Build end-to-end microbenchmarks
Marat Dukhan17e16282019-12-10 12:09:35 -0800[diff] [blame]7299 ADD_LIBRARY(bench-models STATIC
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7300 models/fp16-mobilenet-v1.cc
7301 models/fp32-mobilenet-v1.cc
Marat Dukhane252f922021-08-31 08:57:41 -0700[diff] [blame]7302 models/qc8-mobilenet-v1.cc
7303 models/qc8-mobilenet-v2.cc
Marat Dukhan0743cdf2020-08-04 18:52:07 -0700[diff] [blame]7304 models/qs8-mobilenet-v1.cc
Marat Dukhan70a96182020-09-03 17:13:58 -0700[diff] [blame]7305 models/qs8-mobilenet-v2.cc
Marat Dukhan12a23bb2021-03-08 08:13:21 -0800[diff] [blame]7306 models/qu8-mobilenet-v1.cc
Marat Dukhan036b2b12021-07-21 01:12:58 -0700[diff] [blame]7307 models/qu8-mobilenet-v2.cc
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7308 models/fp16-mobilenet-v2.cc
7309 models/fp32-mobilenet-v2.cc
Marat Dukhan66f3ccd2020-09-14 16:09:38 -0700[diff] [blame]7310 models/fp16-mobilenet-v3-large.cc
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7311 models/fp32-mobilenet-v3-large.cc
Marat Dukhan66f3ccd2020-09-14 16:09:38 -0700[diff] [blame]7312 models/fp16-mobilenet-v3-small.cc
Marat Dukhan4cea2322021-03-09 09:35:36 -0800[diff] [blame]7313 models/fp32-mobilenet-v3-small.cc
7314 models/fp32-sparse-mobilenet-v1.cc
7315 models/fp32-sparse-mobilenet-v2.cc
7316 models/fp32-sparse-mobilenet-v3-large.cc
7317 models/fp32-sparse-mobilenet-v3-small.cc)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7318 SET_TARGET_PROPERTIES(bench-models PROPERTIES
7319 CXX_STANDARD 11
7320 CXX_STANDARD_REQUIRED YES
7321 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7322 TARGET_INCLUDE_DIRECTORIES(bench-models PRIVATE .)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7323 TARGET_LINK_LIBRARIES(bench-models PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7324
7325 ADD_EXECUTABLE(end2end-bench bench/end2end.cc)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7326 SET_TARGET_PROPERTIES(end2end-bench PROPERTIES
7327 CXX_STANDARD 11
7328 CXX_STANDARD_REQUIRED YES
7329 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7330 TARGET_INCLUDE_DIRECTORIES(end2end-bench PRIVATE .)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7331 TARGET_LINK_LIBRARIES(end2end-bench PRIVATE XNNPACK benchmark bench-models bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7332
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7333 ADD_EXECUTABLE(f32-dwconv-e2e-bench bench/f32-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]7334 SET_TARGET_PROPERTIES(f32-dwconv-e2e-bench PROPERTIES
7335 CXX_STANDARD 11
7336 CXX_STANDARD_REQUIRED YES
7337 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7338 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-e2e-bench PRIVATE . src)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7339 TARGET_LINK_LIBRARIES(f32-dwconv-e2e-bench PRIVATE XNNPACK benchmark bench-models bench-utils)
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]7340
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7341 ADD_EXECUTABLE(f32-gemm-e2e-bench bench/f32-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0a5a53f2019-10-31 10:58:31 -0700[diff] [blame]7342 SET_TARGET_PROPERTIES(f32-gemm-e2e-bench PROPERTIES
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]7343 CXX_STANDARD 11
7344 CXX_STANDARD_REQUIRED YES
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7345 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7346 TARGET_INCLUDE_DIRECTORIES(f32-gemm-e2e-bench PRIVATE . src)
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7347 TARGET_LINK_LIBRARIES(f32-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]7348
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7349 ADD_EXECUTABLE(qs8-dwconv-e2e-bench bench/qs8-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanbbfc6d32021-07-26 18:31:02 -0700[diff] [blame]7350 SET_TARGET_PROPERTIES(qs8-dwconv-e2e-bench PROPERTIES
7351 CXX_STANDARD 11
7352 CXX_STANDARD_REQUIRED YES
7353 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7354 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-e2e-bench PRIVATE . src)
Marat Dukhanbbfc6d32021-07-26 18:31:02 -0700[diff] [blame]7355 TARGET_LINK_LIBRARIES(qs8-dwconv-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
7356
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7357 ADD_EXECUTABLE(qs8-gemm-e2e-bench bench/qs8-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barcharddc909cb2021-02-08 13:59:31 -0800[diff] [blame]7358 SET_TARGET_PROPERTIES(qs8-gemm-e2e-bench PROPERTIES
7359 CXX_STANDARD 11
7360 CXX_STANDARD_REQUIRED YES
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7361 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7362 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-e2e-bench PRIVATE . src)
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7363 TARGET_LINK_LIBRARIES(qs8-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
Frank Barcharddc909cb2021-02-08 13:59:31 -0800[diff] [blame]7364
Frank Barchard9098aba2021-08-12 12:20:03 -0700[diff] [blame]7365 ADD_EXECUTABLE(qu8-gemm-e2e-bench bench/qu8-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
7366 SET_TARGET_PROPERTIES(qu8-gemm-e2e-bench PROPERTIES
7367 CXX_STANDARD 11
7368 CXX_STANDARD_REQUIRED YES
7369 CXX_EXTENSIONS YES)
7370 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-e2e-bench PRIVATE . src)
7371 TARGET_LINK_LIBRARIES(qu8-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
7372
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7373 ADD_EXECUTABLE(qu8-dwconv-e2e-bench bench/qu8-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6084fb82021-07-27 07:45:02 -0700[diff] [blame]7374 SET_TARGET_PROPERTIES(qu8-dwconv-e2e-bench PROPERTIES
7375 CXX_STANDARD 11
7376 CXX_STANDARD_REQUIRED YES
7377 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7378 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-e2e-bench PRIVATE . src)
Marat Dukhan6084fb82021-07-27 07:45:02 -0700[diff] [blame]7379 TARGET_LINK_LIBRARIES(qu8-dwconv-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
7380
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7381 # ---[ Build operator-level microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7382 ADD_EXECUTABLE(average-pooling-bench bench/average-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7383 SET_TARGET_PROPERTIES(average-pooling-bench PROPERTIES
7384 CXX_STANDARD 11
7385 CXX_STANDARD_REQUIRED YES
7386 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7387 TARGET_INCLUDE_DIRECTORIES(average-pooling-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7388 TARGET_LINK_LIBRARIES(average-pooling-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7389
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7390 ADD_EXECUTABLE(bankers-rounding-bench bench/bankers-rounding.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7391 SET_TARGET_PROPERTIES(bankers-rounding-bench PROPERTIES
7392 CXX_STANDARD 11
7393 CXX_STANDARD_REQUIRED YES
7394 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7395 TARGET_INCLUDE_DIRECTORIES(bankers-rounding-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7396 TARGET_LINK_LIBRARIES(bankers-rounding-bench PRIVATE XNNPACK benchmark bench-utils)
7397
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7398 ADD_EXECUTABLE(ceiling-bench bench/ceiling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7399 SET_TARGET_PROPERTIES(ceiling-bench PROPERTIES
7400 CXX_STANDARD 11
7401 CXX_STANDARD_REQUIRED YES
7402 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7403 TARGET_INCLUDE_DIRECTORIES(ceiling-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7404 TARGET_LINK_LIBRARIES(ceiling-bench PRIVATE XNNPACK benchmark bench-utils)
7405
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7406 ADD_EXECUTABLE(channel-shuffle-bench bench/channel-shuffle.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7407 SET_TARGET_PROPERTIES(channel-shuffle-bench PROPERTIES
7408 CXX_STANDARD 11
7409 CXX_STANDARD_REQUIRED YES
7410 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7411 TARGET_INCLUDE_DIRECTORIES(channel-shuffle-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7412 TARGET_LINK_LIBRARIES(channel-shuffle-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7413
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7414 ADD_EXECUTABLE(convolution-bench bench/convolution.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7415 SET_TARGET_PROPERTIES(convolution-bench PROPERTIES
7416 CXX_STANDARD 11
7417 CXX_STANDARD_REQUIRED YES
7418 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7419 TARGET_INCLUDE_DIRECTORIES(convolution-bench PRIVATE .)
Frank Barchard49b4dcc2020-06-26 14:07:19 -0700[diff] [blame]7420 TARGET_LINK_LIBRARIES(convolution-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7421
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7422 ADD_EXECUTABLE(deconvolution-bench bench/deconvolution.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7423 SET_TARGET_PROPERTIES(deconvolution-bench PROPERTIES
7424 CXX_STANDARD 11
7425 CXX_STANDARD_REQUIRED YES
7426 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7427 TARGET_INCLUDE_DIRECTORIES(deconvolution-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7428 TARGET_LINK_LIBRARIES(deconvolution-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7429
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7430 ADD_EXECUTABLE(elu-bench bench/elu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]7431 SET_TARGET_PROPERTIES(elu-bench PROPERTIES
7432 CXX_STANDARD 11
7433 CXX_STANDARD_REQUIRED YES
7434 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7435 TARGET_INCLUDE_DIRECTORIES(elu-bench PRIVATE .)
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]7436 TARGET_LINK_LIBRARIES(elu-bench PRIVATE XNNPACK benchmark bench-utils)
7437
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7438 ADD_EXECUTABLE(floor-bench bench/floor.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7439 SET_TARGET_PROPERTIES(floor-bench PROPERTIES
7440 CXX_STANDARD 11
7441 CXX_STANDARD_REQUIRED YES
7442 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7443 TARGET_INCLUDE_DIRECTORIES(floor-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7444 TARGET_LINK_LIBRARIES(floor-bench PRIVATE XNNPACK benchmark bench-utils)
7445
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7446 ADD_EXECUTABLE(global-average-pooling-bench bench/global-average-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7447 SET_TARGET_PROPERTIES(global-average-pooling-bench PROPERTIES
7448 CXX_STANDARD 11
7449 CXX_STANDARD_REQUIRED YES
7450 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7451 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-bench PRIVATE .)
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]7452 TARGET_LINK_LIBRARIES(global-average-pooling-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7453
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7454 ADD_EXECUTABLE(hardswish-bench bench/hardswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]7455 SET_TARGET_PROPERTIES(hardswish-bench PROPERTIES
7456 CXX_STANDARD 11
7457 CXX_STANDARD_REQUIRED YES
7458 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7459 TARGET_INCLUDE_DIRECTORIES(hardswish-bench PRIVATE .)
Marat Dukhanae24dfc2020-09-23 17:12:45 -0700[diff] [blame]7460 TARGET_LINK_LIBRARIES(hardswish-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]7461
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7462 ADD_EXECUTABLE(max-pooling-bench bench/max-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7463 SET_TARGET_PROPERTIES(max-pooling-bench PROPERTIES
7464 CXX_STANDARD 11
7465 CXX_STANDARD_REQUIRED YES
7466 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7467 TARGET_INCLUDE_DIRECTORIES(max-pooling-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7468 TARGET_LINK_LIBRARIES(max-pooling-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7469
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7470 ADD_EXECUTABLE(prelu-bench bench/prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]7471 SET_TARGET_PROPERTIES(prelu-bench PROPERTIES
7472 CXX_STANDARD 11
7473 CXX_STANDARD_REQUIRED YES
7474 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7475 TARGET_INCLUDE_DIRECTORIES(prelu-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7476 TARGET_LINK_LIBRARIES(prelu-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]7477
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7478 ADD_EXECUTABLE(sigmoid-bench bench/sigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7479 SET_TARGET_PROPERTIES(sigmoid-bench PROPERTIES
7480 CXX_STANDARD 11
7481 CXX_STANDARD_REQUIRED YES
7482 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7483 TARGET_INCLUDE_DIRECTORIES(sigmoid-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7484 TARGET_LINK_LIBRARIES(sigmoid-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7485
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7486 ADD_EXECUTABLE(softmax-bench bench/softmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]7487 SET_TARGET_PROPERTIES(softmax-bench PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7488 CXX_STANDARD 11
7489 CXX_STANDARD_REQUIRED YES
7490 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7491 TARGET_INCLUDE_DIRECTORIES(softmax-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7492 TARGET_LINK_LIBRARIES(softmax-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7493
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7494 ADD_EXECUTABLE(square-root-bench bench/square-root.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]7495 SET_TARGET_PROPERTIES(square-root-bench PROPERTIES
7496 CXX_STANDARD 11
7497 CXX_STANDARD_REQUIRED YES
7498 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7499 TARGET_INCLUDE_DIRECTORIES(square-root-bench PRIVATE .)
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]7500 TARGET_LINK_LIBRARIES(square-root-bench PRIVATE XNNPACK benchmark bench-utils)
7501
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7502 ADD_EXECUTABLE(truncation-bench bench/truncation.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7503 SET_TARGET_PROPERTIES(truncation-bench PROPERTIES
7504 CXX_STANDARD 11
7505 CXX_STANDARD_REQUIRED YES
7506 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7507 TARGET_INCLUDE_DIRECTORIES(truncation-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7508 TARGET_LINK_LIBRARIES(truncation-bench PRIVATE XNNPACK benchmark bench-utils)
7509
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7510 # ---[ Build microkernel-level microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7511 ADD_EXECUTABLE(f16-dwconv-bench bench/f16-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7512 SET_TARGET_PROPERTIES(f16-dwconv-bench PROPERTIES
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]7513 CXX_STANDARD 11
7514 CXX_STANDARD_REQUIRED YES
7515 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7516 TARGET_INCLUDE_DIRECTORIES(f16-dwconv-bench PRIVATE . include src)
7517 TARGET_LINK_LIBRARIES(f16-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]7518
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7519 ADD_EXECUTABLE(f16-gemm-bench bench/f16-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7520 SET_TARGET_PROPERTIES(f16-gemm-bench PROPERTIES
7521 CXX_STANDARD 11
7522 CXX_STANDARD_REQUIRED YES
7523 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7524 TARGET_INCLUDE_DIRECTORIES(f16-gemm-bench PRIVATE . include src)
7525 TARGET_LINK_LIBRARIES(f16-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7526
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7527 ADD_EXECUTABLE(f16-igemm-bench bench/f16-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7528 SET_TARGET_PROPERTIES(f16-igemm-bench PROPERTIES
Frank Barchardc2010062020-07-19 10:04:12 -0700[diff] [blame]7529 CXX_STANDARD 11
7530 CXX_STANDARD_REQUIRED YES
7531 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7532 TARGET_INCLUDE_DIRECTORIES(f16-igemm-bench PRIVATE . include src)
7533 TARGET_LINK_LIBRARIES(f16-igemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7534
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7535 ADD_EXECUTABLE(f16-vrelu-bench bench/f16-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7536 SET_TARGET_PROPERTIES(f16-vrelu-bench PROPERTIES
7537 CXX_STANDARD 11
7538 CXX_STANDARD_REQUIRED YES
7539 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7540 TARGET_INCLUDE_DIRECTORIES(f16-vrelu-bench PRIVATE . include src)
7541 TARGET_LINK_LIBRARIES(f16-vrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Frank Barchardc2010062020-07-19 10:04:12 -0700[diff] [blame]7542
Marat Dukhan434352f2021-10-16 18:28:55 -0700[diff] [blame]7543 ADD_EXECUTABLE(f16-f32-vcvt-bench bench/f16-f32-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
7544 SET_TARGET_PROPERTIES(f16-f32-vcvt-bench PROPERTIES
7545 CXX_STANDARD 11
7546 CXX_STANDARD_REQUIRED YES
7547 CXX_EXTENSIONS YES)
7548 TARGET_INCLUDE_DIRECTORIES(f16-f32-vcvt-bench PRIVATE . include src)
7549 TARGET_LINK_LIBRARIES(f16-f32-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7550
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7551 ADD_EXECUTABLE(f32-conv-hwc-bench bench/f32-conv-hwc.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7552 SET_TARGET_PROPERTIES(f32-conv-hwc-bench PROPERTIES
7553 CXX_STANDARD 11
7554 CXX_STANDARD_REQUIRED YES
7555 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7556 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc-bench PRIVATE . include src)
7557 TARGET_LINK_LIBRARIES(f32-conv-hwc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7558
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7559 ADD_EXECUTABLE(f32-dwconv-bench bench/f32-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7560 SET_TARGET_PROPERTIES(f32-dwconv-bench PROPERTIES
7561 CXX_STANDARD 11
7562 CXX_STANDARD_REQUIRED YES
7563 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7564 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-bench PRIVATE . include src)
7565 TARGET_LINK_LIBRARIES(f32-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7566
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7567 ADD_EXECUTABLE(f32-dwconv2d-chw-bench bench/f32-dwconv2d-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanbf715f92020-10-23 20:17:00 -0700[diff] [blame]7568 SET_TARGET_PROPERTIES(f32-dwconv2d-chw-bench PROPERTIES
7569 CXX_STANDARD 11
7570 CXX_STANDARD_REQUIRED YES
7571 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7572 TARGET_INCLUDE_DIRECTORIES(f32-dwconv2d-chw-bench PRIVATE . include src)
7573 TARGET_LINK_LIBRARIES(f32-dwconv2d-chw-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanbf715f92020-10-23 20:17:00 -0700[diff] [blame]7574
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]7575 ADD_EXECUTABLE(f32-f16-vcvt-bench bench/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
7576 SET_TARGET_PROPERTIES(f32-f16-vcvt-bench PROPERTIES
7577 CXX_STANDARD 11
7578 CXX_STANDARD_REQUIRED YES
7579 CXX_EXTENSIONS YES)
7580 TARGET_INCLUDE_DIRECTORIES(f32-f16-vcvt-bench PRIVATE . include src)
7581 TARGET_LINK_LIBRARIES(f32-f16-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7582
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7583 ADD_EXECUTABLE(f32-gemm-bench bench/f32-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7584 SET_TARGET_PROPERTIES(f32-gemm-bench PROPERTIES
7585 CXX_STANDARD 11
7586 CXX_STANDARD_REQUIRED YES
7587 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7588 TARGET_INCLUDE_DIRECTORIES(f32-gemm-bench PRIVATE . include src)
7589 TARGET_LINK_LIBRARIES(f32-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7590
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7591 ADD_EXECUTABLE(f32-igemm-bench bench/f32-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7592 SET_TARGET_PROPERTIES(f32-igemm-bench PROPERTIES
7593 CXX_STANDARD 11
7594 CXX_STANDARD_REQUIRED YES
7595 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7596 TARGET_INCLUDE_DIRECTORIES(f32-igemm-bench PRIVATE . include src)
7597 TARGET_LINK_LIBRARIES(f32-igemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7598
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7599 ADD_EXECUTABLE(f32-im2col-gemm-bench bench/f32-im2col-gemm.cc src/im2col.c $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7600 SET_TARGET_PROPERTIES(f32-im2col-gemm-bench PROPERTIES
7601 C_STANDARD 99
7602 C_STANDARD_REQUIRED YES
7603 C_EXTENSIONS NO
7604 CXX_STANDARD 11
7605 CXX_STANDARD_REQUIRED YES
7606 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7607 TARGET_INCLUDE_DIRECTORIES(f32-im2col-gemm-bench PRIVATE . include src)
7608 TARGET_LINK_LIBRARIES(f32-im2col-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7609
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7610 ADD_EXECUTABLE(f32-rmax-bench bench/f32-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7611 SET_TARGET_PROPERTIES(f32-rmax-bench PROPERTIES
7612 CXX_STANDARD 11
7613 CXX_STANDARD_REQUIRED YES
7614 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7615 TARGET_INCLUDE_DIRECTORIES(f32-rmax-bench PRIVATE . include src)
7616 TARGET_LINK_LIBRARIES(f32-rmax-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7617
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7618 ADD_EXECUTABLE(f32-spmm-bench bench/f32-spmm.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7619 SET_TARGET_PROPERTIES(f32-spmm-bench PROPERTIES
7620 CXX_STANDARD 11
7621 CXX_STANDARD_REQUIRED YES
7622 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7623 TARGET_INCLUDE_DIRECTORIES(f32-spmm-bench PRIVATE . include src)
7624 TARGET_LINK_LIBRARIES(f32-spmm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7625
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7626 ADD_EXECUTABLE(f32-softmax-bench bench/f32-softmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]7627 SET_TARGET_PROPERTIES(f32-softmax-bench PROPERTIES
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]7628 CXX_STANDARD 11
7629 CXX_STANDARD_REQUIRED YES
7630 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7631 TARGET_INCLUDE_DIRECTORIES(f32-softmax-bench PRIVATE . include src)
7632 TARGET_LINK_LIBRARIES(f32-softmax-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]7633
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7634 ADD_EXECUTABLE(f32-velu-bench bench/f32-velu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]7635 SET_TARGET_PROPERTIES(f32-velu-bench PROPERTIES
7636 CXX_STANDARD 11
7637 CXX_STANDARD_REQUIRED YES
7638 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7639 TARGET_INCLUDE_DIRECTORIES(f32-velu-bench PRIVATE . include src)
7640 TARGET_LINK_LIBRARIES(f32-velu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]7641
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7642 ADD_EXECUTABLE(f32-vhswish-bench bench/f32-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7643 SET_TARGET_PROPERTIES(f32-vhswish-bench PROPERTIES
7644 CXX_STANDARD 11
7645 CXX_STANDARD_REQUIRED YES
7646 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7647 TARGET_INCLUDE_DIRECTORIES(f32-vhswish-bench PRIVATE . include src)
7648 TARGET_LINK_LIBRARIES(f32-vhswish-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7649
Marat Dukhan7c74aff2021-08-07 15:44:27 -0700[diff] [blame]7650 ADD_EXECUTABLE(f32-vlrelu-bench bench/f32-vlrelu.cc $<TARGET_OBJECTS:all_microkernels>)
7651 SET_TARGET_PROPERTIES(f32-vlrelu-bench PROPERTIES
7652 CXX_STANDARD 11
7653 CXX_STANDARD_REQUIRED YES
7654 CXX_EXTENSIONS YES)
7655 TARGET_INCLUDE_DIRECTORIES(f32-vlrelu-bench PRIVATE . include src)
7656 TARGET_LINK_LIBRARIES(f32-vlrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7657
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7658 ADD_EXECUTABLE(f32-vrelu-bench bench/f32-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7659 SET_TARGET_PROPERTIES(f32-vrelu-bench PROPERTIES
7660 CXX_STANDARD 11
7661 CXX_STANDARD_REQUIRED YES
7662 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7663 TARGET_INCLUDE_DIRECTORIES(f32-vrelu-bench PRIVATE . include src)
7664 TARGET_LINK_LIBRARIES(f32-vrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7665
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7666 ADD_EXECUTABLE(f32-vsigmoid-bench bench/f32-vsigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7667 SET_TARGET_PROPERTIES(f32-vsigmoid-bench PROPERTIES
7668 CXX_STANDARD 11
7669 CXX_STANDARD_REQUIRED YES
7670 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7671 TARGET_INCLUDE_DIRECTORIES(f32-vsigmoid-bench PRIVATE . include src)
7672 TARGET_LINK_LIBRARIES(f32-vsigmoid-bench PRIVATE benchmark bench-utils fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7673
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7674 ADD_EXECUTABLE(f32-vsqrt-bench bench/f32-vsqrt.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]7675 SET_TARGET_PROPERTIES(f32-vsqrt-bench PROPERTIES
7676 CXX_STANDARD 11
7677 CXX_STANDARD_REQUIRED YES
7678 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7679 TARGET_INCLUDE_DIRECTORIES(f32-vsqrt-bench PRIVATE . include src)
7680 TARGET_LINK_LIBRARIES(f32-vsqrt-bench PRIVATE benchmark bench-utils fp16 pthreadpool)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]7681
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7682 ADD_EXECUTABLE(qs8-dwconv-bench bench/qs8-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan0744fa02021-07-26 22:56:27 -0700[diff] [blame]7683 SET_TARGET_PROPERTIES(qs8-dwconv-bench PROPERTIES
7684 CXX_STANDARD 11
7685 CXX_STANDARD_REQUIRED YES
7686 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7687 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-bench PRIVATE . include src)
7688 TARGET_LINK_LIBRARIES(qs8-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan0744fa02021-07-26 22:56:27 -0700[diff] [blame]7689
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7690 ADD_EXECUTABLE(qs8-gemm-bench bench/qs8-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]7691 SET_TARGET_PROPERTIES(qs8-gemm-bench PROPERTIES
7692 CXX_STANDARD 11
7693 CXX_STANDARD_REQUIRED YES
7694 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7695 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-bench PRIVATE . include src)
7696 TARGET_LINK_LIBRARIES(qs8-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]7697
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7698 ADD_EXECUTABLE(qs8-requantization-bench bench/qs8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan56bdd4a2020-08-03 19:47:04 -0700[diff] [blame]7699 SET_TARGET_PROPERTIES(qs8-requantization-bench PROPERTIES
7700 CXX_STANDARD 11
7701 CXX_STANDARD_REQUIRED YES
7702 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7703 TARGET_INCLUDE_DIRECTORIES(qs8-requantization-bench PRIVATE . include src)
7704 TARGET_LINK_LIBRARIES(qs8-requantization-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan56bdd4a2020-08-03 19:47:04 -0700[diff] [blame]7705
Marat Dukhan83a8d2f2021-07-29 16:41:19 -0700[diff] [blame]7706 ADD_EXECUTABLE(qs8-vadd-bench bench/qs8-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
7707 SET_TARGET_PROPERTIES(qs8-vadd-bench PROPERTIES
7708 CXX_STANDARD 11
7709 CXX_STANDARD_REQUIRED YES
7710 CXX_EXTENSIONS YES)
7711 TARGET_INCLUDE_DIRECTORIES(qs8-vadd-bench PRIVATE . include src)
7712 TARGET_LINK_LIBRARIES(qs8-vadd-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7713
7714 ADD_EXECUTABLE(qs8-vaddc-bench bench/qs8-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
7715 SET_TARGET_PROPERTIES(qs8-vaddc-bench PROPERTIES
7716 CXX_STANDARD 11
7717 CXX_STANDARD_REQUIRED YES
7718 CXX_EXTENSIONS YES)
7719 TARGET_INCLUDE_DIRECTORIES(qs8-vaddc-bench PRIVATE . include src)
7720 TARGET_LINK_LIBRARIES(qs8-vaddc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7721
Marat Dukhan795e5ab2021-08-02 19:07:52 -0700[diff] [blame]7722 ADD_EXECUTABLE(qs8-vmul-bench bench/qs8-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
7723 SET_TARGET_PROPERTIES(qs8-vmul-bench PROPERTIES
7724 CXX_STANDARD 11
7725 CXX_STANDARD_REQUIRED YES
7726 CXX_EXTENSIONS YES)
7727 TARGET_INCLUDE_DIRECTORIES(qs8-vmul-bench PRIVATE . include src)
7728 TARGET_LINK_LIBRARIES(qs8-vmul-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7729
Marat Dukhan8b024c92021-08-03 00:05:14 -0700[diff] [blame]7730 ADD_EXECUTABLE(qs8-vmulc-bench bench/qs8-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
7731 SET_TARGET_PROPERTIES(qs8-vmulc-bench PROPERTIES
7732 CXX_STANDARD 11
7733 CXX_STANDARD_REQUIRED YES
7734 CXX_EXTENSIONS YES)
7735 TARGET_INCLUDE_DIRECTORIES(qs8-vmulc-bench PRIVATE . include src)
7736 TARGET_LINK_LIBRARIES(qs8-vmulc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7737
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7738 ADD_EXECUTABLE(qu8-gemm-bench bench/qu8-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7739 SET_TARGET_PROPERTIES(qu8-gemm-bench PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7740 CXX_STANDARD 11
7741 CXX_STANDARD_REQUIRED YES
7742 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7743 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-bench PRIVATE . include src)
7744 TARGET_LINK_LIBRARIES(qu8-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]7745
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7746 ADD_EXECUTABLE(qu8-requantization-bench bench/qu8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]7747 SET_TARGET_PROPERTIES(qu8-requantization-bench PROPERTIES
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]7748 CXX_STANDARD 11
7749 CXX_STANDARD_REQUIRED YES
7750 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7751 TARGET_INCLUDE_DIRECTORIES(qu8-requantization-bench PRIVATE . include src)
7752 TARGET_LINK_LIBRARIES(qu8-requantization-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]7753
Marat Dukhan1ef9de82021-07-29 17:15:33 -0700[diff] [blame]7754 ADD_EXECUTABLE(qu8-vadd-bench bench/qu8-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
7755 SET_TARGET_PROPERTIES(qu8-vadd-bench PROPERTIES
7756 CXX_STANDARD 11
7757 CXX_STANDARD_REQUIRED YES
7758 CXX_EXTENSIONS YES)
7759 TARGET_INCLUDE_DIRECTORIES(qu8-vadd-bench PRIVATE . include src)
7760 TARGET_LINK_LIBRARIES(qu8-vadd-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7761
7762 ADD_EXECUTABLE(qu8-vaddc-bench bench/qu8-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
7763 SET_TARGET_PROPERTIES(qu8-vaddc-bench PROPERTIES
7764 CXX_STANDARD 11
7765 CXX_STANDARD_REQUIRED YES
7766 CXX_EXTENSIONS YES)
7767 TARGET_INCLUDE_DIRECTORIES(qu8-vaddc-bench PRIVATE . include src)
7768 TARGET_LINK_LIBRARIES(qu8-vaddc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7769
Marat Dukhan795e5ab2021-08-02 19:07:52 -0700[diff] [blame]7770 ADD_EXECUTABLE(qu8-vmul-bench bench/qu8-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
7771 SET_TARGET_PROPERTIES(qu8-vmul-bench PROPERTIES
7772 CXX_STANDARD 11
7773 CXX_STANDARD_REQUIRED YES
7774 CXX_EXTENSIONS YES)
7775 TARGET_INCLUDE_DIRECTORIES(qu8-vmul-bench PRIVATE . include src)
7776 TARGET_LINK_LIBRARIES(qu8-vmul-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7777
Marat Dukhan8b024c92021-08-03 00:05:14 -0700[diff] [blame]7778 ADD_EXECUTABLE(qu8-vmulc-bench bench/qu8-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
7779 SET_TARGET_PROPERTIES(qu8-vmulc-bench PROPERTIES
7780 CXX_STANDARD 11
7781 CXX_STANDARD_REQUIRED YES
7782 CXX_EXTENSIONS YES)
7783 TARGET_INCLUDE_DIRECTORIES(qu8-vmulc-bench PRIVATE . include src)
7784 TARGET_LINK_LIBRARIES(qu8-vmulc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7785
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7786 ADD_EXECUTABLE(rounding-bench bench/rounding.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]7787 SET_TARGET_PROPERTIES(rounding-bench PROPERTIES
7788 CXX_STANDARD 11
7789 CXX_STANDARD_REQUIRED YES
7790 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7791 TARGET_INCLUDE_DIRECTORIES(rounding-bench PRIVATE . include src)
7792 TARGET_LINK_LIBRARIES(rounding-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan54074372021-09-08 23:28:46 -0700[diff] [blame]7793
7794 ADD_EXECUTABLE(x8-lut-bench bench/x8-lut.cc $<TARGET_OBJECTS:all_microkernels>)
7795 SET_TARGET_PROPERTIES(x8-lut-bench PROPERTIES
7796 CXX_STANDARD 11
7797 CXX_STANDARD_REQUIRED YES
7798 CXX_EXTENSIONS YES)
7799 TARGET_INCLUDE_DIRECTORIES(x8-lut-bench PRIVATE . include src)
7800 TARGET_LINK_LIBRARIES(x8-lut-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7801ENDIF()