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gerrit-public.fairphone.software / platform / external / XNNPACK / a720e9316b7befd1e5fc05f1f818acbd846025ff / . / BUILD.bazel
blob: 8616ce5dea336e4ba2e6b9267bed7a4a8c1f9428 [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
19 "@pthreadpool",
20]
21
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]22MICROKERNEL_BENCHMARK_DEPS = [
23 ":ukernels",
24 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]25 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]26 "@cpuinfo",
27 "@FP16",
28 "@pthreadpool",
29]
30
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]31ACCURACY_EVAL_DEPS = [
32 ":XNNPACK",
33 ":ukernels",
34 "@FP16",
35 "@pthreadpool",
36]
37
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]38MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]39 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]40 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]41 "@cpuinfo",
42 "@FP16",
43 "@pthreadpool",
44]
45
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]46OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]47 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]48 "@pthreadpool",
49 "@FP16",
50]
51
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]52OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]53 "src/operators/argmax-pooling-nhwc.c",
54 "src/operators/average-pooling-nhwc.c",
55 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]56 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]57 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]58 "src/operators/convolution-nchw.c",
59 "src/operators/convolution-nhwc.c",
60 "src/operators/deconvolution-nhwc.c",
61 "src/operators/fully-connected-nc.c",
62 "src/operators/global-average-pooling-ncw.c",
63 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]64 "src/operators/leaky-relu-nc.c",
65 "src/operators/max-pooling-nhwc.c",
66 "src/operators/prelu-nc.c",
67 "src/operators/resize-bilinear-nhwc.c",
68 "src/operators/sigmoid-nc.c",
69 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]70 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]71 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]72]
73
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]74SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]75 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]76 "src/subgraph/add2.c",
77 "src/subgraph/argmax-pooling-2d.c",
78 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]79 "src/subgraph/bankers-rounding.c",
80 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]81 "src/subgraph/clamp.c",
82 "src/subgraph/convolution-2d.c",
83 "src/subgraph/deconvolution-2d.c",
84 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]85 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]86 "src/subgraph/fully-connected.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]87 "src/subgraph/floor.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]88 "src/subgraph/hardswish.c",
89 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]90 "src/subgraph/maximum2.c",
91 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]92 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]93 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]94 "src/subgraph/prelu.c",
95 "src/subgraph/sigmoid.c",
96 "src/subgraph/softmax.c",
97 "src/subgraph/static-constant-pad.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]98 "src/subgraph/square.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]99 "src/subgraph/squared-difference.c",
100 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]101 "src/subgraph/unpooling-2d.c",
102]
103
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]104TABLE_SRCS = [
105 "src/tables/exp2-k-over-64.c",
106 "src/tables/exp2-k-over-2048.c",
107]
108
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]109SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]110 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]111 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]112 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]113 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
114 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]115 "src/f32-clamp/gen/scalar-x1.c",
116 "src/f32-clamp/gen/scalar-x2.c",
117 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]118 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]119 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]120 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
121 "src/f32-dwconv-chw/3x3p1-scalar.c",
122 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
123 "src/f32-dwconv-chw/5x5p2-scalar.c",
124 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]125 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
126 "src/f32-dwconv/gen/up1x4-scalar.c",
127 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
128 "src/f32-dwconv/gen/up1x9-scalar.c",
129 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
130 "src/f32-dwconv/gen/up1x25-scalar.c",
131 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
132 "src/f32-dwconv/gen/up2x4-scalar.c",
133 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
134 "src/f32-dwconv/gen/up2x9-scalar.c",
135 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
136 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]137 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
138 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
139 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
140 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]141 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
142 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]143 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
144 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
145 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
146 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]147 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
148 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]149 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]150 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
151 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]152 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
153 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
154 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]155 "src/f32-gemm/gen/1x4-scalar.c",
156 "src/f32-gemm/gen/2x4-scalar.c",
157 "src/f32-gemm/gen/4x2-scalar.c",
158 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]159 "src/f32-gemm/gen/1x4-relu-scalar.c",
160 "src/f32-gemm/gen/2x4-relu-scalar.c",
161 "src/f32-gemm/gen/4x2-relu-scalar.c",
162 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]163 "src/f32-gemm/gen/1x4-minmax-scalar.c",
164 "src/f32-gemm/gen/2x4-minmax-scalar.c",
165 "src/f32-gemm/gen/4x2-minmax-scalar.c",
166 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]167 "src/f32-hswish/gen/scalar-x1.c",
168 "src/f32-hswish/gen/scalar-x2.c",
169 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]170 "src/f32-ibilinear/gen/scalar-c1.c",
171 "src/f32-ibilinear/gen/scalar-c2.c",
172 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]173 "src/f32-igemm/gen/1x4-scalar.c",
174 "src/f32-igemm/gen/2x4-scalar.c",
175 "src/f32-igemm/gen/4x2-scalar.c",
176 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]177 "src/f32-igemm/gen/1x4-relu-scalar.c",
178 "src/f32-igemm/gen/2x4-relu-scalar.c",
179 "src/f32-igemm/gen/4x2-relu-scalar.c",
180 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]181 "src/f32-igemm/gen/1x4-minmax-scalar.c",
182 "src/f32-igemm/gen/2x4-minmax-scalar.c",
183 "src/f32-igemm/gen/4x2-minmax-scalar.c",
184 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]185 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
186 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
187 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]188 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
189 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
190 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
191 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]192 "src/f32-prelu/gen/scalar-2x1.c",
193 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]194 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
195 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
196 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
197 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
200 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
201 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
202 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
203 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
204 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
205 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]206 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]207 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
208 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
209 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
210 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
211 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
212 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
213 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
214 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
215 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]216 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
217 "src/f32-spmm/gen/1x1-minmax-scalar.c",
218 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
219 "src/f32-spmm/gen/2x1-minmax-scalar.c",
220 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
221 "src/f32-spmm/gen/4x1-minmax-scalar.c",
222 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
223 "src/f32-spmm/gen/8x1-minmax-scalar.c",
224 "src/f32-spmm/gen/8x2-minmax-scalar.c",
225 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]226 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
227 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
228 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
229 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
236 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
237 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]238 "src/f32-vbinary/gen/vmax-scalar-x1.c",
239 "src/f32-vbinary/gen/vmax-scalar-x2.c",
240 "src/f32-vbinary/gen/vmax-scalar-x4.c",
241 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
242 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
243 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
244 "src/f32-vbinary/gen/vmin-scalar-x1.c",
245 "src/f32-vbinary/gen/vmin-scalar-x2.c",
246 "src/f32-vbinary/gen/vmin-scalar-x4.c",
247 "src/f32-vbinary/gen/vminc-scalar-x1.c",
248 "src/f32-vbinary/gen/vminc-scalar-x2.c",
249 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]250 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
251 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
252 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
253 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]259 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x1.c",
260 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x2.c",
261 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]262 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
263 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
264 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]265 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
266 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
267 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
268 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
269 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
270 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]271 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
272 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
273 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
274 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
275 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
276 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]277 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
278 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
279 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]280 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
281 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
282 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
283 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
284 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
285 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
286 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
287 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
288 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
289 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
290 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
291 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]292 "src/f32-vunary/gen/vabs-scalar-x1.c",
293 "src/f32-vunary/gen/vabs-scalar-x2.c",
294 "src/f32-vunary/gen/vabs-scalar-x4.c",
295 "src/f32-vunary/gen/vneg-scalar-x1.c",
296 "src/f32-vunary/gen/vneg-scalar-x2.c",
297 "src/f32-vunary/gen/vneg-scalar-x4.c",
298 "src/f32-vunary/gen/vsqr-scalar-x1.c",
299 "src/f32-vunary/gen/vsqr-scalar-x2.c",
300 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]301 "src/math/expminus-scalar-lut2048-p1.c",
302 "src/math/expminus-scalar-lut64-p2.c",
303 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]304 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]305 "src/math/roundne-scalar-nearbyint.c",
306 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]307 "src/math/roundd-scalar-addsub.c",
308 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]309 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]310 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]311 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]312 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]313 "src/math/roundz-scalar-addsub.c",
314 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]315 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]316 "src/math/sigmoid-scalar-lut2048-p1-div.c",
317 "src/math/sigmoid-scalar-lut64-p2-div.c",
318 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]319 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
320 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]321 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]322 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
323 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]324 "src/q8-gemm/2x2-minmax-scalar.c",
325 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]326 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]327 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]328 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]329 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]330 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]331 "src/x32-fill/scalar-float.c",
332 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]333 "src/x32-packx/x2-scalar.c",
334 "src/x32-packx/x3-scalar.c",
335 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]336 "src/x32-pad/scalar-int.c",
337 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]338 "src/x32-unpool/scalar.c",
339 "src/x32-zip/x2-scalar.c",
340 "src/x32-zip/x3-scalar.c",
341 "src/x32-zip/x4-scalar.c",
342 "src/x32-zip/xm-scalar.c",
343 "src/x8-lut/scalar.c",
344 "src/x8-zip/x2-scalar.c",
345 "src/x8-zip/x3-scalar.c",
346 "src/x8-zip/x4-scalar.c",
347 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]348 "src/requantization/precise-scalar.c",
349 "src/requantization/fp32-scalar.c",
350 "src/requantization/q31-scalar.c",
351 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]352]
353
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]354WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]355 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
356 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]357 "src/f32-clamp/gen/wasm-x1.c",
358 "src/f32-clamp/gen/wasm-x2.c",
359 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]360 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
361 "src/f32-dwconv/gen/up1x4-wasm.c",
362 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
363 "src/f32-dwconv/gen/up1x9-wasm.c",
364 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
365 "src/f32-dwconv/gen/up1x25-wasm.c",
366 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
367 "src/f32-dwconv/gen/up2x4-wasm.c",
368 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
369 "src/f32-dwconv/gen/up2x9-wasm.c",
370 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
371 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]372 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
373 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
374 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
375 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]376 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
377 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]378 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
379 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
380 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
381 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]382 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
383 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]384 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
385 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]386 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
387 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
388 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]389 "src/f32-gemm/gen/1x4-wasm.c",
390 "src/f32-gemm/gen/2x4-wasm.c",
391 "src/f32-gemm/gen/4x2-wasm.c",
392 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]393 "src/f32-gemm/gen/1x4-relu-wasm.c",
394 "src/f32-gemm/gen/2x4-relu-wasm.c",
395 "src/f32-gemm/gen/4x2-relu-wasm.c",
396 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]397 "src/f32-gemm/gen/1x4-minmax-wasm.c",
398 "src/f32-gemm/gen/2x4-minmax-wasm.c",
399 "src/f32-gemm/gen/4x2-minmax-wasm.c",
400 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]401 "src/f32-hswish/gen/wasm-x1.c",
402 "src/f32-hswish/gen/wasm-x2.c",
403 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]404 "src/f32-igemm/gen/1x4-wasm.c",
405 "src/f32-igemm/gen/2x4-wasm.c",
406 "src/f32-igemm/gen/4x2-wasm.c",
407 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]408 "src/f32-igemm/gen/1x4-relu-wasm.c",
409 "src/f32-igemm/gen/2x4-relu-wasm.c",
410 "src/f32-igemm/gen/4x2-relu-wasm.c",
411 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]412 "src/f32-igemm/gen/1x4-minmax-wasm.c",
413 "src/f32-igemm/gen/2x4-minmax-wasm.c",
414 "src/f32-igemm/gen/4x2-minmax-wasm.c",
415 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]416 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
417 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
418 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]419 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
420 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
421 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
422 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
423 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
424 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
425 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
426 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
427 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
428 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
429 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
430 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]431 "src/f32-vbinary/gen/vmax-wasm-x1.c",
432 "src/f32-vbinary/gen/vmax-wasm-x2.c",
433 "src/f32-vbinary/gen/vmax-wasm-x4.c",
434 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
435 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
436 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
437 "src/f32-vbinary/gen/vmin-wasm-x1.c",
438 "src/f32-vbinary/gen/vmin-wasm-x2.c",
439 "src/f32-vbinary/gen/vmin-wasm-x4.c",
440 "src/f32-vbinary/gen/vminc-wasm-x1.c",
441 "src/f32-vbinary/gen/vminc-wasm-x2.c",
442 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]443 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
444 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
445 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
446 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
447 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
448 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
449 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
450 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
451 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
452 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
453 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
454 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
455 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
456 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
457 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
458 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
459 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
460 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]461 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
462 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
463 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]464]
465
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]466WASMSIMD_UKERNELS = [
467 "src/requantization/fp32-wasmsimd.c",
468]
469
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]470PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]471 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]472 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]473 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]474 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
475 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]476 "src/f32-clamp/gen/psimd-x4.c",
477 "src/f32-clamp/gen/psimd-x8.c",
Erich Elsen0a1970e2020-06-10 09:24:59 -0700[diff] [blame]478 "src/f32-conv-hwc2chw/3x3s2p1c3x4-psimd-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]479 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
480 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
481 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
482 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
483 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
484 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
485 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
486 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
487 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
488 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
489 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
490 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]491 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
492 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]493 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
494 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
495 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
496 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
497 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
498 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
499 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
500 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
501 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
502 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
503 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
504 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
505 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
506 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
507 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
508 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
509 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
510 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
511 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]512 "src/f32-hswish/gen/psimd-x4.c",
513 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]514 "src/f32-ibilinear/gen/psimd-c4.c",
515 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]516 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
517 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
518 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
519 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
520 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
521 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
522 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
523 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
524 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
525 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]526 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]527 "src/f32-spmm/gen/4x1-minmax-psimd.c",
528 "src/f32-spmm/gen/8x1-minmax-psimd.c",
529 "src/f32-spmm/gen/16x1-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]530 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
531 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]532 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]533 "src/f32-prelu/gen/psimd-2x4.c",
534 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]535 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]536 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
537 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
538 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
539 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
540 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
541 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
542 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
543 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]544 "src/f32-vbinary/gen/vmax-psimd-x4.c",
545 "src/f32-vbinary/gen/vmax-psimd-x8.c",
546 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
547 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
548 "src/f32-vbinary/gen/vmin-psimd-x4.c",
549 "src/f32-vbinary/gen/vmin-psimd-x8.c",
550 "src/f32-vbinary/gen/vminc-psimd-x4.c",
551 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]552 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
553 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
554 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
555 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
556 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
557 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]558 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x4.c",
559 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]560 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
561 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]562 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
563 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
564 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
565 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]566 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
567 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
568 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
569 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]570 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
571 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]572 "src/f32-vunary/gen/vabs-psimd-x4.c",
573 "src/f32-vunary/gen/vabs-psimd-x8.c",
574 "src/f32-vunary/gen/vneg-psimd-x4.c",
575 "src/f32-vunary/gen/vneg-psimd-x8.c",
576 "src/f32-vunary/gen/vsqr-psimd-x4.c",
577 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]578 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]579 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]580 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]581 "src/x32-unpool/psimd.c",
582 "src/x32-zip/x2-psimd.c",
583 "src/x32-zip/x3-psimd.c",
584 "src/x32-zip/x4-psimd.c",
585 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]586 "src/requantization/precise-psimd.c",
587 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]588]
589
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]590PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]591 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
592 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
593 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
594 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
595 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
596 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
597 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
598 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
599 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
600 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
601 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
602 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]603 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
604 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
605 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
606 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
607 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
608 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]609 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
610 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
611 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
612 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
613 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
614 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
615 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
616 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]617 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]618 "src/math/roundd-psimd-addsub.c",
619 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]620 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]621 "src/math/sigmoid-psimd-p5-div.c",
622]
623
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]624# ISA-specific micro-kernels
625NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]626 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
627 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]628 "src/f32-clamp/gen/neon-x4.c",
629 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]630 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
631 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]632 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
633 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]634 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
635 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]636 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
637 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]638 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
639 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
640 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
641 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]642 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
643 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
644 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
645 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]646 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
647 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
648 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
649 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]650 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]651 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
652 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]653 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
654 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
655 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
656 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
657 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
658 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
659 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
660 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
661 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
662 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
663 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
664 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
665 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
666 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
667 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
668 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
669 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
670 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
671 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
672 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
673 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
674 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
675 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
676 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
677 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
678 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
679 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
680 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
681 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
682 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
683 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]684 "src/f32-hswish/gen/neon-x4.c",
685 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]686 "src/f32-ibilinear/gen/neon-c4.c",
687 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]688 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
689 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
690 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
691 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
692 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
693 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
694 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
695 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
696 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
697 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
698 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
699 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
700 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
701 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
702 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
703 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]704 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
705 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
706 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]707 "src/f32-ppmm/gen/4x8-minmax-neon.c",
708 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]709 "src/f32-prelu/gen/neon-2x4.c",
710 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]711 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
712 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
713 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
714 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
715 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
716 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
717 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
718 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
719 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
720 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
721 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
722 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
723 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
724 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
725 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
726 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
727 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
728 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
729 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
730 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
731 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
732 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
733 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
734 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]735 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]736 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]737 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
738 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
739 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
740 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
741 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
742 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
743 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
744 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
745 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
746 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
747 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
748 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
749 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
750 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
751 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
752 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
753 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
754 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]755 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
756 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
757 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
758 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]759 "src/f32-vbinary/gen/vmax-neon-x4.c",
760 "src/f32-vbinary/gen/vmax-neon-x8.c",
761 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
762 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
763 "src/f32-vbinary/gen/vmin-neon-x4.c",
764 "src/f32-vbinary/gen/vmin-neon-x8.c",
765 "src/f32-vbinary/gen/vminc-neon-x4.c",
766 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]767 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
768 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
769 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
770 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]771 "src/f32-vbinary/gen/vrsqrdiffc-neon-x4.c",
772 "src/f32-vbinary/gen/vrsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]773 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
774 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]775 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
776 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
777 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
778 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]779 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
780 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
781 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
782 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]783 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
784 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]785 "src/f32-vrnd/gen/vrndne-neon-x4.c",
786 "src/f32-vrnd/gen/vrndne-neon-x8.c",
787 "src/f32-vrnd/gen/vrndz-neon-x4.c",
788 "src/f32-vrnd/gen/vrndz-neon-x8.c",
789 "src/f32-vrnd/gen/vrndu-neon-x4.c",
790 "src/f32-vrnd/gen/vrndu-neon-x8.c",
791 "src/f32-vrnd/gen/vrndd-neon-x4.c",
792 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]793 "src/f32-vunary/gen/vabs-neon-x4.c",
794 "src/f32-vunary/gen/vabs-neon-x8.c",
795 "src/f32-vunary/gen/vneg-neon-x4.c",
796 "src/f32-vunary/gen/vneg-neon-x8.c",
797 "src/f32-vunary/gen/vsqr-neon-x4.c",
798 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]799 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
800 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]801 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]802 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
803 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]804 "src/q8-gemm/4x8-minmax-neon.c",
805 "src/q8-gemm/8x8-minmax-neon.c",
806 "src/q8-igemm/4x8-minmax-neon.c",
807 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]808 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]809 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]810 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]811 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]812 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]813 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]814 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]815 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]816 "src/x32-zip/x2-neon.c",
817 "src/x32-zip/x3-neon.c",
818 "src/x32-zip/x4-neon.c",
819 "src/x32-zip/xm-neon.c",
820 "src/x8-zip/x2-neon.c",
821 "src/x8-zip/x3-neon.c",
822 "src/x8-zip/x4-neon.c",
823 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]824 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]825 "src/math/roundd-neon-addsub.c",
826 "src/math/roundd-neon-cvt.c",
827 "src/math/roundu-neon-addsub.c",
828 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]829 "src/math/roundz-neon-addsub.c",
830 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]831 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]832 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
833 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
834 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
835 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
836 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
837 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]838 "src/requantization/precise-neon.c",
839 "src/requantization/fp32-neon.c",
840 "src/requantization/q31-neon.c",
841 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]842]
843
844NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]845 "src/f32-ibilinear/gen/neonfma-c4.c",
846 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]847 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
848 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
849 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
850 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
851 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
852 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
853 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
854 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
855 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]856 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
857 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
858 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
859 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]860 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
861 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
862 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
863 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]864 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
865 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
866 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
867 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]868 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
869 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
870 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
871 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
872 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
873 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
874 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
875 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
876 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
877 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
878 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
879 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
880 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
881 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
882 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
883 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
884 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
885 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]886 "src/f32-hswish/gen/neonfma-x4.c",
887 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]888 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
889 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]890 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
891 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
892 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
893 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
894 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
895 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
896 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
897 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
898 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
899 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
900 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
901 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
902 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
903 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
904 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
905 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
906 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
907 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
908 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
909 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
910 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
911 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
912 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
913 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]914 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
915 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
916 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
917 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
918 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
919 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
920 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
921 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
922 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
923 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
924 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
925 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
926 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
927 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
928 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
929 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
930 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
931 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
932 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
933 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
934 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
935 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
936 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
937 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
938 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
939 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
940 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
941 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
942 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
943 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
944 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
945 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
946 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
947 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
948 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
949 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
950 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
951 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
952 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
953 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
954 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
955 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
956 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
957 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
958 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
959 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
960 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
961 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
962 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
963 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
964 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
965 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
966 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
967 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]968 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
969 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]970 "src/math/exp-neonfma-lut64-p2.c",
971 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]972 "src/math/expminus-neonfma-lut2048-p1.c",
973 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]974 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]975 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
976 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
977 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
978 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
979 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
980 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
981 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
982 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
983 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
984 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
985 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
986 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
987 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
988 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
989 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
990 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
991 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
992 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]993]
994
995AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]996 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
997 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
998 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
999 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
1000 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
1001 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1002 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1003 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1004 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1005 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1006 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
1007 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1008 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
1009 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
1010 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
1011 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
1012 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
1013 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1014 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1015 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1016 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1017 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1018 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1019 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1020 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1021 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1022 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1023 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1024 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1025 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1026 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1027 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1028 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1029 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1030 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1031 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1032 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1033 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1034 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1035 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1036 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1037 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
1038 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
1039 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
1040 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
1041 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
1042 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
1043 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1044 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1045 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1046 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1047 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1048 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1049 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1050 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1051 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1052 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1053 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1054 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1055 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1056 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1057 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1058 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1059 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1060 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1061 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1062 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1063 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1064 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1065 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1066 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1067 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1068 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1069 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1070 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1071 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1072 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1073 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1074 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1075 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1076 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1077]
1078
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1079NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1080 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1081 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1082 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1083 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1084 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1085 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1086 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1087 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1088 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1089 "src/math/roundd-neonv8.c",
1090 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1091 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1092]
1093
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1094AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1095 "src/f16-clamp/gen/neonfp16arith-x16.c",
1096 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1097 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1098 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1099 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1100 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1101 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1102 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1103 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1104 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1105 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1106 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1107 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1108 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1109 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1110 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1111 "src/f16-hswish/gen/neonfp16arith-x16.c",
1112 "src/f16-hswish/gen/neonfp16arith-x8.c",
1113 "src/f16-prelu/gen/neonfp16arith-2x16.c",
1114 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1115 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
1116 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
1117 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1118 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1119 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1120 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1121 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
1122 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
1123 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
1124 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
1125 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1126 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1127 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
1128 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
1129 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1130 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1131 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1132 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1133 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1134 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1135 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1136 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1137 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1138 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1139 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1140 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1141 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1142 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1143 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1144 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1145 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1146 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1147 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1148 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1149 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1150 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1151 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1152 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1153 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1154 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1155 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1156 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1157 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1158 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1159 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1160 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1161 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1162 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1163 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1164 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1165 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1166 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1167 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1168 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1169 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1170 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1171 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1172 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1173 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1174 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1175 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1176 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1177]
1178
1179SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1180 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1181 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1182 "src/f32-clamp/gen/sse-x4.c",
1183 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1184 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1185 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1186 "src/f32-dwconv-chw/3x3p1-sse.c",
1187 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1188 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1189 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1190 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1191 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1192 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1193 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1194 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1195 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1196 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1197 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1198 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1199 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1200 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1201 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1202 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1203 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1204 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1205 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1206 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1207 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1208 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1209 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1210 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1211 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1212 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1213 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1214 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1215 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1216 "src/f32-hswish/gen/sse-x4.c",
1217 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1218 "src/f32-ibilinear/gen/sse-c4.c",
1219 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1220 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1221 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1222 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1223 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1224 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1225 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1226 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1227 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1228 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1229 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1230 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1231 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1232 "src/f32-spmm/gen/4x1-minmax-sse.c",
1233 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]1234 "src/f32-spmm/gen/16x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1235 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1236 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1237 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1238 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1239 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1240 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1241 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1242 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1243 "src/f32-vbinary/gen/vmax-sse-x4.c",
1244 "src/f32-vbinary/gen/vmax-sse-x8.c",
1245 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1246 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1247 "src/f32-vbinary/gen/vmin-sse-x4.c",
1248 "src/f32-vbinary/gen/vmin-sse-x8.c",
1249 "src/f32-vbinary/gen/vminc-sse-x4.c",
1250 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1251 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1252 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1253 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1254 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1255 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1256 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1257 "src/f32-vbinary/gen/vrsqrdiffc-sse-x4.c",
1258 "src/f32-vbinary/gen/vrsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1259 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1260 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1261 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1262 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1263 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1264 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1265 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1266 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1267 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1268 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1269 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1270 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1271 "src/f32-vunary/gen/vabs-sse-x4.c",
1272 "src/f32-vunary/gen/vabs-sse-x8.c",
1273 "src/f32-vunary/gen/vneg-sse-x4.c",
1274 "src/f32-vunary/gen/vneg-sse-x8.c",
1275 "src/f32-vunary/gen/vsqr-sse-x4.c",
1276 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1277 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1278 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1279 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1280 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1281 "src/math/roundd-sse-addsub.c",
1282 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1283 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1284]
1285
1286SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1287 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1288 "src/f32-argmaxpool/4x-sse2-c4.c",
1289 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1290 "src/f32-prelu/gen/sse2-2x4.c",
1291 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1292 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1293 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1294 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1295 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1296 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1297 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1298 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1299 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1300 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1301 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1302 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1303 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1304 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1305 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1306 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1307 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1308 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1309 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1310 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1311 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1312 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1313 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1314 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1315 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1316 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1317 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1318 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1319 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1320 "src/q8-igemm/4x4c2-minmax-sse2.c",
1321 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1322 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1323 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1324 "src/q8-gemm/2x4c8-minmax-sse2.c",
1325 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1326 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1327 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1328 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1329 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1330 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1331 "src/x32-zip/x2-sse2.c",
1332 "src/x32-zip/x3-sse2.c",
1333 "src/x32-zip/x4-sse2.c",
1334 "src/x32-zip/xm-sse2.c",
1335 "src/x8-zip/x2-sse2.c",
1336 "src/x8-zip/x3-sse2.c",
1337 "src/x8-zip/x4-sse2.c",
1338 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1339 "src/math/exp-sse2-p5.c",
1340 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1341 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1342 "src/math/roundd-sse2-cvt.c",
1343 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1344 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1345 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1346 "src/requantization/precise-sse2.c",
1347 "src/requantization/fp32-sse2.c",
1348 "src/requantization/q31-sse2.c",
1349 "src/requantization/gemmlowp-sse2.c",
1350]
1351
1352SSSE3_UKERNELS = [
1353 "src/requantization/precise-ssse3.c",
1354 "src/requantization/q31-ssse3.c",
1355 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1356]
1357
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1358SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1359 "src/f32-prelu/gen/sse41-2x4.c",
1360 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1361 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1362 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1363 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1364 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1365 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1366 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1367 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1368 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1369 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1370 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1371 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1372 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1373 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1374 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1375 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1376 "src/math/roundd-sse41.c",
1377 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1378 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1379 "src/requantization/precise-sse4.c",
1380 "src/requantization/q31-sse4.c",
1381 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1382]
1383
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1384AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1385 "src/f32-clamp/gen/avx-x8.c",
1386 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1387 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1388 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1389 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1390 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1391 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1392 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1393 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1394 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1395 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1396 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1397 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1398 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1399 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1400 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1401 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1402 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1403 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1404 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1405 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1406 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1407 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1408 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1409 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1410 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1411 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1412 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1413 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1414 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1415 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1416 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1417 "src/f32-hswish/gen/avx-x8.c",
1418 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1419 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1420 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1421 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1422 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1423 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1424 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1425 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1426 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1427 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1428 "src/f32-prelu/gen/avx-2x8.c",
1429 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1430 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1431 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1432 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1433 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1434 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1435 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1436 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1437 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1438 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1439 "src/f32-vbinary/gen/vmax-avx-x8.c",
1440 "src/f32-vbinary/gen/vmax-avx-x16.c",
1441 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1442 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1443 "src/f32-vbinary/gen/vmin-avx-x8.c",
1444 "src/f32-vbinary/gen/vmin-avx-x16.c",
1445 "src/f32-vbinary/gen/vminc-avx-x8.c",
1446 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1447 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1448 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1449 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1450 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1451 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1452 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1453 "src/f32-vbinary/gen/vrsqrdiffc-avx-x8.c",
1454 "src/f32-vbinary/gen/vrsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1455 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1456 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1457 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1458 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1459 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
1460 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1461 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1462 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1463 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1464 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1465 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1466 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1467 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1468 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1469 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1470 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1471 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1472 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1473 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1474 "src/f32-vunary/gen/vabs-avx-x8.c",
1475 "src/f32-vunary/gen/vabs-avx-x16.c",
1476 "src/f32-vunary/gen/vneg-avx-x8.c",
1477 "src/f32-vunary/gen/vneg-avx-x16.c",
1478 "src/f32-vunary/gen/vsqr-avx-x8.c",
1479 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1480]
1481
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1482FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1483 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
1484 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
1485 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
1486 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
1487 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
1488 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
1489 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
1490 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
1491 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
1492 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
1493 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
1494 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
1495 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1496 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1497 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
1498 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
1499 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
1500 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
1501 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
1502 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
1503 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
1504 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
1505 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
1506 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
1507 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
1508 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
1509 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
1510 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
1511 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
1512 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
1513 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
1514 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1515 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1516 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1517 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1518 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1519 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1520 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1521 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
1522 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1523 "src/f32-hswish/gen/fma3-x8.c",
1524 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1525 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1526 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1527 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1528 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1529 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1530 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
1531 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
1532 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1533 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1534 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1535 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1536 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1537 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1538 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1539]
1540
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1541AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1542 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
1543 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
1544 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
1545 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
1546 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
1547 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
1548 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
1549 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
1550 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
1551 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
1552 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
1553 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
1554 "src/f32-raddextexp/gen/avx2-p5-x64.c",
1555 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
1556 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
1557 "src/f32-raddextexp/gen/avx2-p5-x72.c",
1558 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
1559 "src/f32-raddextexp/gen/avx2-p5-x80.c",
1560 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
1561 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
1562 "src/f32-raddextexp/gen/avx2-p5-x96.c",
1563 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
1564 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
1565 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
1566 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
1567 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1568 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1569 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1570 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1571 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1572 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1573 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1574 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1575 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1576 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1577 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1578 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1579 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1580 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1581 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1582 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1583 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1584 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1585 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1586 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1587 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1588 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1589 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1590 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1591 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1592 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1593 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1594 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1595 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1596 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1597 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1598 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1599 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1600 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1601 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1602 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1603 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1604 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1605 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1606 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1607 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1608 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1609 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1610 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1611 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1612 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1613 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1614 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1615 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1616 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1617 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1618 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1619 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1620 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1621 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1622 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1623 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1624 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1625 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1626 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1627 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1628 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1629 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1630 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1631 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1632 "src/math/exp-avx2-p5.c",
1633 "src/math/exp-avx2-perm-p3.c",
1634 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1635 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1636 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1637 "src/math/sigmoid-avx2-rr2-p5-div.c",
1638 "src/math/sigmoid-avx2-rr1-p5-div.c",
1639 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1640 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1641 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1642 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1643]
1644
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1645AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1646 "src/f32-clamp/gen/avx512f-x16.c",
1647 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1648 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1649 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1650 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1651 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1652 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1653 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1654 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1655 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1656 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1657 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1658 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1659 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1660 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1661 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1662 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1663 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1664 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1665 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1666 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1667 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1668 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1669 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1670 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1671 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1672 "src/f32-hswish/gen/avx512f-x16.c",
1673 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1674 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1675 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1676 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1677 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1678 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1679 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1680 "src/f32-prelu/gen/avx512f-2x16.c",
1681 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1682 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1683 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1684 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1685 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1686 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1687 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1688 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1689 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1690 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1691 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1692 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1693 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1694 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1695 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1696 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1697 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1698 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1699 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1700 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1701 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1702 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1703 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1704 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1705 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1706 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1707 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1708 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1709 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1710 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1711 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1712 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1713 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1714 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1715 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1716 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1717 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1718 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1719 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1720 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1721 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1722 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1723 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1724 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1725 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1726 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1727 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1728 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1729 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1730 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1731 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1732 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1733 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1734 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1735 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1736 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1737 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1738 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1739 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1740 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1741 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x16.c",
1742 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1743 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1744 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1745 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
1746 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
1747 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
1748 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1749 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1750 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1751 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1752 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1753 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1754 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1755 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1756 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1757 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1758 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
1759 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
1760 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
1761 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
1762 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
1763 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
1764 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
1765 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
1766 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
1767 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
1768 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
1769 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
1770 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
1771 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
1772 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
1773 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
1774 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
1775 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
1776 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
1777 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1778 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
1779 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
1780 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
1781 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
1782 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
1783 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
1784 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
1785 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1786 "src/f32-vunary/gen/vabs-avx512f-x16.c",
1787 "src/f32-vunary/gen/vabs-avx512f-x32.c",
1788 "src/f32-vunary/gen/vneg-avx512f-x16.c",
1789 "src/f32-vunary/gen/vneg-avx512f-x32.c",
1790 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
1791 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1792 "src/math/exp-avx512f-p5-scalef.c",
1793 "src/math/exp-avx512f-p5.c",
1794 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]1795 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1796 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1797]
1798
1799AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]1800 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]1801 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1802 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1803 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
1804 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1805 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1806 "src/f32-gemm/4x8-minmax-aarch32-neon-ld64.S",
1807 "src/f32-igemm/4x8-minmax-aarch32-neon-ld64.S",
1808 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1809 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1810 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1811 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1812]
1813
1814AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1815 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1816 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
1817 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1818 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1819 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
1820 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1821 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
1822 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
1823 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1824 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1825 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1826 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1827 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1828 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1829 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
1830 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1831 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1832 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1833 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
1834 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
1835 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
1836 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
1837 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
1838 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
1839 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
1840 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
1841 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
1842 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
1843 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
1844 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
1845 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
1846 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
1847 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
1848 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
1849 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
1850 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ios.S",
1851 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
1852 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1853 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1854 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
1855 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1856 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1857 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1858 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
1859 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1860 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
1861 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1862 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1863 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
1864 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
1865 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1866 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1867 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1868 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
1869 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
1870 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1871 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1872 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ios.S",
1873 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
1874 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
1875 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1876 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
1877 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
1878 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
1879 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
1880 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
1881 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
1882 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
1883 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
1884 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
1885 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
1886 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
1887 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
1888 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
1889 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
1890 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
1891 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ios.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1892]
1893
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1894INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1895 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1896 "src/xnnpack/argmaxpool.h",
1897 "src/xnnpack/avgpool.h",
1898 "src/xnnpack/clamp.h",
1899 "src/xnnpack/common.h",
1900 "src/xnnpack/conv.h",
1901 "src/xnnpack/dwconv.h",
1902 "src/xnnpack/gavgpool.h",
1903 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1904 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1905 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1906 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1907 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]1908 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1909 "src/xnnpack/lut.h",
1910 "src/xnnpack/math.h",
1911 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]1912 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1913 "src/xnnpack/packx.h",
1914 "src/xnnpack/pad.h",
1915 "src/xnnpack/params.h",
1916 "src/xnnpack/pavgpool.h",
1917 "src/xnnpack/ppmm.h",
1918 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1919 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]1920 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1921 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1922 "src/xnnpack/rmax.h",
1923 "src/xnnpack/scalar-utils.h",
1924 "src/xnnpack/spmm.h",
1925 "src/xnnpack/unpool.h",
1926 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]1927 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1928 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1929 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1930 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]1931 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]1932 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1933 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1934]
1935
1936INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1937 "include/xnnpack.h",
1938 "src/xnnpack/allocator.h",
1939 "src/xnnpack/compute.h",
1940 "src/xnnpack/im2col.h",
1941 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1942 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]1943 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1944 "src/xnnpack/operator.h",
1945 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1946 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1947 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1948 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]1949 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1950]
1951
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1952ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1953 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1954]
1955
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1956MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1957 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1958 "include/xnnpack.h",
1959]
1960
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1961MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1962 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1963 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1964 "src/xnnpack/requantization.h",
1965 "include/xnnpack.h",
1966]
1967
1968OPERATOR_TEST_PARAMS_HDRS = [
1969 "src/xnnpack/params.h",
1970 "src/xnnpack/common.h",
1971]
1972
1973WEIGHTS_PACK_HDRS = [
1974 "src/xnnpack/pack.h",
1975 "src/xnnpack/operator.h",
1976 "src/xnnpack/compute.h",
1977]
1978
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]1979LOGGING_COPTS = select({
1980 # No logging in optimized mode
1981 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
1982 # Full logging in debug mode
1983 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
1984 # Error-only logging in default (fastbuild) mode
1985 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
1986})
1987
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]1988LOGGING_SRCS = select({
1989 # No logging in optimized mode
1990 ":optimized_build": [],
1991 "//conditions:default": [
1992 "src/operator-strings.c",
1993 "src/subgraph-strings.c",
1994 ],
1995})
1996
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]1997LOGGING_HDRS = [
1998 "src/xnnpack/log.h",
1999]
2000
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2001xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2002 name = "tables",
2003 srcs = TABLE_SRCS,
2004 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2005 gcc_copts = xnnpack_gcc_std_copts(),
2006 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2007)
2008
2009xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2010 name = "scalar_ukernels",
2011 srcs = SCALAR_UKERNELS,
2012 hdrs = INTERNAL_HDRS,
2013 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2014 gcc_copts = xnnpack_gcc_std_copts(),
2015 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2016 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2017 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2018 "@FP16",
2019 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2020 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2021 ],
2022)
2023
2024xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2025 name = "scalar_ukernels_test_mode",
2026 srcs = SCALAR_UKERNELS,
2027 hdrs = INTERNAL_HDRS,
2028 aarch32_copts = ["-marm"],
2029 copts = [
2030 "-UNDEBUG",
2031 "-DXNN_TEST_MODE=1",
2032 ],
2033 gcc_copts = xnnpack_gcc_std_copts(),
2034 msvc_copts = xnnpack_msvc_std_copts(),
2035 deps = [
2036 ":tables",
2037 "@FP16",
2038 "@FXdiv",
2039 "@pthreadpool",
2040 ],
2041)
2042
2043xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2044 name = "wasm_ukernels",
2045 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2046 gcc_copts = xnnpack_gcc_std_copts(),
2047 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2048 wasm_srcs = WASM_UKERNELS,
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2049 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2050 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2051 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2052 "@FP16",
2053 "@FXdiv",
2054 "@pthreadpool",
2055 ],
2056)
2057
2058xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2059 name = "wasm_ukernels_test_mode",
2060 hdrs = INTERNAL_HDRS,
2061 copts = [
2062 "-UNDEBUG",
2063 "-DXNN_TEST_MODE=1",
2064 ],
2065 gcc_copts = xnnpack_gcc_std_copts(),
2066 msvc_copts = xnnpack_msvc_std_copts(),
2067 wasm_srcs = WASM_UKERNELS,
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2068 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2069 deps = [
2070 ":tables",
2071 "@FP16",
2072 "@FXdiv",
2073 "@pthreadpool",
2074 ],
2075)
2076
2077xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2078 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2079 hdrs = INTERNAL_HDRS,
2080 aarch32_copts = [
2081 "-marm",
2082 "-mfpu=neon",
2083 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2084 gcc_copts = xnnpack_gcc_std_copts(),
2085 gcc_x86_copts = ["-msse2"],
2086 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2087 optimized_copts = [
2088 "-O3",
2089 "-ffast-math",
2090 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2091 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2092 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2093 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2094 "@FP16",
2095 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2096 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2097 ],
2098)
2099
2100xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2101 name = "psimd_fastmath_ukernels_test_mode",
2102 hdrs = INTERNAL_HDRS,
2103 aarch32_copts = [
2104 "-marm",
2105 "-mfpu=neon",
2106 ],
2107 copts = [
2108 "-UNDEBUG",
2109 "-DXNN_TEST_MODE=1",
2110 ],
2111 gcc_copts = xnnpack_gcc_std_copts(),
2112 gcc_x86_copts = ["-msse2"],
2113 msvc_copts = xnnpack_msvc_std_copts(),
2114 optimized_copts = [
2115 "-O3",
2116 "-ffast-math",
2117 ],
2118 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2119 deps = [
2120 ":tables",
2121 "@FP16",
2122 "@psimd",
2123 "@pthreadpool",
2124 ],
2125)
2126
2127xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2128 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2129 hdrs = INTERNAL_HDRS,
2130 aarch32_copts = [
2131 "-marm",
2132 "-mfpu=neon",
2133 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2134 gcc_copts = xnnpack_gcc_std_copts(),
2135 gcc_x86_copts = ["-msse2"],
2136 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2137 optimized_copts = [
2138 "-O3",
2139 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2140 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2141 deps = [
2142 ":tables",
2143 "@FP16",
2144 "@psimd",
2145 "@pthreadpool",
2146 ],
2147)
2148
2149xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2150 name = "psimd_accmath_ukernels_test_mode",
2151 hdrs = INTERNAL_HDRS,
2152 aarch32_copts = [
2153 "-marm",
2154 "-mfpu=neon",
2155 ],
2156 copts = [
2157 "-UNDEBUG",
2158 "-DXNN_TEST_MODE=1",
2159 ],
2160 gcc_copts = xnnpack_gcc_std_copts(),
2161 gcc_x86_copts = ["-msse2"],
2162 msvc_copts = xnnpack_msvc_std_copts(),
2163 optimized_copts = [
2164 "-O3",
2165 ],
2166 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2167 deps = [
2168 ":tables",
2169 "@FP16",
2170 "@psimd",
2171 "@pthreadpool",
2172 ],
2173)
2174
2175xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2176 name = "neon_ukernels",
2177 hdrs = INTERNAL_HDRS,
2178 aarch32_copts = [
2179 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2180 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2181 "-mfpu=neon",
2182 ],
2183 aarch32_srcs = NEON_UKERNELS,
2184 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2185 gcc_copts = xnnpack_gcc_std_copts(),
2186 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2187 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2188 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2189 "@FP16",
2190 "@pthreadpool",
2191 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2192)
2193
2194xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2195 name = "neon_ukernels_test_mode",
2196 hdrs = INTERNAL_HDRS,
2197 aarch32_copts = [
2198 "-marm",
2199 "-march=armv7-a",
2200 "-mfpu=neon",
2201 ],
2202 aarch32_srcs = NEON_UKERNELS,
2203 aarch64_srcs = NEON_UKERNELS,
2204 copts = [
2205 "-UNDEBUG",
2206 "-DXNN_TEST_MODE=1",
2207 ],
2208 gcc_copts = xnnpack_gcc_std_copts(),
2209 msvc_copts = xnnpack_msvc_std_copts(),
2210 deps = [
2211 ":tables",
2212 "@FP16",
2213 "@pthreadpool",
2214 ],
2215)
2216
2217xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2218 name = "neonfma_ukernels",
2219 hdrs = INTERNAL_HDRS,
2220 aarch32_copts = [
2221 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2222 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2223 "-mfpu=neon-vfpv4",
2224 ],
2225 aarch32_srcs = NEONFMA_UKERNELS,
2226 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2227 apple_aarch32_copts = [
2228 "-mcpu=swift",
2229 "-mtune=generic",
2230 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2231 gcc_copts = xnnpack_gcc_std_copts(),
2232 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2233 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2234 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2235 "@FP16",
2236 "@pthreadpool",
2237 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2238)
2239
2240xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2241 name = "neonfma_ukernels_test_mode",
2242 hdrs = INTERNAL_HDRS,
2243 aarch32_copts = [
2244 "-marm",
2245 "-march=armv7-a",
2246 "-mfpu=neon-vfpv4",
2247 ],
2248 aarch32_srcs = NEONFMA_UKERNELS,
2249 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2250 apple_aarch32_copts = [
2251 "-mcpu=swift",
2252 "-mtune=generic",
2253 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2254 copts = [
2255 "-UNDEBUG",
2256 "-DXNN_TEST_MODE=1",
2257 ],
2258 gcc_copts = xnnpack_gcc_std_copts(),
2259 msvc_copts = xnnpack_msvc_std_copts(),
2260 deps = [
2261 ":tables",
2262 "@FP16",
2263 "@pthreadpool",
2264 ],
2265)
2266
2267xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2268 name = "neonv8_ukernels",
2269 hdrs = INTERNAL_HDRS,
2270 aarch32_copts = [
2271 "-marm",
2272 "-march=armv8-a",
2273 "-mfpu=neon-fp-armv8",
2274 ],
2275 aarch32_srcs = NEONV8_UKERNELS,
2276 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2277 apple_aarch32_copts = [
2278 "-mcpu=cyclone",
2279 "-mtune=generic",
2280 ],
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2281 gcc_copts = xnnpack_gcc_std_copts(),
2282 msvc_copts = xnnpack_msvc_std_copts(),
2283 deps = [
2284 ":tables",
2285 "@FP16",
2286 "@pthreadpool",
2287 ],
2288)
2289
2290xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2291 name = "neonv8_ukernels_test_mode",
2292 hdrs = INTERNAL_HDRS,
2293 aarch32_copts = [
2294 "-marm",
2295 "-march=armv8-a",
2296 "-mfpu=neon-fp-armv8",
2297 ],
2298 aarch32_srcs = NEONV8_UKERNELS,
2299 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2300 apple_aarch32_copts = [
2301 "-mcpu=cyclone",
2302 "-mtune=generic",
2303 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2304 copts = [
2305 "-UNDEBUG",
2306 "-DXNN_TEST_MODE=1",
2307 ],
2308 gcc_copts = xnnpack_gcc_std_copts(),
2309 msvc_copts = xnnpack_msvc_std_copts(),
2310 deps = [
2311 ":tables",
2312 "@FP16",
2313 "@pthreadpool",
2314 ],
2315)
2316
2317xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2318 name = "neonfp16arith_ukernels",
2319 hdrs = INTERNAL_HDRS,
2320 aarch64_copts = ["-march=armv8.2-a+fp16"],
2321 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2322 gcc_copts = xnnpack_gcc_std_copts(),
2323 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2324 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2325 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2326 "@FP16",
2327 "@pthreadpool",
2328 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2329)
2330
2331xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2332 name = "neonfp16arith_ukernels_test_mode",
2333 hdrs = INTERNAL_HDRS,
2334 aarch64_copts = ["-march=armv8.2-a+fp16"],
2335 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2336 copts = [
2337 "-UNDEBUG",
2338 "-DXNN_TEST_MODE=1",
2339 ],
2340 gcc_copts = xnnpack_gcc_std_copts(),
2341 msvc_copts = xnnpack_msvc_std_copts(),
2342 deps = [
2343 ":tables",
2344 "@FP16",
2345 "@pthreadpool",
2346 ],
2347)
2348
2349xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2350 name = "sse2_ukernels",
2351 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2352 gcc_copts = xnnpack_gcc_std_copts(),
2353 gcc_x86_copts = ["-msse2"],
2354 msvc_copts = xnnpack_msvc_std_copts(),
2355 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2356 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2357 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2358 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2359 "@FP16",
2360 "@pthreadpool",
2361 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2362)
2363
2364xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2365 name = "sse2_ukernels_test_mode",
2366 hdrs = INTERNAL_HDRS,
2367 copts = [
2368 "-UNDEBUG",
2369 "-DXNN_TEST_MODE=1",
2370 ],
2371 gcc_copts = xnnpack_gcc_std_copts(),
2372 gcc_x86_copts = ["-msse2"],
2373 msvc_copts = xnnpack_msvc_std_copts(),
2374 msvc_x86_32_copts = ["/arch:SSE2"],
2375 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2376 deps = [
2377 ":tables",
2378 "@FP16",
2379 "@pthreadpool",
2380 ],
2381)
2382
2383xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2384 name = "ssse3_ukernels",
2385 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2386 gcc_copts = xnnpack_gcc_std_copts(),
2387 gcc_x86_copts = ["-mssse3"],
2388 msvc_copts = xnnpack_msvc_std_copts(),
2389 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2390 x86_srcs = SSSE3_UKERNELS,
2391 deps = [
2392 ":tables",
2393 "@FP16",
2394 "@pthreadpool",
2395 ],
2396)
2397
2398xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2399 name = "ssse3_ukernels_test_mode",
2400 hdrs = INTERNAL_HDRS,
2401 copts = [
2402 "-UNDEBUG",
2403 "-DXNN_TEST_MODE=1",
2404 ],
2405 gcc_copts = xnnpack_gcc_std_copts(),
2406 gcc_x86_copts = ["-mssse3"],
2407 msvc_copts = xnnpack_msvc_std_copts(),
2408 msvc_x86_32_copts = ["/arch:SSE2"],
2409 x86_srcs = SSSE3_UKERNELS,
2410 deps = [
2411 ":tables",
2412 "@FP16",
2413 "@pthreadpool",
2414 ],
2415)
2416
2417xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2418 name = "sse41_ukernels",
2419 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2420 gcc_copts = xnnpack_gcc_std_copts(),
2421 gcc_x86_copts = ["-msse4.1"],
2422 msvc_copts = xnnpack_msvc_std_copts(),
2423 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2424 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2425 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2426 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2427 "@FP16",
2428 "@pthreadpool",
2429 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2430)
2431
2432xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2433 name = "sse41_ukernels_test_mode",
2434 hdrs = INTERNAL_HDRS,
2435 copts = [
2436 "-UNDEBUG",
2437 "-DXNN_TEST_MODE=1",
2438 ],
2439 gcc_copts = xnnpack_gcc_std_copts(),
2440 gcc_x86_copts = ["-msse4.1"],
2441 msvc_copts = xnnpack_msvc_std_copts(),
2442 msvc_x86_32_copts = ["/arch:SSE2"],
2443 x86_srcs = SSE41_UKERNELS,
2444 deps = [
2445 ":tables",
2446 "@FP16",
2447 "@pthreadpool",
2448 ],
2449)
2450
2451xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2452 name = "avx_ukernels",
2453 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2454 gcc_copts = xnnpack_gcc_std_copts(),
2455 gcc_x86_copts = ["-mavx"],
2456 msvc_copts = xnnpack_msvc_std_copts(),
2457 msvc_x86_32_copts = ["/arch:AVX"],
2458 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2459 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2460 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2461 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2462 "@FP16",
2463 "@pthreadpool",
2464 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2465)
2466
2467xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2468 name = "avx_ukernels_test_mode",
2469 hdrs = INTERNAL_HDRS,
2470 copts = [
2471 "-UNDEBUG",
2472 "-DXNN_TEST_MODE=1",
2473 ],
2474 gcc_copts = xnnpack_gcc_std_copts(),
2475 gcc_x86_copts = ["-mavx"],
2476 msvc_copts = xnnpack_msvc_std_copts(),
2477 msvc_x86_32_copts = ["/arch:AVX"],
2478 msvc_x86_64_copts = ["/arch:AVX"],
2479 x86_srcs = AVX_UKERNELS,
2480 deps = [
2481 ":tables",
2482 "@FP16",
2483 "@pthreadpool",
2484 ],
2485)
2486
2487xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2488 name = "fma3_ukernels",
2489 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2490 gcc_copts = xnnpack_gcc_std_copts(),
2491 gcc_x86_copts = ["-mfma"],
2492 msvc_copts = xnnpack_msvc_std_copts(),
2493 msvc_x86_32_copts = ["/arch:AVX"],
2494 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2495 x86_srcs = FMA3_UKERNELS,
2496 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2497 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2498 "@FP16",
2499 "@pthreadpool",
2500 ],
2501)
2502
2503xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2504 name = "fma3_ukernels_test_mode",
2505 hdrs = INTERNAL_HDRS,
2506 copts = [
2507 "-UNDEBUG",
2508 "-DXNN_TEST_MODE=1",
2509 ],
2510 gcc_copts = xnnpack_gcc_std_copts(),
2511 gcc_x86_copts = ["-mfma"],
2512 msvc_copts = xnnpack_msvc_std_copts(),
2513 msvc_x86_32_copts = ["/arch:AVX"],
2514 msvc_x86_64_copts = ["/arch:AVX"],
2515 x86_srcs = FMA3_UKERNELS,
2516 deps = [
2517 ":tables",
2518 "@FP16",
2519 "@pthreadpool",
2520 ],
2521)
2522
2523xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2524 name = "avx2_ukernels",
2525 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2526 gcc_copts = xnnpack_gcc_std_copts(),
2527 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2528 "-mfma",
2529 "-mavx2",
2530 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2531 msvc_copts = xnnpack_msvc_std_copts(),
2532 msvc_x86_32_copts = ["/arch:AVX2"],
2533 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2534 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2535 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2536 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2537 "@FP16",
2538 "@pthreadpool",
2539 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2540)
2541
2542xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2543 name = "avx2_ukernels_test_mode",
2544 hdrs = INTERNAL_HDRS,
2545 copts = [
2546 "-UNDEBUG",
2547 "-DXNN_TEST_MODE=1",
2548 ],
2549 gcc_copts = xnnpack_gcc_std_copts(),
2550 gcc_x86_copts = [
2551 "-mfma",
2552 "-mavx2",
2553 ],
2554 msvc_copts = xnnpack_msvc_std_copts(),
2555 msvc_x86_32_copts = ["/arch:AVX2"],
2556 msvc_x86_64_copts = ["/arch:AVX2"],
2557 x86_srcs = AVX2_UKERNELS,
2558 deps = [
2559 ":tables",
2560 "@FP16",
2561 "@pthreadpool",
2562 ],
2563)
2564
2565xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2566 name = "avx512f_ukernels",
2567 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2568 gcc_copts = xnnpack_gcc_std_copts(),
2569 gcc_x86_copts = ["-mavx512f"],
2570 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2571 msvc_copts = xnnpack_msvc_std_copts(),
2572 msvc_x86_32_copts = ["/arch:AVX512"],
2573 msvc_x86_64_copts = ["/arch:AVX512"],
2574 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2575 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2576 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2577 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2578 "@FP16",
2579 "@pthreadpool",
2580 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2581)
2582
2583xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2584 name = "avx512f_ukernels_test_mode",
2585 hdrs = INTERNAL_HDRS,
2586 copts = [
2587 "-UNDEBUG",
2588 "-DXNN_TEST_MODE=1",
2589 ],
2590 gcc_copts = xnnpack_gcc_std_copts(),
2591 gcc_x86_copts = ["-mavx512f"],
2592 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2593 msvc_copts = xnnpack_msvc_std_copts(),
2594 msvc_x86_32_copts = ["/arch:AVX512"],
2595 msvc_x86_64_copts = ["/arch:AVX512"],
2596 msys_copts = ["-fno-asynchronous-unwind-tables"],
2597 x86_srcs = AVX512F_UKERNELS,
2598 deps = [
2599 ":tables",
2600 "@FP16",
2601 "@pthreadpool",
2602 ],
2603)
2604
2605xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2606 name = "asm_ukernels",
2607 hdrs = ["src/xnnpack/assembly.h"],
2608 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2609 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2610 aarch64_srcs = AARCH64_ASM_UKERNELS,
2611)
2612
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2613xnnpack_cc_library(
2614 name = "logging_utils",
2615 srcs = LOGGING_SRCS,
2616 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2617 copts = LOGGING_COPTS + [
2618 "-Isrc",
2619 "-Iinclude",
2620 ] + select({
2621 ":debug_build": [],
2622 "//conditions:default": xnnpack_min_size_copts(),
2623 }),
2624 gcc_copts = xnnpack_gcc_std_copts(),
2625 msvc_copts = xnnpack_msvc_std_copts(),
2626 visibility = xnnpack_visibility(),
2627 deps = [
2628 "@FP16",
2629 "@clog",
2630 "@pthreadpool",
2631 ],
2632)
2633
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2634xnnpack_aggregate_library(
2635 name = "ukernels",
2636 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2637 ":neon_ukernels",
2638 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2639 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2640 ":asm_ukernels",
2641 ],
2642 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2643 ":neon_ukernels",
2644 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2645 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2646 ":neonfp16arith_ukernels",
2647 ":asm_ukernels",
2648 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2649 generic_deps = [
2650 ":scalar_ukernels",
2651 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2652 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2653 ":psimd_fastmath_ukernels",
2654 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2655 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2656 wasm_deps = [
2657 ":wasm_ukernels",
2658 ],
2659 wasmsimd_deps = [
2660 ":wasm_ukernels",
2661 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2662 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2663 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2664 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2665 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2666 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2667 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2668 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2669 ":avx512f_ukernels",
2670 ],
2671)
2672
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2673xnnpack_aggregate_library(
2674 name = "ukernels_test_mode",
2675 aarch32_deps = [
2676 ":neon_ukernels_test_mode",
2677 ":neonfma_ukernels_test_mode",
2678 ":neonv8_ukernels_test_mode",
2679 ":asm_ukernels",
2680 ],
2681 aarch64_deps = [
2682 ":neon_ukernels_test_mode",
2683 ":neonfma_ukernels_test_mode",
2684 ":neonv8_ukernels_test_mode",
2685 ":neonfp16arith_ukernels_test_mode",
2686 ":asm_ukernels",
2687 ],
2688 generic_deps = [
2689 ":scalar_ukernels_test_mode",
2690 ],
2691 psimd_deps = [
2692 ":psimd_fastmath_ukernels_test_mode",
2693 ":psimd_accmath_ukernels_test_mode",
2694 ],
2695 wasm_deps = [
2696 ":wasm_ukernels_test_mode",
2697 ],
2698 wasmsimd_deps = [
2699 ":wasm_ukernels_test_mode",
2700 ],
2701 x86_deps = [
2702 ":sse2_ukernels_test_mode",
2703 ":ssse3_ukernels_test_mode",
2704 ":sse41_ukernels_test_mode",
2705 ":avx_ukernels_test_mode",
2706 ":fma3_ukernels_test_mode",
2707 ":avx2_ukernels_test_mode",
2708 ":avx512f_ukernels_test_mode",
2709 ],
2710)
2711
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2712xnnpack_cc_library(
2713 name = "im2col",
2714 srcs = ["src/im2col.c"],
2715 hdrs = [
2716 "src/xnnpack/common.h",
2717 "src/xnnpack/im2col.h",
2718 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2719 gcc_copts = xnnpack_gcc_std_copts(),
2720 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2721)
2722
2723xnnpack_cc_library(
2724 name = "indirection",
2725 srcs = ["src/indirection.c"],
2726 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2727 gcc_copts = xnnpack_gcc_std_copts(),
2728 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2729 deps = [
2730 "@FP16",
2731 "@FXdiv",
2732 "@pthreadpool",
2733 ],
2734)
2735
2736xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2737 name = "indirection_test_mode",
2738 srcs = ["src/indirection.c"],
2739 hdrs = INTERNAL_HDRS,
2740 copts = [
2741 "-UNDEBUG",
2742 "-DXNN_TEST_MODE=1",
2743 ],
2744 gcc_copts = xnnpack_gcc_std_copts(),
2745 msvc_copts = xnnpack_msvc_std_copts(),
2746 deps = [
2747 "@FP16",
2748 "@FXdiv",
2749 "@pthreadpool",
2750 ],
2751)
2752
2753xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2754 name = "operator_run",
2755 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2756 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2757 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2758 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2759 "//conditions:default": [],
2760 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2761 gcc_copts = xnnpack_gcc_std_copts(),
2762 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2763 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2764 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2765 "@FP16",
2766 "@FXdiv",
2767 "@clog",
2768 "@pthreadpool",
2769 ],
2770)
2771
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2772xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2773 name = "operator_run_test_mode",
2774 srcs = ["src/operator-run.c"],
2775 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2776 copts = LOGGING_COPTS + [
2777 "-UNDEBUG",
2778 "-DXNN_TEST_MODE=1",
2779 ] + select({
2780 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2781 "//conditions:default": [],
2782 }),
2783 gcc_copts = xnnpack_gcc_std_copts(),
2784 msvc_copts = xnnpack_msvc_std_copts(),
2785 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2786 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2787 "@FP16",
2788 "@FXdiv",
2789 "@clog",
2790 "@pthreadpool",
2791 ],
2792)
2793
2794xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2795 name = "memory_planner",
2796 srcs = ["src/memory-planner.c"],
2797 hdrs = INTERNAL_HDRS,
2798 defines = select({
2799 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
2800 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
2801 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
2802 }),
2803 gcc_copts = xnnpack_gcc_std_copts(),
2804 msvc_copts = xnnpack_msvc_std_copts(),
2805 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2806 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2807 "@pthreadpool",
2808 ],
2809)
2810
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2811xnnpack_cc_library(
2812 name = "memory_planner_test_mode",
2813 srcs = ["src/memory-planner.c"],
2814 hdrs = INTERNAL_HDRS,
2815 copts = [
2816 "-UNDEBUG",
2817 "-DXNN_TEST_MODE=1",
2818 ],
2819 defines = select({
2820 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
2821 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
2822 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
2823 }),
2824 gcc_copts = xnnpack_gcc_std_copts(),
2825 msvc_copts = xnnpack_msvc_std_copts(),
2826 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2827 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2828 "@pthreadpool",
2829 ],
2830)
2831
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2832cc_library(
2833 name = "enable_assembly",
2834 defines = select({
2835 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
2836 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]2837 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2838 }),
2839)
2840
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]2841xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2842 name = "operators",
2843 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2844 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2845 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]2846 ],
2847 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2848 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2849 "-Isrc",
2850 "-Iinclude",
2851 ] + select({
2852 ":debug_build": [],
2853 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2854 }) + select({
2855 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2856 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2857 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2858 gcc_copts = xnnpack_gcc_std_copts(),
2859 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2860 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2861 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2862 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2863 "@FP16",
2864 "@FXdiv",
2865 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2866 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2867 ],
2868)
2869
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2870xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2871 name = "operators_test_mode",
2872 srcs = OPERATOR_SRCS + [
2873 "src/memory.c",
2874 "src/operator-delete.c",
2875 ],
2876 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2877 copts = LOGGING_COPTS + [
2878 "-Isrc",
2879 "-Iinclude",
2880 "-UNDEBUG",
2881 "-DXNN_TEST_MODE=1",
2882 ] + select({
2883 ":debug_build": [],
2884 "//conditions:default": xnnpack_min_size_copts(),
2885 }) + select({
2886 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2887 "//conditions:default": [],
2888 }),
2889 gcc_copts = xnnpack_gcc_std_copts(),
2890 msvc_copts = xnnpack_msvc_std_copts(),
2891 deps = [
2892 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2893 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2894 "@FP16",
2895 "@FXdiv",
2896 "@clog",
2897 "@pthreadpool",
2898 ],
2899)
2900
2901xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2902 name = "XNNPACK",
2903 srcs = [
2904 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]2905 "src/runtime.c",
2906 "src/subgraph.c",
2907 "src/tensor.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2908 ] + SUBGRAPH_SRCS + LOGGING_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2909 hdrs = ["include/xnnpack.h"],
2910 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2911 "-Isrc",
2912 "-Iinclude",
2913 ] + select({
2914 ":debug_build": [],
2915 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2916 }) + select({
2917 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2918 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2919 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2920 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2921 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2922 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2923 visibility = xnnpack_visibility(),
2924 deps = [
2925 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2926 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2927 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2928 ":operator_run",
2929 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2930 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2931 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]2932 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2933 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]2934 ] + select({
2935 ":emscripten": [],
2936 "//conditions:default": ["@cpuinfo"],
2937 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2938)
2939
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2940xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2941 name = "XNNPACK_test_mode",
2942 srcs = [
2943 "src/init.c",
2944 "src/runtime.c",
2945 "src/subgraph.c",
2946 "src/tensor.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2947 ] + SUBGRAPH_SRCS + LOGGING_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2948 hdrs = ["include/xnnpack.h"],
2949 copts = LOGGING_COPTS + [
2950 "-Isrc",
2951 "-Iinclude",
2952 "-UNDEBUG",
2953 "-DXNN_TEST_MODE=1",
2954 ] + select({
2955 ":debug_build": [],
2956 "//conditions:default": xnnpack_min_size_copts(),
2957 }) + select({
2958 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2959 "//conditions:default": [],
2960 }),
2961 gcc_copts = xnnpack_gcc_std_copts(),
2962 includes = ["include"],
2963 msvc_copts = xnnpack_msvc_std_copts(),
2964 visibility = xnnpack_visibility(),
2965 deps = [
2966 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2967 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2968 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2969 ":operator_run_test_mode",
2970 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2971 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2972 "@clog",
2973 "@FP16",
2974 "@pthreadpool",
2975 ] + select({
2976 ":emscripten": [],
2977 "//conditions:default": ["@cpuinfo"],
2978 }),
2979)
2980
2981xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2982 name = "xnnpack_operators_nhwc_f32",
2983 srcs = [
2984 "src/init.c",
2985 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2986 hdrs = ["include/xnnpack.h"],
2987 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2988 "-Isrc",
2989 "-Iinclude",
2990 ] + select({
2991 ":debug_build": [],
2992 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2993 }) + select({
2994 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2995 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2996 }),
2997 defines = [
2998 "XNN_NO_Q8_OPERATORS",
2999 "XNN_NO_U8_OPERATORS",
3000 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]3001 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3002 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3003 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3004 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3005 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3006 visibility = xnnpack_visibility(),
3007 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3008 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3009 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3010 ":operator_run",
3011 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3012 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3013 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3014 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3015 ] + select({
3016 ":emscripten": [],
3017 "//conditions:default": ["@cpuinfo"],
3018 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3019)
3020
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3021xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3022 name = "bench_utils",
3023 srcs = ["bench/utils.cc"],
3024 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]3025 deps = [
3026 "@com_google_benchmark//:benchmark",
3027 "@cpuinfo",
3028 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3029)
3030
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3031######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3032
3033xnnpack_benchmark(
3034 name = "q8_gemm_bench",
3035 srcs = [
3036 "bench/gemm.h",
3037 "bench/q8-gemm.cc",
3038 "src/xnnpack/AlignedAllocator.h",
3039 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3040 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3041 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3042)
3043
3044xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3045 name = "f16_igemm_bench",
3046 srcs = [
3047 "bench/f16-igemm.cc",
3048 "bench/conv.h",
3049 "bench/google/conv.h",
3050 "src/xnnpack/AlignedAllocator.h",
3051 ] + MICROKERNEL_BENCHMARK_HDRS,
3052 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3053)
3054
3055xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3056 name = "f16_gemm_bench",
3057 srcs = [
3058 "bench/f16-gemm.cc",
3059 "bench/gemm.h",
3060 "src/xnnpack/AlignedAllocator.h",
3061 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3062 deps = MICROKERNEL_BENCHMARK_DEPS,
3063)
3064
3065xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3066 name = "f16_spmm_bench",
3067 srcs = [
3068 "bench/f16-spmm.cc",
3069 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3070 "src/xnnpack/AlignedAllocator.h",
3071 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3072 deps = MICROKERNEL_BENCHMARK_DEPS,
3073)
3074
3075xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3076 name = "f32_igemm_bench",
3077 srcs = [
3078 "bench/f32-igemm.cc",
3079 "bench/conv.h",
3080 "src/xnnpack/AlignedAllocator.h",
3081 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3082 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3083)
3084
3085xnnpack_benchmark(
3086 name = "f32_conv_hwc_bench",
3087 srcs = [
3088 "bench/f32-conv-hwc.cc",
3089 "bench/dconv.h",
3090 "src/xnnpack/AlignedAllocator.h",
3091 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3092 deps = MICROKERNEL_BENCHMARK_DEPS,
3093)
3094
3095xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3096 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3097 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3098 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3099 "bench/dconv.h",
3100 "src/xnnpack/AlignedAllocator.h",
3101 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3102 deps = MICROKERNEL_BENCHMARK_DEPS,
3103)
3104
3105xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3106 name = "f16_dwconv_bench",
3107 srcs = [
3108 "bench/f16-dwconv.cc",
3109 "bench/dwconv.h",
3110 "bench/google/dwconv.h",
3111 "src/xnnpack/AlignedAllocator.h",
3112 ] + MICROKERNEL_BENCHMARK_HDRS,
3113 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3114)
3115
3116xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3117 name = "f32_dwconv_bench",
3118 srcs = [
3119 "bench/f32-dwconv.cc",
3120 "bench/dwconv.h",
3121 "src/xnnpack/AlignedAllocator.h",
3122 ] + MICROKERNEL_BENCHMARK_HDRS,
3123 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3124)
3125
3126xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3127 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3128 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3129 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3130 "bench/dwconv.h",
3131 "src/xnnpack/AlignedAllocator.h",
3132 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3133 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3134)
3135
3136xnnpack_benchmark(
3137 name = "f32_gemm_bench",
3138 srcs = [
3139 "bench/f32-gemm.cc",
3140 "bench/gemm.h",
3141 "src/xnnpack/AlignedAllocator.h",
3142 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3143 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3144 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3145)
3146
3147xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3148 name = "f32_raddexpminusmax_bench",
3149 srcs = [
3150 "bench/f32-raddexpminusmax.cc",
3151 "src/xnnpack/AlignedAllocator.h",
3152 ] + MICROKERNEL_BENCHMARK_HDRS,
3153 deps = MICROKERNEL_BENCHMARK_DEPS,
3154)
3155
3156xnnpack_benchmark(
3157 name = "f32_raddextexp_bench",
3158 srcs = [
3159 "bench/f32-raddextexp.cc",
3160 "src/xnnpack/AlignedAllocator.h",
3161 ] + MICROKERNEL_BENCHMARK_HDRS,
3162 deps = MICROKERNEL_BENCHMARK_DEPS,
3163)
3164
3165xnnpack_benchmark(
3166 name = "f32_raddstoreexpminusmax_bench",
3167 srcs = [
3168 "bench/f32-raddstoreexpminusmax.cc",
3169 "src/xnnpack/AlignedAllocator.h",
3170 ] + MICROKERNEL_BENCHMARK_HDRS,
3171 deps = MICROKERNEL_BENCHMARK_DEPS,
3172)
3173
3174xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3175 name = "f32_rmax_bench",
3176 srcs = [
3177 "bench/f32-rmax.cc",
3178 "src/xnnpack/AlignedAllocator.h",
3179 ] + MICROKERNEL_BENCHMARK_HDRS,
3180 deps = MICROKERNEL_BENCHMARK_DEPS,
3181)
3182
3183xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3184 name = "f32_sigmoid_bench",
3185 srcs = [
3186 "bench/f32-sigmoid.cc",
3187 "src/xnnpack/AlignedAllocator.h",
3188 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3189 deps = MICROKERNEL_BENCHMARK_DEPS,
3190)
3191
3192xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3193 name = "f32_spmm_bench",
3194 srcs = [
3195 "bench/f32-spmm.cc",
3196 "bench/gemm.h",
3197 "src/xnnpack/AlignedAllocator.h",
3198 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3199 deps = MICROKERNEL_BENCHMARK_DEPS,
3200)
3201
3202xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3203 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3204 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3205 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3206 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3207 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3208 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3209)
3210
3211xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3212 name = "f32_vscaleexpminusmax_bench",
3213 srcs = [
3214 "bench/f32-vscaleexpminusmax.cc",
3215 "src/xnnpack/AlignedAllocator.h",
3216 ] + MICROKERNEL_BENCHMARK_HDRS,
3217 deps = MICROKERNEL_BENCHMARK_DEPS,
3218)
3219
3220xnnpack_benchmark(
3221 name = "f32_vscaleextexp_bench",
3222 srcs = [
3223 "bench/f32-vscaleextexp.cc",
3224 "src/xnnpack/AlignedAllocator.h",
3225 ] + MICROKERNEL_BENCHMARK_HDRS,
3226 deps = MICROKERNEL_BENCHMARK_DEPS,
3227)
3228
3229xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3230 name = "f32_im2col_gemm_bench",
3231 srcs = [
3232 "bench/f32-im2col-gemm.cc",
3233 "bench/conv.h",
3234 "src/xnnpack/AlignedAllocator.h",
3235 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3236 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3237)
3238
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3239xnnpack_benchmark(
3240 name = "requantization_bench",
3241 srcs = [
3242 "bench/requantization.cc",
3243 "src/xnnpack/requantization-stubs.h",
3244 "src/xnnpack/AlignedAllocator.h",
3245 ] + MICROKERNEL_BENCHMARK_HDRS,
3246 deps = MICROKERNEL_BENCHMARK_DEPS,
3247)
3248
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3249xnnpack_benchmark(
3250 name = "rounding_bench",
3251 srcs = [
3252 "bench/rounding.cc",
3253 "src/xnnpack/math-stubs.h",
3254 "src/xnnpack/AlignedAllocator.h",
3255 ] + MICROKERNEL_BENCHMARK_HDRS,
3256 deps = MICROKERNEL_BENCHMARK_DEPS,
3257)
3258
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3259########################### Benchmarks for operators ###########################
3260
3261xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3262 name = "average_pooling_bench",
3263 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3264 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3265 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3266 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3267)
3268
3269xnnpack_benchmark(
3270 name = "channel_shuffle_bench",
3271 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3272 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3273)
3274
3275xnnpack_benchmark(
3276 name = "convolution_bench",
3277 srcs = ["bench/convolution.cc"],
3278 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3279 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3280 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3281)
3282
3283xnnpack_benchmark(
3284 name = "deconvolution_bench",
3285 srcs = ["bench/deconvolution.cc"],
3286 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3287 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3288 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3289)
3290
3291xnnpack_benchmark(
3292 name = "global_average_pooling_bench",
3293 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3294 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3295)
3296
3297xnnpack_benchmark(
3298 name = "max_pooling_bench",
3299 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3300 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3301)
3302
3303xnnpack_benchmark(
3304 name = "sigmoid_bench",
3305 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3306 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3307 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3308 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3309)
3310
3311xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3312 name = "prelu_bench",
3313 srcs = ["bench/prelu.cc"],
3314 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3315 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3316 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3317)
3318
3319xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3320 name = "softmax_bench",
3321 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3322 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3323 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3324 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3325)
3326
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3327############################# End-to-end benchmarks ############################
3328
3329cc_library(
3330 name = "mobilenet_v1",
3331 srcs = ["models/mobilenet-v1.cc"],
3332 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3333 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3334 linkstatic = True,
3335 deps = [
3336 ":XNNPACK",
3337 "@pthreadpool",
3338 ],
3339)
3340
3341cc_library(
3342 name = "mobilenet_v2",
3343 srcs = ["models/mobilenet-v2.cc"],
3344 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3345 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3346 linkstatic = True,
3347 deps = [
3348 ":XNNPACK",
3349 "@pthreadpool",
3350 ],
3351)
3352
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3353cc_library(
3354 name = "mobilenet_v3_large",
3355 srcs = ["models/mobilenet-v3-large.cc"],
3356 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3357 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3358 linkstatic = True,
3359 deps = [
3360 ":XNNPACK",
3361 "@pthreadpool",
3362 ],
3363)
3364
3365cc_library(
3366 name = "mobilenet_v3_small",
3367 srcs = ["models/mobilenet-v3-small.cc"],
3368 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3369 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3370 linkstatic = True,
3371 deps = [
3372 ":XNNPACK",
3373 "@pthreadpool",
3374 ],
3375)
3376
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3377xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3378 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3379 srcs = [
3380 "bench/f32-dwconv-e2e.cc",
3381 "bench/end2end.h",
3382 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3383 deps = MICROKERNEL_BENCHMARK_DEPS + [
3384 ":XNNPACK",
3385 ":mobilenet_v1",
3386 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3387 ":mobilenet_v3_large",
3388 ":mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3389 ],
3390)
3391
3392xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3393 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3394 srcs = [
3395 "bench/f32-gemm-e2e.cc",
3396 "bench/end2end.h",
3397 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3398 deps = MICROKERNEL_BENCHMARK_DEPS + [
3399 ":XNNPACK",
3400 ":mobilenet_v1",
3401 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3402 ":mobilenet_v3_large",
3403 ":mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3404 ],
3405)
3406
3407xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3408 name = "end2end_bench",
3409 srcs = ["bench/end2end.cc"],
3410 deps = [
3411 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3412 ":bench_utils",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3413 ":mobilenet_v1",
3414 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3415 ":mobilenet_v3_large",
3416 ":mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3417 "@pthreadpool",
3418 ],
3419)
3420
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3421#################### Accuracy evaluation for math functions ####################
3422
3423xnnpack_benchmark(
3424 name = "f32_exp_eval",
3425 srcs = [
3426 "eval/f32-exp.cc",
3427 "src/xnnpack/AlignedAllocator.h",
3428 ] + ACCURACY_EVAL_HDRS,
3429 deps = ACCURACY_EVAL_DEPS,
3430)
3431
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3432xnnpack_benchmark(
3433 name = "f32_expminus_eval",
3434 srcs = [
3435 "eval/f32-expminus.cc",
3436 "src/xnnpack/AlignedAllocator.h",
3437 ] + ACCURACY_EVAL_HDRS,
3438 deps = ACCURACY_EVAL_DEPS,
3439)
3440
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3441xnnpack_benchmark(
3442 name = "f32_extexp_eval",
3443 srcs = [
3444 "eval/f32-extexp.cc",
3445 "src/xnnpack/AlignedAllocator.h",
3446 ] + ACCURACY_EVAL_HDRS,
3447 deps = ACCURACY_EVAL_DEPS,
3448)
3449
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3450xnnpack_unit_test(
3451 name = "f32_roundne_eval",
3452 srcs = [
3453 "eval/f32-roundne.cc",
3454 "src/xnnpack/AlignedAllocator.h",
3455 "src/xnnpack/math-stubs.h",
3456 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3457 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3458 deps = MICROKERNEL_TEST_DEPS,
3459)
3460
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3461xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3462 name = "f32_roundd_eval",
3463 srcs = [
3464 "eval/f32-roundd.cc",
3465 "src/xnnpack/AlignedAllocator.h",
3466 "src/xnnpack/math-stubs.h",
3467 ] + MICROKERNEL_TEST_HDRS,
3468 automatic = False,
3469 deps = MICROKERNEL_TEST_DEPS,
3470)
3471
3472xnnpack_unit_test(
3473 name = "f32_roundu_eval",
3474 srcs = [
3475 "eval/f32-roundu.cc",
3476 "src/xnnpack/AlignedAllocator.h",
3477 "src/xnnpack/math-stubs.h",
3478 ] + MICROKERNEL_TEST_HDRS,
3479 automatic = False,
3480 deps = MICROKERNEL_TEST_DEPS,
3481)
3482
3483xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3484 name = "f32_roundz_eval",
3485 srcs = [
3486 "eval/f32-roundz.cc",
3487 "src/xnnpack/AlignedAllocator.h",
3488 "src/xnnpack/math-stubs.h",
3489 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3490 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3491 deps = MICROKERNEL_TEST_DEPS,
3492)
3493
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3494xnnpack_benchmark(
3495 name = "f32_sigmoid_eval",
3496 srcs = [
3497 "eval/f32-sigmoid.cc",
3498 "src/xnnpack/AlignedAllocator.h",
3499 ] + ACCURACY_EVAL_HDRS,
3500 deps = ACCURACY_EVAL_DEPS,
3501)
3502
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3503######################### Unit tests for micro-kernels #########################
3504
3505xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3506 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3507 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3508 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3509 "test/gemm-microkernel-tester.h",
3510 "src/xnnpack/AlignedAllocator.h",
3511 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3512 deps = MICROKERNEL_TEST_DEPS,
3513)
3514
3515xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3516 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3517 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3518 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3519 "test/spmm-microkernel-tester.h",
3520 "src/xnnpack/AlignedAllocator.h",
3521 ] + MICROKERNEL_TEST_HDRS,
3522 deps = MICROKERNEL_TEST_DEPS,
3523)
3524
3525xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3526 name = "f32_argmaxpool_test",
3527 srcs = [
3528 "test/f32-argmaxpool.cc",
3529 "test/argmaxpool-microkernel-tester.h",
3530 "src/xnnpack/AlignedAllocator.h",
3531 ] + MICROKERNEL_TEST_HDRS,
3532 deps = MICROKERNEL_TEST_DEPS,
3533)
3534
3535xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3536 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3537 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3538 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3539 "test/avgpool-microkernel-tester.h",
3540 "src/xnnpack/AlignedAllocator.h",
3541 ] + MICROKERNEL_TEST_HDRS,
3542 deps = MICROKERNEL_TEST_DEPS,
3543)
3544
3545xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3546 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3547 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3548 "test/f32-ibilinear.cc",
3549 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3550 "src/xnnpack/AlignedAllocator.h",
3551 ] + MICROKERNEL_TEST_HDRS,
3552 deps = MICROKERNEL_TEST_DEPS,
3553)
3554
3555xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3556 name = "f16_clamp_test",
3557 srcs = [
3558 "test/f16-clamp.cc",
3559 "test/clamp-microkernel-tester.h",
3560 ] + MICROKERNEL_TEST_HDRS,
3561 deps = MICROKERNEL_TEST_DEPS,
3562)
3563
3564xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3565 name = "f32_clamp_test",
3566 srcs = [
3567 "test/f32-clamp.cc",
3568 "test/clamp-microkernel-tester.h",
3569 ] + MICROKERNEL_TEST_HDRS,
3570 deps = MICROKERNEL_TEST_DEPS,
3571)
3572
3573xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3574 name = "f32_igemm_test",
3575 srcs = [
3576 "test/f32-igemm.cc",
3577 "test/gemm-microkernel-tester.h",
3578 "src/xnnpack/AlignedAllocator.h",
3579 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3580 deps = MICROKERNEL_TEST_DEPS,
3581)
3582
3583xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3584 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3585 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3586 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3587 "test/gemm-microkernel-tester.h",
3588 "src/xnnpack/AlignedAllocator.h",
3589 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3590 deps = MICROKERNEL_TEST_DEPS,
3591)
3592
3593xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]3594 name = "f32_igemm_minmax_test",
3595 srcs = [
3596 "test/f32-igemm-minmax.cc",
3597 "test/gemm-microkernel-tester.h",
3598 "src/xnnpack/AlignedAllocator.h",
3599 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3600 deps = MICROKERNEL_TEST_DEPS,
3601)
3602
3603xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]3604 name = "f16_igemm_minmax_test",
3605 srcs = [
3606 "test/f16-igemm-minmax.cc",
3607 "test/gemm-microkernel-tester.h",
3608 "src/xnnpack/AlignedAllocator.h",
3609 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3610 deps = MICROKERNEL_TEST_DEPS,
3611)
3612
3613xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3614 name = "f32_conv_hwc_test",
3615 srcs = [
3616 "test/f32-conv-hwc.cc",
3617 "test/conv-hwc-microkernel-tester.h",
3618 "src/xnnpack/AlignedAllocator.h",
3619 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3620 deps = MICROKERNEL_TEST_DEPS,
3621)
3622
3623xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3624 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3625 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3626 "test/f32-conv-hwc2chw.cc",
3627 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3628 "src/xnnpack/AlignedAllocator.h",
3629 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3630 deps = MICROKERNEL_TEST_DEPS,
3631)
3632
3633xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3634 name = "f32_dwconv_test",
3635 srcs = [
3636 "test/f32-dwconv.cc",
3637 "test/dwconv-microkernel-tester.h",
3638 "src/xnnpack/AlignedAllocator.h",
3639 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3640 deps = MICROKERNEL_TEST_DEPS,
3641)
3642
3643xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3644 name = "f16_dwconv_minmax_test",
3645 srcs = [
3646 "test/f16-dwconv-minmax.cc",
3647 "test/dwconv-microkernel-tester.h",
3648 "src/xnnpack/AlignedAllocator.h",
3649 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3650 deps = MICROKERNEL_TEST_DEPS,
3651)
3652
3653xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3654 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3655 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3656 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3657 "test/dwconv-microkernel-tester.h",
3658 "src/xnnpack/AlignedAllocator.h",
3659 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3660 deps = MICROKERNEL_TEST_DEPS,
3661)
3662
3663xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3664 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3665 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3666 "test/f32-dwconv-chw.cc",
3667 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3668 "src/xnnpack/AlignedAllocator.h",
3669 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3670 deps = MICROKERNEL_TEST_DEPS,
3671)
3672
3673xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]3674 name = "f16_gavgpool_minmax_test",
3675 srcs = [
3676 "test/f16-gavgpool-minmax.cc",
3677 "test/gavgpool-microkernel-tester.h",
3678 "src/xnnpack/AlignedAllocator.h",
3679 ] + MICROKERNEL_TEST_HDRS,
3680 deps = MICROKERNEL_TEST_DEPS,
3681)
3682
3683xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3684 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3685 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3686 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3687 "test/gavgpool-microkernel-tester.h",
3688 "src/xnnpack/AlignedAllocator.h",
3689 ] + MICROKERNEL_TEST_HDRS,
3690 deps = MICROKERNEL_TEST_DEPS,
3691)
3692
3693xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3694 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3695 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3696 "test/f32-gavgpool-cw.cc",
3697 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3698 "src/xnnpack/AlignedAllocator.h",
3699 ] + MICROKERNEL_TEST_HDRS,
3700 deps = MICROKERNEL_TEST_DEPS,
3701)
3702
3703xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3704 name = "f32_gemm_test",
3705 srcs = [
3706 "test/f32-gemm.cc",
3707 "test/gemm-microkernel-tester.h",
3708 "src/xnnpack/AlignedAllocator.h",
3709 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3710 deps = MICROKERNEL_TEST_DEPS,
3711)
3712
3713xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3714 name = "f32_gemm_relu_test",
3715 srcs = [
3716 "test/f32-gemm-relu.cc",
3717 "test/gemm-microkernel-tester.h",
3718 "src/xnnpack/AlignedAllocator.h",
3719 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3720 deps = MICROKERNEL_TEST_DEPS,
3721)
3722
3723xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3724 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3725 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3726 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3727 "test/gemm-microkernel-tester.h",
3728 "src/xnnpack/AlignedAllocator.h",
3729 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3730 deps = MICROKERNEL_TEST_DEPS,
3731)
3732
3733xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3734 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3735 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3736 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3737 "test/gemm-microkernel-tester.h",
3738 "src/xnnpack/AlignedAllocator.h",
3739 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3740 deps = MICROKERNEL_TEST_DEPS,
3741)
3742
3743xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3744 name = "f16_hswish_test",
3745 srcs = [
3746 "test/f16-hswish.cc",
3747 "test/hswish-microkernel-tester.h",
3748 ] + MICROKERNEL_TEST_HDRS,
3749 deps = MICROKERNEL_TEST_DEPS,
3750)
3751
3752xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3753 name = "f32_hswish_test",
3754 srcs = [
3755 "test/f32-hswish.cc",
3756 "test/hswish-microkernel-tester.h",
3757 ] + MICROKERNEL_TEST_HDRS,
3758 deps = MICROKERNEL_TEST_DEPS,
3759)
3760
3761xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3762 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3763 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3764 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3765 "test/maxpool-microkernel-tester.h",
3766 ] + MICROKERNEL_TEST_HDRS,
3767 deps = MICROKERNEL_TEST_DEPS,
3768)
3769
3770xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3771 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3772 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3773 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3774 "test/avgpool-microkernel-tester.h",
3775 "src/xnnpack/AlignedAllocator.h",
3776 ] + MICROKERNEL_TEST_HDRS,
3777 deps = MICROKERNEL_TEST_DEPS,
3778)
3779
3780xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3781 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3782 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3783 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3784 "test/gemm-microkernel-tester.h",
3785 "src/xnnpack/AlignedAllocator.h",
3786 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3787 deps = MICROKERNEL_TEST_DEPS,
3788)
3789
3790xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3791 name = "f16_prelu_test",
3792 srcs = [
3793 "test/f16-prelu.cc",
3794 "test/prelu-microkernel-tester.h",
3795 "src/xnnpack/AlignedAllocator.h",
3796 ] + MICROKERNEL_TEST_HDRS,
3797 deps = MICROKERNEL_TEST_DEPS,
3798)
3799
3800xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3801 name = "f32_prelu_test",
3802 srcs = [
3803 "test/f32-prelu.cc",
3804 "test/prelu-microkernel-tester.h",
3805 "src/xnnpack/AlignedAllocator.h",
3806 ] + MICROKERNEL_TEST_HDRS,
3807 deps = MICROKERNEL_TEST_DEPS,
3808)
3809
3810xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3811 name = "f32_raddexpminusmax_test",
3812 srcs = [
3813 "test/f32-raddexpminusmax.cc",
3814 "test/raddexpminusmax-microkernel-tester.h",
3815 ] + MICROKERNEL_TEST_HDRS,
3816 deps = MICROKERNEL_TEST_DEPS,
3817)
3818
3819xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]3820 name = "f32_raddextexp_test",
3821 srcs = [
3822 "test/f32-raddextexp.cc",
3823 "test/raddextexp-microkernel-tester.h",
3824 ] + MICROKERNEL_TEST_HDRS,
3825 deps = MICROKERNEL_TEST_DEPS,
3826)
3827
3828xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3829 name = "f32_raddstoreexpminusmax_test",
3830 srcs = [
3831 "test/f32-raddstoreexpminusmax.cc",
3832 "test/raddstoreexpminusmax-microkernel-tester.h",
3833 ] + MICROKERNEL_TEST_HDRS,
3834 deps = MICROKERNEL_TEST_DEPS,
3835)
3836
3837xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3838 name = "f32_rmax_test",
3839 srcs = [
3840 "test/f32-rmax.cc",
3841 "test/rmax-microkernel-tester.h",
3842 ] + MICROKERNEL_TEST_HDRS,
3843 deps = MICROKERNEL_TEST_DEPS,
3844)
3845
3846xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3847 name = "f32_sigmoid_test",
3848 srcs = [
3849 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3850 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3851 ] + MICROKERNEL_TEST_HDRS,
3852 deps = MICROKERNEL_TEST_DEPS,
3853)
3854
3855xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3856 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3857 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3858 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3859 "test/spmm-microkernel-tester.h",
3860 "src/xnnpack/AlignedAllocator.h",
3861 ] + MICROKERNEL_TEST_HDRS,
3862 deps = MICROKERNEL_TEST_DEPS,
3863)
3864
3865xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]3866 name = "f16_vadd_minmax_test",
3867 srcs = [
3868 "test/f16-vadd-minmax.cc",
3869 "test/vbinary-microkernel-tester.h",
3870 ] + MICROKERNEL_TEST_HDRS,
3871 deps = MICROKERNEL_TEST_DEPS,
3872)
3873
3874xnnpack_unit_test(
3875 name = "f16_vaddc_minmax_test",
3876 srcs = [
3877 "test/f16-vaddc-minmax.cc",
3878 "test/vbinaryc-microkernel-tester.h",
3879 ] + MICROKERNEL_TEST_HDRS,
3880 deps = MICROKERNEL_TEST_DEPS,
3881)
3882
3883xnnpack_unit_test(
3884 name = "f16_vdiv_minmax_test",
3885 srcs = [
3886 "test/f16-vdiv-minmax.cc",
3887 "test/vbinary-microkernel-tester.h",
3888 ] + MICROKERNEL_TEST_HDRS,
3889 deps = MICROKERNEL_TEST_DEPS,
3890)
3891
3892xnnpack_unit_test(
3893 name = "f16_vdivc_minmax_test",
3894 srcs = [
3895 "test/f16-vdivc-minmax.cc",
3896 "test/vbinaryc-microkernel-tester.h",
3897 ] + MICROKERNEL_TEST_HDRS,
3898 deps = MICROKERNEL_TEST_DEPS,
3899)
3900
3901xnnpack_unit_test(
3902 name = "f16_vrdivc_minmax_test",
3903 srcs = [
3904 "test/f16-vrdivc-minmax.cc",
3905 "test/vbinaryc-microkernel-tester.h",
3906 ] + MICROKERNEL_TEST_HDRS,
3907 deps = MICROKERNEL_TEST_DEPS,
3908)
3909
3910xnnpack_unit_test(
3911 name = "f16_vmax_test",
3912 srcs = [
3913 "test/f16-vmax.cc",
3914 "test/vbinary-microkernel-tester.h",
3915 ] + MICROKERNEL_TEST_HDRS,
3916 deps = MICROKERNEL_TEST_DEPS,
3917)
3918
3919xnnpack_unit_test(
3920 name = "f16_vmaxc_test",
3921 srcs = [
3922 "test/f16-vmaxc.cc",
3923 "test/vbinaryc-microkernel-tester.h",
3924 ] + MICROKERNEL_TEST_HDRS,
3925 deps = MICROKERNEL_TEST_DEPS,
3926)
3927
3928xnnpack_unit_test(
3929 name = "f16_vmin_test",
3930 srcs = [
3931 "test/f16-vmin.cc",
3932 "test/vbinary-microkernel-tester.h",
3933 ] + MICROKERNEL_TEST_HDRS,
3934 deps = MICROKERNEL_TEST_DEPS,
3935)
3936
3937xnnpack_unit_test(
3938 name = "f16_vminc_test",
3939 srcs = [
3940 "test/f16-vminc.cc",
3941 "test/vbinaryc-microkernel-tester.h",
3942 ] + MICROKERNEL_TEST_HDRS,
3943 deps = MICROKERNEL_TEST_DEPS,
3944)
3945
3946xnnpack_unit_test(
3947 name = "f16_vmul_minmax_test",
3948 srcs = [
3949 "test/f16-vmul-minmax.cc",
3950 "test/vbinary-microkernel-tester.h",
3951 ] + MICROKERNEL_TEST_HDRS,
3952 deps = MICROKERNEL_TEST_DEPS,
3953)
3954
3955xnnpack_unit_test(
3956 name = "f16_vmulc_minmax_test",
3957 srcs = [
3958 "test/f16-vmulc-minmax.cc",
3959 "test/vbinaryc-microkernel-tester.h",
3960 ] + MICROKERNEL_TEST_HDRS,
3961 deps = MICROKERNEL_TEST_DEPS,
3962)
3963
3964xnnpack_unit_test(
3965 name = "f16_vsub_minmax_test",
3966 srcs = [
3967 "test/f16-vsub-minmax.cc",
3968 "test/vbinary-microkernel-tester.h",
3969 ] + MICROKERNEL_TEST_HDRS,
3970 deps = MICROKERNEL_TEST_DEPS,
3971)
3972
3973xnnpack_unit_test(
3974 name = "f16_vsubc_minmax_test",
3975 srcs = [
3976 "test/f16-vsubc-minmax.cc",
3977 "test/vbinaryc-microkernel-tester.h",
3978 ] + MICROKERNEL_TEST_HDRS,
3979 deps = MICROKERNEL_TEST_DEPS,
3980)
3981
3982xnnpack_unit_test(
3983 name = "f16_vrsubc_minmax_test",
3984 srcs = [
3985 "test/f16-vrsubc-minmax.cc",
3986 "test/vbinaryc-microkernel-tester.h",
3987 ] + MICROKERNEL_TEST_HDRS,
3988 deps = MICROKERNEL_TEST_DEPS,
3989)
3990
3991xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]3992 name = "f32_vabs_test",
3993 srcs = [
3994 "test/f32-vabs.cc",
3995 "test/vunary-microkernel-tester.h",
3996 ] + MICROKERNEL_TEST_HDRS,
3997 deps = MICROKERNEL_TEST_DEPS,
3998)
3999
4000xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4001 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4002 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4003 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4004 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4005 ] + MICROKERNEL_TEST_HDRS,
4006 deps = MICROKERNEL_TEST_DEPS,
4007)
4008
4009xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4010 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4011 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4012 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4013 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4014 ] + MICROKERNEL_TEST_HDRS,
4015 deps = MICROKERNEL_TEST_DEPS,
4016)
4017
4018xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4019 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4020 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4021 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4022 "test/vbinary-microkernel-tester.h",
4023 ] + MICROKERNEL_TEST_HDRS,
4024 deps = MICROKERNEL_TEST_DEPS,
4025)
4026
4027xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4028 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4029 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4030 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4031 "test/vbinaryc-microkernel-tester.h",
4032 ] + MICROKERNEL_TEST_HDRS,
4033 deps = MICROKERNEL_TEST_DEPS,
4034)
4035
4036xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4037 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4038 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4039 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4040 "test/vbinaryc-microkernel-tester.h",
4041 ] + MICROKERNEL_TEST_HDRS,
4042 deps = MICROKERNEL_TEST_DEPS,
4043)
4044
4045xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4046 name = "f32_vmax_test",
4047 srcs = [
4048 "test/f32-vmax.cc",
4049 "test/vbinary-microkernel-tester.h",
4050 ] + MICROKERNEL_TEST_HDRS,
4051 deps = MICROKERNEL_TEST_DEPS,
4052)
4053
4054xnnpack_unit_test(
4055 name = "f32_vmaxc_test",
4056 srcs = [
4057 "test/f32-vmaxc.cc",
4058 "test/vbinaryc-microkernel-tester.h",
4059 ] + MICROKERNEL_TEST_HDRS,
4060 deps = MICROKERNEL_TEST_DEPS,
4061)
4062
4063xnnpack_unit_test(
4064 name = "f32_vmin_test",
4065 srcs = [
4066 "test/f32-vmin.cc",
4067 "test/vbinary-microkernel-tester.h",
4068 ] + MICROKERNEL_TEST_HDRS,
4069 deps = MICROKERNEL_TEST_DEPS,
4070)
4071
4072xnnpack_unit_test(
4073 name = "f32_vminc_test",
4074 srcs = [
4075 "test/f32-vminc.cc",
4076 "test/vbinaryc-microkernel-tester.h",
4077 ] + MICROKERNEL_TEST_HDRS,
4078 deps = MICROKERNEL_TEST_DEPS,
4079)
4080
4081xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4082 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4083 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4084 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4085 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4086 ] + MICROKERNEL_TEST_HDRS,
4087 deps = MICROKERNEL_TEST_DEPS,
4088)
4089
4090xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4091 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4092 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4093 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4094 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4095 ] + MICROKERNEL_TEST_HDRS,
4096 deps = MICROKERNEL_TEST_DEPS,
4097)
4098
4099xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4100 name = "f16_vmulcaddc_minmax_test",
4101 srcs = [
4102 "test/f16-vmulcaddc-minmax.cc",
4103 "test/vmulcaddc-microkernel-tester.h",
4104 "src/xnnpack/AlignedAllocator.h",
4105 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4106 deps = MICROKERNEL_TEST_DEPS,
4107)
4108
4109xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4110 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4111 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4112 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4113 "test/vmulcaddc-microkernel-tester.h",
4114 "src/xnnpack/AlignedAllocator.h",
4115 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4116 deps = MICROKERNEL_TEST_DEPS,
4117)
4118
4119xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4120 name = "f32_vneg_test",
4121 srcs = [
4122 "test/f32-vneg.cc",
4123 "test/vunary-microkernel-tester.h",
4124 ] + MICROKERNEL_TEST_HDRS,
4125 deps = MICROKERNEL_TEST_DEPS,
4126)
4127
4128xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4129 name = "f32_vrndne_test",
4130 srcs = [
4131 "test/f32-vrndne.cc",
4132 "test/vunary-microkernel-tester.h",
4133 ] + MICROKERNEL_TEST_HDRS,
4134 deps = MICROKERNEL_TEST_DEPS,
4135)
4136
4137xnnpack_unit_test(
4138 name = "f32_vrndz_test",
4139 srcs = [
4140 "test/f32-vrndz.cc",
4141 "test/vunary-microkernel-tester.h",
4142 ] + MICROKERNEL_TEST_HDRS,
4143 deps = MICROKERNEL_TEST_DEPS,
4144)
4145
4146xnnpack_unit_test(
4147 name = "f32_vrndu_test",
4148 srcs = [
4149 "test/f32-vrndu.cc",
4150 "test/vunary-microkernel-tester.h",
4151 ] + MICROKERNEL_TEST_HDRS,
4152 deps = MICROKERNEL_TEST_DEPS,
4153)
4154
4155xnnpack_unit_test(
4156 name = "f32_vrndd_test",
4157 srcs = [
4158 "test/f32-vrndd.cc",
4159 "test/vunary-microkernel-tester.h",
4160 ] + MICROKERNEL_TEST_HDRS,
4161 deps = MICROKERNEL_TEST_DEPS,
4162)
4163
4164xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4165 name = "f32_vscale_test",
4166 srcs = [
4167 "test/f32-vscale.cc",
4168 "test/vscale-microkernel-tester.h",
4169 ] + MICROKERNEL_TEST_HDRS,
4170 deps = MICROKERNEL_TEST_DEPS,
4171)
4172
4173xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4174 name = "f32_vscaleexpminusmax_test",
4175 srcs = [
4176 "test/f32-vscaleexpminusmax.cc",
4177 "test/vscaleexpminusmax-microkernel-tester.h",
4178 ] + MICROKERNEL_TEST_HDRS,
4179 deps = MICROKERNEL_TEST_DEPS,
4180)
4181
4182xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4183 name = "f32_vscaleextexp_test",
4184 srcs = [
4185 "test/f32-vscaleextexp.cc",
4186 "test/vscaleextexp-microkernel-tester.h",
4187 ] + MICROKERNEL_TEST_HDRS,
4188 deps = MICROKERNEL_TEST_DEPS,
4189)
4190
4191xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4192 name = "f32_vsqr_test",
4193 srcs = [
4194 "test/f32-vsqr.cc",
4195 "test/vunary-microkernel-tester.h",
4196 ] + MICROKERNEL_TEST_HDRS,
4197 deps = MICROKERNEL_TEST_DEPS,
4198)
4199
4200xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4201 name = "f32_vsqrdiff_test",
4202 srcs = [
4203 "test/f32-vsqrdiff.cc",
4204 "test/vbinary-microkernel-tester.h",
4205 ] + MICROKERNEL_TEST_HDRS,
4206 deps = MICROKERNEL_TEST_DEPS,
4207)
4208
4209xnnpack_unit_test(
4210 name = "f32_vsqrdiffc_test",
4211 srcs = [
4212 "test/f32-vsqrdiffc.cc",
4213 "test/vbinaryc-microkernel-tester.h",
4214 ] + MICROKERNEL_TEST_HDRS,
4215 deps = MICROKERNEL_TEST_DEPS,
4216)
4217
4218xnnpack_unit_test(
4219 name = "f32_vrsqrdiffc_test",
4220 srcs = [
4221 "test/f32-vrsqrdiffc.cc",
4222 "test/vbinaryc-microkernel-tester.h",
4223 ] + MICROKERNEL_TEST_HDRS,
4224 deps = MICROKERNEL_TEST_DEPS,
4225)
4226
4227xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4228 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4229 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4230 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4231 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4232 ] + MICROKERNEL_TEST_HDRS,
4233 deps = MICROKERNEL_TEST_DEPS,
4234)
4235
4236xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4237 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4238 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4239 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4240 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4241 ] + MICROKERNEL_TEST_HDRS,
4242 deps = MICROKERNEL_TEST_DEPS,
4243)
4244
4245xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4246 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4247 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4248 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4249 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4250 ] + MICROKERNEL_TEST_HDRS,
4251 deps = MICROKERNEL_TEST_DEPS,
4252)
4253
4254xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4255 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4256 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4257 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4258 "test/avgpool-microkernel-tester.h",
4259 "src/xnnpack/AlignedAllocator.h",
4260 ] + MICROKERNEL_TEST_HDRS,
4261 deps = MICROKERNEL_TEST_DEPS,
4262)
4263
4264xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4265 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4266 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4267 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4268 "test/gemm-microkernel-tester.h",
4269 "src/xnnpack/AlignedAllocator.h",
4270 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4271 deps = MICROKERNEL_TEST_DEPS,
4272)
4273
4274xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4275 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4276 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4277 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4278 "test/dwconv-microkernel-tester.h",
4279 "src/xnnpack/AlignedAllocator.h",
4280 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4281 deps = MICROKERNEL_TEST_DEPS,
4282)
4283
4284xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4285 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4286 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4287 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4288 "test/gavgpool-microkernel-tester.h",
4289 "src/xnnpack/AlignedAllocator.h",
4290 ] + MICROKERNEL_TEST_HDRS,
4291 deps = MICROKERNEL_TEST_DEPS,
4292)
4293
4294xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4295 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4296 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4297 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4298 "test/gemm-microkernel-tester.h",
4299 "src/xnnpack/AlignedAllocator.h",
4300 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4301 deps = MICROKERNEL_TEST_DEPS,
4302)
4303
4304xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4305 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4306 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4307 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4308 "test/vadd-microkernel-tester.h",
4309 ] + MICROKERNEL_TEST_HDRS,
4310 deps = MICROKERNEL_TEST_DEPS,
4311)
4312
4313xnnpack_unit_test(
4314 name = "u8_clamp_test",
4315 srcs = [
4316 "test/u8-clamp.cc",
4317 "test/clamp-microkernel-tester.h",
4318 ] + MICROKERNEL_TEST_HDRS,
4319 deps = MICROKERNEL_TEST_DEPS,
4320)
4321
4322xnnpack_unit_test(
4323 name = "u8_lut32norm_test",
4324 srcs = [
4325 "test/u8-lut32norm.cc",
4326 "test/lut-norm-microkernel-tester.h",
4327 ] + MICROKERNEL_TEST_HDRS,
4328 deps = MICROKERNEL_TEST_DEPS,
4329)
4330
4331xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4332 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4333 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4334 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4335 "test/maxpool-microkernel-tester.h",
4336 ] + MICROKERNEL_TEST_HDRS,
4337 deps = MICROKERNEL_TEST_DEPS,
4338)
4339
4340xnnpack_unit_test(
4341 name = "u8_rmax_test",
4342 srcs = [
4343 "test/u8-rmax.cc",
4344 "test/rmax-microkernel-tester.h",
4345 ] + MICROKERNEL_TEST_HDRS,
4346 deps = MICROKERNEL_TEST_DEPS,
4347)
4348
4349xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4350 name = "x32_fill_test",
4351 srcs = [
4352 "test/x32-fill.cc",
4353 "test/fill-microkernel-tester.h",
4354 ] + MICROKERNEL_TEST_HDRS,
4355 deps = MICROKERNEL_TEST_DEPS,
4356)
4357
4358xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4359 name = "x32_packx_test",
4360 srcs = [
4361 "test/x32-packx.cc",
4362 "test/pack-microkernel-tester.h",
4363 "src/xnnpack/AlignedAllocator.h",
4364 ] + MICROKERNEL_TEST_HDRS,
4365 deps = MICROKERNEL_TEST_DEPS,
4366)
4367
4368xnnpack_unit_test(
4369 name = "x32_pad_test",
4370 srcs = [
4371 "test/x32-pad.cc",
4372 "test/pad-microkernel-tester.h",
4373 ] + MICROKERNEL_TEST_HDRS,
4374 deps = MICROKERNEL_TEST_DEPS,
4375)
4376
4377xnnpack_unit_test(
4378 name = "x32_unpool_test",
4379 srcs = [
4380 "test/x32-unpool.cc",
4381 "test/unpool-microkernel-tester.h",
4382 ] + MICROKERNEL_TEST_HDRS,
4383 deps = MICROKERNEL_TEST_DEPS,
4384)
4385
4386xnnpack_unit_test(
4387 name = "x32_zip_test",
4388 srcs = [
4389 "test/x32-zip.cc",
4390 "test/zip-microkernel-tester.h",
4391 ] + MICROKERNEL_TEST_HDRS,
4392 deps = MICROKERNEL_TEST_DEPS,
4393)
4394
4395xnnpack_unit_test(
4396 name = "x8_lut_test",
4397 srcs = [
4398 "test/x8-lut.cc",
4399 "test/lut-microkernel-tester.h",
4400 ] + MICROKERNEL_TEST_HDRS,
4401 deps = MICROKERNEL_TEST_DEPS,
4402)
4403
4404xnnpack_unit_test(
4405 name = "x8_zip_test",
4406 srcs = [
4407 "test/x8-zip.cc",
4408 "test/zip-microkernel-tester.h",
4409 ] + MICROKERNEL_TEST_HDRS,
4410 deps = MICROKERNEL_TEST_DEPS,
4411)
4412
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4413xnnpack_unit_test(
4414 name = "requantization_test",
4415 srcs = [
4416 "src/xnnpack/requantization-stubs.h",
4417 "test/requantization.cc",
4418 "test/requantization-tester.h",
4419 ] + MICROKERNEL_TEST_HDRS,
4420 deps = MICROKERNEL_TEST_DEPS,
4421)
4422
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4423########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4424
4425xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4426 name = "operator_size_test",
4427 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4428 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4429)
4430
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4431xnnpack_binary(
4432 name = "subgraph_size_test",
4433 srcs = ["test/subgraph-size.c"],
4434 deps = [":XNNPACK"],
4435)
4436
4437########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4438
4439xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4440 name = "abs_nc_test",
4441 srcs = [
4442 "test/abs-nc.cc",
4443 "test/abs-operator-tester.h",
4444 ],
4445 deps = OPERATOR_TEST_DEPS,
4446)
4447
4448xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4449 name = "add_nd_test",
4450 srcs = [
4451 "test/add-nd.cc",
4452 "test/binary-elementwise-operator-tester.h",
4453 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4454 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4455)
4456
4457xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4458 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4459 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4460 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4461 "test/argmax-pooling-operator-tester.h",
4462 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4463 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4464)
4465
4466xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4467 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4468 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4469 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4470 "test/average-pooling-operator-tester.h",
4471 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4472 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4473)
4474
4475xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4476 name = "bankers_rounding_nc_test",
4477 srcs = [
4478 "test/bankers-rounding-nc.cc",
4479 "test/bankers-rounding-operator-tester.h",
4480 ],
4481 deps = OPERATOR_TEST_DEPS,
4482)
4483
4484xnnpack_unit_test(
4485 name = "ceiling_nc_test",
4486 srcs = [
4487 "test/ceiling-nc.cc",
4488 "test/ceiling-operator-tester.h",
4489 ],
4490 deps = OPERATOR_TEST_DEPS,
4491)
4492
4493xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4494 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4495 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4496 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4497 "test/channel-shuffle-operator-tester.h",
4498 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4499 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4500)
4501
4502xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4503 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4504 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4505 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4506 "test/clamp-operator-tester.h",
4507 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4508 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4509)
4510
4511xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4512 name = "constant_pad_nd_test",
4513 srcs = [
4514 "test/constant-pad-nd.cc",
4515 "test/constant-pad-operator-tester.h",
4516 ],
4517 deps = OPERATOR_TEST_DEPS,
4518)
4519
4520xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4521 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4522 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4523 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4524 "test/convolution-operator-tester.h",
4525 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4526 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4527)
4528
4529xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4530 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4531 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4532 "test/convolution-nchw.cc",
4533 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4534 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4535 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4536)
4537
4538xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]4539 name = "copy_nc_test",
4540 srcs = [
4541 "test/copy-nc.cc",
4542 "test/copy-operator-tester.h",
4543 ],
4544 deps = OPERATOR_TEST_DEPS,
4545)
4546
4547xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4548 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4549 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4550 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4551 "test/deconvolution-operator-tester.h",
4552 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4553 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4554)
4555
4556xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4557 name = "divide_nd_test",
4558 srcs = [
4559 "test/binary-elementwise-operator-tester.h",
4560 "test/divide-nd.cc",
4561 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4562 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4563)
4564
4565xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4566 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4567 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4568 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4569 "test/fully-connected-operator-tester.h",
4570 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4571 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4572)
4573
4574xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4575 name = "floor_nc_test",
4576 srcs = [
4577 "test/floor-nc.cc",
4578 "test/floor-operator-tester.h",
4579 ],
4580 deps = OPERATOR_TEST_DEPS,
4581)
4582
4583xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4584 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4585 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4586 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4587 "test/global-average-pooling-operator-tester.h",
4588 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4589 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4590)
4591
4592xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4593 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4594 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4595 "test/global-average-pooling-ncw.cc",
4596 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4597 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4598 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4599)
4600
4601xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4602 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4603 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4604 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4605 "test/hardswish-operator-tester.h",
4606 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4607 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4608)
4609
4610xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4611 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4612 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4613 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4614 "test/leaky-relu-operator-tester.h",
4615 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4616 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4617)
4618
4619xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4620 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4621 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4622 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4623 "test/max-pooling-operator-tester.h",
4624 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4625 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4626)
4627
4628xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4629 name = "maximum_nd_test",
4630 srcs = [
4631 "test/binary-elementwise-operator-tester.h",
4632 "test/maximum-nd.cc",
4633 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4634 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4635)
4636
4637xnnpack_unit_test(
4638 name = "minimum_nd_test",
4639 srcs = [
4640 "test/binary-elementwise-operator-tester.h",
4641 "test/minimum-nd.cc",
4642 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4643 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4644)
4645
4646xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4647 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4648 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4649 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4650 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4651 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4652 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4653)
4654
4655xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4656 name = "negate_nc_test",
4657 srcs = [
4658 "test/negate-nc.cc",
4659 "test/negate-operator-tester.h",
4660 ],
4661 deps = OPERATOR_TEST_DEPS,
4662)
4663
4664xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4665 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4666 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4667 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4668 "test/prelu-operator-tester.h",
4669 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4670 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4671)
4672
4673xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4674 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4675 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4676 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4677 "test/resize-bilinear-operator-tester.h",
4678 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4679 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4680)
4681
4682xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4683 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4684 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4685 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4686 "test/sigmoid-operator-tester.h",
4687 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4688 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4689)
4690
4691xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4692 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4693 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4694 "test/softmax-nc.cc",
4695 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4696 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4697 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4698)
4699
4700xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4701 name = "square_nc_test",
4702 srcs = [
4703 "test/square-nc.cc",
4704 "test/square-operator-tester.h",
4705 ],
4706 deps = OPERATOR_TEST_DEPS,
4707)
4708
4709xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]4710 name = "squared_difference_nd_test",
4711 srcs = [
4712 "test/binary-elementwise-operator-tester.h",
4713 "test/squared-difference-nd.cc",
4714 ],
4715 deps = OPERATOR_TEST_DEPS,
4716)
4717
4718xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4719 name = "subtract_nd_test",
4720 srcs = [
4721 "test/binary-elementwise-operator-tester.h",
4722 "test/subtract-nd.cc",
4723 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4724 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4725)
4726
4727xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4728 name = "truncation_nc_test",
4729 srcs = [
4730 "test/truncation-nc.cc",
4731 "test/truncation-operator-tester.h",
4732 ],
4733 deps = OPERATOR_TEST_DEPS,
4734)
4735
4736xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4737 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4738 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4739 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4740 "test/unpooling-operator-tester.h",
4741 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4742 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4743)
4744
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]4745############################### Misc unit tests ###############################
4746
4747xnnpack_unit_test(
4748 name = "memory_planner_test",
4749 srcs = [
4750 "test/memory-planner-test.cc",
4751 ],
4752 deps = [
4753 ":XNNPACK",
4754 ":memory_planner",
4755 ],
4756)
4757
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4758############################# Build configurations #############################
4759
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4760# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4761config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4762 name = "xnn_enable_assembly_explicit_true",
4763 define_values = {"xnn_enable_assembly": "true"},
4764)
4765
4766# Disables usage of assembly kernels.
4767config_setting(
4768 name = "xnn_enable_assembly_explicit_false",
4769 define_values = {"xnn_enable_assembly": "false"},
4770)
4771
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]4772# Disables usage of HMP-aware optimizations.
4773config_setting(
4774 name = "xnn_enable_hmp_explicit_false",
4775 define_values = {"xnn_enable_hmp": "false"},
4776)
4777
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]4778# Enable usage of optimized memory allocation
4779config_setting(
4780 name = "xnn_enable_memopt_explicit_true",
4781 define_values = {"xnnpack_enable_memopt": "true"},
4782)
4783
4784# Disable usage of optimized memory allocation
4785config_setting(
4786 name = "xnn_enable_memopt_explicit_false",
4787 define_values = {"xnnpack_enable_memopt": "false"},
4788)
4789
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4790# Builds with -c dbg
4791config_setting(
4792 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4793 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4794 "compilation_mode": "dbg",
4795 },
4796)
4797
4798# Builds with -c opt
4799config_setting(
4800 name = "optimized_build",
4801 values = {
4802 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4803 },
4804)
4805
4806config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4807 name = "linux_k8",
4808 values = {"cpu": "k8"},
4809)
4810
4811config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]4812 name = "linux_arm",
4813 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]4814)
4815
4816config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]4817 name = "linux_armhf",
4818 values = {"cpu": "armhf"},
4819)
4820
4821config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -0700[diff] [blame^]4822 name = "linux_armv7a",
4823 values = {"cpu": "armv7a"},
4824)
4825
4826config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]4827 name = "linux_aarch64",
4828 values = {"cpu": "aarch64"},
4829)
4830
4831config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4832 name = "android",
4833 values = {"crosstool_top": "//external:android/crosstool"},
4834)
4835
4836config_setting(
4837 name = "android_armv7",
4838 values = {
4839 "crosstool_top": "//external:android/crosstool",
4840 "cpu": "armeabi-v7a",
4841 },
4842)
4843
4844config_setting(
4845 name = "android_arm64",
4846 values = {
4847 "crosstool_top": "//external:android/crosstool",
4848 "cpu": "arm64-v8a",
4849 },
4850)
4851
4852config_setting(
4853 name = "android_x86",
4854 values = {
4855 "crosstool_top": "//external:android/crosstool",
4856 "cpu": "x86",
4857 },
4858)
4859
4860config_setting(
4861 name = "android_x86_64",
4862 values = {
4863 "crosstool_top": "//external:android/crosstool",
4864 "cpu": "x86_64",
4865 },
4866)
4867
4868config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]4869 name = "windows_x86_64",
4870 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]4871)
4872
4873config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]4874 name = "windows_x86_64_clang",
4875 values = {
4876 "compiler": "clang-cl",
4877 "cpu": "x64_windows",
4878 },
4879)
4880
4881config_setting(
4882 name = "windows_x86_64_mingw",
4883 values = {
4884 "compiler": "mingw-gcc",
4885 "cpu": "x64_windows",
4886 },
4887)
4888
4889config_setting(
4890 name = "windows_x86_64_msys",
4891 values = {
4892 "compiler": "msys-gcc",
4893 "cpu": "x64_windows",
4894 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]4895)
4896
4897config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]4898 name = "macos_x86_64",
4899 values = {
4900 "apple_platform_type": "macos",
4901 "cpu": "darwin",
4902 },
4903)
4904
4905config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4906 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4907 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4908)
4909
4910config_setting(
4911 name = "emscripten_wasm",
4912 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4913 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4914 "cpu": "wasm",
4915 },
4916)
4917
4918config_setting(
4919 name = "emscripten_wasmsimd",
4920 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4921 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4922 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]4923 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4924 },
4925)
4926
4927config_setting(
4928 name = "emscripten_asmjs",
4929 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4930 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4931 "cpu": "asmjs",
4932 },
4933)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4934
4935config_setting(
4936 name = "ios_armv7",
4937 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4938 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4939 "cpu": "ios_armv7",
4940 },
4941)
4942
4943config_setting(
4944 name = "ios_arm64",
4945 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4946 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4947 "cpu": "ios_arm64",
4948 },
4949)
4950
4951config_setting(
4952 name = "ios_arm64e",
4953 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4954 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4955 "cpu": "ios_arm64e",
4956 },
4957)
4958
4959config_setting(
4960 name = "ios_x86",
4961 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4962 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4963 "cpu": "ios_i386",
4964 },
4965)
4966
4967config_setting(
4968 name = "ios_x86_64",
4969 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4970 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4971 "cpu": "ios_x86_64",
4972 },
4973)
4974
4975config_setting(
4976 name = "watchos_armv7k",
4977 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4978 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4979 "cpu": "watchos_armv7k",
4980 },
4981)
4982
4983config_setting(
4984 name = "watchos_arm64_32",
4985 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4986 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4987 "cpu": "watchos_arm64_32",
4988 },
4989)
4990
4991config_setting(
4992 name = "watchos_x86",
4993 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4994 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4995 "cpu": "watchos_i386",
4996 },
4997)
4998
4999config_setting(
5000 name = "watchos_x86_64",
5001 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5002 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5003 "cpu": "watchos_x86_64",
5004 },
5005)
5006
5007config_setting(
5008 name = "tvos_arm64",
5009 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5010 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5011 "cpu": "tvos_arm64",
5012 },
5013)
5014
5015config_setting(
5016 name = "tvos_x86_64",
5017 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5018 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5019 "cpu": "tvos_x86_64",
5020 },
5021)