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gerrit-public.fairphone.software / platform / external / XNNPACK / ad35260076f1f8dce9f68207b272543ea9454377 / . / BUILD.bazel
blob: d4d8feaca606ab7da2021f68dd38fba758dddfcb [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]19 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]20 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]23MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]26 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]27 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]32ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]39MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]40 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]41 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]42 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]47OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]48 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]49 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]53OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]54 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]57 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]58 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]59 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
62 "src/operators/fully-connected-nc.c",
63 "src/operators/global-average-pooling-ncw.c",
64 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]65 "src/operators/leaky-relu-nc.c",
66 "src/operators/max-pooling-nhwc.c",
67 "src/operators/prelu-nc.c",
68 "src/operators/resize-bilinear-nhwc.c",
69 "src/operators/sigmoid-nc.c",
70 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]71 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]72 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]73]
74
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]75SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]76 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]77 "src/subgraph/add2.c",
78 "src/subgraph/argmax-pooling-2d.c",
79 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]80 "src/subgraph/bankers-rounding.c",
81 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]82 "src/subgraph/clamp.c",
83 "src/subgraph/convolution-2d.c",
84 "src/subgraph/deconvolution-2d.c",
85 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]86 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]87 "src/subgraph/fully-connected.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]88 "src/subgraph/floor.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]89 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]90 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]91 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]92 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]93 "src/subgraph/maximum2.c",
94 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]95 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]96 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]97 "src/subgraph/prelu.c",
98 "src/subgraph/sigmoid.c",
99 "src/subgraph/softmax.c",
100 "src/subgraph/static-constant-pad.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]101 "src/subgraph/square.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]102 "src/subgraph/squared-difference.c",
103 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]104 "src/subgraph/unpooling-2d.c",
105]
106
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]107TABLE_SRCS = [
108 "src/tables/exp2-k-over-64.c",
109 "src/tables/exp2-k-over-2048.c",
110]
111
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]112SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]113 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]114 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]115 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]116 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
117 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]118 "src/f32-clamp/gen/scalar-x1.c",
119 "src/f32-clamp/gen/scalar-x2.c",
120 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]121 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]122 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]123 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
124 "src/f32-dwconv-chw/3x3p1-scalar.c",
125 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
126 "src/f32-dwconv-chw/5x5p2-scalar.c",
127 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]128 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
129 "src/f32-dwconv/gen/up1x4-scalar.c",
130 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
131 "src/f32-dwconv/gen/up1x9-scalar.c",
132 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
133 "src/f32-dwconv/gen/up1x25-scalar.c",
134 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
135 "src/f32-dwconv/gen/up2x4-scalar.c",
136 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
137 "src/f32-dwconv/gen/up2x9-scalar.c",
138 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
139 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]140 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
142 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
143 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]144 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]150 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
151 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]152 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]153 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
154 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]155 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
156 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
157 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]158 "src/f32-gemm/gen/1x4-scalar.c",
159 "src/f32-gemm/gen/2x4-scalar.c",
160 "src/f32-gemm/gen/4x2-scalar.c",
161 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]162 "src/f32-gemm/gen/1x4-relu-scalar.c",
163 "src/f32-gemm/gen/2x4-relu-scalar.c",
164 "src/f32-gemm/gen/4x2-relu-scalar.c",
165 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]166 "src/f32-gemm/gen/1x4-minmax-scalar.c",
167 "src/f32-gemm/gen/2x4-minmax-scalar.c",
168 "src/f32-gemm/gen/4x2-minmax-scalar.c",
169 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]170 "src/f32-hswish/gen/scalar-x1.c",
171 "src/f32-hswish/gen/scalar-x2.c",
172 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]173 "src/f32-ibilinear/gen/scalar-c1.c",
174 "src/f32-ibilinear/gen/scalar-c2.c",
175 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]176 "src/f32-igemm/gen/1x4-scalar.c",
177 "src/f32-igemm/gen/2x4-scalar.c",
178 "src/f32-igemm/gen/4x2-scalar.c",
179 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]180 "src/f32-igemm/gen/1x4-relu-scalar.c",
181 "src/f32-igemm/gen/2x4-relu-scalar.c",
182 "src/f32-igemm/gen/4x2-relu-scalar.c",
183 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]184 "src/f32-igemm/gen/1x4-minmax-scalar.c",
185 "src/f32-igemm/gen/2x4-minmax-scalar.c",
186 "src/f32-igemm/gen/4x2-minmax-scalar.c",
187 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]188 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
189 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
190 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]191 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
192 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
193 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
194 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]195 "src/f32-prelu/gen/scalar-2x1.c",
196 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]197 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
200 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
201 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
202 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
203 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
204 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
205 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
206 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
207 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
208 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]209 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]210 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
211 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
212 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
213 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
214 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
215 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
216 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
217 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
218 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]219 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
220 "src/f32-spmm/gen/1x1-minmax-scalar.c",
221 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
222 "src/f32-spmm/gen/2x1-minmax-scalar.c",
223 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
224 "src/f32-spmm/gen/4x1-minmax-scalar.c",
225 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
226 "src/f32-spmm/gen/8x1-minmax-scalar.c",
227 "src/f32-spmm/gen/8x2-minmax-scalar.c",
228 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]229 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
236 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
237 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
238 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
239 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
240 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]241 "src/f32-vbinary/gen/vmax-scalar-x1.c",
242 "src/f32-vbinary/gen/vmax-scalar-x2.c",
243 "src/f32-vbinary/gen/vmax-scalar-x4.c",
244 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
245 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
246 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
247 "src/f32-vbinary/gen/vmin-scalar-x1.c",
248 "src/f32-vbinary/gen/vmin-scalar-x2.c",
249 "src/f32-vbinary/gen/vmin-scalar-x4.c",
250 "src/f32-vbinary/gen/vminc-scalar-x1.c",
251 "src/f32-vbinary/gen/vminc-scalar-x2.c",
252 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]253 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
259 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
260 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
261 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]262 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x1.c",
263 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x2.c",
264 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]265 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
266 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
267 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]268 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
269 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
270 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
271 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
272 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
273 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]274 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
275 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
276 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
277 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
278 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
279 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]280 "src/f32-vlrelu/gen/scalar-x1.c",
281 "src/f32-vlrelu/gen/scalar-x2.c",
282 "src/f32-vlrelu/gen/scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]283 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
284 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
285 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]286 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
287 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
288 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
289 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
290 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
291 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
292 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
293 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
294 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
295 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
296 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
297 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]298 "src/f32-vunary/gen/vabs-scalar-x1.c",
299 "src/f32-vunary/gen/vabs-scalar-x2.c",
300 "src/f32-vunary/gen/vabs-scalar-x4.c",
301 "src/f32-vunary/gen/vneg-scalar-x1.c",
302 "src/f32-vunary/gen/vneg-scalar-x2.c",
303 "src/f32-vunary/gen/vneg-scalar-x4.c",
304 "src/f32-vunary/gen/vsqr-scalar-x1.c",
305 "src/f32-vunary/gen/vsqr-scalar-x2.c",
306 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]307 "src/math/expminus-scalar-lut2048-p1.c",
308 "src/math/expminus-scalar-lut64-p2.c",
309 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]310 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]311 "src/math/roundne-scalar-nearbyint.c",
312 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]313 "src/math/roundd-scalar-addsub.c",
314 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]315 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]316 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]317 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]318 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]319 "src/math/roundz-scalar-addsub.c",
320 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]321 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]322 "src/math/sigmoid-scalar-lut2048-p1-div.c",
323 "src/math/sigmoid-scalar-lut64-p2-div.c",
324 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]325 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
326 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]327 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]328 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
329 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]330 "src/q8-gemm/2x2-minmax-scalar.c",
331 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]332 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]333 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]334 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]335 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]336 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]337 "src/x32-fill/scalar-float.c",
338 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]339 "src/x32-packx/x2-scalar.c",
340 "src/x32-packx/x3-scalar.c",
341 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]342 "src/x32-pad/scalar-int.c",
343 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]344 "src/x32-unpool/scalar.c",
345 "src/x32-zip/x2-scalar.c",
346 "src/x32-zip/x3-scalar.c",
347 "src/x32-zip/x4-scalar.c",
348 "src/x32-zip/xm-scalar.c",
349 "src/x8-lut/scalar.c",
350 "src/x8-zip/x2-scalar.c",
351 "src/x8-zip/x3-scalar.c",
352 "src/x8-zip/x4-scalar.c",
353 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]354 "src/requantization/precise-scalar.c",
355 "src/requantization/fp32-scalar.c",
356 "src/requantization/q31-scalar.c",
357 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]358]
359
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]360WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]361 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
362 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]363 "src/f32-clamp/gen/wasm-x1.c",
364 "src/f32-clamp/gen/wasm-x2.c",
365 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]366 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
367 "src/f32-dwconv/gen/up1x4-wasm.c",
368 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
369 "src/f32-dwconv/gen/up1x9-wasm.c",
370 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
371 "src/f32-dwconv/gen/up1x25-wasm.c",
372 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
373 "src/f32-dwconv/gen/up2x4-wasm.c",
374 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
375 "src/f32-dwconv/gen/up2x9-wasm.c",
376 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
377 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]378 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
379 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
380 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
381 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]382 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
383 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]384 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
385 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
386 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
387 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]388 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
389 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]390 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
391 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]392 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
393 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
394 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]395 "src/f32-gemm/gen/1x4-wasm.c",
396 "src/f32-gemm/gen/2x4-wasm.c",
397 "src/f32-gemm/gen/4x2-wasm.c",
398 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]399 "src/f32-gemm/gen/1x4-relu-wasm.c",
400 "src/f32-gemm/gen/2x4-relu-wasm.c",
401 "src/f32-gemm/gen/4x2-relu-wasm.c",
402 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]403 "src/f32-gemm/gen/1x4-minmax-wasm.c",
404 "src/f32-gemm/gen/2x4-minmax-wasm.c",
405 "src/f32-gemm/gen/4x2-minmax-wasm.c",
406 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]407 "src/f32-hswish/gen/wasm-x1.c",
408 "src/f32-hswish/gen/wasm-x2.c",
409 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]410 "src/f32-igemm/gen/1x4-wasm.c",
411 "src/f32-igemm/gen/2x4-wasm.c",
412 "src/f32-igemm/gen/4x2-wasm.c",
413 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]414 "src/f32-igemm/gen/1x4-relu-wasm.c",
415 "src/f32-igemm/gen/2x4-relu-wasm.c",
416 "src/f32-igemm/gen/4x2-relu-wasm.c",
417 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]418 "src/f32-igemm/gen/1x4-minmax-wasm.c",
419 "src/f32-igemm/gen/2x4-minmax-wasm.c",
420 "src/f32-igemm/gen/4x2-minmax-wasm.c",
421 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]422 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
423 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
424 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700[diff] [blame]425 "src/f32-prelu/gen/wasm-2x1.c",
426 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]427 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
428 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
429 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
430 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
431 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
432 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
433 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
434 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
435 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
436 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
437 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
438 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]439 "src/f32-vbinary/gen/vmax-wasm-x1.c",
440 "src/f32-vbinary/gen/vmax-wasm-x2.c",
441 "src/f32-vbinary/gen/vmax-wasm-x4.c",
442 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
443 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
444 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
445 "src/f32-vbinary/gen/vmin-wasm-x1.c",
446 "src/f32-vbinary/gen/vmin-wasm-x2.c",
447 "src/f32-vbinary/gen/vmin-wasm-x4.c",
448 "src/f32-vbinary/gen/vminc-wasm-x1.c",
449 "src/f32-vbinary/gen/vminc-wasm-x2.c",
450 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]451 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
452 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
453 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
454 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
455 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
456 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
457 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
458 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
459 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
460 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
461 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
462 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
463 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
464 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
465 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
466 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
467 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
468 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]469 "src/f32-vlrelu/gen/wasm-x1.c",
470 "src/f32-vlrelu/gen/wasm-x2.c",
471 "src/f32-vlrelu/gen/wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]472 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
473 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
474 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]475]
476
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]477WASMSIMD_UKERNELS = [
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]478 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
479 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
480 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
481 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
482 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
483 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700[diff] [blame]484 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-arm.c",
485 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
486 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-arm.c",
487 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
488 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-arm.c",
489 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
490 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-arm.c",
491 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
492 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-arm.c",
493 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
494 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-arm.c",
495 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
496 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-x86.c",
497 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
498 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-x86.c",
499 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
500 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-x86.c",
501 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
502 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-x86.c",
503 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
504 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-x86.c",
505 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
506 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-x86.c",
507 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]508 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
509 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
510 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
511 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-arm.c",
512 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat-arm.c",
513 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-x86.c",
514 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]515 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
516 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
517 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
518 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
519 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
520 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
521 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
522 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
523 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
524 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
525 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
526 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
527 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
528 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
529 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
530 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
531 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
532 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
533 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
534 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
535 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
536 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
537 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
538 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
539 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
540 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
541 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
542 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
543 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
544 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
545 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-arm.c",
546 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-arm.c",
547 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
548 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-arm.c",
549 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-arm.c",
550 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
551 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-arm.c",
552 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-arm.c",
553 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
554 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-arm.c",
555 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-arm.c",
556 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
557 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-arm.c",
558 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-arm.c",
559 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
560 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-x86.c",
561 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-x86.c",
562 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
563 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-x86.c",
564 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-x86.c",
565 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
566 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-x86.c",
567 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-x86.c",
568 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
569 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-x86.c",
570 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-x86.c",
571 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
572 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-x86.c",
573 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-x86.c",
574 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]575 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
576 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
577 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
578 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-arm.c",
579 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat-arm.c",
580 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-x86.c",
581 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]582 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
583 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
584 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
585 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
586 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
587 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
588 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
589 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
590 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
591 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
592 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
593 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
594 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
595 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
596 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
597 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
598 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
599 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
600 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
601 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
602 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
603 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
604 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
605 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
606 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
607 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
608 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
609 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
610 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
611 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhan9baec802020-06-25 21:34:35 -0700[diff] [blame]612 "src/f32-hswish/gen/wasmsimd-arm-x4.c",
613 "src/f32-hswish/gen/wasmsimd-arm-x8.c",
614 "src/f32-hswish/gen/wasmsimd-x86-x4.c",
615 "src/f32-hswish/gen/wasmsimd-x86-x8.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -0700[diff] [blame]616 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
617 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
618 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
619 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Marat Dukhand3f3d872020-06-24 13:08:25 -0700[diff] [blame]620 "src/math/roundne-wasmsimd-addsub.c",
621 "src/math/roundd-wasmsimd-addsub.c",
622 "src/math/roundu-wasmsimd-addsub.c",
623 "src/math/roundz-wasmsimd-addsub.c",
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]624 "src/requantization/fp32-wasmsimd.c",
625]
626
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]627PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]628 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]629 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]630 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]631 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
632 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]633 "src/f32-clamp/gen/psimd-x4.c",
634 "src/f32-clamp/gen/psimd-x8.c",
Erich Elsen0a1970e2020-06-10 09:24:59 -0700[diff] [blame]635 "src/f32-conv-hwc2chw/3x3s2p1c3x4-psimd-2x2.c",
Erich Elsene6214af2020-06-10 22:17:22 -0700[diff] [blame]636 "src/f32-dwconv-chw/3x3p1-psimd.c",
Erich Elsenfd7a6e32020-06-11 12:04:44 -0700[diff] [blame]637 "src/f32-dwconv-chw/3x3s2p1-psimd.c",
Erich Elsen28928892020-06-12 08:08:19 -0700[diff] [blame]638 "src/f32-dwconv-chw/5x5p2-psimd.c",
Erich Elsen7465a892020-06-13 14:02:04 -0700[diff] [blame]639 "src/f32-dwconv-chw/5x5s2p2-psimd.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]640 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
641 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
642 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
643 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
644 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
645 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
646 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
647 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
648 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
649 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
650 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
651 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Erich Elsen6f278b52020-06-10 16:13:11 -0700[diff] [blame]652 "src/f32-gavgpool-cw/psimd-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]653 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
654 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]655 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
656 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
657 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
658 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
659 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
660 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
661 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
662 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
663 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
664 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
665 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
666 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
667 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
668 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
669 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
670 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
671 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
672 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
673 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]674 "src/f32-hswish/gen/psimd-x4.c",
675 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]676 "src/f32-ibilinear/gen/psimd-c4.c",
677 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]678 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
679 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
680 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
681 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
682 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
683 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
684 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
685 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
686 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
687 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]688 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]689 "src/f32-spmm/gen/4x1-minmax-psimd.c",
690 "src/f32-spmm/gen/8x1-minmax-psimd.c",
691 "src/f32-spmm/gen/16x1-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]692 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
693 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]694 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]695 "src/f32-prelu/gen/psimd-2x4.c",
696 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]697 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]698 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
699 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
700 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
701 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
702 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
703 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
704 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
705 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]706 "src/f32-vbinary/gen/vmax-psimd-x4.c",
707 "src/f32-vbinary/gen/vmax-psimd-x8.c",
708 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
709 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
710 "src/f32-vbinary/gen/vmin-psimd-x4.c",
711 "src/f32-vbinary/gen/vmin-psimd-x8.c",
712 "src/f32-vbinary/gen/vminc-psimd-x4.c",
713 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]714 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
715 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
716 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
717 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
718 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
719 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]720 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x4.c",
721 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]722 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
723 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]724 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
725 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
726 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
727 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]728 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
729 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
730 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
731 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]732 "src/f32-vlrelu/gen/psimd-x4.c",
733 "src/f32-vlrelu/gen/psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]734 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
735 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]736 "src/f32-vunary/gen/vabs-psimd-x4.c",
737 "src/f32-vunary/gen/vabs-psimd-x8.c",
738 "src/f32-vunary/gen/vneg-psimd-x4.c",
739 "src/f32-vunary/gen/vneg-psimd-x8.c",
740 "src/f32-vunary/gen/vsqr-psimd-x4.c",
741 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]742 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]743 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]744 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]745 "src/x32-unpool/psimd.c",
746 "src/x32-zip/x2-psimd.c",
747 "src/x32-zip/x3-psimd.c",
748 "src/x32-zip/x4-psimd.c",
749 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]750 "src/requantization/precise-psimd.c",
751 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]752]
753
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]754PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]755 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
756 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
757 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
758 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
759 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
760 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
761 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
762 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
763 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
764 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
765 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
766 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]767 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
768 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
769 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
770 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
771 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
772 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]773 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
774 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
775 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
776 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
777 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
778 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
779 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
780 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]781 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]782 "src/math/roundd-psimd-addsub.c",
783 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]784 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]785 "src/math/sigmoid-psimd-p5-div.c",
786]
787
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]788# ISA-specific micro-kernels
789NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]790 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
791 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]792 "src/f32-clamp/gen/neon-x4.c",
793 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]794 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
795 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]796 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
797 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]798 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
799 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]800 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
801 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]802 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
803 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
804 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
805 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]806 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
807 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
808 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
809 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]810 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
811 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
812 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
813 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]814 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]815 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
816 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]817 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
818 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
819 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
820 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
821 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
822 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
823 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
824 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
825 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
826 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
827 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
828 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
829 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
830 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
831 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
832 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
833 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
834 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
835 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
836 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
837 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
838 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
839 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
840 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
841 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
842 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
843 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
844 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
845 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
846 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
847 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]848 "src/f32-hswish/gen/neon-x4.c",
849 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]850 "src/f32-ibilinear/gen/neon-c4.c",
851 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]852 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
853 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
854 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
855 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
856 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
857 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
858 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
859 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
860 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
861 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
862 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
863 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
864 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
865 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
866 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
867 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]868 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
869 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
870 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]871 "src/f32-ppmm/gen/4x8-minmax-neon.c",
872 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]873 "src/f32-prelu/gen/neon-2x4.c",
874 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]875 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
876 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
877 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
878 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
879 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
880 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
881 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
882 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
883 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
884 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
885 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
886 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
887 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
888 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
889 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
890 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
891 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
892 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
893 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
894 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
895 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
896 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
897 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
898 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]899 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]900 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]901 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
902 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
903 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
904 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
905 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
906 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
907 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
908 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
909 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
910 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
911 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
912 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
913 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
914 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
915 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
916 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
917 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
918 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]919 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
920 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
921 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
922 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]923 "src/f32-vbinary/gen/vmax-neon-x4.c",
924 "src/f32-vbinary/gen/vmax-neon-x8.c",
925 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
926 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
927 "src/f32-vbinary/gen/vmin-neon-x4.c",
928 "src/f32-vbinary/gen/vmin-neon-x8.c",
929 "src/f32-vbinary/gen/vminc-neon-x4.c",
930 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]931 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
932 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
933 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
934 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]935 "src/f32-vbinary/gen/vrsqrdiffc-neon-x4.c",
936 "src/f32-vbinary/gen/vrsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]937 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
938 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]939 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
940 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
941 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
942 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]943 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
944 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
945 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
946 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]947 "src/f32-vlrelu/gen/neon-x4.c",
948 "src/f32-vlrelu/gen/neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]949 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
950 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]951 "src/f32-vrnd/gen/vrndne-neon-x4.c",
952 "src/f32-vrnd/gen/vrndne-neon-x8.c",
953 "src/f32-vrnd/gen/vrndz-neon-x4.c",
954 "src/f32-vrnd/gen/vrndz-neon-x8.c",
955 "src/f32-vrnd/gen/vrndu-neon-x4.c",
956 "src/f32-vrnd/gen/vrndu-neon-x8.c",
957 "src/f32-vrnd/gen/vrndd-neon-x4.c",
958 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]959 "src/f32-vunary/gen/vabs-neon-x4.c",
960 "src/f32-vunary/gen/vabs-neon-x8.c",
961 "src/f32-vunary/gen/vneg-neon-x4.c",
962 "src/f32-vunary/gen/vneg-neon-x8.c",
963 "src/f32-vunary/gen/vsqr-neon-x4.c",
964 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]965 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
966 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]967 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]968 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
969 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]970 "src/q8-gemm/4x8-minmax-neon.c",
971 "src/q8-gemm/8x8-minmax-neon.c",
972 "src/q8-igemm/4x8-minmax-neon.c",
973 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]974 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]975 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]976 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]977 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]978 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]979 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]980 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]981 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]982 "src/x32-zip/x2-neon.c",
983 "src/x32-zip/x3-neon.c",
984 "src/x32-zip/x4-neon.c",
985 "src/x32-zip/xm-neon.c",
986 "src/x8-zip/x2-neon.c",
987 "src/x8-zip/x3-neon.c",
988 "src/x8-zip/x4-neon.c",
989 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]990 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]991 "src/math/roundd-neon-addsub.c",
992 "src/math/roundd-neon-cvt.c",
993 "src/math/roundu-neon-addsub.c",
994 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]995 "src/math/roundz-neon-addsub.c",
996 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]997 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]998 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
999 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
1000 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
1001 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1002 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1003 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1004 "src/requantization/precise-neon.c",
1005 "src/requantization/fp32-neon.c",
1006 "src/requantization/q31-neon.c",
1007 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1008]
1009
1010NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1011 "src/f32-ibilinear/gen/neonfma-c4.c",
1012 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1013 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1014 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1015 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1016 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1017 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1018 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
1019 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
1020 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1021 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1022 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1023 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1024 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1025 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1026 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1027 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1028 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1029 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1030 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1031 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1032 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1033 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1034 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1035 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1036 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1037 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1038 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1039 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1040 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1041 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1042 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
1043 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1044 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1045 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1046 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1047 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1048 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1049 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1050 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1051 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1052 "src/f32-hswish/gen/neonfma-x4.c",
1053 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1054 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1055 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1056 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1057 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1058 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1059 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1060 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1061 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1062 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1063 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1064 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1065 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
1066 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1067 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1068 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
1069 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
1070 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
1071 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
1072 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1073 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
1074 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
1075 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1076 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
1077 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1078 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1079 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1080 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
1081 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
1082 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
1083 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
1084 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
1085 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
1086 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
1087 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
1088 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
1089 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
1090 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
1091 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
1092 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
1093 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
1094 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
1095 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
1096 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
1097 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
1098 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
1099 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
1100 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
1101 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
1102 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
1103 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
1104 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
1105 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
1106 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
1107 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
1108 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
1109 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
1110 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
1111 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
1112 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
1113 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
1114 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
1115 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
1116 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
1117 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
1118 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
1119 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
1120 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
1121 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
1122 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
1123 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
1124 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
1125 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
1126 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
1127 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
1128 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
1129 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
1130 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
1131 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
1132 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
1133 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1134 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
1135 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]1136 "src/math/exp-neonfma-lut64-p2.c",
1137 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]1138 "src/math/expminus-neonfma-lut2048-p1.c",
1139 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]1140 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1141 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
1142 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
1143 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
1144 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
1145 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
1146 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
1147 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
1148 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
1149 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
1150 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
1151 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
1152 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
1153 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
1154 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
1155 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
1156 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
1157 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
1158 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1159]
1160
1161AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1162 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
1163 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
1164 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
1165 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
1166 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
1167 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1168 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1169 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1170 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1171 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1172 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
1173 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1174 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
1175 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
1176 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
1177 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
1178 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
1179 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1180 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1181 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1182 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1183 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1184 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1185 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1186 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1187 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1188 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1189 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1190 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1191 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1192 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1193 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1194 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1195 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1196 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1197 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1198 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1199 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1200 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1201 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1202 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1203 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
1204 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
1205 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
1206 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
1207 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
1208 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
1209 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1210 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1211 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1212 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1213 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1214 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1215 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1216 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1217 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1218 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1219 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1220 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1221 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1222 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1223 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1224 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1225 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1226 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1227 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1228 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1229 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1230 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1231 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1232 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1233 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1234 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1235 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1236 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1237 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1238 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1239 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1240 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1241 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1242 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1243]
1244
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1245NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1246 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1247 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1248 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1249 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1250 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1251 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1252 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1253 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1254 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1255 "src/math/roundd-neonv8.c",
1256 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1257 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1258]
1259
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1260AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1261 "src/f16-clamp/gen/neonfp16arith-x16.c",
1262 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1263 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1264 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1265 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1266 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1267 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1268 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1269 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1270 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1271 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1272 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1273 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1274 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1275 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1276 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1277 "src/f16-hswish/gen/neonfp16arith-x16.c",
1278 "src/f16-hswish/gen/neonfp16arith-x8.c",
1279 "src/f16-prelu/gen/neonfp16arith-2x16.c",
1280 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1281 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
1282 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
1283 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1284 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1285 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1286 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1287 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
1288 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
1289 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
1290 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
1291 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1292 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1293 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
1294 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
1295 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1296 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1297 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1298 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1299 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1300 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1301 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1302 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1303 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1304 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1305 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1306 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1307 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1308 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1309 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1310 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1311 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1312 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1313 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1314 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1315 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1316 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1317 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1318 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1319 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1320 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1321 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1322 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1323 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1324 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1325 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1326 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1327 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1328 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1329 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1330 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1331 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1332 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1333 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1334 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1335 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1336 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1337 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1338 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1339 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1340 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1341 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1342 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1343]
1344
1345SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1346 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1347 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1348 "src/f32-clamp/gen/sse-x4.c",
1349 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1350 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1351 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1352 "src/f32-dwconv-chw/3x3p1-sse.c",
1353 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1354 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1355 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1356 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1357 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1358 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1359 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1360 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1361 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1362 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1363 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1364 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1365 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1366 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1367 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1368 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1369 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1370 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1371 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1372 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1373 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1374 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1375 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1376 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1377 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1378 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1379 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1380 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1381 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1382 "src/f32-hswish/gen/sse-x4.c",
1383 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1384 "src/f32-ibilinear/gen/sse-c4.c",
1385 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1386 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1387 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1388 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1389 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1390 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1391 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1392 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1393 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1394 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1395 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1396 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -0700[diff] [blame]1397 "src/f32-prelu/gen/sse-2x4.c",
1398 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1399 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1400 "src/f32-spmm/gen/4x1-minmax-sse.c",
1401 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]1402 "src/f32-spmm/gen/16x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1403 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1404 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1405 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1406 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1407 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1408 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1409 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1410 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1411 "src/f32-vbinary/gen/vmax-sse-x4.c",
1412 "src/f32-vbinary/gen/vmax-sse-x8.c",
1413 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1414 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1415 "src/f32-vbinary/gen/vmin-sse-x4.c",
1416 "src/f32-vbinary/gen/vmin-sse-x8.c",
1417 "src/f32-vbinary/gen/vminc-sse-x4.c",
1418 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1419 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1420 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1421 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1422 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1423 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1424 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1425 "src/f32-vbinary/gen/vrsqrdiffc-sse-x4.c",
1426 "src/f32-vbinary/gen/vrsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1427 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1428 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1429 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1430 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1431 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1432 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1433 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1434 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1435 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1436 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1437 "src/f32-vlrelu/gen/sse-x4.c",
1438 "src/f32-vlrelu/gen/sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1439 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1440 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1441 "src/f32-vunary/gen/vabs-sse-x4.c",
1442 "src/f32-vunary/gen/vabs-sse-x8.c",
1443 "src/f32-vunary/gen/vneg-sse-x4.c",
1444 "src/f32-vunary/gen/vneg-sse-x8.c",
1445 "src/f32-vunary/gen/vsqr-sse-x4.c",
1446 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1447 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1448 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1449 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1450 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1451 "src/math/roundd-sse-addsub.c",
1452 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1453 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1454]
1455
1456SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1457 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1458 "src/f32-argmaxpool/4x-sse2-c4.c",
1459 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1460 "src/f32-prelu/gen/sse2-2x4.c",
1461 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1462 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1463 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1464 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1465 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1466 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1467 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1468 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1469 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1470 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1471 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1472 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1473 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1474 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1475 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1476 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1477 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1478 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1479 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhan0d3f4672020-06-25 16:42:58 -0700[diff] [blame]1480 "src/f32-vlrelu/gen/sse2-x4.c",
1481 "src/f32-vlrelu/gen/sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1482 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1483 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1484 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1485 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1486 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1487 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1488 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1489 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1490 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1491 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1492 "src/q8-igemm/4x4c2-minmax-sse2.c",
1493 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1494 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1495 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1496 "src/q8-gemm/2x4c8-minmax-sse2.c",
1497 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1498 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1499 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1500 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1501 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1502 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1503 "src/x32-zip/x2-sse2.c",
1504 "src/x32-zip/x3-sse2.c",
1505 "src/x32-zip/x4-sse2.c",
1506 "src/x32-zip/xm-sse2.c",
1507 "src/x8-zip/x2-sse2.c",
1508 "src/x8-zip/x3-sse2.c",
1509 "src/x8-zip/x4-sse2.c",
1510 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1511 "src/math/exp-sse2-p5.c",
1512 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1513 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1514 "src/math/roundd-sse2-cvt.c",
1515 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1516 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1517 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1518 "src/requantization/precise-sse2.c",
1519 "src/requantization/fp32-sse2.c",
1520 "src/requantization/q31-sse2.c",
1521 "src/requantization/gemmlowp-sse2.c",
1522]
1523
1524SSSE3_UKERNELS = [
1525 "src/requantization/precise-ssse3.c",
1526 "src/requantization/q31-ssse3.c",
1527 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1528]
1529
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1530SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1531 "src/f32-prelu/gen/sse41-2x4.c",
1532 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1533 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1534 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1535 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1536 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1537 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1538 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhan0d3f4672020-06-25 16:42:58 -0700[diff] [blame]1539 "src/f32-vlrelu/gen/sse41-x4.c",
1540 "src/f32-vlrelu/gen/sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1541 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1542 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1543 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1544 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1545 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1546 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1547 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1548 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1549 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1550 "src/math/roundd-sse41.c",
1551 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1552 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1553 "src/requantization/precise-sse4.c",
1554 "src/requantization/q31-sse4.c",
1555 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1556]
1557
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1558AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1559 "src/f32-clamp/gen/avx-x8.c",
1560 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1561 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1562 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1563 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1564 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1565 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1566 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1567 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1568 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1569 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1570 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1571 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1572 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1573 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1574 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1575 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1576 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1577 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1578 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1579 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1580 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1581 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1582 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1583 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1584 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1585 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1586 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1587 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1588 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1589 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1590 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1591 "src/f32-hswish/gen/avx-x8.c",
1592 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1593 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1594 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1595 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1596 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1597 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1598 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1599 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1600 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1601 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1602 "src/f32-prelu/gen/avx-2x8.c",
1603 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1604 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1605 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1606 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1607 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1608 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1609 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1610 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1611 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1612 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1613 "src/f32-vbinary/gen/vmax-avx-x8.c",
1614 "src/f32-vbinary/gen/vmax-avx-x16.c",
1615 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1616 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1617 "src/f32-vbinary/gen/vmin-avx-x8.c",
1618 "src/f32-vbinary/gen/vmin-avx-x16.c",
1619 "src/f32-vbinary/gen/vminc-avx-x8.c",
1620 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1621 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1622 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1623 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1624 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1625 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1626 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1627 "src/f32-vbinary/gen/vrsqrdiffc-avx-x8.c",
1628 "src/f32-vbinary/gen/vrsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1629 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1630 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1631 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1632 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1633 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
1634 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1635 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1636 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1637 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1638 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1639 "src/f32-vlrelu/gen/avx-x8.c",
1640 "src/f32-vlrelu/gen/avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1641 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1642 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1643 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1644 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1645 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1646 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1647 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1648 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1649 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1650 "src/f32-vunary/gen/vabs-avx-x8.c",
1651 "src/f32-vunary/gen/vabs-avx-x16.c",
1652 "src/f32-vunary/gen/vneg-avx-x8.c",
1653 "src/f32-vunary/gen/vneg-avx-x16.c",
1654 "src/f32-vunary/gen/vsqr-avx-x8.c",
1655 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1656]
1657
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1658FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1659 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
1660 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
1661 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
1662 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
1663 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
1664 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
1665 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
1666 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
1667 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
1668 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
1669 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
1670 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
1671 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1672 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1673 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
1674 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
1675 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
1676 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
1677 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
1678 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
1679 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
1680 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
1681 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
1682 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
1683 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
1684 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
1685 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
1686 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
1687 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
1688 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
1689 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
1690 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1691 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1692 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1693 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1694 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1695 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1696 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1697 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
1698 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1699 "src/f32-hswish/gen/fma3-x8.c",
1700 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1701 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1702 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1703 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1704 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1705 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1706 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
1707 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
1708 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1709 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1710 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1711 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1712 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1713 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1714 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1715]
1716
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1717AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1718 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
1719 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
1720 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
1721 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
1722 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
1723 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
1724 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
1725 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
1726 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
1727 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
1728 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
1729 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
1730 "src/f32-raddextexp/gen/avx2-p5-x64.c",
1731 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
1732 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
1733 "src/f32-raddextexp/gen/avx2-p5-x72.c",
1734 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
1735 "src/f32-raddextexp/gen/avx2-p5-x80.c",
1736 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
1737 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
1738 "src/f32-raddextexp/gen/avx2-p5-x96.c",
1739 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
1740 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
1741 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
1742 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
1743 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1744 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1745 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1746 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1747 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1748 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1749 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1750 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1751 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1752 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1753 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1754 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1755 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1756 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1757 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1758 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1759 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1760 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1761 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1762 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1763 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1764 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1765 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1766 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1767 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1768 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1769 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1770 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1771 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1772 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1773 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1774 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1775 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1776 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1777 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1778 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1779 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1780 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1781 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1782 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1783 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1784 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1785 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1786 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1787 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1788 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1789 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1790 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1791 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1792 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1793 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1794 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1795 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1796 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1797 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1798 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1799 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1800 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1801 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1802 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1803 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1804 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1805 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1806 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1807 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1808 "src/math/exp-avx2-p5.c",
1809 "src/math/exp-avx2-perm-p3.c",
1810 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1811 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1812 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1813 "src/math/sigmoid-avx2-rr2-p5-div.c",
1814 "src/math/sigmoid-avx2-rr1-p5-div.c",
1815 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1816 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1817 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1818 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1819]
1820
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1821AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1822 "src/f32-clamp/gen/avx512f-x16.c",
1823 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1824 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1825 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1826 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1827 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1828 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1829 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1830 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1831 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1832 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1833 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1834 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1835 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1836 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1837 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1838 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1839 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1840 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1841 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1842 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1843 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1844 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1845 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1846 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1847 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1848 "src/f32-hswish/gen/avx512f-x16.c",
1849 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1850 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1851 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1852 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1853 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1854 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1855 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1856 "src/f32-prelu/gen/avx512f-2x16.c",
1857 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1858 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1859 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1860 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1861 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1862 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1863 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1864 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1865 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1866 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1867 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1868 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1869 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1870 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1871 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1872 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1873 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1874 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1875 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1876 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1877 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1878 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1879 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1880 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1881 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1882 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1883 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1884 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1885 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1886 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1887 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1888 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1889 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1890 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1891 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1892 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1893 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1894 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1895 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1896 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1897 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1898 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1899 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1900 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1901 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1902 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1903 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1904 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1905 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1906 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1907 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1908 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1909 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1910 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1911 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1912 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1913 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1914 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1915 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1916 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1917 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x16.c",
1918 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1919 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1920 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1921 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
1922 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
1923 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
1924 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1925 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1926 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1927 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1928 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1929 "src/f32-vlrelu/gen/avx512f-x16.c",
1930 "src/f32-vlrelu/gen/avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1931 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1932 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1933 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1934 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1935 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1936 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
1937 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
1938 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
1939 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
1940 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
1941 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
1942 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
1943 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
1944 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
1945 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
1946 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
1947 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
1948 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
1949 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
1950 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
1951 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
1952 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
1953 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
1954 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
1955 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1956 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
1957 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
1958 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
1959 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
1960 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
1961 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
1962 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
1963 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1964 "src/f32-vunary/gen/vabs-avx512f-x16.c",
1965 "src/f32-vunary/gen/vabs-avx512f-x32.c",
1966 "src/f32-vunary/gen/vneg-avx512f-x16.c",
1967 "src/f32-vunary/gen/vneg-avx512f-x32.c",
1968 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
1969 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1970 "src/math/exp-avx512f-p5-scalef.c",
1971 "src/math/exp-avx512f-p5.c",
1972 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]1973 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1974 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1975]
1976
1977AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]1978 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]1979 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1980 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1981 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
1982 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1983 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]1984 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
1985 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
1986 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
1987 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1988 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1989 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1990 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1991 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1992]
1993
1994AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1995 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1996 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
1997 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1998 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1999 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
2000 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]2001 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
2002 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
2003 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]2004 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]2005 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
2006 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
2007 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]2008 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2009 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
2010 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]2011 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2012 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2013 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2014 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2015 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2016 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2017 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2018 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2019 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2020 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2021 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
2022 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
2023 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2024 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2025 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2026 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2027 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2028 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2029 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2030 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
2031 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]2032 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2033 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2034 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2035 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2036 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2037 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2038 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2039 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2040 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2041 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2042 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
2043 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
2044 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2045 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2046 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2047 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2048 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
2049 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2050 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2051 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
2052 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
2053 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2054 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2055 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2056 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2057 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2058 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2059 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2060 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2061 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2062 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2063 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2064 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2065 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2066 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2067 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2068 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2069]
2070
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2071INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2072 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2073 "src/xnnpack/argmaxpool.h",
2074 "src/xnnpack/avgpool.h",
2075 "src/xnnpack/clamp.h",
2076 "src/xnnpack/common.h",
2077 "src/xnnpack/conv.h",
2078 "src/xnnpack/dwconv.h",
2079 "src/xnnpack/gavgpool.h",
2080 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]2081 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2082 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]2083 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2084 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]2085 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2086 "src/xnnpack/lut.h",
2087 "src/xnnpack/math.h",
2088 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2089 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2090 "src/xnnpack/packx.h",
2091 "src/xnnpack/pad.h",
2092 "src/xnnpack/params.h",
2093 "src/xnnpack/pavgpool.h",
2094 "src/xnnpack/ppmm.h",
2095 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2096 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2097 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2098 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2099 "src/xnnpack/rmax.h",
2100 "src/xnnpack/scalar-utils.h",
2101 "src/xnnpack/spmm.h",
2102 "src/xnnpack/unpool.h",
2103 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2104 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2105 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]2106 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2107 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2108 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2109 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2110 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2111]
2112
2113INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2114 "include/xnnpack.h",
2115 "src/xnnpack/allocator.h",
2116 "src/xnnpack/compute.h",
2117 "src/xnnpack/im2col.h",
2118 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2119 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2120 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2121 "src/xnnpack/operator.h",
2122 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2123 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2124 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2125 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]2126 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2127]
2128
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2129ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2130 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2131]
2132
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2133MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2134 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2135 "include/xnnpack.h",
2136]
2137
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2138MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2139 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2140 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2141 "src/xnnpack/requantization.h",
2142 "include/xnnpack.h",
2143]
2144
2145OPERATOR_TEST_PARAMS_HDRS = [
2146 "src/xnnpack/params.h",
2147 "src/xnnpack/common.h",
2148]
2149
2150WEIGHTS_PACK_HDRS = [
2151 "src/xnnpack/pack.h",
2152 "src/xnnpack/operator.h",
2153 "src/xnnpack/compute.h",
2154]
2155
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2156LOGGING_COPTS = select({
2157 # No logging in optimized mode
2158 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
2159 # Full logging in debug mode
2160 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
2161 # Error-only logging in default (fastbuild) mode
2162 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
2163})
2164
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2165LOGGING_SRCS = select({
2166 # No logging in optimized mode
2167 ":optimized_build": [],
2168 "//conditions:default": [
2169 "src/operator-strings.c",
2170 "src/subgraph-strings.c",
2171 ],
2172})
2173
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2174LOGGING_HDRS = [
2175 "src/xnnpack/log.h",
2176]
2177
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2178xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2179 name = "tables",
2180 srcs = TABLE_SRCS,
2181 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2182 gcc_copts = xnnpack_gcc_std_copts(),
2183 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2184)
2185
2186xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2187 name = "scalar_ukernels",
2188 srcs = SCALAR_UKERNELS,
2189 hdrs = INTERNAL_HDRS,
2190 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2191 gcc_copts = xnnpack_gcc_std_copts(),
2192 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2193 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2194 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2195 "@FP16",
2196 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2197 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2198 ],
2199)
2200
2201xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2202 name = "scalar_ukernels_test_mode",
2203 srcs = SCALAR_UKERNELS,
2204 hdrs = INTERNAL_HDRS,
2205 aarch32_copts = ["-marm"],
2206 copts = [
2207 "-UNDEBUG",
2208 "-DXNN_TEST_MODE=1",
2209 ],
2210 gcc_copts = xnnpack_gcc_std_copts(),
2211 msvc_copts = xnnpack_msvc_std_copts(),
2212 deps = [
2213 ":tables",
2214 "@FP16",
2215 "@FXdiv",
2216 "@pthreadpool",
2217 ],
2218)
2219
2220xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2221 name = "wasm_ukernels",
2222 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2223 gcc_copts = xnnpack_gcc_std_copts(),
2224 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2225 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2226 wasmsimd_copts = [
2227 "-msimd128",
2228 "-munimplemented-simd128",
2229 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2230 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2231 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2232 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2233 "@FP16",
2234 "@FXdiv",
2235 "@pthreadpool",
2236 ],
2237)
2238
2239xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2240 name = "wasm_ukernels_test_mode",
2241 hdrs = INTERNAL_HDRS,
2242 copts = [
2243 "-UNDEBUG",
2244 "-DXNN_TEST_MODE=1",
2245 ],
2246 gcc_copts = xnnpack_gcc_std_copts(),
2247 msvc_copts = xnnpack_msvc_std_copts(),
2248 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2249 wasmsimd_copts = [
2250 "-msimd128",
2251 "-munimplemented-simd128",
2252 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2253 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2254 deps = [
2255 ":tables",
2256 "@FP16",
2257 "@FXdiv",
2258 "@pthreadpool",
2259 ],
2260)
2261
2262xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2263 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2264 hdrs = INTERNAL_HDRS,
2265 aarch32_copts = [
2266 "-marm",
2267 "-mfpu=neon",
2268 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2269 gcc_copts = xnnpack_gcc_std_copts(),
2270 gcc_x86_copts = ["-msse2"],
2271 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2272 optimized_copts = [
2273 "-O3",
2274 "-ffast-math",
2275 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2276 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2277 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2278 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2279 "@FP16",
2280 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2281 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2282 ],
2283)
2284
2285xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2286 name = "psimd_fastmath_ukernels_test_mode",
2287 hdrs = INTERNAL_HDRS,
2288 aarch32_copts = [
2289 "-marm",
2290 "-mfpu=neon",
2291 ],
2292 copts = [
2293 "-UNDEBUG",
2294 "-DXNN_TEST_MODE=1",
2295 ],
2296 gcc_copts = xnnpack_gcc_std_copts(),
2297 gcc_x86_copts = ["-msse2"],
2298 msvc_copts = xnnpack_msvc_std_copts(),
2299 optimized_copts = [
2300 "-O3",
2301 "-ffast-math",
2302 ],
2303 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2304 deps = [
2305 ":tables",
2306 "@FP16",
2307 "@psimd",
2308 "@pthreadpool",
2309 ],
2310)
2311
2312xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2313 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2314 hdrs = INTERNAL_HDRS,
2315 aarch32_copts = [
2316 "-marm",
2317 "-mfpu=neon",
2318 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2319 gcc_copts = xnnpack_gcc_std_copts(),
2320 gcc_x86_copts = ["-msse2"],
2321 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2322 optimized_copts = [
2323 "-O3",
2324 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2325 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2326 deps = [
2327 ":tables",
2328 "@FP16",
2329 "@psimd",
2330 "@pthreadpool",
2331 ],
2332)
2333
2334xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2335 name = "psimd_accmath_ukernels_test_mode",
2336 hdrs = INTERNAL_HDRS,
2337 aarch32_copts = [
2338 "-marm",
2339 "-mfpu=neon",
2340 ],
2341 copts = [
2342 "-UNDEBUG",
2343 "-DXNN_TEST_MODE=1",
2344 ],
2345 gcc_copts = xnnpack_gcc_std_copts(),
2346 gcc_x86_copts = ["-msse2"],
2347 msvc_copts = xnnpack_msvc_std_copts(),
2348 optimized_copts = [
2349 "-O3",
2350 ],
2351 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2352 deps = [
2353 ":tables",
2354 "@FP16",
2355 "@psimd",
2356 "@pthreadpool",
2357 ],
2358)
2359
2360xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2361 name = "neon_ukernels",
2362 hdrs = INTERNAL_HDRS,
2363 aarch32_copts = [
2364 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2365 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2366 "-mfpu=neon",
2367 ],
2368 aarch32_srcs = NEON_UKERNELS,
2369 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2370 gcc_copts = xnnpack_gcc_std_copts(),
2371 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2372 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2373 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2374 "@FP16",
2375 "@pthreadpool",
2376 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2377)
2378
2379xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2380 name = "neon_ukernels_test_mode",
2381 hdrs = INTERNAL_HDRS,
2382 aarch32_copts = [
2383 "-marm",
2384 "-march=armv7-a",
2385 "-mfpu=neon",
2386 ],
2387 aarch32_srcs = NEON_UKERNELS,
2388 aarch64_srcs = NEON_UKERNELS,
2389 copts = [
2390 "-UNDEBUG",
2391 "-DXNN_TEST_MODE=1",
2392 ],
2393 gcc_copts = xnnpack_gcc_std_copts(),
2394 msvc_copts = xnnpack_msvc_std_copts(),
2395 deps = [
2396 ":tables",
2397 "@FP16",
2398 "@pthreadpool",
2399 ],
2400)
2401
2402xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2403 name = "neonfma_ukernels",
2404 hdrs = INTERNAL_HDRS,
2405 aarch32_copts = [
2406 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2407 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2408 "-mfpu=neon-vfpv4",
2409 ],
2410 aarch32_srcs = NEONFMA_UKERNELS,
2411 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2412 apple_aarch32_copts = [
2413 "-mcpu=swift",
2414 "-mtune=generic",
2415 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2416 gcc_copts = xnnpack_gcc_std_copts(),
2417 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2418 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2419 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2420 "@FP16",
2421 "@pthreadpool",
2422 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2423)
2424
2425xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2426 name = "neonfma_ukernels_test_mode",
2427 hdrs = INTERNAL_HDRS,
2428 aarch32_copts = [
2429 "-marm",
2430 "-march=armv7-a",
2431 "-mfpu=neon-vfpv4",
2432 ],
2433 aarch32_srcs = NEONFMA_UKERNELS,
2434 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2435 apple_aarch32_copts = [
2436 "-mcpu=swift",
2437 "-mtune=generic",
2438 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2439 copts = [
2440 "-UNDEBUG",
2441 "-DXNN_TEST_MODE=1",
2442 ],
2443 gcc_copts = xnnpack_gcc_std_copts(),
2444 msvc_copts = xnnpack_msvc_std_copts(),
2445 deps = [
2446 ":tables",
2447 "@FP16",
2448 "@pthreadpool",
2449 ],
2450)
2451
2452xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2453 name = "neonv8_ukernels",
2454 hdrs = INTERNAL_HDRS,
2455 aarch32_copts = [
2456 "-marm",
2457 "-march=armv8-a",
2458 "-mfpu=neon-fp-armv8",
2459 ],
2460 aarch32_srcs = NEONV8_UKERNELS,
2461 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2462 apple_aarch32_copts = [
2463 "-mcpu=cyclone",
2464 "-mtune=generic",
2465 ],
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2466 gcc_copts = xnnpack_gcc_std_copts(),
2467 msvc_copts = xnnpack_msvc_std_copts(),
2468 deps = [
2469 ":tables",
2470 "@FP16",
2471 "@pthreadpool",
2472 ],
2473)
2474
2475xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2476 name = "neonv8_ukernels_test_mode",
2477 hdrs = INTERNAL_HDRS,
2478 aarch32_copts = [
2479 "-marm",
2480 "-march=armv8-a",
2481 "-mfpu=neon-fp-armv8",
2482 ],
2483 aarch32_srcs = NEONV8_UKERNELS,
2484 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2485 apple_aarch32_copts = [
2486 "-mcpu=cyclone",
2487 "-mtune=generic",
2488 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2489 copts = [
2490 "-UNDEBUG",
2491 "-DXNN_TEST_MODE=1",
2492 ],
2493 gcc_copts = xnnpack_gcc_std_copts(),
2494 msvc_copts = xnnpack_msvc_std_copts(),
2495 deps = [
2496 ":tables",
2497 "@FP16",
2498 "@pthreadpool",
2499 ],
2500)
2501
2502xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2503 name = "neonfp16arith_ukernels",
2504 hdrs = INTERNAL_HDRS,
2505 aarch64_copts = ["-march=armv8.2-a+fp16"],
2506 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2507 gcc_copts = xnnpack_gcc_std_copts(),
2508 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2509 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2510 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2511 "@FP16",
2512 "@pthreadpool",
2513 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2514)
2515
2516xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2517 name = "neonfp16arith_ukernels_test_mode",
2518 hdrs = INTERNAL_HDRS,
2519 aarch64_copts = ["-march=armv8.2-a+fp16"],
2520 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2521 copts = [
2522 "-UNDEBUG",
2523 "-DXNN_TEST_MODE=1",
2524 ],
2525 gcc_copts = xnnpack_gcc_std_copts(),
2526 msvc_copts = xnnpack_msvc_std_copts(),
2527 deps = [
2528 ":tables",
2529 "@FP16",
2530 "@pthreadpool",
2531 ],
2532)
2533
2534xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2535 name = "sse2_ukernels",
2536 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2537 gcc_copts = xnnpack_gcc_std_copts(),
2538 gcc_x86_copts = ["-msse2"],
2539 msvc_copts = xnnpack_msvc_std_copts(),
2540 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2541 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2542 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2543 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2544 "@FP16",
2545 "@pthreadpool",
2546 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2547)
2548
2549xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2550 name = "sse2_ukernels_test_mode",
2551 hdrs = INTERNAL_HDRS,
2552 copts = [
2553 "-UNDEBUG",
2554 "-DXNN_TEST_MODE=1",
2555 ],
2556 gcc_copts = xnnpack_gcc_std_copts(),
2557 gcc_x86_copts = ["-msse2"],
2558 msvc_copts = xnnpack_msvc_std_copts(),
2559 msvc_x86_32_copts = ["/arch:SSE2"],
2560 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2561 deps = [
2562 ":tables",
2563 "@FP16",
2564 "@pthreadpool",
2565 ],
2566)
2567
2568xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2569 name = "ssse3_ukernels",
2570 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2571 gcc_copts = xnnpack_gcc_std_copts(),
2572 gcc_x86_copts = ["-mssse3"],
2573 msvc_copts = xnnpack_msvc_std_copts(),
2574 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2575 x86_srcs = SSSE3_UKERNELS,
2576 deps = [
2577 ":tables",
2578 "@FP16",
2579 "@pthreadpool",
2580 ],
2581)
2582
2583xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2584 name = "ssse3_ukernels_test_mode",
2585 hdrs = INTERNAL_HDRS,
2586 copts = [
2587 "-UNDEBUG",
2588 "-DXNN_TEST_MODE=1",
2589 ],
2590 gcc_copts = xnnpack_gcc_std_copts(),
2591 gcc_x86_copts = ["-mssse3"],
2592 msvc_copts = xnnpack_msvc_std_copts(),
2593 msvc_x86_32_copts = ["/arch:SSE2"],
2594 x86_srcs = SSSE3_UKERNELS,
2595 deps = [
2596 ":tables",
2597 "@FP16",
2598 "@pthreadpool",
2599 ],
2600)
2601
2602xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2603 name = "sse41_ukernels",
2604 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2605 gcc_copts = xnnpack_gcc_std_copts(),
2606 gcc_x86_copts = ["-msse4.1"],
2607 msvc_copts = xnnpack_msvc_std_copts(),
2608 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2609 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2610 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2611 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2612 "@FP16",
2613 "@pthreadpool",
2614 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2615)
2616
2617xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2618 name = "sse41_ukernels_test_mode",
2619 hdrs = INTERNAL_HDRS,
2620 copts = [
2621 "-UNDEBUG",
2622 "-DXNN_TEST_MODE=1",
2623 ],
2624 gcc_copts = xnnpack_gcc_std_copts(),
2625 gcc_x86_copts = ["-msse4.1"],
2626 msvc_copts = xnnpack_msvc_std_copts(),
2627 msvc_x86_32_copts = ["/arch:SSE2"],
2628 x86_srcs = SSE41_UKERNELS,
2629 deps = [
2630 ":tables",
2631 "@FP16",
2632 "@pthreadpool",
2633 ],
2634)
2635
2636xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2637 name = "avx_ukernels",
2638 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2639 gcc_copts = xnnpack_gcc_std_copts(),
2640 gcc_x86_copts = ["-mavx"],
2641 msvc_copts = xnnpack_msvc_std_copts(),
2642 msvc_x86_32_copts = ["/arch:AVX"],
2643 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2644 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2645 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2646 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2647 "@FP16",
2648 "@pthreadpool",
2649 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2650)
2651
2652xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2653 name = "avx_ukernels_test_mode",
2654 hdrs = INTERNAL_HDRS,
2655 copts = [
2656 "-UNDEBUG",
2657 "-DXNN_TEST_MODE=1",
2658 ],
2659 gcc_copts = xnnpack_gcc_std_copts(),
2660 gcc_x86_copts = ["-mavx"],
2661 msvc_copts = xnnpack_msvc_std_copts(),
2662 msvc_x86_32_copts = ["/arch:AVX"],
2663 msvc_x86_64_copts = ["/arch:AVX"],
2664 x86_srcs = AVX_UKERNELS,
2665 deps = [
2666 ":tables",
2667 "@FP16",
2668 "@pthreadpool",
2669 ],
2670)
2671
2672xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2673 name = "fma3_ukernels",
2674 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2675 gcc_copts = xnnpack_gcc_std_copts(),
2676 gcc_x86_copts = ["-mfma"],
2677 msvc_copts = xnnpack_msvc_std_copts(),
2678 msvc_x86_32_copts = ["/arch:AVX"],
2679 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2680 x86_srcs = FMA3_UKERNELS,
2681 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2682 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2683 "@FP16",
2684 "@pthreadpool",
2685 ],
2686)
2687
2688xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2689 name = "fma3_ukernels_test_mode",
2690 hdrs = INTERNAL_HDRS,
2691 copts = [
2692 "-UNDEBUG",
2693 "-DXNN_TEST_MODE=1",
2694 ],
2695 gcc_copts = xnnpack_gcc_std_copts(),
2696 gcc_x86_copts = ["-mfma"],
2697 msvc_copts = xnnpack_msvc_std_copts(),
2698 msvc_x86_32_copts = ["/arch:AVX"],
2699 msvc_x86_64_copts = ["/arch:AVX"],
2700 x86_srcs = FMA3_UKERNELS,
2701 deps = [
2702 ":tables",
2703 "@FP16",
2704 "@pthreadpool",
2705 ],
2706)
2707
2708xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2709 name = "avx2_ukernels",
2710 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2711 gcc_copts = xnnpack_gcc_std_copts(),
2712 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2713 "-mfma",
2714 "-mavx2",
2715 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2716 msvc_copts = xnnpack_msvc_std_copts(),
2717 msvc_x86_32_copts = ["/arch:AVX2"],
2718 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2719 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2720 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2721 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2722 "@FP16",
2723 "@pthreadpool",
2724 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2725)
2726
2727xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2728 name = "avx2_ukernels_test_mode",
2729 hdrs = INTERNAL_HDRS,
2730 copts = [
2731 "-UNDEBUG",
2732 "-DXNN_TEST_MODE=1",
2733 ],
2734 gcc_copts = xnnpack_gcc_std_copts(),
2735 gcc_x86_copts = [
2736 "-mfma",
2737 "-mavx2",
2738 ],
2739 msvc_copts = xnnpack_msvc_std_copts(),
2740 msvc_x86_32_copts = ["/arch:AVX2"],
2741 msvc_x86_64_copts = ["/arch:AVX2"],
2742 x86_srcs = AVX2_UKERNELS,
2743 deps = [
2744 ":tables",
2745 "@FP16",
2746 "@pthreadpool",
2747 ],
2748)
2749
2750xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2751 name = "avx512f_ukernels",
2752 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2753 gcc_copts = xnnpack_gcc_std_copts(),
2754 gcc_x86_copts = ["-mavx512f"],
2755 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2756 msvc_copts = xnnpack_msvc_std_copts(),
2757 msvc_x86_32_copts = ["/arch:AVX512"],
2758 msvc_x86_64_copts = ["/arch:AVX512"],
2759 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2760 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2761 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2762 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2763 "@FP16",
2764 "@pthreadpool",
2765 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2766)
2767
2768xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2769 name = "avx512f_ukernels_test_mode",
2770 hdrs = INTERNAL_HDRS,
2771 copts = [
2772 "-UNDEBUG",
2773 "-DXNN_TEST_MODE=1",
2774 ],
2775 gcc_copts = xnnpack_gcc_std_copts(),
2776 gcc_x86_copts = ["-mavx512f"],
2777 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2778 msvc_copts = xnnpack_msvc_std_copts(),
2779 msvc_x86_32_copts = ["/arch:AVX512"],
2780 msvc_x86_64_copts = ["/arch:AVX512"],
2781 msys_copts = ["-fno-asynchronous-unwind-tables"],
2782 x86_srcs = AVX512F_UKERNELS,
2783 deps = [
2784 ":tables",
2785 "@FP16",
2786 "@pthreadpool",
2787 ],
2788)
2789
2790xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2791 name = "asm_ukernels",
2792 hdrs = ["src/xnnpack/assembly.h"],
2793 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2794 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2795 aarch64_srcs = AARCH64_ASM_UKERNELS,
2796)
2797
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2798xnnpack_cc_library(
2799 name = "logging_utils",
2800 srcs = LOGGING_SRCS,
2801 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2802 copts = LOGGING_COPTS + [
2803 "-Isrc",
2804 "-Iinclude",
2805 ] + select({
2806 ":debug_build": [],
2807 "//conditions:default": xnnpack_min_size_copts(),
2808 }),
2809 gcc_copts = xnnpack_gcc_std_copts(),
2810 msvc_copts = xnnpack_msvc_std_copts(),
2811 visibility = xnnpack_visibility(),
2812 deps = [
2813 "@FP16",
2814 "@clog",
2815 "@pthreadpool",
2816 ],
2817)
2818
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2819xnnpack_aggregate_library(
2820 name = "ukernels",
2821 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2822 ":neon_ukernels",
2823 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2824 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2825 ":asm_ukernels",
2826 ],
2827 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2828 ":neon_ukernels",
2829 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2830 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2831 ":neonfp16arith_ukernels",
2832 ":asm_ukernels",
2833 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2834 generic_deps = [
2835 ":scalar_ukernels",
2836 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2837 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2838 ":psimd_fastmath_ukernels",
2839 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2840 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2841 wasm_deps = [
2842 ":wasm_ukernels",
2843 ],
2844 wasmsimd_deps = [
2845 ":wasm_ukernels",
2846 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2847 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2848 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2849 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2850 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2851 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2852 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2853 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2854 ":avx512f_ukernels",
2855 ],
2856)
2857
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2858xnnpack_aggregate_library(
2859 name = "ukernels_test_mode",
2860 aarch32_deps = [
2861 ":neon_ukernels_test_mode",
2862 ":neonfma_ukernels_test_mode",
2863 ":neonv8_ukernels_test_mode",
2864 ":asm_ukernels",
2865 ],
2866 aarch64_deps = [
2867 ":neon_ukernels_test_mode",
2868 ":neonfma_ukernels_test_mode",
2869 ":neonv8_ukernels_test_mode",
2870 ":neonfp16arith_ukernels_test_mode",
2871 ":asm_ukernels",
2872 ],
2873 generic_deps = [
2874 ":scalar_ukernels_test_mode",
2875 ],
2876 psimd_deps = [
2877 ":psimd_fastmath_ukernels_test_mode",
2878 ":psimd_accmath_ukernels_test_mode",
2879 ],
2880 wasm_deps = [
2881 ":wasm_ukernels_test_mode",
2882 ],
2883 wasmsimd_deps = [
2884 ":wasm_ukernels_test_mode",
2885 ],
2886 x86_deps = [
2887 ":sse2_ukernels_test_mode",
2888 ":ssse3_ukernels_test_mode",
2889 ":sse41_ukernels_test_mode",
2890 ":avx_ukernels_test_mode",
2891 ":fma3_ukernels_test_mode",
2892 ":avx2_ukernels_test_mode",
2893 ":avx512f_ukernels_test_mode",
2894 ],
2895)
2896
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2897# This target must be compatible with Android NDK r17 and compile with Clang 6.
2898# It is similar to :ukernels target, but excludes microkernels which require
2899# NEON FP16 arithmetics, NEON Dot Product, and newer intrinsics.
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2900xnnpack_aggregate_library(
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2901 name = "ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2902 aarch32_deps = [
2903 ":neon_ukernels",
2904 ":neonfma_ukernels",
2905 ":neonv8_ukernels",
2906 ":asm_ukernels",
2907 ],
2908 aarch64_deps = [
2909 ":neon_ukernels",
2910 ":neonfma_ukernels",
2911 ":neonv8_ukernels",
2912 ":asm_ukernels",
2913 ],
2914 generic_deps = [
2915 ":scalar_ukernels",
2916 ],
2917 psimd_deps = [
2918 ":psimd_fastmath_ukernels",
2919 ":psimd_accmath_ukernels",
2920 ],
2921 wasm_deps = [
2922 ":wasm_ukernels",
2923 ],
2924 wasmsimd_deps = [
2925 ":wasm_ukernels",
2926 ],
2927 x86_deps = [
2928 ":sse2_ukernels",
2929 ":ssse3_ukernels",
2930 ":sse41_ukernels",
2931 ":avx_ukernels",
2932 ":fma3_ukernels",
2933 ":avx2_ukernels",
2934 ":avx512f_ukernels",
2935 ],
2936)
2937
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2938xnnpack_cc_library(
2939 name = "im2col",
2940 srcs = ["src/im2col.c"],
2941 hdrs = [
2942 "src/xnnpack/common.h",
2943 "src/xnnpack/im2col.h",
2944 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2945 gcc_copts = xnnpack_gcc_std_copts(),
2946 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2947)
2948
2949xnnpack_cc_library(
2950 name = "indirection",
2951 srcs = ["src/indirection.c"],
2952 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2953 gcc_copts = xnnpack_gcc_std_copts(),
2954 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2955 deps = [
2956 "@FP16",
2957 "@FXdiv",
2958 "@pthreadpool",
2959 ],
2960)
2961
2962xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2963 name = "indirection_test_mode",
2964 srcs = ["src/indirection.c"],
2965 hdrs = INTERNAL_HDRS,
2966 copts = [
2967 "-UNDEBUG",
2968 "-DXNN_TEST_MODE=1",
2969 ],
2970 gcc_copts = xnnpack_gcc_std_copts(),
2971 msvc_copts = xnnpack_msvc_std_copts(),
2972 deps = [
2973 "@FP16",
2974 "@FXdiv",
2975 "@pthreadpool",
2976 ],
2977)
2978
2979xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2980 name = "operator_run",
2981 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2982 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2983 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2984 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2985 "//conditions:default": [],
2986 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2987 gcc_copts = xnnpack_gcc_std_copts(),
2988 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2989 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2990 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2991 "@FP16",
2992 "@FXdiv",
2993 "@clog",
2994 "@pthreadpool",
2995 ],
2996)
2997
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2998xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2999 name = "operator_run_test_mode",
3000 srcs = ["src/operator-run.c"],
3001 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3002 copts = LOGGING_COPTS + [
3003 "-UNDEBUG",
3004 "-DXNN_TEST_MODE=1",
3005 ] + select({
3006 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3007 "//conditions:default": [],
3008 }),
3009 gcc_copts = xnnpack_gcc_std_copts(),
3010 msvc_copts = xnnpack_msvc_std_copts(),
3011 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3012 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3013 "@FP16",
3014 "@FXdiv",
3015 "@clog",
3016 "@pthreadpool",
3017 ],
3018)
3019
3020xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3021 name = "memory_planner",
3022 srcs = ["src/memory-planner.c"],
3023 hdrs = INTERNAL_HDRS,
3024 defines = select({
3025 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3026 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3027 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3028 }),
3029 gcc_copts = xnnpack_gcc_std_copts(),
3030 msvc_copts = xnnpack_msvc_std_copts(),
3031 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3032 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3033 "@pthreadpool",
3034 ],
3035)
3036
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3037xnnpack_cc_library(
3038 name = "memory_planner_test_mode",
3039 srcs = ["src/memory-planner.c"],
3040 hdrs = INTERNAL_HDRS,
3041 copts = [
3042 "-UNDEBUG",
3043 "-DXNN_TEST_MODE=1",
3044 ],
3045 defines = select({
3046 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3047 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3048 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3049 }),
3050 gcc_copts = xnnpack_gcc_std_copts(),
3051 msvc_copts = xnnpack_msvc_std_copts(),
3052 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3053 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3054 "@pthreadpool",
3055 ],
3056)
3057
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3058cc_library(
3059 name = "enable_assembly",
3060 defines = select({
3061 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
3062 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]3063 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3064 }),
3065)
3066
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3067cc_library(
3068 name = "enable_sparse",
3069 defines = select({
3070 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
3071 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan8b283aa2020-06-18 16:48:57 -0700[diff] [blame]3072 "//conditions:default": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3073 }),
3074)
3075
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3076xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3077 name = "operators",
3078 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]3079 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3080 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3081 ],
3082 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3083 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3084 "-Isrc",
3085 "-Iinclude",
3086 ] + select({
3087 ":debug_build": [],
3088 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3089 }) + select({
3090 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3091 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3092 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3093 gcc_copts = xnnpack_gcc_std_copts(),
3094 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3095 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3096 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3097 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3098 "@FP16",
3099 "@FXdiv",
3100 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3101 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3102 ],
3103)
3104
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3105xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3106 name = "operators_test_mode",
3107 srcs = OPERATOR_SRCS + [
3108 "src/memory.c",
3109 "src/operator-delete.c",
3110 ],
3111 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3112 copts = LOGGING_COPTS + [
3113 "-Isrc",
3114 "-Iinclude",
3115 "-UNDEBUG",
3116 "-DXNN_TEST_MODE=1",
3117 ] + select({
3118 ":debug_build": [],
3119 "//conditions:default": xnnpack_min_size_copts(),
3120 }) + select({
3121 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3122 "//conditions:default": [],
3123 }),
3124 gcc_copts = xnnpack_gcc_std_copts(),
3125 msvc_copts = xnnpack_msvc_std_copts(),
3126 deps = [
3127 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3128 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3129 "@FP16",
3130 "@FXdiv",
3131 "@clog",
3132 "@pthreadpool",
3133 ],
3134)
3135
3136xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3137 name = "XNNPACK",
3138 srcs = [
3139 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]3140 "src/runtime.c",
3141 "src/subgraph.c",
3142 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3143 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3144 hdrs = ["include/xnnpack.h"],
3145 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3146 "-Isrc",
3147 "-Iinclude",
3148 ] + select({
3149 ":debug_build": [],
3150 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3151 }) + select({
3152 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3153 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3154 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3155 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3156 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3157 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3158 visibility = xnnpack_visibility(),
3159 deps = [
3160 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3161 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3162 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3163 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3164 ":operator_run",
3165 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3166 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3167 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]3168 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3169 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]3170 ] + select({
3171 ":emscripten": [],
3172 "//conditions:default": ["@cpuinfo"],
3173 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3174)
3175
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3176xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3177 name = "XNNPACK_test_mode",
3178 srcs = [
3179 "src/init.c",
3180 "src/runtime.c",
3181 "src/subgraph.c",
3182 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3183 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3184 hdrs = ["include/xnnpack.h"],
3185 copts = LOGGING_COPTS + [
3186 "-Isrc",
3187 "-Iinclude",
3188 "-UNDEBUG",
3189 "-DXNN_TEST_MODE=1",
3190 ] + select({
3191 ":debug_build": [],
3192 "//conditions:default": xnnpack_min_size_copts(),
3193 }) + select({
3194 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3195 "//conditions:default": [],
3196 }),
3197 gcc_copts = xnnpack_gcc_std_copts(),
3198 includes = ["include"],
3199 msvc_copts = xnnpack_msvc_std_copts(),
3200 visibility = xnnpack_visibility(),
3201 deps = [
3202 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3203 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3204 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3205 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3206 ":operator_run_test_mode",
3207 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3208 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3209 "@clog",
3210 "@FP16",
3211 "@pthreadpool",
3212 ] + select({
3213 ":emscripten": [],
3214 "//conditions:default": ["@cpuinfo"],
3215 }),
3216)
3217
3218xnnpack_cc_library(
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3219 name = "xnnpack_f32",
3220 srcs = [
3221 "src/init.c",
3222 "src/runtime.c",
3223 "src/subgraph.c",
3224 "src/tensor.c",
3225 ] + SUBGRAPH_SRCS,
3226 hdrs = ["include/xnnpack.h"],
3227 copts = LOGGING_COPTS + [
3228 "-Isrc",
3229 "-Iinclude",
3230 ] + select({
3231 ":debug_build": [],
3232 "//conditions:default": xnnpack_min_size_copts(),
3233 }) + select({
3234 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3235 "//conditions:default": [],
3236 }),
3237 defines = [
3238 "XNN_NO_Q8_OPERATORS",
3239 "XNN_NO_U8_OPERATORS",
3240 "XNN_NO_X8_OPERATORS",
3241 "XNN_NO_F16_OPERATORS",
3242 "XNN_NO_X16_OPERATORS",
3243 ],
3244 gcc_copts = xnnpack_gcc_std_copts(),
3245 includes = ["include"],
3246 msvc_copts = xnnpack_msvc_std_copts(),
3247 visibility = xnnpack_visibility(),
3248 deps = [
3249 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3250 ":enable_sparse",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3251 ":logging_utils",
3252 ":memory_planner",
3253 ":operator_run",
3254 ":operators",
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]3255 ":ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3256 "@clog",
3257 "@FP16",
3258 "@pthreadpool",
3259 ] + select({
3260 ":emscripten": [],
3261 "//conditions:default": ["@cpuinfo"],
3262 }),
3263)
3264
3265xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3266 name = "xnnpack_operators_nhwc_f32",
3267 srcs = [
3268 "src/init.c",
3269 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3270 hdrs = ["include/xnnpack.h"],
3271 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3272 "-Isrc",
3273 "-Iinclude",
3274 ] + select({
3275 ":debug_build": [],
3276 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3277 }) + select({
3278 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3279 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3280 }),
3281 defines = [
3282 "XNN_NO_Q8_OPERATORS",
3283 "XNN_NO_U8_OPERATORS",
3284 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]3285 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3286 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3287 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3288 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3289 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3290 visibility = xnnpack_visibility(),
3291 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3292 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3293 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3294 ":operator_run",
3295 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3296 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3297 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3298 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3299 ] + select({
3300 ":emscripten": [],
3301 "//conditions:default": ["@cpuinfo"],
3302 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3303)
3304
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3305xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3306 name = "bench_utils",
3307 srcs = ["bench/utils.cc"],
3308 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]3309 deps = [
3310 "@com_google_benchmark//:benchmark",
3311 "@cpuinfo",
3312 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3313)
3314
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3315######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3316
3317xnnpack_benchmark(
3318 name = "q8_gemm_bench",
3319 srcs = [
3320 "bench/gemm.h",
3321 "bench/q8-gemm.cc",
3322 "src/xnnpack/AlignedAllocator.h",
3323 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3324 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3325 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3326)
3327
3328xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3329 name = "f16_igemm_bench",
3330 srcs = [
3331 "bench/f16-igemm.cc",
3332 "bench/conv.h",
3333 "bench/google/conv.h",
3334 "src/xnnpack/AlignedAllocator.h",
3335 ] + MICROKERNEL_BENCHMARK_HDRS,
3336 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3337)
3338
3339xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3340 name = "f16_gemm_bench",
3341 srcs = [
3342 "bench/f16-gemm.cc",
3343 "bench/gemm.h",
3344 "src/xnnpack/AlignedAllocator.h",
3345 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3346 deps = MICROKERNEL_BENCHMARK_DEPS,
3347)
3348
3349xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3350 name = "f16_spmm_bench",
3351 srcs = [
3352 "bench/f16-spmm.cc",
3353 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3354 "src/xnnpack/AlignedAllocator.h",
3355 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3356 deps = MICROKERNEL_BENCHMARK_DEPS,
3357)
3358
3359xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3360 name = "f32_igemm_bench",
3361 srcs = [
3362 "bench/f32-igemm.cc",
3363 "bench/conv.h",
3364 "src/xnnpack/AlignedAllocator.h",
3365 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3366 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3367)
3368
3369xnnpack_benchmark(
3370 name = "f32_conv_hwc_bench",
3371 srcs = [
3372 "bench/f32-conv-hwc.cc",
3373 "bench/dconv.h",
3374 "src/xnnpack/AlignedAllocator.h",
3375 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3376 deps = MICROKERNEL_BENCHMARK_DEPS,
3377)
3378
3379xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3380 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3381 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3382 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3383 "bench/dconv.h",
3384 "src/xnnpack/AlignedAllocator.h",
3385 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3386 deps = MICROKERNEL_BENCHMARK_DEPS,
3387)
3388
3389xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3390 name = "f16_dwconv_bench",
3391 srcs = [
3392 "bench/f16-dwconv.cc",
3393 "bench/dwconv.h",
3394 "bench/google/dwconv.h",
3395 "src/xnnpack/AlignedAllocator.h",
3396 ] + MICROKERNEL_BENCHMARK_HDRS,
3397 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3398)
3399
3400xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3401 name = "f32_dwconv_bench",
3402 srcs = [
3403 "bench/f32-dwconv.cc",
3404 "bench/dwconv.h",
3405 "src/xnnpack/AlignedAllocator.h",
3406 ] + MICROKERNEL_BENCHMARK_HDRS,
3407 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3408)
3409
3410xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3411 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3412 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3413 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3414 "bench/dwconv.h",
3415 "src/xnnpack/AlignedAllocator.h",
3416 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3417 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3418)
3419
3420xnnpack_benchmark(
3421 name = "f32_gemm_bench",
3422 srcs = [
3423 "bench/f32-gemm.cc",
3424 "bench/gemm.h",
3425 "src/xnnpack/AlignedAllocator.h",
3426 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3427 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3428 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3429)
3430
3431xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3432 name = "f32_raddexpminusmax_bench",
3433 srcs = [
3434 "bench/f32-raddexpminusmax.cc",
3435 "src/xnnpack/AlignedAllocator.h",
3436 ] + MICROKERNEL_BENCHMARK_HDRS,
3437 deps = MICROKERNEL_BENCHMARK_DEPS,
3438)
3439
3440xnnpack_benchmark(
3441 name = "f32_raddextexp_bench",
3442 srcs = [
3443 "bench/f32-raddextexp.cc",
3444 "src/xnnpack/AlignedAllocator.h",
3445 ] + MICROKERNEL_BENCHMARK_HDRS,
3446 deps = MICROKERNEL_BENCHMARK_DEPS,
3447)
3448
3449xnnpack_benchmark(
3450 name = "f32_raddstoreexpminusmax_bench",
3451 srcs = [
3452 "bench/f32-raddstoreexpminusmax.cc",
3453 "src/xnnpack/AlignedAllocator.h",
3454 ] + MICROKERNEL_BENCHMARK_HDRS,
3455 deps = MICROKERNEL_BENCHMARK_DEPS,
3456)
3457
3458xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3459 name = "f32_rmax_bench",
3460 srcs = [
3461 "bench/f32-rmax.cc",
3462 "src/xnnpack/AlignedAllocator.h",
3463 ] + MICROKERNEL_BENCHMARK_HDRS,
3464 deps = MICROKERNEL_BENCHMARK_DEPS,
3465)
3466
3467xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3468 name = "f32_sigmoid_bench",
3469 srcs = [
3470 "bench/f32-sigmoid.cc",
3471 "src/xnnpack/AlignedAllocator.h",
3472 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3473 deps = MICROKERNEL_BENCHMARK_DEPS,
3474)
3475
3476xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3477 name = "f32_spmm_bench",
3478 srcs = [
3479 "bench/f32-spmm.cc",
3480 "bench/gemm.h",
3481 "src/xnnpack/AlignedAllocator.h",
3482 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3483 deps = MICROKERNEL_BENCHMARK_DEPS,
3484)
3485
3486xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3487 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3488 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3489 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3490 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3491 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3492 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3493)
3494
3495xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3496 name = "f32_vscaleexpminusmax_bench",
3497 srcs = [
3498 "bench/f32-vscaleexpminusmax.cc",
3499 "src/xnnpack/AlignedAllocator.h",
3500 ] + MICROKERNEL_BENCHMARK_HDRS,
3501 deps = MICROKERNEL_BENCHMARK_DEPS,
3502)
3503
3504xnnpack_benchmark(
3505 name = "f32_vscaleextexp_bench",
3506 srcs = [
3507 "bench/f32-vscaleextexp.cc",
3508 "src/xnnpack/AlignedAllocator.h",
3509 ] + MICROKERNEL_BENCHMARK_HDRS,
3510 deps = MICROKERNEL_BENCHMARK_DEPS,
3511)
3512
3513xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3514 name = "f32_im2col_gemm_bench",
3515 srcs = [
3516 "bench/f32-im2col-gemm.cc",
3517 "bench/conv.h",
3518 "src/xnnpack/AlignedAllocator.h",
3519 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3520 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3521)
3522
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3523xnnpack_benchmark(
3524 name = "requantization_bench",
3525 srcs = [
3526 "bench/requantization.cc",
3527 "src/xnnpack/requantization-stubs.h",
3528 "src/xnnpack/AlignedAllocator.h",
3529 ] + MICROKERNEL_BENCHMARK_HDRS,
3530 deps = MICROKERNEL_BENCHMARK_DEPS,
3531)
3532
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3533xnnpack_benchmark(
3534 name = "rounding_bench",
3535 srcs = [
3536 "bench/rounding.cc",
3537 "src/xnnpack/math-stubs.h",
3538 "src/xnnpack/AlignedAllocator.h",
3539 ] + MICROKERNEL_BENCHMARK_HDRS,
3540 deps = MICROKERNEL_BENCHMARK_DEPS,
3541)
3542
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3543########################### Benchmarks for operators ###########################
3544
3545xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3546 name = "average_pooling_bench",
3547 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3548 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3549 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3550 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3551)
3552
3553xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3554 name = "bankers_rounding_bench",
3555 srcs = ["bench/bankers-rounding.cc"],
3556 copts = xnnpack_optional_tflite_copts(),
3557 tags = ["nowin32"],
3558 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3559)
3560
3561xnnpack_benchmark(
3562 name = "ceiling_bench",
3563 srcs = ["bench/ceiling.cc"],
3564 copts = xnnpack_optional_tflite_copts(),
3565 tags = ["nowin32"],
3566 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3567)
3568
3569xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3570 name = "channel_shuffle_bench",
3571 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3572 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3573)
3574
3575xnnpack_benchmark(
3576 name = "convolution_bench",
3577 srcs = ["bench/convolution.cc"],
3578 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3579 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3580 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3581)
3582
3583xnnpack_benchmark(
3584 name = "deconvolution_bench",
3585 srcs = ["bench/deconvolution.cc"],
3586 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3587 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3588 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3589)
3590
3591xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3592 name = "floor_bench",
3593 srcs = ["bench/floor.cc"],
3594 copts = xnnpack_optional_tflite_copts(),
3595 tags = ["nowin32"],
3596 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3597)
3598
3599xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3600 name = "global_average_pooling_bench",
3601 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3602 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3603)
3604
3605xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame^]3606 name = "hardswish_bench",
3607 srcs = ["bench/hardswish.cc"],
3608 copts = xnnpack_optional_tflite_copts(),
3609 tags = ["nowin32"],
3610 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3611)
3612
3613xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3614 name = "max_pooling_bench",
3615 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3616 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3617)
3618
3619xnnpack_benchmark(
3620 name = "sigmoid_bench",
3621 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3622 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3623 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3624 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3625)
3626
3627xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3628 name = "prelu_bench",
3629 srcs = ["bench/prelu.cc"],
3630 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3631 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3632 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3633)
3634
3635xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3636 name = "softmax_bench",
3637 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3638 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3639 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3640 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3641)
3642
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3643xnnpack_benchmark(
3644 name = "truncation_bench",
3645 srcs = ["bench/truncation.cc"],
3646 deps = OPERATOR_BENCHMARK_DEPS,
3647)
3648
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3649############################# End-to-end benchmarks ############################
3650
3651cc_library(
3652 name = "mobilenet_v1",
3653 srcs = ["models/mobilenet-v1.cc"],
3654 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3655 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3656 linkstatic = True,
3657 deps = [
3658 ":XNNPACK",
3659 "@pthreadpool",
3660 ],
3661)
3662
3663cc_library(
3664 name = "mobilenet_v2",
3665 srcs = ["models/mobilenet-v2.cc"],
3666 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3667 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3668 linkstatic = True,
3669 deps = [
3670 ":XNNPACK",
3671 "@pthreadpool",
3672 ],
3673)
3674
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3675cc_library(
3676 name = "mobilenet_v3_large",
3677 srcs = ["models/mobilenet-v3-large.cc"],
3678 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3679 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3680 linkstatic = True,
3681 deps = [
3682 ":XNNPACK",
3683 "@pthreadpool",
3684 ],
3685)
3686
3687cc_library(
3688 name = "mobilenet_v3_small",
3689 srcs = ["models/mobilenet-v3-small.cc"],
3690 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3691 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3692 linkstatic = True,
3693 deps = [
3694 ":XNNPACK",
3695 "@pthreadpool",
3696 ],
3697)
3698
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3699xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3700 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3701 srcs = [
3702 "bench/f32-dwconv-e2e.cc",
3703 "bench/end2end.h",
3704 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3705 deps = MICROKERNEL_BENCHMARK_DEPS + [
3706 ":XNNPACK",
3707 ":mobilenet_v1",
3708 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3709 ":mobilenet_v3_large",
3710 ":mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3711 ],
3712)
3713
3714xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3715 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3716 srcs = [
3717 "bench/f32-gemm-e2e.cc",
3718 "bench/end2end.h",
3719 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3720 deps = MICROKERNEL_BENCHMARK_DEPS + [
3721 ":XNNPACK",
3722 ":mobilenet_v1",
3723 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3724 ":mobilenet_v3_large",
3725 ":mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3726 ],
3727)
3728
3729xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3730 name = "end2end_bench",
3731 srcs = ["bench/end2end.cc"],
3732 deps = [
3733 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3734 ":bench_utils",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3735 ":mobilenet_v1",
3736 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3737 ":mobilenet_v3_large",
3738 ":mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3739 "@pthreadpool",
3740 ],
3741)
3742
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3743#################### Accuracy evaluation for math functions ####################
3744
3745xnnpack_benchmark(
3746 name = "f32_exp_eval",
3747 srcs = [
3748 "eval/f32-exp.cc",
3749 "src/xnnpack/AlignedAllocator.h",
3750 ] + ACCURACY_EVAL_HDRS,
3751 deps = ACCURACY_EVAL_DEPS,
3752)
3753
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3754xnnpack_benchmark(
3755 name = "f32_expminus_eval",
3756 srcs = [
3757 "eval/f32-expminus.cc",
3758 "src/xnnpack/AlignedAllocator.h",
3759 ] + ACCURACY_EVAL_HDRS,
3760 deps = ACCURACY_EVAL_DEPS,
3761)
3762
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3763xnnpack_benchmark(
3764 name = "f32_extexp_eval",
3765 srcs = [
3766 "eval/f32-extexp.cc",
3767 "src/xnnpack/AlignedAllocator.h",
3768 ] + ACCURACY_EVAL_HDRS,
3769 deps = ACCURACY_EVAL_DEPS,
3770)
3771
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3772xnnpack_unit_test(
3773 name = "f32_roundne_eval",
3774 srcs = [
3775 "eval/f32-roundne.cc",
3776 "src/xnnpack/AlignedAllocator.h",
3777 "src/xnnpack/math-stubs.h",
3778 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3779 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3780 deps = MICROKERNEL_TEST_DEPS,
3781)
3782
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3783xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3784 name = "f32_roundd_eval",
3785 srcs = [
3786 "eval/f32-roundd.cc",
3787 "src/xnnpack/AlignedAllocator.h",
3788 "src/xnnpack/math-stubs.h",
3789 ] + MICROKERNEL_TEST_HDRS,
3790 automatic = False,
3791 deps = MICROKERNEL_TEST_DEPS,
3792)
3793
3794xnnpack_unit_test(
3795 name = "f32_roundu_eval",
3796 srcs = [
3797 "eval/f32-roundu.cc",
3798 "src/xnnpack/AlignedAllocator.h",
3799 "src/xnnpack/math-stubs.h",
3800 ] + MICROKERNEL_TEST_HDRS,
3801 automatic = False,
3802 deps = MICROKERNEL_TEST_DEPS,
3803)
3804
3805xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3806 name = "f32_roundz_eval",
3807 srcs = [
3808 "eval/f32-roundz.cc",
3809 "src/xnnpack/AlignedAllocator.h",
3810 "src/xnnpack/math-stubs.h",
3811 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3812 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3813 deps = MICROKERNEL_TEST_DEPS,
3814)
3815
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3816xnnpack_benchmark(
3817 name = "f32_sigmoid_eval",
3818 srcs = [
3819 "eval/f32-sigmoid.cc",
3820 "src/xnnpack/AlignedAllocator.h",
3821 ] + ACCURACY_EVAL_HDRS,
3822 deps = ACCURACY_EVAL_DEPS,
3823)
3824
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3825######################### Unit tests for micro-kernels #########################
3826
3827xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3828 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3829 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3830 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3831 "test/gemm-microkernel-tester.h",
3832 "src/xnnpack/AlignedAllocator.h",
3833 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3834 deps = MICROKERNEL_TEST_DEPS,
3835)
3836
3837xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3838 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3839 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3840 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3841 "test/spmm-microkernel-tester.h",
3842 "src/xnnpack/AlignedAllocator.h",
3843 ] + MICROKERNEL_TEST_HDRS,
3844 deps = MICROKERNEL_TEST_DEPS,
3845)
3846
3847xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3848 name = "f32_argmaxpool_test",
3849 srcs = [
3850 "test/f32-argmaxpool.cc",
3851 "test/argmaxpool-microkernel-tester.h",
3852 "src/xnnpack/AlignedAllocator.h",
3853 ] + MICROKERNEL_TEST_HDRS,
3854 deps = MICROKERNEL_TEST_DEPS,
3855)
3856
3857xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3858 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3859 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3860 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3861 "test/avgpool-microkernel-tester.h",
3862 "src/xnnpack/AlignedAllocator.h",
3863 ] + MICROKERNEL_TEST_HDRS,
3864 deps = MICROKERNEL_TEST_DEPS,
3865)
3866
3867xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3868 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3869 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3870 "test/f32-ibilinear.cc",
3871 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3872 "src/xnnpack/AlignedAllocator.h",
3873 ] + MICROKERNEL_TEST_HDRS,
3874 deps = MICROKERNEL_TEST_DEPS,
3875)
3876
3877xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3878 name = "f16_clamp_test",
3879 srcs = [
3880 "test/f16-clamp.cc",
3881 "test/clamp-microkernel-tester.h",
3882 ] + MICROKERNEL_TEST_HDRS,
3883 deps = MICROKERNEL_TEST_DEPS,
3884)
3885
3886xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3887 name = "f32_clamp_test",
3888 srcs = [
3889 "test/f32-clamp.cc",
3890 "test/clamp-microkernel-tester.h",
3891 ] + MICROKERNEL_TEST_HDRS,
3892 deps = MICROKERNEL_TEST_DEPS,
3893)
3894
3895xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3896 name = "f32_igemm_test",
3897 srcs = [
3898 "test/f32-igemm.cc",
3899 "test/gemm-microkernel-tester.h",
3900 "src/xnnpack/AlignedAllocator.h",
3901 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3902 deps = MICROKERNEL_TEST_DEPS,
3903)
3904
3905xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3906 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3907 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3908 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3909 "test/gemm-microkernel-tester.h",
3910 "src/xnnpack/AlignedAllocator.h",
3911 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3912 deps = MICROKERNEL_TEST_DEPS,
3913)
3914
3915xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]3916 name = "f32_igemm_minmax_test",
3917 srcs = [
3918 "test/f32-igemm-minmax.cc",
3919 "test/gemm-microkernel-tester.h",
3920 "src/xnnpack/AlignedAllocator.h",
3921 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3922 deps = MICROKERNEL_TEST_DEPS,
3923)
3924
3925xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]3926 name = "f16_igemm_minmax_test",
3927 srcs = [
3928 "test/f16-igemm-minmax.cc",
3929 "test/gemm-microkernel-tester.h",
3930 "src/xnnpack/AlignedAllocator.h",
3931 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3932 deps = MICROKERNEL_TEST_DEPS,
3933)
3934
3935xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3936 name = "f32_conv_hwc_test",
3937 srcs = [
3938 "test/f32-conv-hwc.cc",
3939 "test/conv-hwc-microkernel-tester.h",
3940 "src/xnnpack/AlignedAllocator.h",
3941 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3942 deps = MICROKERNEL_TEST_DEPS,
3943)
3944
3945xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3946 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3947 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3948 "test/f32-conv-hwc2chw.cc",
3949 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3950 "src/xnnpack/AlignedAllocator.h",
3951 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3952 deps = MICROKERNEL_TEST_DEPS,
3953)
3954
3955xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3956 name = "f32_dwconv_test",
3957 srcs = [
3958 "test/f32-dwconv.cc",
3959 "test/dwconv-microkernel-tester.h",
3960 "src/xnnpack/AlignedAllocator.h",
3961 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3962 deps = MICROKERNEL_TEST_DEPS,
3963)
3964
3965xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3966 name = "f16_dwconv_minmax_test",
3967 srcs = [
3968 "test/f16-dwconv-minmax.cc",
3969 "test/dwconv-microkernel-tester.h",
3970 "src/xnnpack/AlignedAllocator.h",
3971 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3972 deps = MICROKERNEL_TEST_DEPS,
3973)
3974
3975xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3976 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3977 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3978 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3979 "test/dwconv-microkernel-tester.h",
3980 "src/xnnpack/AlignedAllocator.h",
3981 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3982 deps = MICROKERNEL_TEST_DEPS,
3983)
3984
3985xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3986 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3987 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3988 "test/f32-dwconv-chw.cc",
3989 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3990 "src/xnnpack/AlignedAllocator.h",
3991 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3992 deps = MICROKERNEL_TEST_DEPS,
3993)
3994
3995xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]3996 name = "f16_gavgpool_minmax_test",
3997 srcs = [
3998 "test/f16-gavgpool-minmax.cc",
3999 "test/gavgpool-microkernel-tester.h",
4000 "src/xnnpack/AlignedAllocator.h",
4001 ] + MICROKERNEL_TEST_HDRS,
4002 deps = MICROKERNEL_TEST_DEPS,
4003)
4004
4005xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4006 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4007 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4008 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4009 "test/gavgpool-microkernel-tester.h",
4010 "src/xnnpack/AlignedAllocator.h",
4011 ] + MICROKERNEL_TEST_HDRS,
4012 deps = MICROKERNEL_TEST_DEPS,
4013)
4014
4015xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4016 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4017 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4018 "test/f32-gavgpool-cw.cc",
4019 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4020 "src/xnnpack/AlignedAllocator.h",
4021 ] + MICROKERNEL_TEST_HDRS,
4022 deps = MICROKERNEL_TEST_DEPS,
4023)
4024
4025xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]4026 name = "f32_gemm_test",
4027 srcs = [
4028 "test/f32-gemm.cc",
4029 "test/gemm-microkernel-tester.h",
4030 "src/xnnpack/AlignedAllocator.h",
4031 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4032 deps = MICROKERNEL_TEST_DEPS,
4033)
4034
4035xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]4036 name = "f32_gemm_relu_test",
4037 srcs = [
4038 "test/f32-gemm-relu.cc",
4039 "test/gemm-microkernel-tester.h",
4040 "src/xnnpack/AlignedAllocator.h",
4041 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4042 deps = MICROKERNEL_TEST_DEPS,
4043)
4044
4045xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4046 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4047 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4048 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4049 "test/gemm-microkernel-tester.h",
4050 "src/xnnpack/AlignedAllocator.h",
4051 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4052 deps = MICROKERNEL_TEST_DEPS,
4053)
4054
4055xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4056 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4057 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4058 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4059 "test/gemm-microkernel-tester.h",
4060 "src/xnnpack/AlignedAllocator.h",
4061 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4062 deps = MICROKERNEL_TEST_DEPS,
4063)
4064
4065xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4066 name = "f16_hswish_test",
4067 srcs = [
4068 "test/f16-hswish.cc",
4069 "test/hswish-microkernel-tester.h",
4070 ] + MICROKERNEL_TEST_HDRS,
4071 deps = MICROKERNEL_TEST_DEPS,
4072)
4073
4074xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4075 name = "f32_hswish_test",
4076 srcs = [
4077 "test/f32-hswish.cc",
4078 "test/hswish-microkernel-tester.h",
4079 ] + MICROKERNEL_TEST_HDRS,
4080 deps = MICROKERNEL_TEST_DEPS,
4081)
4082
4083xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4084 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4085 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4086 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4087 "test/maxpool-microkernel-tester.h",
4088 ] + MICROKERNEL_TEST_HDRS,
4089 deps = MICROKERNEL_TEST_DEPS,
4090)
4091
4092xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4093 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4094 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4095 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4096 "test/avgpool-microkernel-tester.h",
4097 "src/xnnpack/AlignedAllocator.h",
4098 ] + MICROKERNEL_TEST_HDRS,
4099 deps = MICROKERNEL_TEST_DEPS,
4100)
4101
4102xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4103 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4104 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4105 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4106 "test/gemm-microkernel-tester.h",
4107 "src/xnnpack/AlignedAllocator.h",
4108 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4109 deps = MICROKERNEL_TEST_DEPS,
4110)
4111
4112xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4113 name = "f16_prelu_test",
4114 srcs = [
4115 "test/f16-prelu.cc",
4116 "test/prelu-microkernel-tester.h",
4117 "src/xnnpack/AlignedAllocator.h",
4118 ] + MICROKERNEL_TEST_HDRS,
4119 deps = MICROKERNEL_TEST_DEPS,
4120)
4121
4122xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4123 name = "f32_prelu_test",
4124 srcs = [
4125 "test/f32-prelu.cc",
4126 "test/prelu-microkernel-tester.h",
4127 "src/xnnpack/AlignedAllocator.h",
4128 ] + MICROKERNEL_TEST_HDRS,
4129 deps = MICROKERNEL_TEST_DEPS,
4130)
4131
4132xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4133 name = "f32_raddexpminusmax_test",
4134 srcs = [
4135 "test/f32-raddexpminusmax.cc",
4136 "test/raddexpminusmax-microkernel-tester.h",
4137 ] + MICROKERNEL_TEST_HDRS,
4138 deps = MICROKERNEL_TEST_DEPS,
4139)
4140
4141xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4142 name = "f32_raddextexp_test",
4143 srcs = [
4144 "test/f32-raddextexp.cc",
4145 "test/raddextexp-microkernel-tester.h",
4146 ] + MICROKERNEL_TEST_HDRS,
4147 deps = MICROKERNEL_TEST_DEPS,
4148)
4149
4150xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4151 name = "f32_raddstoreexpminusmax_test",
4152 srcs = [
4153 "test/f32-raddstoreexpminusmax.cc",
4154 "test/raddstoreexpminusmax-microkernel-tester.h",
4155 ] + MICROKERNEL_TEST_HDRS,
4156 deps = MICROKERNEL_TEST_DEPS,
4157)
4158
4159xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4160 name = "f32_rmax_test",
4161 srcs = [
4162 "test/f32-rmax.cc",
4163 "test/rmax-microkernel-tester.h",
4164 ] + MICROKERNEL_TEST_HDRS,
4165 deps = MICROKERNEL_TEST_DEPS,
4166)
4167
4168xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4169 name = "f32_sigmoid_test",
4170 srcs = [
4171 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4172 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4173 ] + MICROKERNEL_TEST_HDRS,
4174 deps = MICROKERNEL_TEST_DEPS,
4175)
4176
4177xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4178 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4179 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4180 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4181 "test/spmm-microkernel-tester.h",
4182 "src/xnnpack/AlignedAllocator.h",
4183 ] + MICROKERNEL_TEST_HDRS,
4184 deps = MICROKERNEL_TEST_DEPS,
4185)
4186
4187xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]4188 name = "f16_vadd_minmax_test",
4189 srcs = [
4190 "test/f16-vadd-minmax.cc",
4191 "test/vbinary-microkernel-tester.h",
4192 ] + MICROKERNEL_TEST_HDRS,
4193 deps = MICROKERNEL_TEST_DEPS,
4194)
4195
4196xnnpack_unit_test(
4197 name = "f16_vaddc_minmax_test",
4198 srcs = [
4199 "test/f16-vaddc-minmax.cc",
4200 "test/vbinaryc-microkernel-tester.h",
4201 ] + MICROKERNEL_TEST_HDRS,
4202 deps = MICROKERNEL_TEST_DEPS,
4203)
4204
4205xnnpack_unit_test(
4206 name = "f16_vdiv_minmax_test",
4207 srcs = [
4208 "test/f16-vdiv-minmax.cc",
4209 "test/vbinary-microkernel-tester.h",
4210 ] + MICROKERNEL_TEST_HDRS,
4211 deps = MICROKERNEL_TEST_DEPS,
4212)
4213
4214xnnpack_unit_test(
4215 name = "f16_vdivc_minmax_test",
4216 srcs = [
4217 "test/f16-vdivc-minmax.cc",
4218 "test/vbinaryc-microkernel-tester.h",
4219 ] + MICROKERNEL_TEST_HDRS,
4220 deps = MICROKERNEL_TEST_DEPS,
4221)
4222
4223xnnpack_unit_test(
4224 name = "f16_vrdivc_minmax_test",
4225 srcs = [
4226 "test/f16-vrdivc-minmax.cc",
4227 "test/vbinaryc-microkernel-tester.h",
4228 ] + MICROKERNEL_TEST_HDRS,
4229 deps = MICROKERNEL_TEST_DEPS,
4230)
4231
4232xnnpack_unit_test(
4233 name = "f16_vmax_test",
4234 srcs = [
4235 "test/f16-vmax.cc",
4236 "test/vbinary-microkernel-tester.h",
4237 ] + MICROKERNEL_TEST_HDRS,
4238 deps = MICROKERNEL_TEST_DEPS,
4239)
4240
4241xnnpack_unit_test(
4242 name = "f16_vmaxc_test",
4243 srcs = [
4244 "test/f16-vmaxc.cc",
4245 "test/vbinaryc-microkernel-tester.h",
4246 ] + MICROKERNEL_TEST_HDRS,
4247 deps = MICROKERNEL_TEST_DEPS,
4248)
4249
4250xnnpack_unit_test(
4251 name = "f16_vmin_test",
4252 srcs = [
4253 "test/f16-vmin.cc",
4254 "test/vbinary-microkernel-tester.h",
4255 ] + MICROKERNEL_TEST_HDRS,
4256 deps = MICROKERNEL_TEST_DEPS,
4257)
4258
4259xnnpack_unit_test(
4260 name = "f16_vminc_test",
4261 srcs = [
4262 "test/f16-vminc.cc",
4263 "test/vbinaryc-microkernel-tester.h",
4264 ] + MICROKERNEL_TEST_HDRS,
4265 deps = MICROKERNEL_TEST_DEPS,
4266)
4267
4268xnnpack_unit_test(
4269 name = "f16_vmul_minmax_test",
4270 srcs = [
4271 "test/f16-vmul-minmax.cc",
4272 "test/vbinary-microkernel-tester.h",
4273 ] + MICROKERNEL_TEST_HDRS,
4274 deps = MICROKERNEL_TEST_DEPS,
4275)
4276
4277xnnpack_unit_test(
4278 name = "f16_vmulc_minmax_test",
4279 srcs = [
4280 "test/f16-vmulc-minmax.cc",
4281 "test/vbinaryc-microkernel-tester.h",
4282 ] + MICROKERNEL_TEST_HDRS,
4283 deps = MICROKERNEL_TEST_DEPS,
4284)
4285
4286xnnpack_unit_test(
4287 name = "f16_vsub_minmax_test",
4288 srcs = [
4289 "test/f16-vsub-minmax.cc",
4290 "test/vbinary-microkernel-tester.h",
4291 ] + MICROKERNEL_TEST_HDRS,
4292 deps = MICROKERNEL_TEST_DEPS,
4293)
4294
4295xnnpack_unit_test(
4296 name = "f16_vsubc_minmax_test",
4297 srcs = [
4298 "test/f16-vsubc-minmax.cc",
4299 "test/vbinaryc-microkernel-tester.h",
4300 ] + MICROKERNEL_TEST_HDRS,
4301 deps = MICROKERNEL_TEST_DEPS,
4302)
4303
4304xnnpack_unit_test(
4305 name = "f16_vrsubc_minmax_test",
4306 srcs = [
4307 "test/f16-vrsubc-minmax.cc",
4308 "test/vbinaryc-microkernel-tester.h",
4309 ] + MICROKERNEL_TEST_HDRS,
4310 deps = MICROKERNEL_TEST_DEPS,
4311)
4312
4313xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4314 name = "f32_vabs_test",
4315 srcs = [
4316 "test/f32-vabs.cc",
4317 "test/vunary-microkernel-tester.h",
4318 ] + MICROKERNEL_TEST_HDRS,
4319 deps = MICROKERNEL_TEST_DEPS,
4320)
4321
4322xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4323 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4324 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4325 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4326 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4327 ] + MICROKERNEL_TEST_HDRS,
4328 deps = MICROKERNEL_TEST_DEPS,
4329)
4330
4331xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4332 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4333 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4334 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4335 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4336 ] + MICROKERNEL_TEST_HDRS,
4337 deps = MICROKERNEL_TEST_DEPS,
4338)
4339
4340xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4341 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4342 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4343 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4344 "test/vbinary-microkernel-tester.h",
4345 ] + MICROKERNEL_TEST_HDRS,
4346 deps = MICROKERNEL_TEST_DEPS,
4347)
4348
4349xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4350 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4351 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4352 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4353 "test/vbinaryc-microkernel-tester.h",
4354 ] + MICROKERNEL_TEST_HDRS,
4355 deps = MICROKERNEL_TEST_DEPS,
4356)
4357
4358xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4359 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4360 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4361 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4362 "test/vbinaryc-microkernel-tester.h",
4363 ] + MICROKERNEL_TEST_HDRS,
4364 deps = MICROKERNEL_TEST_DEPS,
4365)
4366
4367xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4368 name = "f32_vmax_test",
4369 srcs = [
4370 "test/f32-vmax.cc",
4371 "test/vbinary-microkernel-tester.h",
4372 ] + MICROKERNEL_TEST_HDRS,
4373 deps = MICROKERNEL_TEST_DEPS,
4374)
4375
4376xnnpack_unit_test(
4377 name = "f32_vmaxc_test",
4378 srcs = [
4379 "test/f32-vmaxc.cc",
4380 "test/vbinaryc-microkernel-tester.h",
4381 ] + MICROKERNEL_TEST_HDRS,
4382 deps = MICROKERNEL_TEST_DEPS,
4383)
4384
4385xnnpack_unit_test(
4386 name = "f32_vmin_test",
4387 srcs = [
4388 "test/f32-vmin.cc",
4389 "test/vbinary-microkernel-tester.h",
4390 ] + MICROKERNEL_TEST_HDRS,
4391 deps = MICROKERNEL_TEST_DEPS,
4392)
4393
4394xnnpack_unit_test(
4395 name = "f32_vminc_test",
4396 srcs = [
4397 "test/f32-vminc.cc",
4398 "test/vbinaryc-microkernel-tester.h",
4399 ] + MICROKERNEL_TEST_HDRS,
4400 deps = MICROKERNEL_TEST_DEPS,
4401)
4402
4403xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4404 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4405 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4406 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4407 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4408 ] + MICROKERNEL_TEST_HDRS,
4409 deps = MICROKERNEL_TEST_DEPS,
4410)
4411
4412xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4413 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4414 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4415 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4416 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4417 ] + MICROKERNEL_TEST_HDRS,
4418 deps = MICROKERNEL_TEST_DEPS,
4419)
4420
4421xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4422 name = "f16_vmulcaddc_minmax_test",
4423 srcs = [
4424 "test/f16-vmulcaddc-minmax.cc",
4425 "test/vmulcaddc-microkernel-tester.h",
4426 "src/xnnpack/AlignedAllocator.h",
4427 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4428 deps = MICROKERNEL_TEST_DEPS,
4429)
4430
4431xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4432 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4433 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4434 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4435 "test/vmulcaddc-microkernel-tester.h",
4436 "src/xnnpack/AlignedAllocator.h",
4437 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4438 deps = MICROKERNEL_TEST_DEPS,
4439)
4440
4441xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]4442 name = "f32_vlrelu_test",
4443 srcs = [
4444 "test/f32-vlrelu.cc",
4445 "test/vunary-microkernel-tester.h",
4446 ] + MICROKERNEL_TEST_HDRS,
4447 deps = MICROKERNEL_TEST_DEPS,
4448)
4449
4450xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4451 name = "f32_vneg_test",
4452 srcs = [
4453 "test/f32-vneg.cc",
4454 "test/vunary-microkernel-tester.h",
4455 ] + MICROKERNEL_TEST_HDRS,
4456 deps = MICROKERNEL_TEST_DEPS,
4457)
4458
4459xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4460 name = "f32_vrndne_test",
4461 srcs = [
4462 "test/f32-vrndne.cc",
4463 "test/vunary-microkernel-tester.h",
4464 ] + MICROKERNEL_TEST_HDRS,
4465 deps = MICROKERNEL_TEST_DEPS,
4466)
4467
4468xnnpack_unit_test(
4469 name = "f32_vrndz_test",
4470 srcs = [
4471 "test/f32-vrndz.cc",
4472 "test/vunary-microkernel-tester.h",
4473 ] + MICROKERNEL_TEST_HDRS,
4474 deps = MICROKERNEL_TEST_DEPS,
4475)
4476
4477xnnpack_unit_test(
4478 name = "f32_vrndu_test",
4479 srcs = [
4480 "test/f32-vrndu.cc",
4481 "test/vunary-microkernel-tester.h",
4482 ] + MICROKERNEL_TEST_HDRS,
4483 deps = MICROKERNEL_TEST_DEPS,
4484)
4485
4486xnnpack_unit_test(
4487 name = "f32_vrndd_test",
4488 srcs = [
4489 "test/f32-vrndd.cc",
4490 "test/vunary-microkernel-tester.h",
4491 ] + MICROKERNEL_TEST_HDRS,
4492 deps = MICROKERNEL_TEST_DEPS,
4493)
4494
4495xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4496 name = "f32_vscale_test",
4497 srcs = [
4498 "test/f32-vscale.cc",
4499 "test/vscale-microkernel-tester.h",
4500 ] + MICROKERNEL_TEST_HDRS,
4501 deps = MICROKERNEL_TEST_DEPS,
4502)
4503
4504xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4505 name = "f32_vscaleexpminusmax_test",
4506 srcs = [
4507 "test/f32-vscaleexpminusmax.cc",
4508 "test/vscaleexpminusmax-microkernel-tester.h",
4509 ] + MICROKERNEL_TEST_HDRS,
4510 deps = MICROKERNEL_TEST_DEPS,
4511)
4512
4513xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4514 name = "f32_vscaleextexp_test",
4515 srcs = [
4516 "test/f32-vscaleextexp.cc",
4517 "test/vscaleextexp-microkernel-tester.h",
4518 ] + MICROKERNEL_TEST_HDRS,
4519 deps = MICROKERNEL_TEST_DEPS,
4520)
4521
4522xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4523 name = "f32_vsqr_test",
4524 srcs = [
4525 "test/f32-vsqr.cc",
4526 "test/vunary-microkernel-tester.h",
4527 ] + MICROKERNEL_TEST_HDRS,
4528 deps = MICROKERNEL_TEST_DEPS,
4529)
4530
4531xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4532 name = "f32_vsqrdiff_test",
4533 srcs = [
4534 "test/f32-vsqrdiff.cc",
4535 "test/vbinary-microkernel-tester.h",
4536 ] + MICROKERNEL_TEST_HDRS,
4537 deps = MICROKERNEL_TEST_DEPS,
4538)
4539
4540xnnpack_unit_test(
4541 name = "f32_vsqrdiffc_test",
4542 srcs = [
4543 "test/f32-vsqrdiffc.cc",
4544 "test/vbinaryc-microkernel-tester.h",
4545 ] + MICROKERNEL_TEST_HDRS,
4546 deps = MICROKERNEL_TEST_DEPS,
4547)
4548
4549xnnpack_unit_test(
4550 name = "f32_vrsqrdiffc_test",
4551 srcs = [
4552 "test/f32-vrsqrdiffc.cc",
4553 "test/vbinaryc-microkernel-tester.h",
4554 ] + MICROKERNEL_TEST_HDRS,
4555 deps = MICROKERNEL_TEST_DEPS,
4556)
4557
4558xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4559 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4560 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4561 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4562 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4563 ] + MICROKERNEL_TEST_HDRS,
4564 deps = MICROKERNEL_TEST_DEPS,
4565)
4566
4567xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4568 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4569 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4570 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4571 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4572 ] + MICROKERNEL_TEST_HDRS,
4573 deps = MICROKERNEL_TEST_DEPS,
4574)
4575
4576xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4577 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4578 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4579 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4580 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4581 ] + MICROKERNEL_TEST_HDRS,
4582 deps = MICROKERNEL_TEST_DEPS,
4583)
4584
4585xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4586 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4587 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4588 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4589 "test/avgpool-microkernel-tester.h",
4590 "src/xnnpack/AlignedAllocator.h",
4591 ] + MICROKERNEL_TEST_HDRS,
4592 deps = MICROKERNEL_TEST_DEPS,
4593)
4594
4595xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4596 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4597 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4598 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4599 "test/gemm-microkernel-tester.h",
4600 "src/xnnpack/AlignedAllocator.h",
4601 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4602 deps = MICROKERNEL_TEST_DEPS,
4603)
4604
4605xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4606 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4607 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4608 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4609 "test/dwconv-microkernel-tester.h",
4610 "src/xnnpack/AlignedAllocator.h",
4611 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4612 deps = MICROKERNEL_TEST_DEPS,
4613)
4614
4615xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4616 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4617 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4618 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4619 "test/gavgpool-microkernel-tester.h",
4620 "src/xnnpack/AlignedAllocator.h",
4621 ] + MICROKERNEL_TEST_HDRS,
4622 deps = MICROKERNEL_TEST_DEPS,
4623)
4624
4625xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4626 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4627 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4628 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4629 "test/gemm-microkernel-tester.h",
4630 "src/xnnpack/AlignedAllocator.h",
4631 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4632 deps = MICROKERNEL_TEST_DEPS,
4633)
4634
4635xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4636 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4637 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4638 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4639 "test/vadd-microkernel-tester.h",
4640 ] + MICROKERNEL_TEST_HDRS,
4641 deps = MICROKERNEL_TEST_DEPS,
4642)
4643
4644xnnpack_unit_test(
4645 name = "u8_clamp_test",
4646 srcs = [
4647 "test/u8-clamp.cc",
4648 "test/clamp-microkernel-tester.h",
4649 ] + MICROKERNEL_TEST_HDRS,
4650 deps = MICROKERNEL_TEST_DEPS,
4651)
4652
4653xnnpack_unit_test(
4654 name = "u8_lut32norm_test",
4655 srcs = [
4656 "test/u8-lut32norm.cc",
4657 "test/lut-norm-microkernel-tester.h",
4658 ] + MICROKERNEL_TEST_HDRS,
4659 deps = MICROKERNEL_TEST_DEPS,
4660)
4661
4662xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4663 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4664 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4665 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4666 "test/maxpool-microkernel-tester.h",
4667 ] + MICROKERNEL_TEST_HDRS,
4668 deps = MICROKERNEL_TEST_DEPS,
4669)
4670
4671xnnpack_unit_test(
4672 name = "u8_rmax_test",
4673 srcs = [
4674 "test/u8-rmax.cc",
4675 "test/rmax-microkernel-tester.h",
4676 ] + MICROKERNEL_TEST_HDRS,
4677 deps = MICROKERNEL_TEST_DEPS,
4678)
4679
4680xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4681 name = "x32_fill_test",
4682 srcs = [
4683 "test/x32-fill.cc",
4684 "test/fill-microkernel-tester.h",
4685 ] + MICROKERNEL_TEST_HDRS,
4686 deps = MICROKERNEL_TEST_DEPS,
4687)
4688
4689xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4690 name = "x32_packx_test",
4691 srcs = [
4692 "test/x32-packx.cc",
4693 "test/pack-microkernel-tester.h",
4694 "src/xnnpack/AlignedAllocator.h",
4695 ] + MICROKERNEL_TEST_HDRS,
4696 deps = MICROKERNEL_TEST_DEPS,
4697)
4698
4699xnnpack_unit_test(
4700 name = "x32_pad_test",
4701 srcs = [
4702 "test/x32-pad.cc",
4703 "test/pad-microkernel-tester.h",
4704 ] + MICROKERNEL_TEST_HDRS,
4705 deps = MICROKERNEL_TEST_DEPS,
4706)
4707
4708xnnpack_unit_test(
4709 name = "x32_unpool_test",
4710 srcs = [
4711 "test/x32-unpool.cc",
4712 "test/unpool-microkernel-tester.h",
4713 ] + MICROKERNEL_TEST_HDRS,
4714 deps = MICROKERNEL_TEST_DEPS,
4715)
4716
4717xnnpack_unit_test(
4718 name = "x32_zip_test",
4719 srcs = [
4720 "test/x32-zip.cc",
4721 "test/zip-microkernel-tester.h",
4722 ] + MICROKERNEL_TEST_HDRS,
4723 deps = MICROKERNEL_TEST_DEPS,
4724)
4725
4726xnnpack_unit_test(
4727 name = "x8_lut_test",
4728 srcs = [
4729 "test/x8-lut.cc",
4730 "test/lut-microkernel-tester.h",
4731 ] + MICROKERNEL_TEST_HDRS,
4732 deps = MICROKERNEL_TEST_DEPS,
4733)
4734
4735xnnpack_unit_test(
4736 name = "x8_zip_test",
4737 srcs = [
4738 "test/x8-zip.cc",
4739 "test/zip-microkernel-tester.h",
4740 ] + MICROKERNEL_TEST_HDRS,
4741 deps = MICROKERNEL_TEST_DEPS,
4742)
4743
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4744xnnpack_unit_test(
4745 name = "requantization_test",
4746 srcs = [
4747 "src/xnnpack/requantization-stubs.h",
4748 "test/requantization.cc",
4749 "test/requantization-tester.h",
4750 ] + MICROKERNEL_TEST_HDRS,
4751 deps = MICROKERNEL_TEST_DEPS,
4752)
4753
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4754########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4755
4756xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4757 name = "operator_size_test",
4758 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4759 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4760)
4761
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4762xnnpack_binary(
4763 name = "subgraph_size_test",
4764 srcs = ["test/subgraph-size.c"],
4765 deps = [":XNNPACK"],
4766)
4767
4768########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4769
4770xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4771 name = "abs_nc_test",
4772 srcs = [
4773 "test/abs-nc.cc",
4774 "test/abs-operator-tester.h",
4775 ],
4776 deps = OPERATOR_TEST_DEPS,
4777)
4778
4779xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4780 name = "add_nd_test",
4781 srcs = [
4782 "test/add-nd.cc",
4783 "test/binary-elementwise-operator-tester.h",
4784 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4785 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4786)
4787
4788xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4789 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4790 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4791 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4792 "test/argmax-pooling-operator-tester.h",
4793 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4794 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4795)
4796
4797xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4798 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4799 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4800 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4801 "test/average-pooling-operator-tester.h",
4802 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4803 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4804)
4805
4806xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4807 name = "bankers_rounding_nc_test",
4808 srcs = [
4809 "test/bankers-rounding-nc.cc",
4810 "test/bankers-rounding-operator-tester.h",
4811 ],
4812 deps = OPERATOR_TEST_DEPS,
4813)
4814
4815xnnpack_unit_test(
4816 name = "ceiling_nc_test",
4817 srcs = [
4818 "test/ceiling-nc.cc",
4819 "test/ceiling-operator-tester.h",
4820 ],
4821 deps = OPERATOR_TEST_DEPS,
4822)
4823
4824xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4825 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4826 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4827 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4828 "test/channel-shuffle-operator-tester.h",
4829 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4830 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4831)
4832
4833xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4834 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4835 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4836 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4837 "test/clamp-operator-tester.h",
4838 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4839 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4840)
4841
4842xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4843 name = "constant_pad_nd_test",
4844 srcs = [
4845 "test/constant-pad-nd.cc",
4846 "test/constant-pad-operator-tester.h",
4847 ],
4848 deps = OPERATOR_TEST_DEPS,
4849)
4850
4851xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4852 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4853 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4854 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4855 "test/convolution-operator-tester.h",
4856 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4857 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4858)
4859
4860xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4861 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4862 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4863 "test/convolution-nchw.cc",
4864 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4865 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4866 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4867)
4868
4869xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]4870 name = "copy_nc_test",
4871 srcs = [
4872 "test/copy-nc.cc",
4873 "test/copy-operator-tester.h",
4874 ],
4875 deps = OPERATOR_TEST_DEPS,
4876)
4877
4878xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4879 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4880 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4881 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4882 "test/deconvolution-operator-tester.h",
4883 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4884 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4885)
4886
4887xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4888 name = "divide_nd_test",
4889 srcs = [
4890 "test/binary-elementwise-operator-tester.h",
4891 "test/divide-nd.cc",
4892 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4893 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4894)
4895
4896xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4897 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4898 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4899 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4900 "test/fully-connected-operator-tester.h",
4901 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4902 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4903)
4904
4905xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4906 name = "floor_nc_test",
4907 srcs = [
4908 "test/floor-nc.cc",
4909 "test/floor-operator-tester.h",
4910 ],
4911 deps = OPERATOR_TEST_DEPS,
4912)
4913
4914xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4915 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4916 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4917 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4918 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -0700[diff] [blame]4919 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4920 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4921)
4922
4923xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4924 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4925 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4926 "test/global-average-pooling-ncw.cc",
4927 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4928 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4929 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4930)
4931
4932xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4933 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4934 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4935 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4936 "test/hardswish-operator-tester.h",
4937 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4938 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4939)
4940
4941xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4942 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4943 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4944 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4945 "test/leaky-relu-operator-tester.h",
4946 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4947 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4948)
4949
4950xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4951 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4952 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4953 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4954 "test/max-pooling-operator-tester.h",
4955 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4956 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4957)
4958
4959xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4960 name = "maximum_nd_test",
4961 srcs = [
4962 "test/binary-elementwise-operator-tester.h",
4963 "test/maximum-nd.cc",
4964 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4965 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4966)
4967
4968xnnpack_unit_test(
4969 name = "minimum_nd_test",
4970 srcs = [
4971 "test/binary-elementwise-operator-tester.h",
4972 "test/minimum-nd.cc",
4973 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4974 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4975)
4976
4977xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4978 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4979 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4980 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4981 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4982 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4983 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4984)
4985
4986xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4987 name = "negate_nc_test",
4988 srcs = [
4989 "test/negate-nc.cc",
4990 "test/negate-operator-tester.h",
4991 ],
4992 deps = OPERATOR_TEST_DEPS,
4993)
4994
4995xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4996 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4997 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4998 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4999 "test/prelu-operator-tester.h",
5000 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5001 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5002)
5003
5004xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5005 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5006 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5007 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5008 "test/resize-bilinear-operator-tester.h",
5009 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5010 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5011)
5012
5013xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5014 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5015 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5016 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5017 "test/sigmoid-operator-tester.h",
5018 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5019 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5020)
5021
5022xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5023 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5024 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5025 "test/softmax-nc.cc",
5026 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5027 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5028 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5029)
5030
5031xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]5032 name = "square_nc_test",
5033 srcs = [
5034 "test/square-nc.cc",
5035 "test/square-operator-tester.h",
5036 ],
5037 deps = OPERATOR_TEST_DEPS,
5038)
5039
5040xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]5041 name = "squared_difference_nd_test",
5042 srcs = [
5043 "test/binary-elementwise-operator-tester.h",
5044 "test/squared-difference-nd.cc",
5045 ],
5046 deps = OPERATOR_TEST_DEPS,
5047)
5048
5049xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5050 name = "subtract_nd_test",
5051 srcs = [
5052 "test/binary-elementwise-operator-tester.h",
5053 "test/subtract-nd.cc",
5054 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5055 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5056)
5057
5058xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5059 name = "truncation_nc_test",
5060 srcs = [
5061 "test/truncation-nc.cc",
5062 "test/truncation-operator-tester.h",
5063 ],
5064 deps = OPERATOR_TEST_DEPS,
5065)
5066
5067xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5068 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5069 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5070 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5071 "test/unpooling-operator-tester.h",
5072 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5073 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5074)
5075
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5076############################### Misc unit tests ###############################
5077
5078xnnpack_unit_test(
5079 name = "memory_planner_test",
5080 srcs = [
5081 "test/memory-planner-test.cc",
5082 ],
5083 deps = [
5084 ":XNNPACK",
5085 ":memory_planner",
5086 ],
5087)
5088
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5089############################# Build configurations #############################
5090
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5091# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5092config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5093 name = "xnn_enable_assembly_explicit_true",
5094 define_values = {"xnn_enable_assembly": "true"},
5095)
5096
5097# Disables usage of assembly kernels.
5098config_setting(
5099 name = "xnn_enable_assembly_explicit_false",
5100 define_values = {"xnn_enable_assembly": "false"},
5101)
5102
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]5103# Enables usage of sparse inference.
5104config_setting(
5105 name = "xnn_enable_sparse_explicit_true",
5106 define_values = {"xnn_enable_sparse": "true"},
5107)
5108
5109# Disables usage of sparse inference.
5110config_setting(
5111 name = "xnn_enable_sparse_explicit_false",
5112 define_values = {"xnn_enable_sparse": "false"},
5113)
5114
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]5115# Disables usage of HMP-aware optimizations.
5116config_setting(
5117 name = "xnn_enable_hmp_explicit_false",
5118 define_values = {"xnn_enable_hmp": "false"},
5119)
5120
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5121# Enable usage of optimized memory allocation
5122config_setting(
5123 name = "xnn_enable_memopt_explicit_true",
5124 define_values = {"xnnpack_enable_memopt": "true"},
5125)
5126
5127# Disable usage of optimized memory allocation
5128config_setting(
5129 name = "xnn_enable_memopt_explicit_false",
5130 define_values = {"xnnpack_enable_memopt": "false"},
5131)
5132
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5133# Builds with -c dbg
5134config_setting(
5135 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5136 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5137 "compilation_mode": "dbg",
5138 },
5139)
5140
5141# Builds with -c opt
5142config_setting(
5143 name = "optimized_build",
5144 values = {
5145 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5146 },
5147)
5148
5149config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5150 name = "linux_k8",
5151 values = {"cpu": "k8"},
5152)
5153
5154config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5155 name = "linux_arm",
5156 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]5157)
5158
5159config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -0700[diff] [blame]5160 name = "linux_armeabi",
5161 values = {"cpu": "armeabi"},
5162)
5163
5164config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]5165 name = "linux_armhf",
5166 values = {"cpu": "armhf"},
5167)
5168
5169config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -0700[diff] [blame]5170 name = "linux_armv7a",
5171 values = {"cpu": "armv7a"},
5172)
5173
5174config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5175 name = "linux_aarch64",
5176 values = {"cpu": "aarch64"},
5177)
5178
5179config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5180 name = "android",
5181 values = {"crosstool_top": "//external:android/crosstool"},
5182)
5183
5184config_setting(
5185 name = "android_armv7",
5186 values = {
5187 "crosstool_top": "//external:android/crosstool",
5188 "cpu": "armeabi-v7a",
5189 },
5190)
5191
5192config_setting(
5193 name = "android_arm64",
5194 values = {
5195 "crosstool_top": "//external:android/crosstool",
5196 "cpu": "arm64-v8a",
5197 },
5198)
5199
5200config_setting(
5201 name = "android_x86",
5202 values = {
5203 "crosstool_top": "//external:android/crosstool",
5204 "cpu": "x86",
5205 },
5206)
5207
5208config_setting(
5209 name = "android_x86_64",
5210 values = {
5211 "crosstool_top": "//external:android/crosstool",
5212 "cpu": "x86_64",
5213 },
5214)
5215
5216config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5217 name = "windows_x86_64",
5218 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5219)
5220
5221config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5222 name = "windows_x86_64_clang",
5223 values = {
5224 "compiler": "clang-cl",
5225 "cpu": "x64_windows",
5226 },
5227)
5228
5229config_setting(
5230 name = "windows_x86_64_mingw",
5231 values = {
5232 "compiler": "mingw-gcc",
5233 "cpu": "x64_windows",
5234 },
5235)
5236
5237config_setting(
5238 name = "windows_x86_64_msys",
5239 values = {
5240 "compiler": "msys-gcc",
5241 "cpu": "x64_windows",
5242 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5243)
5244
5245config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]5246 name = "macos_x86_64",
5247 values = {
5248 "apple_platform_type": "macos",
5249 "cpu": "darwin",
5250 },
5251)
5252
5253config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5254 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5255 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5256)
5257
5258config_setting(
5259 name = "emscripten_wasm",
5260 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5261 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5262 "cpu": "wasm",
5263 },
5264)
5265
5266config_setting(
5267 name = "emscripten_wasmsimd",
5268 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5269 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5270 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]5271 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5272 },
5273)
5274
5275config_setting(
5276 name = "emscripten_asmjs",
5277 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5278 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5279 "cpu": "asmjs",
5280 },
5281)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5282
5283config_setting(
5284 name = "ios_armv7",
5285 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5286 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5287 "cpu": "ios_armv7",
5288 },
5289)
5290
5291config_setting(
5292 name = "ios_arm64",
5293 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5294 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5295 "cpu": "ios_arm64",
5296 },
5297)
5298
5299config_setting(
5300 name = "ios_arm64e",
5301 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5302 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5303 "cpu": "ios_arm64e",
5304 },
5305)
5306
5307config_setting(
5308 name = "ios_x86",
5309 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5310 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5311 "cpu": "ios_i386",
5312 },
5313)
5314
5315config_setting(
5316 name = "ios_x86_64",
5317 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5318 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5319 "cpu": "ios_x86_64",
5320 },
5321)
5322
5323config_setting(
5324 name = "watchos_armv7k",
5325 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5326 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5327 "cpu": "watchos_armv7k",
5328 },
5329)
5330
5331config_setting(
5332 name = "watchos_arm64_32",
5333 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5334 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5335 "cpu": "watchos_arm64_32",
5336 },
5337)
5338
5339config_setting(
5340 name = "watchos_x86",
5341 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5342 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5343 "cpu": "watchos_i386",
5344 },
5345)
5346
5347config_setting(
5348 name = "watchos_x86_64",
5349 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5350 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5351 "cpu": "watchos_x86_64",
5352 },
5353)
5354
5355config_setting(
5356 name = "tvos_arm64",
5357 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5358 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5359 "cpu": "tvos_arm64",
5360 },
5361)
5362
5363config_setting(
5364 name = "tvos_x86_64",
5365 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5366 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5367 "cpu": "tvos_x86_64",
5368 },
5369)